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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s2 3declare i1 @llvm.amdgcn.class.f32(float, i32)4 5; Produces error after adding an implicit def to v_cndmask_b326 7; GCN-LABEL: {{^}}vcc_shrink_vcc_def:8; GCN: s_cmp_eq_u32 s{{[0-9]+}}, 0{{$}}9; GCN: s_cselect_b64 vcc, -1, 010; GCN: v_cndmask_b32_e32 v{{[0-9]+}}, 1.0, v{{[0-9]+}}, vcc11define amdgpu_kernel void @vcc_shrink_vcc_def(float %arg, i32 %arg1, float %arg2, i32 %arg3) {12bb0:13 %tmp = icmp sgt i32 %arg1, 414 %c = icmp eq i32 %arg3, 015 %tmp4 = select i1 %c, float %arg, float 1.000000e+0016 %tmp5 = fcmp ogt float %arg2, 0.000000e+0017 %tmp6 = fcmp olt float %arg2, 1.000000e+0018 %tmp7 = fcmp olt float %arg, %tmp419 %tmp8 = and i1 %tmp5, %tmp620 %tmp9 = and i1 %tmp8, %tmp721 br i1 %tmp9, label %bb1, label %bb222 23bb1:24 store volatile i32 0, ptr addrspace(1) poison25 br label %bb226 27bb2:28 ret void29}30 31; The undef flag on the condition src must be preserved on the32; implicit vcc use to avoid verifier errors.33 34; GCN-LABEL: {{^}}preserve_condition_undef_flag:35; GCN-NOT: vcc36; GCN: s_endpgm37define amdgpu_kernel void @preserve_condition_undef_flag(float %arg, i32 %arg1, float %arg2) {38bb0:39 %tmp = icmp sgt i32 %arg1, 440 %mask = freeze i32 poison41 %undef0 = call i1 @llvm.amdgcn.class.f32(float poison, i32 %mask)42 %tmp4 = select i1 %undef0, float %arg, float 1.000000e+0043 %tmp5 = fcmp ogt float %arg2, 0.000000e+0044 %tmp6 = fcmp olt float %arg2, 1.000000e+0045 %tmp7 = fcmp olt float %arg, poison46 %tmp8 = and i1 %tmp5, %tmp647 %tmp9 = and i1 %tmp8, %tmp748 br i1 %tmp9, label %bb1, label %bb249 50bb1:51 store volatile i32 0, ptr addrspace(1) poison52 br label %bb253 54bb2:55 ret void56}57