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1# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -run-pass=register-coalescer,rename-independent-subregs %s -o - | FileCheck -check-prefix=GCN %s2# RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx803 -passes=register-coalescer,rename-independent-subregs %s -o - | FileCheck -check-prefix=GCN %s3 4# This test is for a bug where the following happens:5#6# Inside the loop, %29.sub2 is used in a V_LSHLREV whose result is then used7# in an LDS read. %29 is a 128 bit value that is linked by copies to8# %45 (from phi elimination), %28 (the value in the loop pre-header),9# %31 (defined and subreg-modified in the loop, and used after the loop)10# and %30:11#12# %45:vreg_128 = COPY killed %2813# bb.1:14# %29:vreg_128 = COPY killed %4515# %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec16# %31:vreg_128 = COPY killed %2917# %31.sub1:vreg_128 = COPY %3418# %30:vreg_128 = COPY %3119# %45:vreg_128 = COPY killed %3020# S_CBRANCH_EXECNZ %bb.39, implicit $exec21# S_BRANCH %bb.4022# bb.2:23# undef %32.sub0:vreg_128 = COPY killed %31.sub024#25# So this coalesces together into a single 128 bit value whose sub1 is modified26# in the loop, but the sub2 used in the V_LSHLREV is not modified in the loop.27#28# The bug is that the coalesced value has a L00000004 subrange (for sub2) that29# says that it is not live up to the end of the loop block. The symptom is that30# Rename Independent Subregs separates sub2 into its own register, and it is31# not live round the loop, so that pass adds an IMPLICIT_DEF for it just before32# the loop backedge.33 34# GCN: bb.1:35# GCN: V_LSHLREV_B32_e32 2, [[val:%[0-9][0-9]*]].sub236# GCN-NOT: [[val]]:vreg_128 = IMPLICIT_DEF37 38---39name: _amdgpu_cs_main40tracksRegLiveness: true41body: |42 bb.0:43 successors: %bb.144 45 %3:sgpr_32 = S_MOV_B32 046 undef %19.sub1:vreg_128 = COPY undef %347 %4:sgpr_32 = S_MOV_B32 148 %5:sgpr_32 = S_MOV_B32 249 %11:sreg_32_xm0 = S_MOV_B32 25550 undef %28.sub0:vreg_128 = COPY killed %351 %28.sub1:vreg_128 = COPY killed %452 %28.sub2:vreg_128 = COPY killed %1153 %28.sub3:vreg_128 = COPY killed %554 %2:sreg_64 = S_MOV_B64 055 %34:sreg_32 = S_MOV_B32 756 %37:vreg_128 = COPY undef %42:vreg_12857 %43:sreg_64 = COPY killed %258 %44:vreg_128 = COPY killed %3759 %45:vreg_128 = COPY killed %2860 61 bb.1:62 successors: %bb.1, %bb.263 64 %29:vreg_128 = COPY killed %4565 %36:vreg_128 = COPY killed %4466 %0:sreg_64 = COPY killed %4367 %39:vgpr_32 = V_LSHLREV_B32_e32 2, %29.sub2, implicit $exec68 %41:vgpr_32 = V_ADD_CO_U32_e32 1152, %39, implicit-def dead $vcc, implicit $exec69 $m0 = S_MOV_B32 -170 %12:vreg_64 = DS_READ2_B32 killed %41, 0, 1, 0, implicit $m0, implicit $exec71 %13:vreg_64 = DS_READ2_B32 %39, -112, -111, 0, implicit $m0, implicit $exec72 %14:vreg_64 = DS_READ2_B32 %39, 0, 1, 0, implicit $m0, implicit $exec73 %40:vgpr_32 = V_ADD_CO_U32_e32 1160, %39, implicit-def dead $vcc, implicit $exec74 %15:vreg_64 = DS_READ2_B32 killed %40, 0, 1, 0, implicit $m0, implicit $exec75 %16:vreg_64 = DS_READ2_B32 %39, -110, -109, 0, implicit $m0, implicit $exec76 %17:vreg_64 = DS_READ2_B32 %39, 2, 3, 0, implicit $m0, implicit $exec77 undef %35.sub1:vreg_128 = COPY undef %3478 %31:vreg_128 = COPY killed %2979 %31.sub1:vreg_128 = COPY %3480 %38:vgpr_32 = V_ADD_CO_U32_e32 1, %36.sub0, implicit-def dead $vcc, implicit $exec81 %18:sreg_64 = V_CMP_LT_I32_e64 5, %38, implicit $exec82 %1:sreg_64 = S_OR_B64 killed %18, killed %0, implicit-def $scc83 %30:vreg_128 = COPY %3184 %43:sreg_64 = COPY %185 %44:vreg_128 = COPY %3586 %45:vreg_128 = COPY killed %3087 $exec = S_ANDN2_B64_term $exec, %1, implicit-def $scc88 S_CBRANCH_EXECNZ %bb.1, implicit $exec89 S_BRANCH %bb.290 91 bb.2:92 $exec = S_OR_B64 $exec, killed %1, implicit-def $scc93 %33:vgpr_32 = V_MOV_B32_e32 0, implicit $exec94 undef %32.sub0:vreg_128 = COPY killed %31.sub095 %32.sub2:vreg_128 = COPY %3396 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %32:vreg_12897 S_ENDPGM 098 99...100