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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: opt -mtriple=amdgcn-- -amdgpu-codegenprepare -S < %s | FileCheck -check-prefix=OPT %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s --check-prefixes=ASM,DAGISEL-ASM4; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel -mcpu=gfx900 < %s | FileCheck %s --check-prefixes=ASM,GISEL-ASM5 6; Tests that we can avoid nullptr checks for addrspacecasts from/to priv/local.7;8; Whenever a testcase is successful, we should see the addrspacecast replaced with the intrinsic9; and the resulting code should have no select/cndmask null check for the pointer.10 11define void @local_to_flat_nonnull_arg(ptr addrspace(3) nonnull %ptr) {12; OPT-LABEL: define void @local_to_flat_nonnull_arg(13; OPT-SAME: ptr addrspace(3) nonnull [[PTR:%.*]]) {14; OPT-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) [[PTR]])15; OPT-NEXT: store volatile i32 7, ptr [[TMP1]], align 416; OPT-NEXT: ret void17;18; ASM-LABEL: local_to_flat_nonnull_arg:19; ASM: ; %bb.0:20; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)21; ASM-NEXT: s_mov_b64 s[4:5], src_shared_base22; ASM-NEXT: v_mov_b32_e32 v1, s523; ASM-NEXT: v_mov_b32_e32 v2, 724; ASM-NEXT: flat_store_dword v[0:1], v225; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)26; ASM-NEXT: s_setpc_b64 s[30:31]27 %x = addrspacecast ptr addrspace(3) %ptr to ptr28 store volatile i32 7, ptr %x29 ret void30}31 32define void @private_to_flat_nonnull_arg(ptr addrspace(5) nonnull %ptr) {33; OPT-LABEL: define void @private_to_flat_nonnull_arg(34; OPT-SAME: ptr addrspace(5) nonnull [[PTR:%.*]]) {35; OPT-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p5(ptr addrspace(5) [[PTR]])36; OPT-NEXT: store volatile i32 7, ptr [[TMP1]], align 437; OPT-NEXT: ret void38;39; ASM-LABEL: private_to_flat_nonnull_arg:40; ASM: ; %bb.0:41; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)42; ASM-NEXT: s_mov_b64 s[4:5], src_private_base43; ASM-NEXT: v_mov_b32_e32 v1, s544; ASM-NEXT: v_mov_b32_e32 v2, 745; ASM-NEXT: flat_store_dword v[0:1], v246; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)47; ASM-NEXT: s_setpc_b64 s[30:31]48 %x = addrspacecast ptr addrspace(5) %ptr to ptr49 store volatile i32 7, ptr %x50 ret void51}52 53define void @flat_to_local_nonnull_arg(ptr nonnull %ptr) {54; OPT-LABEL: define void @flat_to_local_nonnull_arg(55; OPT-SAME: ptr nonnull [[PTR:%.*]]) {56; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(3) @llvm.amdgcn.addrspacecast.nonnull.p3.p0(ptr [[PTR]])57; OPT-NEXT: store volatile i32 7, ptr addrspace(3) [[TMP1]], align 458; OPT-NEXT: ret void59;60; ASM-LABEL: flat_to_local_nonnull_arg:61; ASM: ; %bb.0:62; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; ASM-NEXT: v_mov_b32_e32 v1, 764; ASM-NEXT: ds_write_b32 v0, v165; ASM-NEXT: s_waitcnt lgkmcnt(0)66; ASM-NEXT: s_setpc_b64 s[30:31]67 %x = addrspacecast ptr %ptr to ptr addrspace(3)68 store volatile i32 7, ptr addrspace(3) %x69 ret void70}71 72define void @flat_to_private_nonnull_arg(ptr nonnull %ptr) {73; OPT-LABEL: define void @flat_to_private_nonnull_arg(74; OPT-SAME: ptr nonnull [[PTR:%.*]]) {75; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(5) @llvm.amdgcn.addrspacecast.nonnull.p5.p0(ptr [[PTR]])76; OPT-NEXT: store volatile i32 7, ptr addrspace(5) [[TMP1]], align 477; OPT-NEXT: ret void78;79; ASM-LABEL: flat_to_private_nonnull_arg:80; ASM: ; %bb.0:81; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)82; ASM-NEXT: v_mov_b32_e32 v1, 783; ASM-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen84; ASM-NEXT: s_waitcnt vmcnt(0)85; ASM-NEXT: s_setpc_b64 s[30:31]86 %x = addrspacecast ptr %ptr to ptr addrspace(5)87 store volatile i32 7, ptr addrspace(5) %x88 ret void89}90 91define void @local_to_flat_nonnull_load(ptr %p) {92; OPT-LABEL: define void @local_to_flat_nonnull_load(93; OPT-SAME: ptr [[P:%.*]]) {94; OPT-NEXT: [[PTR:%.*]] = load ptr addrspace(3), ptr [[P]], align 4, !nonnull [[META0:![0-9]+]]95; OPT-NEXT: [[X:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p3(ptr addrspace(3) [[PTR]])96; OPT-NEXT: store volatile i32 7, ptr [[X]], align 497; OPT-NEXT: ret void98;99; ASM-LABEL: local_to_flat_nonnull_load:100; ASM: ; %bb.0:101; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)102; ASM-NEXT: flat_load_dword v0, v[0:1]103; ASM-NEXT: s_mov_b64 s[4:5], src_shared_base104; ASM-NEXT: v_mov_b32_e32 v1, s5105; ASM-NEXT: v_mov_b32_e32 v2, 7106; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)107; ASM-NEXT: flat_store_dword v[0:1], v2108; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)109; ASM-NEXT: s_setpc_b64 s[30:31]110 %ptr = load ptr addrspace(3), ptr %p, !nonnull !{}111 %x = addrspacecast ptr addrspace(3) %ptr to ptr112 store volatile i32 7, ptr %x113 ret void114}115 116define void @private_to_flat_nonnull_load(ptr %p) {117; OPT-LABEL: define void @private_to_flat_nonnull_load(118; OPT-SAME: ptr [[P:%.*]]) {119; OPT-NEXT: [[PTR:%.*]] = load ptr addrspace(5), ptr [[P]], align 4, !nonnull [[META0]]120; OPT-NEXT: [[X:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p5(ptr addrspace(5) [[PTR]])121; OPT-NEXT: store volatile i32 7, ptr [[X]], align 4122; OPT-NEXT: ret void123;124; ASM-LABEL: private_to_flat_nonnull_load:125; ASM: ; %bb.0:126; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; ASM-NEXT: flat_load_dword v0, v[0:1]128; ASM-NEXT: s_mov_b64 s[4:5], src_private_base129; ASM-NEXT: v_mov_b32_e32 v1, s5130; ASM-NEXT: v_mov_b32_e32 v2, 7131; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)132; ASM-NEXT: flat_store_dword v[0:1], v2133; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)134; ASM-NEXT: s_setpc_b64 s[30:31]135 %ptr = load ptr addrspace(5), ptr %p, !nonnull !{}136 %x = addrspacecast ptr addrspace(5) %ptr to ptr137 store volatile i32 7, ptr %x138 ret void139}140 141define void @flat_to_local_nonnull_load(ptr %p) {142; OPT-LABEL: define void @flat_to_local_nonnull_load(143; OPT-SAME: ptr [[P:%.*]]) {144; OPT-NEXT: [[PTR:%.*]] = load ptr, ptr [[P]], align 8, !nonnull [[META0]]145; OPT-NEXT: [[X:%.*]] = call ptr addrspace(3) @llvm.amdgcn.addrspacecast.nonnull.p3.p0(ptr [[PTR]])146; OPT-NEXT: store volatile i32 7, ptr addrspace(3) [[X]], align 4147; OPT-NEXT: ret void148;149; DAGISEL-ASM-LABEL: flat_to_local_nonnull_load:150; DAGISEL-ASM: ; %bb.0:151; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)152; DAGISEL-ASM-NEXT: flat_load_dword v0, v[0:1]153; DAGISEL-ASM-NEXT: v_mov_b32_e32 v1, 7154; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)155; DAGISEL-ASM-NEXT: ds_write_b32 v0, v1156; DAGISEL-ASM-NEXT: s_waitcnt lgkmcnt(0)157; DAGISEL-ASM-NEXT: s_setpc_b64 s[30:31]158;159; GISEL-ASM-LABEL: flat_to_local_nonnull_load:160; GISEL-ASM: ; %bb.0:161; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)162; GISEL-ASM-NEXT: flat_load_dwordx2 v[0:1], v[0:1]163; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)164; GISEL-ASM-NEXT: v_mov_b32_e32 v1, 7165; GISEL-ASM-NEXT: ds_write_b32 v0, v1166; GISEL-ASM-NEXT: s_waitcnt lgkmcnt(0)167; GISEL-ASM-NEXT: s_setpc_b64 s[30:31]168 %ptr = load ptr, ptr %p, !nonnull !{}169 %x = addrspacecast ptr %ptr to ptr addrspace(3)170 store volatile i32 7, ptr addrspace(3) %x171 ret void172}173 174define void @flat_to_private_nonnull_load(ptr %p) {175; OPT-LABEL: define void @flat_to_private_nonnull_load(176; OPT-SAME: ptr [[P:%.*]]) {177; OPT-NEXT: [[PTR:%.*]] = load ptr, ptr [[P]], align 8, !nonnull [[META0]]178; OPT-NEXT: [[X:%.*]] = call ptr addrspace(5) @llvm.amdgcn.addrspacecast.nonnull.p5.p0(ptr [[PTR]])179; OPT-NEXT: store volatile i32 7, ptr addrspace(5) [[X]], align 4180; OPT-NEXT: ret void181;182; DAGISEL-ASM-LABEL: flat_to_private_nonnull_load:183; DAGISEL-ASM: ; %bb.0:184; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)185; DAGISEL-ASM-NEXT: flat_load_dword v0, v[0:1]186; DAGISEL-ASM-NEXT: v_mov_b32_e32 v1, 7187; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)188; DAGISEL-ASM-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen189; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0)190; DAGISEL-ASM-NEXT: s_setpc_b64 s[30:31]191;192; GISEL-ASM-LABEL: flat_to_private_nonnull_load:193; GISEL-ASM: ; %bb.0:194; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)195; GISEL-ASM-NEXT: flat_load_dwordx2 v[0:1], v[0:1]196; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)197; GISEL-ASM-NEXT: v_mov_b32_e32 v1, 7198; GISEL-ASM-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen199; GISEL-ASM-NEXT: s_waitcnt vmcnt(0)200; GISEL-ASM-NEXT: s_setpc_b64 s[30:31]201 %ptr = load ptr, ptr %p, !nonnull !{}202 %x = addrspacecast ptr %ptr to ptr addrspace(5)203 store volatile i32 7, ptr addrspace(5) %x204 ret void205}206 207define void @private_alloca_to_flat(ptr %ptr) {208; OPT-LABEL: define void @private_alloca_to_flat(209; OPT-SAME: ptr [[PTR:%.*]]) {210; OPT-NEXT: [[ALLOCA:%.*]] = alloca i8, align 1, addrspace(5)211; OPT-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p5(ptr addrspace(5) [[ALLOCA]])212; OPT-NEXT: store volatile i32 7, ptr [[TMP1]], align 4213; OPT-NEXT: ret void214;215; DAGISEL-ASM-LABEL: private_alloca_to_flat:216; DAGISEL-ASM: ; %bb.0:217; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)218; DAGISEL-ASM-NEXT: s_mov_b64 s[4:5], src_private_base219; DAGISEL-ASM-NEXT: v_lshrrev_b32_e64 v0, 6, s32220; DAGISEL-ASM-NEXT: v_mov_b32_e32 v1, s5221; DAGISEL-ASM-NEXT: v_mov_b32_e32 v2, 7222; DAGISEL-ASM-NEXT: flat_store_dword v[0:1], v2223; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)224; DAGISEL-ASM-NEXT: s_setpc_b64 s[30:31]225;226; GISEL-ASM-LABEL: private_alloca_to_flat:227; GISEL-ASM: ; %bb.0:228; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)229; GISEL-ASM-NEXT: s_mov_b64 s[4:5], src_private_base230; GISEL-ASM-NEXT: s_lshr_b32 s4, s32, 6231; GISEL-ASM-NEXT: v_mov_b32_e32 v0, s4232; GISEL-ASM-NEXT: v_mov_b32_e32 v2, 7233; GISEL-ASM-NEXT: v_mov_b32_e32 v1, s5234; GISEL-ASM-NEXT: flat_store_dword v[0:1], v2235; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)236; GISEL-ASM-NEXT: s_setpc_b64 s[30:31]237 %alloca = alloca i8, addrspace(5)238 %x = addrspacecast ptr addrspace(5) %alloca to ptr239 store volatile i32 7, ptr %x240 ret void241}242 243@lds = internal unnamed_addr addrspace(3) global i8 poison, align 4244 245define void @knownbits_on_flat_to_priv(ptr %ptr) {246; OPT-LABEL: define void @knownbits_on_flat_to_priv(247; OPT-SAME: ptr [[PTR:%.*]]) {248; OPT-NEXT: [[PTR_INT:%.*]] = ptrtoint ptr [[PTR]] to i64249; OPT-NEXT: [[PTR_OR:%.*]] = or i64 [[PTR_INT]], 15250; OPT-NEXT: [[KB_PTR:%.*]] = inttoptr i64 [[PTR_OR]] to ptr251; OPT-NEXT: [[TMP1:%.*]] = call ptr addrspace(5) @llvm.amdgcn.addrspacecast.nonnull.p5.p0(ptr [[KB_PTR]])252; OPT-NEXT: store volatile i32 7, ptr addrspace(5) [[TMP1]], align 4253; OPT-NEXT: ret void254;255; ASM-LABEL: knownbits_on_flat_to_priv:256; ASM: ; %bb.0:257; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)258; ASM-NEXT: v_or_b32_e32 v0, 15, v0259; ASM-NEXT: v_mov_b32_e32 v1, 7260; ASM-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen261; ASM-NEXT: s_waitcnt vmcnt(0)262; ASM-NEXT: s_setpc_b64 s[30:31]263 %ptr.int = ptrtoint ptr %ptr to i64264 %ptr.or = or i64 %ptr.int, 15 ; set some low bits265 %kb.ptr = inttoptr i64 %ptr.or to ptr266 %x = addrspacecast ptr %kb.ptr to ptr addrspace(5)267 store volatile i32 7, ptr addrspace(5) %x268 ret void269}270 271define void @knownbits_on_priv_to_flat(ptr addrspace(5) %ptr) {272; OPT-LABEL: define void @knownbits_on_priv_to_flat(273; OPT-SAME: ptr addrspace(5) [[PTR:%.*]]) {274; OPT-NEXT: [[PTR_INT:%.*]] = ptrtoint ptr addrspace(5) [[PTR]] to i32275; OPT-NEXT: [[PTR_OR:%.*]] = and i32 [[PTR_INT]], 65535276; OPT-NEXT: [[KB_PTR:%.*]] = inttoptr i32 [[PTR_OR]] to ptr addrspace(5)277; OPT-NEXT: [[TMP1:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p5(ptr addrspace(5) [[KB_PTR]])278; OPT-NEXT: store volatile i32 7, ptr [[TMP1]], align 4279; OPT-NEXT: ret void280;281; ASM-LABEL: knownbits_on_priv_to_flat:282; ASM: ; %bb.0:283; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)284; ASM-NEXT: s_mov_b64 s[4:5], src_private_base285; ASM-NEXT: v_and_b32_e32 v0, 0xffff, v0286; ASM-NEXT: v_mov_b32_e32 v1, s5287; ASM-NEXT: v_mov_b32_e32 v2, 7288; ASM-NEXT: flat_store_dword v[0:1], v2289; ASM-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)290; ASM-NEXT: s_setpc_b64 s[30:31]291 %ptr.int = ptrtoint ptr addrspace(5) %ptr to i32292 %ptr.or = and i32 %ptr.int, 65535 ; ensure only lower 16 bits can be set.293 %kb.ptr = inttoptr i32 %ptr.or to ptr addrspace(5)294 %x = addrspacecast ptr addrspace(5) %kb.ptr to ptr295 store volatile i32 7, ptr %x296 ret void297}298 299define void @recursive_phis(i1 %cond, ptr addrspace(5) %ptr) {300; OPT-LABEL: define void @recursive_phis(301; OPT-SAME: i1 [[COND:%.*]], ptr addrspace(5) [[PTR:%.*]]) {302; OPT-NEXT: [[ENTRY:.*]]:303; OPT-NEXT: [[ALLOCA:%.*]] = alloca i8, align 1, addrspace(5)304; OPT-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]]305; OPT: [[THEN]]:306; OPT-NEXT: [[PTR_INT:%.*]] = ptrtoint ptr addrspace(5) [[PTR]] to i32307; OPT-NEXT: [[PTR_OR:%.*]] = and i32 [[PTR_INT]], 65535308; OPT-NEXT: [[KB_PTR:%.*]] = inttoptr i32 [[PTR_OR]] to ptr addrspace(5)309; OPT-NEXT: br label %[[FINALLY:.*]]310; OPT: [[ELSE]]:311; OPT-NEXT: [[OTHER_PHI:%.*]] = phi ptr addrspace(5) [ [[ALLOCA]], %[[ENTRY]] ], [ [[PHI_PTR:%.*]], %[[FINALLY]] ]312; OPT-NEXT: br label %[[FINALLY]]313; OPT: [[FINALLY]]:314; OPT-NEXT: [[PHI_PTR]] = phi ptr addrspace(5) [ [[KB_PTR]], %[[THEN]] ], [ [[OTHER_PHI]], %[[ELSE]] ]315; OPT-NEXT: [[TMP0:%.*]] = call ptr @llvm.amdgcn.addrspacecast.nonnull.p0.p5(ptr addrspace(5) [[PHI_PTR]])316; OPT-NEXT: store volatile i32 7, ptr [[TMP0]], align 4317; OPT-NEXT: br i1 [[COND]], label %[[ELSE]], label %[[END:.*]]318; OPT: [[END]]:319; OPT-NEXT: ret void320;321; DAGISEL-ASM-LABEL: recursive_phis:322; DAGISEL-ASM: ; %bb.0: ; %entry323; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)324; DAGISEL-ASM-NEXT: v_and_b32_e32 v0, 1, v0325; DAGISEL-ASM-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0326; DAGISEL-ASM-NEXT: v_lshrrev_b32_e64 v0, 6, s32327; DAGISEL-ASM-NEXT: s_and_saveexec_b64 s[4:5], vcc328; DAGISEL-ASM-NEXT: ; %bb.1: ; %then329; DAGISEL-ASM-NEXT: v_and_b32_e32 v0, 0xffff, v1330; DAGISEL-ASM-NEXT: ; %bb.2: ; %finallyendcf.split331; DAGISEL-ASM-NEXT: s_or_b64 exec, exec, s[4:5]332; DAGISEL-ASM-NEXT: s_mov_b64 s[4:5], src_private_base333; DAGISEL-ASM-NEXT: s_xor_b64 s[8:9], vcc, -1334; DAGISEL-ASM-NEXT: s_mov_b64 s[6:7], 0335; DAGISEL-ASM-NEXT: v_mov_b32_e32 v2, 7336; DAGISEL-ASM-NEXT: .LBB11_3: ; %finally337; DAGISEL-ASM-NEXT: ; =>This Inner Loop Header: Depth=1338; DAGISEL-ASM-NEXT: s_and_b64 s[10:11], exec, s[8:9]339; DAGISEL-ASM-NEXT: s_or_b64 s[6:7], s[10:11], s[6:7]340; DAGISEL-ASM-NEXT: v_mov_b32_e32 v1, s5341; DAGISEL-ASM-NEXT: flat_store_dword v[0:1], v2342; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0)343; DAGISEL-ASM-NEXT: s_andn2_b64 exec, exec, s[6:7]344; DAGISEL-ASM-NEXT: s_cbranch_execnz .LBB11_3345; DAGISEL-ASM-NEXT: ; %bb.4: ; %end346; DAGISEL-ASM-NEXT: s_or_b64 exec, exec, s[6:7]347; DAGISEL-ASM-NEXT: s_waitcnt lgkmcnt(0)348; DAGISEL-ASM-NEXT: s_setpc_b64 s[30:31]349;350; GISEL-ASM-LABEL: recursive_phis:351; GISEL-ASM: ; %bb.0: ; %entry352; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)353; GISEL-ASM-NEXT: v_and_b32_e32 v0, 1, v0354; GISEL-ASM-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0355; GISEL-ASM-NEXT: s_lshr_b32 s6, s32, 6356; GISEL-ASM-NEXT: s_xor_b64 s[4:5], vcc, -1357; GISEL-ASM-NEXT: v_mov_b32_e32 v0, s6358; GISEL-ASM-NEXT: s_and_saveexec_b64 s[6:7], vcc359; GISEL-ASM-NEXT: ; %bb.1: ; %then360; GISEL-ASM-NEXT: v_and_b32_e32 v0, 0xffff, v1361; GISEL-ASM-NEXT: ; %bb.2: ; %finallyendcf.split362; GISEL-ASM-NEXT: s_or_b64 exec, exec, s[6:7]363; GISEL-ASM-NEXT: s_mov_b64 s[8:9], src_private_base364; GISEL-ASM-NEXT: s_mov_b64 s[6:7], 0365; GISEL-ASM-NEXT: v_mov_b32_e32 v1, s9366; GISEL-ASM-NEXT: v_mov_b32_e32 v2, 7367; GISEL-ASM-NEXT: .LBB11_3: ; %finally368; GISEL-ASM-NEXT: ; =>This Inner Loop Header: Depth=1369; GISEL-ASM-NEXT: s_and_b64 s[8:9], exec, s[4:5]370; GISEL-ASM-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7]371; GISEL-ASM-NEXT: flat_store_dword v[0:1], v2372; GISEL-ASM-NEXT: s_waitcnt vmcnt(0)373; GISEL-ASM-NEXT: s_andn2_b64 exec, exec, s[6:7]374; GISEL-ASM-NEXT: s_cbranch_execnz .LBB11_3375; GISEL-ASM-NEXT: ; %bb.4: ; %end376; GISEL-ASM-NEXT: s_or_b64 exec, exec, s[6:7]377; GISEL-ASM-NEXT: s_waitcnt lgkmcnt(0)378; GISEL-ASM-NEXT: s_setpc_b64 s[30:31]379entry:380 %alloca = alloca i8, addrspace(5)381 br i1 %cond, label %then, label %else382 383then:384 %ptr.int = ptrtoint ptr addrspace(5) %ptr to i32385 %ptr.or = and i32 %ptr.int, 65535 ; ensure low bits are zeroes386 %kb.ptr = inttoptr i32 %ptr.or to ptr addrspace(5)387 br label %finally388 389else:390 %other.phi = phi ptr addrspace(5) [%alloca, %entry], [%phi.ptr, %finally]391 br label %finally392 393finally:394 %phi.ptr = phi ptr addrspace(5) [%kb.ptr, %then], [%other.phi, %else]395 %x = addrspacecast ptr addrspace(5) %phi.ptr to ptr396 store volatile i32 7, ptr %x397 br i1 %cond, label %else, label %end398 399end:400 ret void401}402 403; This used to assert due to assuming the size of the source address404; space was larger than the destination.405 406define i32 @cast_private_to_flat_to_private(ptr addrspace(5) %private.ptr) {407; OPT-LABEL: define i32 @cast_private_to_flat_to_private(408; OPT-SAME: ptr addrspace(5) [[PRIVATE_PTR:%.*]]) {409; OPT-NEXT: [[FLAT_PTR:%.*]] = addrspacecast ptr addrspace(5) [[PRIVATE_PTR]] to ptr410; OPT-NEXT: [[CAST_BACK:%.*]] = addrspacecast ptr [[FLAT_PTR]] to ptr addrspace(5)411; OPT-NEXT: [[LOAD:%.*]] = load volatile i32, ptr addrspace(5) [[CAST_BACK]], align 4412; OPT-NEXT: ret i32 [[LOAD]]413;414; ASM-LABEL: cast_private_to_flat_to_private:415; ASM: ; %bb.0:416; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)417; ASM-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen glc418; ASM-NEXT: s_waitcnt vmcnt(0)419; ASM-NEXT: s_setpc_b64 s[30:31]420 %flat.ptr = addrspacecast ptr addrspace(5) %private.ptr to ptr421 %cast.back = addrspacecast ptr %flat.ptr to ptr addrspace(5)422 %load = load volatile i32, ptr addrspace(5) %cast.back423 ret i32 %load424}425 426; This is UB but shouldn't assert.427define i32 @cast_private_to_flat_to_local(ptr addrspace(5) %private.ptr) {428; OPT-LABEL: define i32 @cast_private_to_flat_to_local(429; OPT-SAME: ptr addrspace(5) [[PRIVATE_PTR:%.*]]) {430; OPT-NEXT: [[FLAT_PTR:%.*]] = addrspacecast ptr addrspace(5) [[PRIVATE_PTR]] to ptr431; OPT-NEXT: [[CAST_BACK:%.*]] = addrspacecast ptr [[FLAT_PTR]] to ptr addrspace(3)432; OPT-NEXT: [[LOAD:%.*]] = load volatile i32, ptr addrspace(3) [[CAST_BACK]], align 4433; OPT-NEXT: ret i32 [[LOAD]]434;435; DAGISEL-ASM-LABEL: cast_private_to_flat_to_local:436; DAGISEL-ASM: ; %bb.0:437; DAGISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)438; DAGISEL-ASM-NEXT: s_mov_b64 s[4:5], src_private_base439; DAGISEL-ASM-NEXT: v_mov_b32_e32 v1, s5440; DAGISEL-ASM-NEXT: v_cmp_ne_u32_e32 vcc, -1, v0441; DAGISEL-ASM-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc442; DAGISEL-ASM-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc443; DAGISEL-ASM-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]444; DAGISEL-ASM-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc445; DAGISEL-ASM-NEXT: ds_read_b32 v0, v0446; DAGISEL-ASM-NEXT: s_waitcnt lgkmcnt(0)447; DAGISEL-ASM-NEXT: s_setpc_b64 s[30:31]448;449; GISEL-ASM-LABEL: cast_private_to_flat_to_local:450; GISEL-ASM: ; %bb.0:451; GISEL-ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)452; GISEL-ASM-NEXT: s_mov_b64 s[4:5], src_private_base453; GISEL-ASM-NEXT: v_mov_b32_e32 v1, s5454; GISEL-ASM-NEXT: v_cmp_ne_u32_e32 vcc, -1, v0455; GISEL-ASM-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc456; GISEL-ASM-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc457; GISEL-ASM-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]458; GISEL-ASM-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc459; GISEL-ASM-NEXT: ds_read_b32 v0, v0460; GISEL-ASM-NEXT: s_waitcnt lgkmcnt(0)461; GISEL-ASM-NEXT: s_setpc_b64 s[30:31]462 %flat.ptr = addrspacecast ptr addrspace(5) %private.ptr to ptr463 %cast.back = addrspacecast ptr %flat.ptr to ptr addrspace(3)464 %load = load volatile i32, ptr addrspace(3) %cast.back465 ret i32 %load466}467 468; This is UB but shouldn't assert.469define i32 @cast_private_to_flat_to_global(ptr addrspace(6) %const32.ptr) {470; OPT-LABEL: define i32 @cast_private_to_flat_to_global(471; OPT-SAME: ptr addrspace(6) [[CONST32_PTR:%.*]]) {472; OPT-NEXT: [[FLAT_PTR:%.*]] = addrspacecast ptr addrspace(6) [[CONST32_PTR]] to ptr473; OPT-NEXT: [[LOCAL_PTR:%.*]] = addrspacecast ptr [[FLAT_PTR]] to ptr addrspace(3)474; OPT-NEXT: [[LOAD:%.*]] = load volatile i32, ptr addrspace(3) [[LOCAL_PTR]], align 4475; OPT-NEXT: ret i32 [[LOAD]]476;477; ASM-LABEL: cast_private_to_flat_to_global:478; ASM: ; %bb.0:479; ASM-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)480; ASM-NEXT: v_mov_b32_e32 v1, 0481; ASM-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[0:1]482; ASM-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc483; ASM-NEXT: ds_read_b32 v0, v0484; ASM-NEXT: s_waitcnt lgkmcnt(0)485; ASM-NEXT: s_setpc_b64 s[30:31]486 %flat.ptr = addrspacecast ptr addrspace(6) %const32.ptr to ptr487 %local.ptr = addrspacecast ptr %flat.ptr to ptr addrspace(3)488 %load = load volatile i32, ptr addrspace(3) %local.ptr489 ret i32 %load490}491