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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s2 3declare i32 @llvm.amdgcn.workitem.id.x() #14declare float @llvm.fabs.f32(float) #15declare float @llvm.fma.f32(float, float, float) nounwind readnone6 7; FUNC-LABEL: @commute_add_imm_fabs_f328; SI: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}9; SI: v_add_f32_e64 [[REG:v[0-9]+]], |[[X]]|, 2.010; SI: buffer_store_dword [[REG]]11define amdgpu_kernel void @commute_add_imm_fabs_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {12 %tid = call i32 @llvm.amdgcn.workitem.id.x() #113 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid14 %x = load float, ptr addrspace(1) %gep.015 %x.fabs = call float @llvm.fabs.f32(float %x) #116 %z = fadd float 2.0, %x.fabs17 store float %z, ptr addrspace(1) %out18 ret void19}20 21; FUNC-LABEL: @commute_mul_imm_fneg_fabs_f3222; SI: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}23; SI: v_mul_f32_e64 [[REG:v[0-9]+]], |[[X]]|, -4.024; SI: buffer_store_dword [[REG]]25define amdgpu_kernel void @commute_mul_imm_fneg_fabs_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {26 %tid = call i32 @llvm.amdgcn.workitem.id.x() #127 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid28 %x = load float, ptr addrspace(1) %gep.029 %x.fabs = call float @llvm.fabs.f32(float %x) #130 %x.fneg.fabs = fsub float -0.000000e+00, %x.fabs31 %z = fmul float 4.0, %x.fneg.fabs32 store float %z, ptr addrspace(1) %out33 ret void34}35 36; FUNC-LABEL: @commute_mul_imm_fneg_f3237; SI: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}38; SI: v_mul_f32_e32 [[REG:v[0-9]+]], -4.0, [[X]]39; SI: buffer_store_dword [[REG]]40define amdgpu_kernel void @commute_mul_imm_fneg_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {41 %tid = call i32 @llvm.amdgcn.workitem.id.x() #142 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid43 %x = load float, ptr addrspace(1) %gep.044 %x.fneg = fsub float -0.000000e+00, %x45 %z = fmul float 4.0, %x.fneg46 store float %z, ptr addrspace(1) %out47 ret void48}49 50; FIXME: Should use SGPR for literal.51; FUNC-LABEL: @commute_add_lit_fabs_f3252; SI: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}}53; SI: s_mov_b32 [[K:s[0-9]+]], 0x4480000054; SI: v_add_f32_e64 [[REG:v[0-9]+]], |[[X]]|, [[K]]55; SI: buffer_store_dword [[REG]]56define amdgpu_kernel void @commute_add_lit_fabs_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {57 %tid = call i32 @llvm.amdgcn.workitem.id.x() #158 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid59 %x = load float, ptr addrspace(1) %gep.060 %x.fabs = call float @llvm.fabs.f32(float %x) #161 %z = fadd float 1024.0, %x.fabs62 store float %z, ptr addrspace(1) %out63 ret void64}65 66; FUNC-LABEL: @commute_add_fabs_f3267; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 glc{{$}}68; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:469; SI: v_add_f32_e64 [[REG:v[0-9]+]], [[X]], |[[Y]]|70; SI: buffer_store_dword [[REG]]71define amdgpu_kernel void @commute_add_fabs_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {72 %tid = call i32 @llvm.amdgcn.workitem.id.x() #173 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid74 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 175 %x = load volatile float, ptr addrspace(1) %gep.076 %y = load volatile float, ptr addrspace(1) %gep.177 %y.fabs = call float @llvm.fabs.f32(float %y) #178 %z = fadd float %x, %y.fabs79 store float %z, ptr addrspace(1) %out80 ret void81}82 83; FUNC-LABEL: @commute_mul_fneg_f3284; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 glc{{$}}85; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:486; SI: v_mul_f32_e64 [[REG:v[0-9]+]], [[X]], -[[Y]]87; SI: buffer_store_dword [[REG]]88define amdgpu_kernel void @commute_mul_fneg_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {89 %tid = call i32 @llvm.amdgcn.workitem.id.x() #190 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid91 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 192 %x = load volatile float, ptr addrspace(1) %gep.093 %y = load volatile float, ptr addrspace(1) %gep.194 %y.fneg = fsub float -0.000000e+00, %y95 %z = fmul float %x, %y.fneg96 store float %z, ptr addrspace(1) %out97 ret void98}99 100; FUNC-LABEL: @commute_mul_fabs_fneg_f32101; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 glc{{$}}102; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4103; SI: v_mul_f32_e64 [[REG:v[0-9]+]], [[X]], -|[[Y]]|104; SI: buffer_store_dword [[REG]]105define amdgpu_kernel void @commute_mul_fabs_fneg_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {106 %tid = call i32 @llvm.amdgcn.workitem.id.x() #1107 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid108 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1109 %x = load volatile float, ptr addrspace(1) %gep.0110 %y = load volatile float, ptr addrspace(1) %gep.1111 %y.fabs = call float @llvm.fabs.f32(float %y) #1112 %y.fabs.fneg = fsub float -0.000000e+00, %y.fabs113 %z = fmul float %x, %y.fabs.fneg114 store float %z, ptr addrspace(1) %out115 ret void116}117 118; There's no reason to commute this.119; FUNC-LABEL: @commute_mul_fabs_x_fabs_y_f32120; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 glc{{$}}121; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4122; SI: v_mul_f32_e64 [[REG:v[0-9]+]], |[[X]]|, |[[Y]]|123; SI: buffer_store_dword [[REG]]124define amdgpu_kernel void @commute_mul_fabs_x_fabs_y_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {125 %tid = call i32 @llvm.amdgcn.workitem.id.x() #1126 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid127 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1128 %x = load volatile float, ptr addrspace(1) %gep.0129 %y = load volatile float, ptr addrspace(1) %gep.1130 %x.fabs = call float @llvm.fabs.f32(float %x) #1131 %y.fabs = call float @llvm.fabs.f32(float %y) #1132 %z = fmul float %x.fabs, %y.fabs133 store float %z, ptr addrspace(1) %out134 ret void135}136 137; FUNC-LABEL: @commute_mul_fabs_x_fneg_fabs_y_f32138; SI-DAG: buffer_load_dword [[X:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 glc{{$}}139; SI-DAG: buffer_load_dword [[Y:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4140; SI: v_mul_f32_e64 [[REG:v[0-9]+]], |[[X]]|, -|[[Y]]|141; SI: buffer_store_dword [[REG]]142define amdgpu_kernel void @commute_mul_fabs_x_fneg_fabs_y_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {143 %tid = call i32 @llvm.amdgcn.workitem.id.x() #1144 %gep.0 = getelementptr float, ptr addrspace(1) %in, i32 %tid145 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1146 %x = load volatile float, ptr addrspace(1) %gep.0147 %y = load volatile float, ptr addrspace(1) %gep.1148 %x.fabs = call float @llvm.fabs.f32(float %x) #1149 %y.fabs = call float @llvm.fabs.f32(float %y) #1150 %y.fabs.fneg = fsub float -0.000000e+00, %y.fabs151 %z = fmul float %x.fabs, %y.fabs.fneg152 store float %z, ptr addrspace(1) %out153 ret void154}155 156; Make sure we commute the multiply part for the constant in src0 even157; though we have negate modifier on src2.158 159; SI-LABEL: {{^}}fma_a_2.0_neg_b_f32160; SI-DAG: buffer_load_dword [[R1:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 glc{{$}}161; SI-DAG: buffer_load_dword [[R2:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4162; SI: v_fma_f32 [[RESULT:v[0-9]+]], [[R1]], 2.0, |[[R2]]|163; SI: buffer_store_dword [[RESULT]]164define amdgpu_kernel void @fma_a_2.0_neg_b_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) {165 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone166 %gep.0 = getelementptr float, ptr addrspace(1) %out, i32 %tid167 %gep.1 = getelementptr float, ptr addrspace(1) %gep.0, i32 1168 %gep.out = getelementptr float, ptr addrspace(1) %out, i32 %tid169 170 %r1 = load volatile float, ptr addrspace(1) %gep.0171 %r2 = load volatile float, ptr addrspace(1) %gep.1172 173 %r2.fabs = call float @llvm.fabs.f32(float %r2)174 175 %r3 = tail call float @llvm.fma.f32(float %r1, float 2.0, float %r2.fabs)176 store float %r3, ptr addrspace(1) %gep.out177 ret void178}179 180attributes #0 = { nounwind }181attributes #1 = { nounwind readnone }182