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1; RUN: llc -mtriple=amdgcn--amdhsa < %s | FileCheck -check-prefix=GCN %s2 3declare i32 @llvm.amdgcn.workitem.id.x() #04; GCN-LABEL: {{^}}convergent_inlineasm:5; GCN: %bb.0:6; GCN: v_cmp_ne_u32_e647; GCN: s_cbranch_execz8; GCN: ; %bb.{{[0-9]+}}:9define amdgpu_kernel void @convergent_inlineasm(ptr addrspace(1) nocapture %arg) {10bb:11 %tmp = call i32 @llvm.amdgcn.workitem.id.x()12 %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1) #113 %tmp2 = icmp eq i32 %tmp, 814 br i1 %tmp2, label %bb3, label %bb515 16bb3: ; preds = %bb17 %tmp4 = getelementptr i64, ptr addrspace(1) %arg, i32 %tmp18 store i64 %tmp1, ptr addrspace(1) %arg, align 819 br label %bb520 21bb5: ; preds = %bb3, %bb22 ret void23}24 25; GCN-LABEL: {{^}}nonconvergent_inlineasm:26; GCN: v_cmp_ne_u32_e6427; GCN: s_cbranch_execz28 29define amdgpu_kernel void @nonconvergent_inlineasm(ptr addrspace(1) nocapture %arg) {30bb:31 %tmp = call i32 @llvm.amdgcn.workitem.id.x()32 %tmp1 = tail call i64 asm "v_cmp_ne_u32_e64 $0, 0, $1", "=s,v"(i32 1)33 %tmp2 = icmp eq i32 %tmp, 834 br i1 %tmp2, label %bb3, label %bb535 36bb3: ; preds = %bb37 %tmp4 = getelementptr i64, ptr addrspace(1) %arg, i32 %tmp38 store i64 %tmp1, ptr addrspace(1) %arg, align 839 br label %bb540 41bb5: ; preds = %bb3, %bb42 ret void43}44 45attributes #0 = { nounwind readnone }46attributes #1 = { convergent nounwind readnone }47