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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -O3 -pre-RA-sched=source < %s | FileCheck -check-prefix=RRLIST %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx90a -O3 -pre-RA-sched=fast < %s | FileCheck -check-prefix=FAST %s4 5 6define protected amdgpu_kernel void @sccClobber(ptr addrspace(1) %a, ptr addrspace(1) %b, ptr addrspace(1) %e, ptr addrspace(1) %f, ptr addrspace(1) %pout.coerce) {7; RRLIST-LABEL: sccClobber:8; RRLIST: ; %bb.0: ; %entry9; RRLIST-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2410; RRLIST-NEXT: v_mov_b32_e32 v2, 011; RRLIST-NEXT: s_waitcnt lgkmcnt(0)12; RRLIST-NEXT: s_load_dword s16, s[12:13], 0x013; RRLIST-NEXT: s_load_dwordx2 s[0:1], s[10:11], 0x014; RRLIST-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x015; RRLIST-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x4416; RRLIST-NEXT: s_load_dword s17, s[14:15], 0x017; RRLIST-NEXT: s_waitcnt lgkmcnt(0)18; RRLIST-NEXT: s_min_i32 s8, s16, 019; RRLIST-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]20; RRLIST-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]21; RRLIST-NEXT: s_and_b64 s[4:5], vcc, exec22; RRLIST-NEXT: s_cselect_b32 s4, s16, s1723; RRLIST-NEXT: s_cmp_eq_u64 s[2:3], s[0:1]24; RRLIST-NEXT: s_cselect_b32 s0, s8, s425; RRLIST-NEXT: v_mov_b32_e32 v0, s026; RRLIST-NEXT: global_store_dword v2, v0, s[6:7]27; RRLIST-NEXT: s_endpgm28;29; FAST-LABEL: sccClobber:30; FAST: ; %bb.0: ; %entry31; FAST-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2432; FAST-NEXT: v_mov_b32_e32 v2, 033; FAST-NEXT: s_waitcnt lgkmcnt(0)34; FAST-NEXT: s_load_dword s16, s[12:13], 0x035; FAST-NEXT: s_load_dwordx2 s[0:1], s[10:11], 0x036; FAST-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x037; FAST-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x4438; FAST-NEXT: s_load_dword s17, s[14:15], 0x039; FAST-NEXT: s_waitcnt lgkmcnt(0)40; FAST-NEXT: s_min_i32 s8, s16, 041; FAST-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]42; FAST-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]43; FAST-NEXT: s_and_b64 s[4:5], vcc, exec44; FAST-NEXT: s_cselect_b32 s4, s16, s1745; FAST-NEXT: s_cmp_eq_u64 s[2:3], s[0:1]46; FAST-NEXT: s_cselect_b32 s0, s8, s447; FAST-NEXT: v_mov_b32_e32 v0, s048; FAST-NEXT: global_store_dword v2, v0, s[6:7]49; FAST-NEXT: s_endpgm50entry:51 %i = load i64, ptr addrspace(1) %a, align 852 %i.1 = load i64, ptr addrspace(1) %b, align 853 %i.2 = load i32, ptr addrspace(1) %e, align 454 %i.3 = load i32, ptr addrspace(1) %f, align 455 %cmp7.1 = icmp eq i64 %i, %i.156 %call.1 = tail call noundef i32 @llvm.smin.i32(i32 noundef 0, i32 noundef %i.2)57 %cmp8.1 = icmp slt i64 %i, %i.158 %cond.1 = select i1 %cmp8.1, i32 %i.2, i32 %i.359 %cond14.1 = select i1 %cmp7.1, i32 %call.1, i32 %cond.160 store i32 %cond14.1, ptr addrspace(1) %pout.coerce, align 461 ret void62}63 64declare i32 @llvm.smin.i32(i32, i32)65