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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-- -mcpu=tahiti < %s | FileCheck %s -check-prefixes=GCN,SI3; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck %s -check-prefixes=GCN,VI4; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1010 < %s | FileCheck %s -check-prefixes=GFX105; RUN: llc -mtriple=amdgcn-- -mcpu=gfx908 -start-before=amdgpu-isel < %s | FileCheck %s -check-prefixes=GFX96; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-TRUE167; RUN: llc -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck %s -check-prefixes=GFX11,GFX11-FAKE168 9declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone10declare i32 @llvm.amdgcn.workitem.id.y() nounwind readnone11 12define float @v_uitofp_i32_to_f32_mask255(i32 %arg0) nounwind {13; GCN-LABEL: v_uitofp_i32_to_f32_mask255:14; GCN: ; %bb.0:15; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)16; GCN-NEXT: v_cvt_f32_ubyte0_e32 v0, v017; GCN-NEXT: s_setpc_b64 s[30:31]18;19; GFX10-LABEL: v_uitofp_i32_to_f32_mask255:20; GFX10: ; %bb.0:21; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)22; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v023; GFX10-NEXT: s_setpc_b64 s[30:31]24;25; GFX9-LABEL: v_uitofp_i32_to_f32_mask255:26; GFX9: ; %bb.0:27; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)28; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v029; GFX9-NEXT: s_setpc_b64 s[30:31]30;31; GFX11-LABEL: v_uitofp_i32_to_f32_mask255:32; GFX11: ; %bb.0:33; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)34; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v035; GFX11-NEXT: s_setpc_b64 s[30:31]36 %masked = and i32 %arg0, 25537 %cvt = uitofp i32 %masked to float38 ret float %cvt39}40 41define float @v_sitofp_i32_to_f32_mask255(i32 %arg0) nounwind {42; GCN-LABEL: v_sitofp_i32_to_f32_mask255:43; GCN: ; %bb.0:44; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)45; GCN-NEXT: v_cvt_f32_ubyte0_e32 v0, v046; GCN-NEXT: s_setpc_b64 s[30:31]47;48; GFX10-LABEL: v_sitofp_i32_to_f32_mask255:49; GFX10: ; %bb.0:50; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)51; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v052; GFX10-NEXT: s_setpc_b64 s[30:31]53;54; GFX9-LABEL: v_sitofp_i32_to_f32_mask255:55; GFX9: ; %bb.0:56; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)57; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v058; GFX9-NEXT: s_setpc_b64 s[30:31]59;60; GFX11-LABEL: v_sitofp_i32_to_f32_mask255:61; GFX11: ; %bb.0:62; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v064; GFX11-NEXT: s_setpc_b64 s[30:31]65 %masked = and i32 %arg0, 25566 %cvt = sitofp i32 %masked to float67 ret float %cvt68}69 70define float @v_uitofp_to_f32_lshr7_mask255(i32 %arg0) nounwind {71; GCN-LABEL: v_uitofp_to_f32_lshr7_mask255:72; GCN: ; %bb.0:73; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)74; GCN-NEXT: v_lshrrev_b32_e32 v0, 7, v075; GCN-NEXT: v_cvt_f32_ubyte0_e32 v0, v076; GCN-NEXT: s_setpc_b64 s[30:31]77;78; GFX10-LABEL: v_uitofp_to_f32_lshr7_mask255:79; GFX10: ; %bb.0:80; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)81; GFX10-NEXT: v_lshrrev_b32_e32 v0, 7, v082; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v083; GFX10-NEXT: s_setpc_b64 s[30:31]84;85; GFX9-LABEL: v_uitofp_to_f32_lshr7_mask255:86; GFX9: ; %bb.0:87; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)88; GFX9-NEXT: v_lshrrev_b32_e32 v0, 7, v089; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v090; GFX9-NEXT: s_setpc_b64 s[30:31]91;92; GFX11-LABEL: v_uitofp_to_f32_lshr7_mask255:93; GFX11: ; %bb.0:94; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)95; GFX11-NEXT: v_lshrrev_b32_e32 v0, 7, v096; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)97; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v098; GFX11-NEXT: s_setpc_b64 s[30:31]99 %lshr.7 = lshr i32 %arg0, 7100 %masked = and i32 %lshr.7, 255101 %cvt = uitofp i32 %masked to float102 ret float %cvt103}104 105define float @v_uitofp_to_f32_lshr8_mask255(i32 %arg0) nounwind {106; GCN-LABEL: v_uitofp_to_f32_lshr8_mask255:107; GCN: ; %bb.0:108; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)109; GCN-NEXT: v_cvt_f32_ubyte1_e32 v0, v0110; GCN-NEXT: s_setpc_b64 s[30:31]111;112; GFX10-LABEL: v_uitofp_to_f32_lshr8_mask255:113; GFX10: ; %bb.0:114; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v0, v0116; GFX10-NEXT: s_setpc_b64 s[30:31]117;118; GFX9-LABEL: v_uitofp_to_f32_lshr8_mask255:119; GFX9: ; %bb.0:120; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)121; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, v0122; GFX9-NEXT: s_setpc_b64 s[30:31]123;124; GFX11-LABEL: v_uitofp_to_f32_lshr8_mask255:125; GFX11: ; %bb.0:126; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v0, v0128; GFX11-NEXT: s_setpc_b64 s[30:31]129 %lshr.8 = lshr i32 %arg0, 8130 %masked = and i32 %lshr.8, 255131 %cvt = uitofp i32 %masked to float132 ret float %cvt133}134 135define float @v_uitofp_to_f32_multi_use_lshr8_mask255(i32 %arg0) nounwind {136; SI-LABEL: v_uitofp_to_f32_multi_use_lshr8_mask255:137; SI: ; %bb.0:138; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)139; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v0140; SI-NEXT: s_mov_b32 s7, 0xf000141; SI-NEXT: s_mov_b32 s6, -1142; SI-NEXT: v_cvt_f32_ubyte1_e32 v0, v0143; SI-NEXT: buffer_store_dword v1, off, s[4:7], 0144; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)145; SI-NEXT: s_setpc_b64 s[30:31]146;147; VI-LABEL: v_uitofp_to_f32_multi_use_lshr8_mask255:148; VI: ; %bb.0:149; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)150; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v0151; VI-NEXT: s_mov_b32 s7, 0xf000152; VI-NEXT: s_mov_b32 s6, -1153; VI-NEXT: v_cvt_f32_ubyte1_e32 v0, v0154; VI-NEXT: buffer_store_dword v1, off, s[4:7], 0155; VI-NEXT: s_waitcnt vmcnt(0)156; VI-NEXT: s_setpc_b64 s[30:31]157;158; GFX10-LABEL: v_uitofp_to_f32_multi_use_lshr8_mask255:159; GFX10: ; %bb.0:160; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)161; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0162; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v0, v0163; GFX10-NEXT: global_store_dword v[0:1], v1, off164; GFX10-NEXT: s_setpc_b64 s[30:31]165;166; GFX9-LABEL: v_uitofp_to_f32_multi_use_lshr8_mask255:167; GFX9: ; %bb.0:168; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)169; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0170; GFX9-NEXT: global_store_dword v[0:1], v1, off171; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, v0172; GFX9-NEXT: s_waitcnt vmcnt(0)173; GFX9-NEXT: s_setpc_b64 s[30:31]174;175; GFX11-LABEL: v_uitofp_to_f32_multi_use_lshr8_mask255:176; GFX11: ; %bb.0:177; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)178; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0179; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v0, v0180; GFX11-NEXT: global_store_b32 v[0:1], v1, off181; GFX11-NEXT: s_setpc_b64 s[30:31]182 %lshr.8 = lshr i32 %arg0, 8183 store i32 %lshr.8, ptr addrspace(1) poison184 %masked = and i32 %lshr.8, 255185 %cvt = uitofp i32 %masked to float186 ret float %cvt187}188 189define float @v_uitofp_to_f32_lshr16_mask255(i32 %arg0) nounwind {190; GCN-LABEL: v_uitofp_to_f32_lshr16_mask255:191; GCN: ; %bb.0:192; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)193; GCN-NEXT: v_cvt_f32_ubyte2_e32 v0, v0194; GCN-NEXT: s_setpc_b64 s[30:31]195;196; GFX10-LABEL: v_uitofp_to_f32_lshr16_mask255:197; GFX10: ; %bb.0:198; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)199; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v0, v0200; GFX10-NEXT: s_setpc_b64 s[30:31]201;202; GFX9-LABEL: v_uitofp_to_f32_lshr16_mask255:203; GFX9: ; %bb.0:204; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)205; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v0, v0206; GFX9-NEXT: s_setpc_b64 s[30:31]207;208; GFX11-LABEL: v_uitofp_to_f32_lshr16_mask255:209; GFX11: ; %bb.0:210; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)211; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v0, v0212; GFX11-NEXT: s_setpc_b64 s[30:31]213 %lshr.16 = lshr i32 %arg0, 16214 %masked = and i32 %lshr.16, 255215 %cvt = uitofp i32 %masked to float216 ret float %cvt217}218 219define float @v_uitofp_to_f32_lshr24_mask255(i32 %arg0) nounwind {220; GCN-LABEL: v_uitofp_to_f32_lshr24_mask255:221; GCN: ; %bb.0:222; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)223; GCN-NEXT: v_cvt_f32_ubyte3_e32 v0, v0224; GCN-NEXT: s_setpc_b64 s[30:31]225;226; GFX10-LABEL: v_uitofp_to_f32_lshr24_mask255:227; GFX10: ; %bb.0:228; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)229; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v0, v0230; GFX10-NEXT: s_setpc_b64 s[30:31]231;232; GFX9-LABEL: v_uitofp_to_f32_lshr24_mask255:233; GFX9: ; %bb.0:234; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)235; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v0, v0236; GFX9-NEXT: s_setpc_b64 s[30:31]237;238; GFX11-LABEL: v_uitofp_to_f32_lshr24_mask255:239; GFX11: ; %bb.0:240; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)241; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v0, v0242; GFX11-NEXT: s_setpc_b64 s[30:31]243 %lshr.16 = lshr i32 %arg0, 24244 %masked = and i32 %lshr.16, 255245 %cvt = uitofp i32 %masked to float246 ret float %cvt247}248 249define float @v_uitofp_i8_to_f32(i8 %arg0) nounwind {250; GCN-LABEL: v_uitofp_i8_to_f32:251; GCN: ; %bb.0:252; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)253; GCN-NEXT: v_cvt_f32_ubyte0_e32 v0, v0254; GCN-NEXT: s_setpc_b64 s[30:31]255;256; GFX10-LABEL: v_uitofp_i8_to_f32:257; GFX10: ; %bb.0:258; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)259; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v0260; GFX10-NEXT: s_setpc_b64 s[30:31]261;262; GFX9-LABEL: v_uitofp_i8_to_f32:263; GFX9: ; %bb.0:264; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)265; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v0266; GFX9-NEXT: s_setpc_b64 s[30:31]267;268; GFX11-LABEL: v_uitofp_i8_to_f32:269; GFX11: ; %bb.0:270; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)271; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v0272; GFX11-NEXT: s_setpc_b64 s[30:31]273 %cvt = uitofp i8 %arg0 to float274 ret float %cvt275}276 277define <2 x float> @v_uitofp_v2i8_to_v2f32(i16 %arg0) nounwind {278; GCN-LABEL: v_uitofp_v2i8_to_v2f32:279; GCN: ; %bb.0:280; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)281; GCN-NEXT: v_cvt_f32_ubyte0_e32 v2, v0282; GCN-NEXT: v_cvt_f32_ubyte1_e32 v1, v0283; GCN-NEXT: v_mov_b32_e32 v0, v2284; GCN-NEXT: s_setpc_b64 s[30:31]285;286; GFX10-LABEL: v_uitofp_v2i8_to_v2f32:287; GFX10: ; %bb.0:288; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)289; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v2, v0290; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v0291; GFX10-NEXT: v_mov_b32_e32 v0, v2292; GFX10-NEXT: s_setpc_b64 s[30:31]293;294; GFX9-LABEL: v_uitofp_v2i8_to_v2f32:295; GFX9: ; %bb.0:296; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)297; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, v0298; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v0299; GFX9-NEXT: v_mov_b32_e32 v0, v2300; GFX9-NEXT: s_setpc_b64 s[30:31]301;302; GFX11-TRUE16-LABEL: v_uitofp_v2i8_to_v2f32:303; GFX11-TRUE16: ; %bb.0:304; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)305; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v0.l306; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)307; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v1308; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte1_e32 v1, v1309; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]310;311; GFX11-FAKE16-LABEL: v_uitofp_v2i8_to_v2f32:312; GFX11-FAKE16: ; %bb.0:313; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)314; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte0_e32 v2, v0315; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte1_e32 v1, v0316; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)317; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, v2318; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]319 %val = bitcast i16 %arg0 to <2 x i8>320 %cvt = uitofp <2 x i8> %val to <2 x float>321 ret <2 x float> %cvt322}323 324define <3 x float> @v_uitofp_v3i8_to_v3f32(i32 %arg0) nounwind {325; GCN-LABEL: v_uitofp_v3i8_to_v3f32:326; GCN: ; %bb.0:327; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)328; GCN-NEXT: v_cvt_f32_ubyte0_e32 v3, v0329; GCN-NEXT: v_cvt_f32_ubyte1_e32 v1, v0330; GCN-NEXT: v_cvt_f32_ubyte2_e32 v2, v0331; GCN-NEXT: v_mov_b32_e32 v0, v3332; GCN-NEXT: s_setpc_b64 s[30:31]333;334; GFX10-LABEL: v_uitofp_v3i8_to_v3f32:335; GFX10: ; %bb.0:336; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)337; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v3, v0338; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v0339; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v0340; GFX10-NEXT: v_mov_b32_e32 v0, v3341; GFX10-NEXT: s_setpc_b64 s[30:31]342;343; GFX9-LABEL: v_uitofp_v3i8_to_v3f32:344; GFX9: ; %bb.0:345; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)346; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, v0347; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v0348; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v0349; GFX9-NEXT: v_mov_b32_e32 v0, v3350; GFX9-NEXT: s_setpc_b64 s[30:31]351;352; GFX11-LABEL: v_uitofp_v3i8_to_v3f32:353; GFX11: ; %bb.0:354; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)355; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v3, v0356; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v0357; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v2, v0358; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)359; GFX11-NEXT: v_mov_b32_e32 v0, v3360; GFX11-NEXT: s_setpc_b64 s[30:31]361 %trunc = trunc i32 %arg0 to i24362 %val = bitcast i24 %trunc to <3 x i8>363 %cvt = uitofp <3 x i8> %val to <3 x float>364 ret <3 x float> %cvt365}366 367define <4 x float> @v_uitofp_v4i8_to_v4f32(i32 %arg0) nounwind {368; GCN-LABEL: v_uitofp_v4i8_to_v4f32:369; GCN: ; %bb.0:370; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)371; GCN-NEXT: v_cvt_f32_ubyte0_e32 v4, v0372; GCN-NEXT: v_cvt_f32_ubyte1_e32 v1, v0373; GCN-NEXT: v_cvt_f32_ubyte2_e32 v2, v0374; GCN-NEXT: v_cvt_f32_ubyte3_e32 v3, v0375; GCN-NEXT: v_mov_b32_e32 v0, v4376; GCN-NEXT: s_setpc_b64 s[30:31]377;378; GFX10-LABEL: v_uitofp_v4i8_to_v4f32:379; GFX10: ; %bb.0:380; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)381; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v4, v0382; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v0383; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v0384; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v3, v0385; GFX10-NEXT: v_mov_b32_e32 v0, v4386; GFX10-NEXT: s_setpc_b64 s[30:31]387;388; GFX9-LABEL: v_uitofp_v4i8_to_v4f32:389; GFX9: ; %bb.0:390; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)391; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v4, v0392; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v0393; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v0394; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v3, v0395; GFX9-NEXT: v_mov_b32_e32 v0, v4396; GFX9-NEXT: s_setpc_b64 s[30:31]397;398; GFX11-LABEL: v_uitofp_v4i8_to_v4f32:399; GFX11: ; %bb.0:400; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)401; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v4, v0402; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v0403; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v2, v0404; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v3, v0405; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)406; GFX11-NEXT: v_mov_b32_e32 v0, v4407; GFX11-NEXT: s_setpc_b64 s[30:31]408 %val = bitcast i32 %arg0 to <4 x i8>409 %cvt = uitofp <4 x i8> %val to <4 x float>410 ret <4 x float> %cvt411}412 413define <4 x float> @v_uitofp_unpack_i32_to_v4f32(i32 %arg0) nounwind {414; GCN-LABEL: v_uitofp_unpack_i32_to_v4f32:415; GCN: ; %bb.0:416; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)417; GCN-NEXT: v_cvt_f32_ubyte0_e32 v4, v0418; GCN-NEXT: v_cvt_f32_ubyte1_e32 v1, v0419; GCN-NEXT: v_cvt_f32_ubyte2_e32 v2, v0420; GCN-NEXT: v_cvt_f32_ubyte3_e32 v3, v0421; GCN-NEXT: v_mov_b32_e32 v0, v4422; GCN-NEXT: s_setpc_b64 s[30:31]423;424; GFX10-LABEL: v_uitofp_unpack_i32_to_v4f32:425; GFX10: ; %bb.0:426; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)427; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v4, v0428; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v0429; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v0430; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v3, v0431; GFX10-NEXT: v_mov_b32_e32 v0, v4432; GFX10-NEXT: s_setpc_b64 s[30:31]433;434; GFX9-LABEL: v_uitofp_unpack_i32_to_v4f32:435; GFX9: ; %bb.0:436; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)437; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v4, v0438; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v0439; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v0440; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v3, v0441; GFX9-NEXT: v_mov_b32_e32 v0, v4442; GFX9-NEXT: s_setpc_b64 s[30:31]443;444; GFX11-LABEL: v_uitofp_unpack_i32_to_v4f32:445; GFX11: ; %bb.0:446; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)447; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v4, v0448; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v0449; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v2, v0450; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v3, v0451; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)452; GFX11-NEXT: v_mov_b32_e32 v0, v4453; GFX11-NEXT: s_setpc_b64 s[30:31]454 %mask.arg0 = and i32 %arg0, 255455 %cvt0 = uitofp i32 %mask.arg0 to float456 457 %lshr.8 = lshr i32 %arg0, 8458 %mask.lshr.8 = and i32 %lshr.8, 255459 %cvt1 = uitofp i32 %mask.lshr.8 to float460 461 %lshr.16 = lshr i32 %arg0, 16462 %mask.lshr.16 = and i32 %lshr.16, 255463 %cvt2 = uitofp i32 %mask.lshr.16 to float464 465 %lshr.24 = lshr i32 %arg0, 24466 %mask.lshr.24 = and i32 %lshr.24, 255467 %cvt3 = uitofp i32 %mask.lshr.24 to float468 469 %ins.0 = insertelement <4 x float> poison, float %cvt0, i32 0470 %ins.1 = insertelement <4 x float> %ins.0, float %cvt1, i32 1471 %ins.2 = insertelement <4 x float> %ins.1, float %cvt2, i32 2472 %ins.3 = insertelement <4 x float> %ins.2, float %cvt3, i32 3473 ret <4 x float> %ins.3474}475 476define half @v_uitofp_i32_to_f16_mask255(i32 %arg0) nounwind {477; SI-LABEL: v_uitofp_i32_to_f16_mask255:478; SI: ; %bb.0:479; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)480; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0481; SI-NEXT: v_cvt_f16_f32_e32 v0, v0482; SI-NEXT: v_cvt_f32_f16_e32 v0, v0483; SI-NEXT: s_setpc_b64 s[30:31]484;485; VI-LABEL: v_uitofp_i32_to_f16_mask255:486; VI: ; %bb.0:487; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)488; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0489; VI-NEXT: v_cvt_f16_f32_e32 v0, v0490; VI-NEXT: s_setpc_b64 s[30:31]491;492; GFX10-LABEL: v_uitofp_i32_to_f16_mask255:493; GFX10: ; %bb.0:494; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)495; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v0496; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0497; GFX10-NEXT: s_setpc_b64 s[30:31]498;499; GFX9-LABEL: v_uitofp_i32_to_f16_mask255:500; GFX9: ; %bb.0:501; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)502; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v0503; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0504; GFX9-NEXT: s_setpc_b64 s[30:31]505;506; GFX11-TRUE16-LABEL: v_uitofp_i32_to_f16_mask255:507; GFX11-TRUE16: ; %bb.0:508; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)509; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v0510; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)511; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0512; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]513;514; GFX11-FAKE16-LABEL: v_uitofp_i32_to_f16_mask255:515; GFX11-FAKE16: ; %bb.0:516; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)517; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v0518; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)519; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0520; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]521 %masked = and i32 %arg0, 255522 %cvt = uitofp i32 %masked to half523 ret half %cvt524}525 526define half @v_sitofp_i32_to_f16_mask255(i32 %arg0) nounwind {527; SI-LABEL: v_sitofp_i32_to_f16_mask255:528; SI: ; %bb.0:529; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)530; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0531; SI-NEXT: v_cvt_f16_f32_e32 v0, v0532; SI-NEXT: v_cvt_f32_f16_e32 v0, v0533; SI-NEXT: s_setpc_b64 s[30:31]534;535; VI-LABEL: v_sitofp_i32_to_f16_mask255:536; VI: ; %bb.0:537; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)538; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0539; VI-NEXT: v_cvt_f16_f32_e32 v0, v0540; VI-NEXT: s_setpc_b64 s[30:31]541;542; GFX10-LABEL: v_sitofp_i32_to_f16_mask255:543; GFX10: ; %bb.0:544; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)545; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v0546; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0547; GFX10-NEXT: s_setpc_b64 s[30:31]548;549; GFX9-LABEL: v_sitofp_i32_to_f16_mask255:550; GFX9: ; %bb.0:551; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)552; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v0553; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0554; GFX9-NEXT: s_setpc_b64 s[30:31]555;556; GFX11-TRUE16-LABEL: v_sitofp_i32_to_f16_mask255:557; GFX11-TRUE16: ; %bb.0:558; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)559; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v0560; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)561; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0562; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]563;564; GFX11-FAKE16-LABEL: v_sitofp_i32_to_f16_mask255:565; GFX11-FAKE16: ; %bb.0:566; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)567; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v0568; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)569; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0570; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]571 %masked = and i32 %arg0, 255572 %cvt = sitofp i32 %masked to half573 ret half %cvt574}575 576define half @v_uitofp_to_f16_lshr8_mask255(i32 %arg0) nounwind {577; SI-LABEL: v_uitofp_to_f16_lshr8_mask255:578; SI: ; %bb.0:579; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)580; SI-NEXT: v_cvt_f32_ubyte1_e32 v0, v0581; SI-NEXT: v_cvt_f16_f32_e32 v0, v0582; SI-NEXT: v_cvt_f32_f16_e32 v0, v0583; SI-NEXT: s_setpc_b64 s[30:31]584;585; VI-LABEL: v_uitofp_to_f16_lshr8_mask255:586; VI: ; %bb.0:587; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)588; VI-NEXT: v_cvt_f32_ubyte1_e32 v0, v0589; VI-NEXT: v_cvt_f16_f32_e32 v0, v0590; VI-NEXT: s_setpc_b64 s[30:31]591;592; GFX10-LABEL: v_uitofp_to_f16_lshr8_mask255:593; GFX10: ; %bb.0:594; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)595; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v0, v0596; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0597; GFX10-NEXT: s_setpc_b64 s[30:31]598;599; GFX9-LABEL: v_uitofp_to_f16_lshr8_mask255:600; GFX9: ; %bb.0:601; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)602; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, v0603; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0604; GFX9-NEXT: s_setpc_b64 s[30:31]605;606; GFX11-TRUE16-LABEL: v_uitofp_to_f16_lshr8_mask255:607; GFX11-TRUE16: ; %bb.0:608; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)609; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte1_e32 v0, v0610; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)611; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0612; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]613;614; GFX11-FAKE16-LABEL: v_uitofp_to_f16_lshr8_mask255:615; GFX11-FAKE16: ; %bb.0:616; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)617; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte1_e32 v0, v0618; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)619; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0620; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]621 %lshr.8 = lshr i32 %arg0, 8622 %masked = and i32 %lshr.8, 255623 %cvt = uitofp i32 %masked to half624 ret half %cvt625}626 627define half @v_uitofp_to_f16_lshr16_mask255(i32 %arg0) nounwind {628; SI-LABEL: v_uitofp_to_f16_lshr16_mask255:629; SI: ; %bb.0:630; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)631; SI-NEXT: v_cvt_f32_ubyte2_e32 v0, v0632; SI-NEXT: v_cvt_f16_f32_e32 v0, v0633; SI-NEXT: v_cvt_f32_f16_e32 v0, v0634; SI-NEXT: s_setpc_b64 s[30:31]635;636; VI-LABEL: v_uitofp_to_f16_lshr16_mask255:637; VI: ; %bb.0:638; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)639; VI-NEXT: v_cvt_f32_ubyte2_e32 v0, v0640; VI-NEXT: v_cvt_f16_f32_e32 v0, v0641; VI-NEXT: s_setpc_b64 s[30:31]642;643; GFX10-LABEL: v_uitofp_to_f16_lshr16_mask255:644; GFX10: ; %bb.0:645; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)646; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v0, v0647; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0648; GFX10-NEXT: s_setpc_b64 s[30:31]649;650; GFX9-LABEL: v_uitofp_to_f16_lshr16_mask255:651; GFX9: ; %bb.0:652; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)653; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v0, v0654; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0655; GFX9-NEXT: s_setpc_b64 s[30:31]656;657; GFX11-TRUE16-LABEL: v_uitofp_to_f16_lshr16_mask255:658; GFX11-TRUE16: ; %bb.0:659; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)660; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte2_e32 v0, v0661; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)662; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0663; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]664;665; GFX11-FAKE16-LABEL: v_uitofp_to_f16_lshr16_mask255:666; GFX11-FAKE16: ; %bb.0:667; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)668; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte2_e32 v0, v0669; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)670; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0671; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]672 %lshr.16 = lshr i32 %arg0, 16673 %masked = and i32 %lshr.16, 255674 %cvt = uitofp i32 %masked to half675 ret half %cvt676}677 678define half @v_uitofp_to_f16_lshr24_mask255(i32 %arg0) nounwind {679; SI-LABEL: v_uitofp_to_f16_lshr24_mask255:680; SI: ; %bb.0:681; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)682; SI-NEXT: v_cvt_f32_ubyte3_e32 v0, v0683; SI-NEXT: v_cvt_f16_f32_e32 v0, v0684; SI-NEXT: v_cvt_f32_f16_e32 v0, v0685; SI-NEXT: s_setpc_b64 s[30:31]686;687; VI-LABEL: v_uitofp_to_f16_lshr24_mask255:688; VI: ; %bb.0:689; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)690; VI-NEXT: v_cvt_f32_ubyte3_e32 v0, v0691; VI-NEXT: v_cvt_f16_f32_e32 v0, v0692; VI-NEXT: s_setpc_b64 s[30:31]693;694; GFX10-LABEL: v_uitofp_to_f16_lshr24_mask255:695; GFX10: ; %bb.0:696; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)697; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v0, v0698; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0699; GFX10-NEXT: s_setpc_b64 s[30:31]700;701; GFX9-LABEL: v_uitofp_to_f16_lshr24_mask255:702; GFX9: ; %bb.0:703; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)704; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v0, v0705; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0706; GFX9-NEXT: s_setpc_b64 s[30:31]707;708; GFX11-TRUE16-LABEL: v_uitofp_to_f16_lshr24_mask255:709; GFX11-TRUE16: ; %bb.0:710; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)711; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte3_e32 v0, v0712; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)713; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0714; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]715;716; GFX11-FAKE16-LABEL: v_uitofp_to_f16_lshr24_mask255:717; GFX11-FAKE16: ; %bb.0:718; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)719; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte3_e32 v0, v0720; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)721; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0722; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]723 %lshr.16 = lshr i32 %arg0, 24724 %masked = and i32 %lshr.16, 255725 %cvt = uitofp i32 %masked to half726 ret half %cvt727}728 729define half @v_uitofp_i8_to_f16(i8 %arg0) nounwind {730; SI-LABEL: v_uitofp_i8_to_f16:731; SI: ; %bb.0:732; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)733; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0734; SI-NEXT: v_cvt_f16_f32_e32 v0, v0735; SI-NEXT: v_cvt_f32_f16_e32 v0, v0736; SI-NEXT: s_setpc_b64 s[30:31]737;738; VI-LABEL: v_uitofp_i8_to_f16:739; VI: ; %bb.0:740; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)741; VI-NEXT: v_cvt_f16_u16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0742; VI-NEXT: s_setpc_b64 s[30:31]743;744; GFX10-LABEL: v_uitofp_i8_to_f16:745; GFX10: ; %bb.0:746; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)747; GFX10-NEXT: v_cvt_f16_u16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0748; GFX10-NEXT: s_setpc_b64 s[30:31]749;750; GFX9-LABEL: v_uitofp_i8_to_f16:751; GFX9: ; %bb.0:752; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)753; GFX9-NEXT: v_cvt_f16_u16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0754; GFX9-NEXT: s_setpc_b64 s[30:31]755;756; GFX11-TRUE16-LABEL: v_uitofp_i8_to_f16:757; GFX11-TRUE16: ; %bb.0:758; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)759; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l760; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)761; GFX11-TRUE16-NEXT: v_cvt_f16_u16_e32 v0.l, v0.l762; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]763;764; GFX11-FAKE16-LABEL: v_uitofp_i8_to_f16:765; GFX11-FAKE16: ; %bb.0:766; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)767; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v0768; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)769; GFX11-FAKE16-NEXT: v_cvt_f16_u16_e32 v0, v0770; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]771 %cvt = uitofp i8 %arg0 to half772 ret half %cvt773}774 775define double @v_uitofp_i32_to_f64_mask255(i32 %arg0) nounwind {776; GCN-LABEL: v_uitofp_i32_to_f64_mask255:777; GCN: ; %bb.0:778; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)779; GCN-NEXT: v_and_b32_e32 v0, 0xff, v0780; GCN-NEXT: v_cvt_f64_u32_e32 v[0:1], v0781; GCN-NEXT: s_setpc_b64 s[30:31]782;783; GFX10-LABEL: v_uitofp_i32_to_f64_mask255:784; GFX10: ; %bb.0:785; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)786; GFX10-NEXT: v_and_b32_e32 v0, 0xff, v0787; GFX10-NEXT: v_cvt_f64_u32_e32 v[0:1], v0788; GFX10-NEXT: s_setpc_b64 s[30:31]789;790; GFX9-LABEL: v_uitofp_i32_to_f64_mask255:791; GFX9: ; %bb.0:792; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)793; GFX9-NEXT: v_and_b32_e32 v0, 0xff, v0794; GFX9-NEXT: v_cvt_f64_u32_e32 v[0:1], v0795; GFX9-NEXT: s_setpc_b64 s[30:31]796;797; GFX11-LABEL: v_uitofp_i32_to_f64_mask255:798; GFX11: ; %bb.0:799; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)800; GFX11-NEXT: v_and_b32_e32 v0, 0xff, v0801; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)802; GFX11-NEXT: v_cvt_f64_u32_e32 v[0:1], v0803; GFX11-NEXT: s_setpc_b64 s[30:31]804 %masked = and i32 %arg0, 255805 %cvt = uitofp i32 %masked to double806 ret double %cvt807}808 809define double @v_uitofp_to_f64_lshr8_mask255(i32 %arg0) nounwind {810; GCN-LABEL: v_uitofp_to_f64_lshr8_mask255:811; GCN: ; %bb.0:812; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)813; GCN-NEXT: v_bfe_u32 v0, v0, 8, 8814; GCN-NEXT: v_cvt_f64_u32_e32 v[0:1], v0815; GCN-NEXT: s_setpc_b64 s[30:31]816;817; GFX10-LABEL: v_uitofp_to_f64_lshr8_mask255:818; GFX10: ; %bb.0:819; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)820; GFX10-NEXT: v_bfe_u32 v0, v0, 8, 8821; GFX10-NEXT: v_cvt_f64_u32_e32 v[0:1], v0822; GFX10-NEXT: s_setpc_b64 s[30:31]823;824; GFX9-LABEL: v_uitofp_to_f64_lshr8_mask255:825; GFX9: ; %bb.0:826; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)827; GFX9-NEXT: v_bfe_u32 v0, v0, 8, 8828; GFX9-NEXT: v_cvt_f64_u32_e32 v[0:1], v0829; GFX9-NEXT: s_setpc_b64 s[30:31]830;831; GFX11-LABEL: v_uitofp_to_f64_lshr8_mask255:832; GFX11: ; %bb.0:833; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)834; GFX11-NEXT: v_bfe_u32 v0, v0, 8, 8835; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)836; GFX11-NEXT: v_cvt_f64_u32_e32 v[0:1], v0837; GFX11-NEXT: s_setpc_b64 s[30:31]838 %lshr.8 = lshr i32 %arg0, 8839 %masked = and i32 %lshr.8, 255840 %cvt = uitofp i32 %masked to double841 ret double %cvt842}843 844define double @v_uitofp_to_f64_lshr16_mask255(i32 %arg0) nounwind {845; GCN-LABEL: v_uitofp_to_f64_lshr16_mask255:846; GCN: ; %bb.0:847; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)848; GCN-NEXT: v_bfe_u32 v0, v0, 16, 8849; GCN-NEXT: v_cvt_f64_u32_e32 v[0:1], v0850; GCN-NEXT: s_setpc_b64 s[30:31]851;852; GFX10-LABEL: v_uitofp_to_f64_lshr16_mask255:853; GFX10: ; %bb.0:854; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)855; GFX10-NEXT: v_bfe_u32 v0, v0, 16, 8856; GFX10-NEXT: v_cvt_f64_u32_e32 v[0:1], v0857; GFX10-NEXT: s_setpc_b64 s[30:31]858;859; GFX9-LABEL: v_uitofp_to_f64_lshr16_mask255:860; GFX9: ; %bb.0:861; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)862; GFX9-NEXT: v_bfe_u32 v0, v0, 16, 8863; GFX9-NEXT: v_cvt_f64_u32_e32 v[0:1], v0864; GFX9-NEXT: s_setpc_b64 s[30:31]865;866; GFX11-LABEL: v_uitofp_to_f64_lshr16_mask255:867; GFX11: ; %bb.0:868; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)869; GFX11-NEXT: v_bfe_u32 v0, v0, 16, 8870; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)871; GFX11-NEXT: v_cvt_f64_u32_e32 v[0:1], v0872; GFX11-NEXT: s_setpc_b64 s[30:31]873 %lshr.16 = lshr i32 %arg0, 16874 %masked = and i32 %lshr.16, 255875 %cvt = uitofp i32 %masked to double876 ret double %cvt877}878 879define double @v_uitofp_to_f64_lshr24_mask255(i32 %arg0) nounwind {880; GCN-LABEL: v_uitofp_to_f64_lshr24_mask255:881; GCN: ; %bb.0:882; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)883; GCN-NEXT: v_lshrrev_b32_e32 v0, 24, v0884; GCN-NEXT: v_cvt_f64_u32_e32 v[0:1], v0885; GCN-NEXT: s_setpc_b64 s[30:31]886;887; GFX10-LABEL: v_uitofp_to_f64_lshr24_mask255:888; GFX10: ; %bb.0:889; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)890; GFX10-NEXT: v_lshrrev_b32_e32 v0, 24, v0891; GFX10-NEXT: v_cvt_f64_u32_e32 v[0:1], v0892; GFX10-NEXT: s_setpc_b64 s[30:31]893;894; GFX9-LABEL: v_uitofp_to_f64_lshr24_mask255:895; GFX9: ; %bb.0:896; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)897; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0898; GFX9-NEXT: v_cvt_f64_u32_e32 v[0:1], v0899; GFX9-NEXT: s_setpc_b64 s[30:31]900;901; GFX11-LABEL: v_uitofp_to_f64_lshr24_mask255:902; GFX11: ; %bb.0:903; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)904; GFX11-NEXT: v_lshrrev_b32_e32 v0, 24, v0905; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)906; GFX11-NEXT: v_cvt_f64_u32_e32 v[0:1], v0907; GFX11-NEXT: s_setpc_b64 s[30:31]908 %lshr.16 = lshr i32 %arg0, 24909 %masked = and i32 %lshr.16, 255910 %cvt = uitofp i32 %masked to double911 ret double %cvt912}913 914define double @v_uitofp_i8_to_f64(i8 %arg0) nounwind {915; SI-LABEL: v_uitofp_i8_to_f64:916; SI: ; %bb.0:917; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)918; SI-NEXT: v_and_b32_e32 v0, 0xff, v0919; SI-NEXT: v_cvt_f64_u32_e32 v[0:1], v0920; SI-NEXT: s_setpc_b64 s[30:31]921;922; VI-LABEL: v_uitofp_i8_to_f64:923; VI: ; %bb.0:924; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)925; VI-NEXT: v_mov_b32_e32 v1, 0xffff926; VI-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0927; VI-NEXT: v_cvt_f64_u32_e32 v[0:1], v0928; VI-NEXT: s_setpc_b64 s[30:31]929;930; GFX10-LABEL: v_uitofp_i8_to_f64:931; GFX10: ; %bb.0:932; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)933; GFX10-NEXT: v_mov_b32_e32 v1, 0xffff934; GFX10-NEXT: v_and_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0935; GFX10-NEXT: v_cvt_f64_u32_e32 v[0:1], v0936; GFX10-NEXT: s_setpc_b64 s[30:31]937;938; GFX9-LABEL: v_uitofp_i8_to_f64:939; GFX9: ; %bb.0:940; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)941; GFX9-NEXT: s_mov_b32 s4, 0xffff942; GFX9-NEXT: v_and_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0943; GFX9-NEXT: v_cvt_f64_u32_e32 v[0:1], v0944; GFX9-NEXT: s_setpc_b64 s[30:31]945;946; GFX11-TRUE16-LABEL: v_uitofp_i8_to_f64:947; GFX11-TRUE16: ; %bb.0:948; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)949; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0950; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l951; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)952; GFX11-TRUE16-NEXT: v_cvt_f64_u32_e32 v[0:1], v0953; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]954;955; GFX11-FAKE16-LABEL: v_uitofp_i8_to_f64:956; GFX11-FAKE16: ; %bb.0:957; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)958; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xff, v0959; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)960; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0961; GFX11-FAKE16-NEXT: v_cvt_f64_u32_e32 v[0:1], v0962; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]963 %cvt = uitofp i8 %arg0 to double964 ret double %cvt965}966 967define amdgpu_kernel void @load_i8_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {968; SI-LABEL: load_i8_to_f32:969; SI: ; %bb.0:970; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9971; SI-NEXT: s_mov_b32 s7, 0xf000972; SI-NEXT: v_mov_b32_e32 v1, 0973; SI-NEXT: s_mov_b32 s10, 0974; SI-NEXT: s_mov_b32 s11, s7975; SI-NEXT: s_waitcnt lgkmcnt(0)976; SI-NEXT: s_mov_b64 s[8:9], s[2:3]977; SI-NEXT: buffer_load_ubyte v0, v[0:1], s[8:11], 0 addr64978; SI-NEXT: s_mov_b32 s6, -1979; SI-NEXT: s_mov_b32 s4, s0980; SI-NEXT: s_mov_b32 s5, s1981; SI-NEXT: s_waitcnt vmcnt(0)982; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0983; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0984; SI-NEXT: s_endpgm985;986; VI-LABEL: load_i8_to_f32:987; VI: ; %bb.0:988; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24989; VI-NEXT: s_waitcnt lgkmcnt(0)990; VI-NEXT: v_mov_b32_e32 v1, s3991; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v0992; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc993; VI-NEXT: flat_load_ubyte v0, v[0:1]994; VI-NEXT: s_mov_b32 s3, 0xf000995; VI-NEXT: s_mov_b32 s2, -1996; VI-NEXT: s_waitcnt vmcnt(0)997; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0998; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0999; VI-NEXT: s_endpgm1000;1001; GFX10-LABEL: load_i8_to_f32:1002; GFX10: ; %bb.0:1003; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241004; GFX10-NEXT: v_mov_b32_e32 v1, 01005; GFX10-NEXT: s_waitcnt lgkmcnt(0)1006; GFX10-NEXT: global_load_ubyte v0, v0, s[2:3]1007; GFX10-NEXT: s_waitcnt vmcnt(0)1008; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v01009; GFX10-NEXT: global_store_dword v1, v0, s[0:1]1010; GFX10-NEXT: s_endpgm1011;1012; GFX9-LABEL: load_i8_to_f32:1013; GFX9: ; %bb.0:1014; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241015; GFX9-NEXT: v_mov_b32_e32 v1, 01016; GFX9-NEXT: s_waitcnt lgkmcnt(0)1017; GFX9-NEXT: global_load_ubyte v0, v0, s[2:3]1018; GFX9-NEXT: s_waitcnt vmcnt(0)1019; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v01020; GFX9-NEXT: global_store_dword v1, v0, s[0:1]1021; GFX9-NEXT: s_endpgm1022;1023; GFX11-LABEL: load_i8_to_f32:1024; GFX11: ; %bb.0:1025; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241026; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v01027; GFX11-NEXT: s_waitcnt lgkmcnt(0)1028; GFX11-NEXT: global_load_u8 v0, v0, s[2:3]1029; GFX11-NEXT: s_waitcnt vmcnt(0)1030; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v01031; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]1032; GFX11-NEXT: s_endpgm1033 %tid = call i32 @llvm.amdgcn.workitem.id.x()1034 %gep = getelementptr i8, ptr addrspace(1) %in, i32 %tid1035 %load = load i8, ptr addrspace(1) %gep, align 11036 %cvt = uitofp i8 %load to float1037 store float %cvt, ptr addrspace(1) %out, align 41038 ret void1039}1040 1041define amdgpu_kernel void @load_v2i8_to_v2f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {1042; SI-LABEL: load_v2i8_to_v2f32:1043; SI: ; %bb.0:1044; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91045; SI-NEXT: s_mov_b32 s7, 0xf0001046; SI-NEXT: s_mov_b32 s10, 01047; SI-NEXT: s_mov_b32 s11, s71048; SI-NEXT: v_lshlrev_b32_e32 v0, 1, v01049; SI-NEXT: s_waitcnt lgkmcnt(0)1050; SI-NEXT: s_mov_b64 s[8:9], s[2:3]1051; SI-NEXT: v_mov_b32_e32 v1, 01052; SI-NEXT: buffer_load_ushort v0, v[0:1], s[8:11], 0 addr641053; SI-NEXT: s_mov_b32 s6, -11054; SI-NEXT: s_mov_b32 s4, s01055; SI-NEXT: s_mov_b32 s5, s11056; SI-NEXT: s_waitcnt vmcnt(0)1057; SI-NEXT: v_cvt_f32_ubyte1_e32 v1, v01058; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01059; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01060; SI-NEXT: s_endpgm1061;1062; VI-LABEL: load_v2i8_to_v2f32:1063; VI: ; %bb.0:1064; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241065; VI-NEXT: v_lshlrev_b32_e32 v0, 1, v01066; VI-NEXT: s_waitcnt lgkmcnt(0)1067; VI-NEXT: v_mov_b32_e32 v1, s31068; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v01069; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1070; VI-NEXT: flat_load_ushort v0, v[0:1]1071; VI-NEXT: s_mov_b32 s3, 0xf0001072; VI-NEXT: s_mov_b32 s2, -11073; VI-NEXT: s_waitcnt vmcnt(0)1074; VI-NEXT: v_cvt_f32_ubyte1_e32 v1, v01075; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01076; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01077; VI-NEXT: s_endpgm1078;1079; GFX10-LABEL: load_v2i8_to_v2f32:1080; GFX10: ; %bb.0:1081; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241082; GFX10-NEXT: v_lshlrev_b32_e32 v0, 1, v01083; GFX10-NEXT: v_mov_b32_e32 v2, 01084; GFX10-NEXT: s_waitcnt lgkmcnt(0)1085; GFX10-NEXT: global_load_ushort v0, v0, s[2:3]1086; GFX10-NEXT: s_waitcnt vmcnt(0)1087; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v01088; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v01089; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1090; GFX10-NEXT: s_endpgm1091;1092; GFX9-LABEL: load_v2i8_to_v2f32:1093; GFX9: ; %bb.0:1094; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241095; GFX9-NEXT: v_lshlrev_b32_e32 v0, 1, v01096; GFX9-NEXT: v_mov_b32_e32 v2, 01097; GFX9-NEXT: s_waitcnt lgkmcnt(0)1098; GFX9-NEXT: global_load_ushort v0, v0, s[2:3]1099; GFX9-NEXT: s_waitcnt vmcnt(0)1100; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v01101; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v01102; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]1103; GFX9-NEXT: s_endpgm1104;1105; GFX11-LABEL: load_v2i8_to_v2f32:1106; GFX11: ; %bb.0:1107; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241108; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01109; GFX11-NEXT: v_mov_b32_e32 v2, 01110; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1111; GFX11-NEXT: v_lshlrev_b32_e32 v0, 1, v01112; GFX11-NEXT: s_waitcnt lgkmcnt(0)1113; GFX11-NEXT: global_load_u16 v0, v0, s[2:3]1114; GFX11-NEXT: s_waitcnt vmcnt(0)1115; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v01116; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v01117; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]1118; GFX11-NEXT: s_endpgm1119 %tid = call i32 @llvm.amdgcn.workitem.id.x()1120 %gep = getelementptr <2 x i8>, ptr addrspace(1) %in, i32 %tid1121 %load = load <2 x i8>, ptr addrspace(1) %gep, align 21122 %cvt = uitofp <2 x i8> %load to <2 x float>1123 store <2 x float> %cvt, ptr addrspace(1) %out, align 161124 ret void1125}1126 1127define amdgpu_kernel void @load_v3i8_to_v3f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {1128; SI-LABEL: load_v3i8_to_v3f32:1129; SI: ; %bb.0:1130; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91131; SI-NEXT: s_mov_b32 s7, 0xf0001132; SI-NEXT: s_mov_b32 s10, 01133; SI-NEXT: s_mov_b32 s11, s71134; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v01135; SI-NEXT: s_waitcnt lgkmcnt(0)1136; SI-NEXT: s_mov_b64 s[8:9], s[2:3]1137; SI-NEXT: v_mov_b32_e32 v1, 01138; SI-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr641139; SI-NEXT: s_mov_b32 s6, -11140; SI-NEXT: s_mov_b32 s4, s01141; SI-NEXT: s_mov_b32 s5, s11142; SI-NEXT: s_waitcnt vmcnt(0)1143; SI-NEXT: v_cvt_f32_ubyte1_e32 v1, v21144; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v21145; SI-NEXT: v_cvt_f32_ubyte2_e32 v2, v21146; SI-NEXT: buffer_store_dword v2, off, s[4:7], 0 offset:81147; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01148; SI-NEXT: s_endpgm1149;1150; VI-LABEL: load_v3i8_to_v3f32:1151; VI: ; %bb.0:1152; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241153; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01154; VI-NEXT: s_waitcnt lgkmcnt(0)1155; VI-NEXT: v_mov_b32_e32 v1, s31156; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v01157; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1158; VI-NEXT: flat_load_dword v0, v[0:1]1159; VI-NEXT: s_mov_b32 s3, 0xf0001160; VI-NEXT: s_mov_b32 s2, -11161; VI-NEXT: s_waitcnt vmcnt(0)1162; VI-NEXT: v_cvt_f32_ubyte2_e32 v2, v01163; VI-NEXT: v_cvt_f32_ubyte1_e32 v1, v01164; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01165; VI-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 01166; VI-NEXT: s_endpgm1167;1168; GFX10-LABEL: load_v3i8_to_v3f32:1169; GFX10: ; %bb.0:1170; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241171; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01172; GFX10-NEXT: v_mov_b32_e32 v3, 01173; GFX10-NEXT: s_waitcnt lgkmcnt(0)1174; GFX10-NEXT: global_load_dword v0, v0, s[2:3]1175; GFX10-NEXT: s_waitcnt vmcnt(0)1176; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v01177; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v01178; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v01179; GFX10-NEXT: global_store_dwordx3 v3, v[0:2], s[0:1]1180; GFX10-NEXT: s_endpgm1181;1182; GFX9-LABEL: load_v3i8_to_v3f32:1183; GFX9: ; %bb.0:1184; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241185; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v01186; GFX9-NEXT: v_mov_b32_e32 v3, 01187; GFX9-NEXT: s_waitcnt lgkmcnt(0)1188; GFX9-NEXT: global_load_dword v0, v0, s[2:3]1189; GFX9-NEXT: s_waitcnt vmcnt(0)1190; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v01191; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v01192; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v01193; GFX9-NEXT: global_store_dwordx3 v3, v[0:2], s[0:1]1194; GFX9-NEXT: s_endpgm1195;1196; GFX11-LABEL: load_v3i8_to_v3f32:1197; GFX11: ; %bb.0:1198; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241199; GFX11-NEXT: v_dual_mov_b32 v3, 0 :: v_dual_and_b32 v0, 0x3ff, v01200; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1201; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v01202; GFX11-NEXT: s_waitcnt lgkmcnt(0)1203; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]1204; GFX11-NEXT: s_waitcnt vmcnt(0)1205; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v2, v01206; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v01207; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v01208; GFX11-NEXT: global_store_b96 v3, v[0:2], s[0:1]1209; GFX11-NEXT: s_endpgm1210 %tid = call i32 @llvm.amdgcn.workitem.id.x()1211 %gep = getelementptr <3 x i8>, ptr addrspace(1) %in, i32 %tid1212 %load = load <3 x i8>, ptr addrspace(1) %gep, align 41213 %cvt = uitofp <3 x i8> %load to <3 x float>1214 store <3 x float> %cvt, ptr addrspace(1) %out, align 161215 ret void1216}1217 1218define amdgpu_kernel void @load_v4i8_to_v4f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {1219; SI-LABEL: load_v4i8_to_v4f32:1220; SI: ; %bb.0:1221; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91222; SI-NEXT: s_mov_b32 s7, 0xf0001223; SI-NEXT: s_mov_b32 s10, 01224; SI-NEXT: s_mov_b32 s11, s71225; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v01226; SI-NEXT: s_waitcnt lgkmcnt(0)1227; SI-NEXT: s_mov_b64 s[8:9], s[2:3]1228; SI-NEXT: v_mov_b32_e32 v1, 01229; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr641230; SI-NEXT: s_mov_b32 s6, -11231; SI-NEXT: s_mov_b32 s4, s01232; SI-NEXT: s_mov_b32 s5, s11233; SI-NEXT: s_waitcnt vmcnt(0)1234; SI-NEXT: v_cvt_f32_ubyte3_e32 v3, v01235; SI-NEXT: v_cvt_f32_ubyte2_e32 v2, v01236; SI-NEXT: v_cvt_f32_ubyte1_e32 v1, v01237; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01238; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01239; SI-NEXT: s_endpgm1240;1241; VI-LABEL: load_v4i8_to_v4f32:1242; VI: ; %bb.0:1243; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241244; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01245; VI-NEXT: s_waitcnt lgkmcnt(0)1246; VI-NEXT: v_mov_b32_e32 v1, s31247; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v01248; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1249; VI-NEXT: flat_load_dword v0, v[0:1]1250; VI-NEXT: s_mov_b32 s3, 0xf0001251; VI-NEXT: s_mov_b32 s2, -11252; VI-NEXT: s_waitcnt vmcnt(0)1253; VI-NEXT: v_cvt_f32_ubyte3_e32 v3, v01254; VI-NEXT: v_cvt_f32_ubyte2_e32 v2, v01255; VI-NEXT: v_cvt_f32_ubyte1_e32 v1, v01256; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01257; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01258; VI-NEXT: s_endpgm1259;1260; GFX10-LABEL: load_v4i8_to_v4f32:1261; GFX10: ; %bb.0:1262; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241263; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01264; GFX10-NEXT: v_mov_b32_e32 v4, 01265; GFX10-NEXT: s_waitcnt lgkmcnt(0)1266; GFX10-NEXT: global_load_dword v0, v0, s[2:3]1267; GFX10-NEXT: s_waitcnt vmcnt(0)1268; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v3, v01269; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v01270; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v01271; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v01272; GFX10-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]1273; GFX10-NEXT: s_endpgm1274;1275; GFX9-LABEL: load_v4i8_to_v4f32:1276; GFX9: ; %bb.0:1277; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241278; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v01279; GFX9-NEXT: v_mov_b32_e32 v4, 01280; GFX9-NEXT: s_waitcnt lgkmcnt(0)1281; GFX9-NEXT: global_load_dword v0, v0, s[2:3]1282; GFX9-NEXT: s_waitcnt vmcnt(0)1283; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v3, v01284; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v01285; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v01286; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v01287; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]1288; GFX9-NEXT: s_endpgm1289;1290; GFX11-LABEL: load_v4i8_to_v4f32:1291; GFX11: ; %bb.0:1292; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241293; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01294; GFX11-NEXT: v_mov_b32_e32 v4, 01295; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1296; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v01297; GFX11-NEXT: s_waitcnt lgkmcnt(0)1298; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]1299; GFX11-NEXT: s_waitcnt vmcnt(0)1300; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v3, v01301; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v2, v01302; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v01303; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v01304; GFX11-NEXT: global_store_b128 v4, v[0:3], s[0:1]1305; GFX11-NEXT: s_endpgm1306 %tid = call i32 @llvm.amdgcn.workitem.id.x()1307 %gep = getelementptr <4 x i8>, ptr addrspace(1) %in, i32 %tid1308 %load = load <4 x i8>, ptr addrspace(1) %gep, align 41309 %cvt = uitofp <4 x i8> %load to <4 x float>1310 store <4 x float> %cvt, ptr addrspace(1) %out, align 161311 ret void1312}1313 1314; This should not be adding instructions to shift into the correct1315; position in the word for the component.1316 1317; FIXME: Packing bytes1318define amdgpu_kernel void @load_v4i8_to_v4f32_unaligned(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {1319; SI-LABEL: load_v4i8_to_v4f32_unaligned:1320; SI: ; %bb.0:1321; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91322; SI-NEXT: s_mov_b32 s7, 0xf0001323; SI-NEXT: s_mov_b32 s10, 01324; SI-NEXT: s_mov_b32 s11, s71325; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v01326; SI-NEXT: s_waitcnt lgkmcnt(0)1327; SI-NEXT: s_mov_b64 s[8:9], s[2:3]1328; SI-NEXT: v_mov_b32_e32 v1, 01329; SI-NEXT: buffer_load_ubyte v2, v[0:1], s[8:11], 0 addr64 offset:31330; SI-NEXT: buffer_load_ubyte v4, v[0:1], s[8:11], 0 addr64 offset:21331; SI-NEXT: buffer_load_ubyte v5, v[0:1], s[8:11], 0 addr64 offset:11332; SI-NEXT: buffer_load_ubyte v0, v[0:1], s[8:11], 0 addr641333; SI-NEXT: s_mov_b32 s6, -11334; SI-NEXT: s_mov_b32 s4, s01335; SI-NEXT: s_mov_b32 s5, s11336; SI-NEXT: s_waitcnt vmcnt(3)1337; SI-NEXT: v_cvt_f32_ubyte0_e32 v3, v21338; SI-NEXT: s_waitcnt vmcnt(2)1339; SI-NEXT: v_cvt_f32_ubyte0_e32 v2, v41340; SI-NEXT: s_waitcnt vmcnt(1)1341; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v51342; SI-NEXT: s_waitcnt vmcnt(0)1343; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v01344; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01345; SI-NEXT: s_endpgm1346;1347; VI-LABEL: load_v4i8_to_v4f32_unaligned:1348; VI: ; %bb.0:1349; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241350; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01351; VI-NEXT: s_waitcnt lgkmcnt(0)1352; VI-NEXT: v_mov_b32_e32 v1, s31353; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v01354; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1355; VI-NEXT: v_add_u32_e32 v2, vcc, 2, v01356; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc1357; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v01358; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc1359; VI-NEXT: flat_load_ubyte v2, v[2:3]1360; VI-NEXT: flat_load_ubyte v3, v[4:5]1361; VI-NEXT: flat_load_ubyte v4, v[0:1]1362; VI-NEXT: v_add_u32_e32 v0, vcc, 1, v01363; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1364; VI-NEXT: flat_load_ubyte v1, v[0:1]1365; VI-NEXT: s_mov_b32 s3, 0xf0001366; VI-NEXT: s_mov_b32 s2, -11367; VI-NEXT: s_waitcnt vmcnt(3)1368; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v21369; VI-NEXT: s_waitcnt vmcnt(2)1370; VI-NEXT: v_cvt_f32_ubyte0_e32 v3, v31371; VI-NEXT: s_waitcnt vmcnt(1)1372; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v41373; VI-NEXT: s_waitcnt vmcnt(0)1374; VI-NEXT: v_cvt_f32_ubyte0_e32 v1, v11375; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01376; VI-NEXT: s_endpgm1377;1378; GFX10-LABEL: load_v4i8_to_v4f32_unaligned:1379; GFX10: ; %bb.0:1380; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241381; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01382; GFX10-NEXT: v_mov_b32_e32 v6, 01383; GFX10-NEXT: s_waitcnt lgkmcnt(0)1384; GFX10-NEXT: s_clause 0x31385; GFX10-NEXT: global_load_ubyte v1, v0, s[2:3] offset:31386; GFX10-NEXT: global_load_ubyte v2, v0, s[2:3] offset:21387; GFX10-NEXT: global_load_ubyte v4, v0, s[2:3] offset:11388; GFX10-NEXT: global_load_ubyte v5, v0, s[2:3]1389; GFX10-NEXT: s_waitcnt vmcnt(3)1390; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v3, v11391; GFX10-NEXT: s_waitcnt vmcnt(2)1392; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v2, v21393; GFX10-NEXT: s_waitcnt vmcnt(1)1394; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v1, v41395; GFX10-NEXT: s_waitcnt vmcnt(0)1396; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v51397; GFX10-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]1398; GFX10-NEXT: s_endpgm1399;1400; GFX9-LABEL: load_v4i8_to_v4f32_unaligned:1401; GFX9: ; %bb.0:1402; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241403; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v01404; GFX9-NEXT: v_mov_b32_e32 v6, 01405; GFX9-NEXT: s_waitcnt lgkmcnt(0)1406; GFX9-NEXT: global_load_ubyte v1, v0, s[2:3] offset:31407; GFX9-NEXT: global_load_ubyte v2, v0, s[2:3] offset:21408; GFX9-NEXT: global_load_ubyte v4, v0, s[2:3] offset:11409; GFX9-NEXT: global_load_ubyte v5, v0, s[2:3]1410; GFX9-NEXT: s_waitcnt vmcnt(3)1411; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, v11412; GFX9-NEXT: s_waitcnt vmcnt(2)1413; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, v21414; GFX9-NEXT: s_waitcnt vmcnt(1)1415; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v1, v41416; GFX9-NEXT: s_waitcnt vmcnt(0)1417; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v51418; GFX9-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]1419; GFX9-NEXT: s_endpgm1420;1421; GFX11-LABEL: load_v4i8_to_v4f32_unaligned:1422; GFX11: ; %bb.0:1423; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x241424; GFX11-NEXT: v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v0, 0x3ff, v01425; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1426; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v01427; GFX11-NEXT: s_waitcnt lgkmcnt(0)1428; GFX11-NEXT: s_clause 0x31429; GFX11-NEXT: global_load_u8 v1, v0, s[2:3] offset:31430; GFX11-NEXT: global_load_u8 v2, v0, s[2:3] offset:21431; GFX11-NEXT: global_load_u8 v4, v0, s[2:3] offset:11432; GFX11-NEXT: global_load_u8 v0, v0, s[2:3]1433; GFX11-NEXT: s_waitcnt vmcnt(3)1434; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v3, v11435; GFX11-NEXT: s_waitcnt vmcnt(2)1436; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v2, v21437; GFX11-NEXT: s_waitcnt vmcnt(1)1438; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v1, v41439; GFX11-NEXT: s_waitcnt vmcnt(0)1440; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v01441; GFX11-NEXT: global_store_b128 v5, v[0:3], s[0:1]1442; GFX11-NEXT: s_endpgm1443 %tid = call i32 @llvm.amdgcn.workitem.id.x()1444 %gep = getelementptr <4 x i8>, ptr addrspace(1) %in, i32 %tid1445 %load = load <4 x i8>, ptr addrspace(1) %gep, align 11446 %cvt = uitofp <4 x i8> %load to <4 x float>1447 store <4 x float> %cvt, ptr addrspace(1) %out, align 161448 ret void1449}1450 1451; The other use of shuffle0_0 make it profitable to lower into v_perm1452 1453define amdgpu_kernel void @load_v4i8_to_v4f32_unaligned_multiuse(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %out1, ptr addrspace(1) noalias %in, ptr addrspace(1) noalias %in1) nounwind {1454; SI-LABEL: load_v4i8_to_v4f32_unaligned_multiuse:1455; SI: ; %bb.0:1456; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x91457; SI-NEXT: s_mov_b32 s11, 0xf0001458; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v01459; SI-NEXT: v_mov_b32_e32 v1, 01460; SI-NEXT: s_mov_b32 s14, 01461; SI-NEXT: s_mov_b32 s15, s111462; SI-NEXT: s_waitcnt lgkmcnt(0)1463; SI-NEXT: s_mov_b64 s[12:13], s[4:5]1464; SI-NEXT: buffer_load_ubyte v2, v[0:1], s[12:15], 0 addr64 offset:31465; SI-NEXT: buffer_load_ubyte v4, v[0:1], s[12:15], 0 addr64 offset:21466; SI-NEXT: s_mov_b64 s[12:13], s[6:7]1467; SI-NEXT: buffer_load_ubyte v3, v[0:1], s[12:15], 0 addr64 offset:21468; SI-NEXT: s_mov_b32 s10, -11469; SI-NEXT: s_mov_b32 s8, s21470; SI-NEXT: s_mov_b32 s9, s31471; SI-NEXT: s_mov_b32 s2, s101472; SI-NEXT: s_mov_b32 s3, s111473; SI-NEXT: s_waitcnt vmcnt(2)1474; SI-NEXT: v_lshlrev_b32_e32 v5, 8, v21475; SI-NEXT: s_waitcnt vmcnt(1)1476; SI-NEXT: v_lshlrev_b32_e32 v6, 8, v41477; SI-NEXT: v_or_b32_e32 v5, v5, v41478; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v41479; SI-NEXT: s_waitcnt vmcnt(0)1480; SI-NEXT: v_or_b32_e32 v6, v3, v61481; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v51482; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v21483; SI-NEXT: v_cvt_f32_ubyte0_e32 v2, v31484; SI-NEXT: v_mov_b32_e32 v3, v11485; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v61486; SI-NEXT: v_alignbit_b32 v4, v4, v5, 241487; SI-NEXT: v_or_b32_e32 v4, v4, v61488; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01489; SI-NEXT: buffer_store_dword v4, off, s[8:11], 01490; SI-NEXT: s_endpgm1491;1492; VI-LABEL: load_v4i8_to_v4f32_unaligned_multiuse:1493; VI: ; %bb.0:1494; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241495; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01496; VI-NEXT: s_mov_b32 s8, 0x40004051497; VI-NEXT: s_waitcnt lgkmcnt(0)1498; VI-NEXT: v_mov_b32_e32 v1, s51499; VI-NEXT: v_add_u32_e32 v2, vcc, s4, v01500; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc1501; VI-NEXT: v_mov_b32_e32 v1, s71502; VI-NEXT: v_add_u32_e32 v4, vcc, s6, v01503; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc1504; VI-NEXT: v_add_u32_e32 v0, vcc, 3, v21505; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc1506; VI-NEXT: flat_load_ubyte v6, v[0:1]1507; VI-NEXT: v_add_u32_e32 v0, vcc, 2, v21508; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v3, vcc1509; VI-NEXT: v_add_u32_e32 v2, vcc, 3, v41510; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v5, vcc1511; VI-NEXT: v_add_u32_e32 v4, vcc, 2, v41512; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc1513; VI-NEXT: flat_load_ubyte v2, v[2:3]1514; VI-NEXT: flat_load_ubyte v3, v[4:5]1515; VI-NEXT: flat_load_ubyte v4, v[0:1]1516; VI-NEXT: s_mov_b32 s7, 0xf0001517; VI-NEXT: s_mov_b32 s6, -11518; VI-NEXT: s_mov_b32 s4, s21519; VI-NEXT: s_mov_b32 s5, s31520; VI-NEXT: s_mov_b32 s2, s61521; VI-NEXT: s_mov_b32 s3, s71522; VI-NEXT: s_waitcnt vmcnt(3)1523; VI-NEXT: v_lshlrev_b32_e32 v5, 8, v61524; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v61525; VI-NEXT: s_waitcnt vmcnt(2)1526; VI-NEXT: v_lshlrev_b32_e32 v7, 8, v21527; VI-NEXT: s_waitcnt vmcnt(1)1528; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v31529; VI-NEXT: s_waitcnt vmcnt(0)1530; VI-NEXT: v_cvt_f32_ubyte0_e32 v1, v41531; VI-NEXT: v_or_b32_e32 v4, v5, v41532; VI-NEXT: v_or_b32_e32 v5, v7, v31533; VI-NEXT: v_mov_b32_e32 v3, v11534; VI-NEXT: v_perm_b32 v4, v4, v5, s81535; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01536; VI-NEXT: buffer_store_dword v4, off, s[4:7], 01537; VI-NEXT: s_endpgm1538;1539; GFX10-LABEL: load_v4i8_to_v4f32_unaligned_multiuse:1540; GFX10: ; %bb.0:1541; GFX10-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241542; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01543; GFX10-NEXT: v_mov_b32_e32 v7, 01544; GFX10-NEXT: s_waitcnt lgkmcnt(0)1545; GFX10-NEXT: s_clause 0x31546; GFX10-NEXT: global_load_ubyte v1, v0, s[12:13] offset:21547; GFX10-NEXT: global_load_ubyte v3, v0, s[12:13] offset:31548; GFX10-NEXT: global_load_ubyte v2, v0, s[14:15] offset:31549; GFX10-NEXT: global_load_ubyte v4, v0, s[14:15] offset:21550; GFX10-NEXT: s_waitcnt vmcnt(2)1551; GFX10-NEXT: v_lshl_or_b32 v5, v3, 8, v11552; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v1, v11553; GFX10-NEXT: s_waitcnt vmcnt(0)1554; GFX10-NEXT: v_lshl_or_b32 v6, v2, 8, v41555; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v2, v41556; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v31557; GFX10-NEXT: v_mov_b32_e32 v3, v11558; GFX10-NEXT: v_perm_b32 v4, v5, v6, 0x40004051559; GFX10-NEXT: global_store_dwordx4 v7, v[0:3], s[8:9]1560; GFX10-NEXT: global_store_dword v7, v4, s[10:11]1561; GFX10-NEXT: s_endpgm1562;1563; GFX9-LABEL: load_v4i8_to_v4f32_unaligned_multiuse:1564; GFX9: ; %bb.0:1565; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x241566; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v01567; GFX9-NEXT: v_mov_b32_e32 v5, 01568; GFX9-NEXT: s_mov_b32 s0, 0x40004051569; GFX9-NEXT: s_waitcnt lgkmcnt(0)1570; GFX9-NEXT: global_load_ubyte v1, v0, s[12:13] offset:21571; GFX9-NEXT: global_load_ubyte v3, v0, s[12:13] offset:31572; GFX9-NEXT: global_load_ubyte v2, v0, s[14:15] offset:31573; GFX9-NEXT: global_load_ubyte v4, v0, s[14:15] offset:21574; GFX9-NEXT: s_waitcnt vmcnt(2)1575; GFX9-NEXT: v_lshl_or_b32 v6, v3, 8, v11576; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v1, v11577; GFX9-NEXT: s_waitcnt vmcnt(0)1578; GFX9-NEXT: v_lshl_or_b32 v7, v2, 8, v41579; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, v41580; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v31581; GFX9-NEXT: v_mov_b32_e32 v3, v11582; GFX9-NEXT: v_perm_b32 v4, v6, v7, s01583; GFX9-NEXT: global_store_dwordx4 v5, v[0:3], s[8:9]1584; GFX9-NEXT: global_store_dword v5, v4, s[10:11]1585; GFX9-NEXT: s_endpgm1586;1587; GFX11-LABEL: load_v4i8_to_v4f32_unaligned_multiuse:1588; GFX11: ; %bb.0:1589; GFX11-NEXT: s_load_b256 s[0:7], s[4:5], 0x241590; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v01591; GFX11-NEXT: v_mov_b32_e32 v6, 01592; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)1593; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v01594; GFX11-NEXT: s_waitcnt lgkmcnt(0)1595; GFX11-NEXT: s_clause 0x31596; GFX11-NEXT: global_load_u8 v1, v0, s[4:5] offset:21597; GFX11-NEXT: global_load_u8 v3, v0, s[4:5] offset:31598; GFX11-NEXT: global_load_u8 v2, v0, s[6:7] offset:31599; GFX11-NEXT: global_load_u8 v0, v0, s[6:7] offset:21600; GFX11-NEXT: s_waitcnt vmcnt(2)1601; GFX11-NEXT: v_lshl_or_b32 v4, v3, 8, v11602; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v1, v11603; GFX11-NEXT: s_waitcnt vmcnt(0)1604; GFX11-NEXT: v_lshl_or_b32 v5, v2, 8, v01605; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v2, v01606; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v31607; GFX11-NEXT: v_mov_b32_e32 v3, v11608; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)1609; GFX11-NEXT: v_perm_b32 v4, v4, v5, 0x40004051610; GFX11-NEXT: s_clause 0x11611; GFX11-NEXT: global_store_b128 v6, v[0:3], s[0:1]1612; GFX11-NEXT: global_store_b32 v6, v4, s[2:3]1613; GFX11-NEXT: s_endpgm1614 %tid = call i32 @llvm.amdgcn.workitem.id.x()1615 %gep = getelementptr <4 x i8>, ptr addrspace(1) %in, i32 %tid1616 %gep1 = getelementptr <4 x i8>, ptr addrspace(1) %in1, i32 %tid1617 %load = load <4 x i8>, ptr addrspace(1) %gep, align 11618 %load1 = load <4 x i8>, ptr addrspace(1) %gep1, align 11619 %shuffle0_0 = shufflevector <4 x i8> %load, <4 x i8> %load1, <4 x i32> <i32 3, i32 2, i32 6, i32 2>1620 %cvt = uitofp <4 x i8> %shuffle0_0 to <4 x float>1621 store <4 x float> %cvt, ptr addrspace(1) %out, align 161622 store <4 x i8> %shuffle0_0, ptr addrspace(1) %out1, align 41623 ret void1624}1625 1626; FIXME: Need to handle non-uniform case for function below (load without gep).1627; Instructions still emitted to repack bytes for add use.1628define amdgpu_kernel void @load_v4i8_to_v4f32_2_uses(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %out2, ptr addrspace(1) noalias %in) nounwind {1629; SI-LABEL: load_v4i8_to_v4f32_2_uses:1630; SI: ; %bb.0:1631; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd1632; SI-NEXT: s_mov_b32 s3, 0xf0001633; SI-NEXT: s_mov_b32 s10, 01634; SI-NEXT: s_mov_b32 s11, s31635; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v01636; SI-NEXT: v_mov_b32_e32 v1, 01637; SI-NEXT: s_waitcnt lgkmcnt(0)1638; SI-NEXT: buffer_load_dword v4, v[0:1], s[8:11], 0 addr641639; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x91640; SI-NEXT: s_mov_b32 s2, -11641; SI-NEXT: s_waitcnt lgkmcnt(0)1642; SI-NEXT: s_mov_b32 s0, s61643; SI-NEXT: s_mov_b32 s1, s71644; SI-NEXT: s_mov_b32 s6, s21645; SI-NEXT: s_mov_b32 s7, s31646; SI-NEXT: s_waitcnt vmcnt(0)1647; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v41648; SI-NEXT: v_and_b32_e32 v6, 0xff00, v41649; SI-NEXT: v_cvt_f32_ubyte3_e32 v3, v41650; SI-NEXT: v_cvt_f32_ubyte2_e32 v2, v41651; SI-NEXT: v_cvt_f32_ubyte1_e32 v1, v41652; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v41653; SI-NEXT: v_add_i32_e32 v4, vcc, 9, v41654; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01655; SI-NEXT: s_waitcnt expcnt(0)1656; SI-NEXT: v_and_b32_e32 v0, 0xff, v41657; SI-NEXT: v_add_i32_e32 v2, vcc, 9, v51658; SI-NEXT: v_and_b32_e32 v1, 0xff00, v51659; SI-NEXT: v_or_b32_e32 v0, v6, v01660; SI-NEXT: v_and_b32_e32 v2, 0xff, v21661; SI-NEXT: v_add_i32_e32 v0, vcc, 0x900, v01662; SI-NEXT: v_or_b32_e32 v1, v1, v21663; SI-NEXT: v_and_b32_e32 v0, 0xffff, v01664; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11665; SI-NEXT: v_or_b32_e32 v0, v1, v01666; SI-NEXT: v_add_i32_e32 v0, vcc, 0x9000000, v01667; SI-NEXT: buffer_store_dword v0, off, s[0:3], 01668; SI-NEXT: s_endpgm1669;1670; VI-LABEL: load_v4i8_to_v4f32_2_uses:1671; VI: ; %bb.0:1672; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341673; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v01674; VI-NEXT: s_mov_b32 s7, 0xf0001675; VI-NEXT: s_mov_b32 s6, -11676; VI-NEXT: v_mov_b32_e32 v5, 0xffffff001677; VI-NEXT: s_waitcnt lgkmcnt(0)1678; VI-NEXT: v_mov_b32_e32 v1, s11679; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v01680; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1681; VI-NEXT: flat_load_dword v4, v[0:1]1682; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241683; VI-NEXT: v_mov_b32_e32 v6, 91684; VI-NEXT: v_mov_b32_e32 v7, 0x9001685; VI-NEXT: s_waitcnt lgkmcnt(0)1686; VI-NEXT: s_mov_b32 s4, s21687; VI-NEXT: s_mov_b32 s5, s31688; VI-NEXT: s_mov_b32 s2, s61689; VI-NEXT: s_mov_b32 s3, s71690; VI-NEXT: s_waitcnt vmcnt(0)1691; VI-NEXT: v_cvt_f32_ubyte3_e32 v3, v41692; VI-NEXT: v_cvt_f32_ubyte2_e32 v2, v41693; VI-NEXT: v_cvt_f32_ubyte1_e32 v1, v41694; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v41695; VI-NEXT: v_and_b32_e32 v8, 0xffffff00, v41696; VI-NEXT: v_add_u16_e32 v9, 9, v41697; VI-NEXT: v_and_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1698; VI-NEXT: v_add_u16_sdwa v4, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1699; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01700; VI-NEXT: s_nop 01701; VI-NEXT: v_or_b32_sdwa v0, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01702; VI-NEXT: v_or_b32_sdwa v1, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01703; VI-NEXT: v_add_u16_e32 v0, 0x900, v01704; VI-NEXT: v_add_u16_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1705; VI-NEXT: v_or_b32_e32 v0, v0, v11706; VI-NEXT: buffer_store_dword v0, off, s[4:7], 01707; VI-NEXT: s_endpgm1708;1709; GFX10-LABEL: load_v4i8_to_v4f32_2_uses:1710; GFX10: ; %bb.0:1711; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341712; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01713; GFX10-NEXT: s_waitcnt lgkmcnt(0)1714; GFX10-NEXT: global_load_dword v0, v0, s[0:1]1715; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)1716; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241717; GFX10-NEXT: s_waitcnt vmcnt(0)1718; GFX10-NEXT: v_lshrrev_b32_e32 v1, 16, v01719; GFX10-NEXT: v_and_b32_e32 v3, 0xffffff00, v01720; GFX10-NEXT: v_add_nc_u16 v4, v0, 91721; GFX10-NEXT: v_and_b32_e32 v2, 0xffffff00, v11722; GFX10-NEXT: v_add_nc_u16 v1, v1, 91723; GFX10-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01724; GFX10-NEXT: v_or_b32_sdwa v2, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01725; GFX10-NEXT: v_mov_b32_e32 v4, 01726; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v3, v01727; GFX10-NEXT: v_add_nc_u16 v1, 0x900, v11728; GFX10-NEXT: v_add_nc_u16 v5, 0x900, v21729; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v01730; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v11731; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v01732; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v01733; GFX10-NEXT: v_or_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1734; GFX10-NEXT: s_waitcnt lgkmcnt(0)1735; GFX10-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]1736; GFX10-NEXT: global_store_dword v4, v5, s[2:3]1737; GFX10-NEXT: s_endpgm1738;1739; GFX9-LABEL: load_v4i8_to_v4f32_2_uses:1740; GFX9: ; %bb.0:1741; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x341742; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v01743; GFX9-NEXT: v_mov_b32_e32 v6, 91744; GFX9-NEXT: v_mov_b32_e32 v5, 01745; GFX9-NEXT: s_waitcnt lgkmcnt(0)1746; GFX9-NEXT: global_load_dword v4, v0, s[0:1]1747; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241748; GFX9-NEXT: s_movk_i32 s4, 0xff001749; GFX9-NEXT: s_movk_i32 s5, 0x9001750; GFX9-NEXT: s_waitcnt vmcnt(0)1751; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v3, v41752; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v41753; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v41754; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v41755; GFX9-NEXT: v_and_b32_e32 v7, 0xffffff00, v41756; GFX9-NEXT: v_add_u16_e32 v8, 9, v41757; GFX9-NEXT: v_and_b32_sdwa v9, v4, s4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1758; GFX9-NEXT: v_add_u16_sdwa v4, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1759; GFX9-NEXT: s_waitcnt lgkmcnt(0)1760; GFX9-NEXT: global_store_dwordx4 v5, v[0:3], s[0:1]1761; GFX9-NEXT: s_nop 01762; GFX9-NEXT: v_or_b32_sdwa v0, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01763; GFX9-NEXT: v_or_b32_sdwa v1, v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_01764; GFX9-NEXT: v_add_u16_e32 v0, 0x900, v01765; GFX9-NEXT: v_add_u16_sdwa v1, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1766; GFX9-NEXT: v_or_b32_e32 v0, v0, v11767; GFX9-NEXT: global_store_dword v5, v0, s[2:3]1768; GFX9-NEXT: s_endpgm1769;1770; GFX11-TRUE16-LABEL: load_v4i8_to_v4f32_2_uses:1771; GFX11-TRUE16: ; %bb.0:1772; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x341773; GFX11-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01774; GFX11-TRUE16-NEXT: v_mov_b32_e32 v6, 01775; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1776; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01777; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1778; GFX11-TRUE16-NEXT: global_load_b32 v5, v0, s[0:1]1779; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241780; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1781; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v5.l, 91782; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.h, v5.h, 91783; GFX11-TRUE16-NEXT: v_and_b16 v1.l, 0xff00, v5.l1784; GFX11-TRUE16-NEXT: v_and_b16 v1.h, 0xff00, v5.h1785; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte3_e32 v3, v51786; GFX11-TRUE16-NEXT: v_and_b16 v0.l, 0xff, v0.l1787; GFX11-TRUE16-NEXT: v_and_b16 v0.h, 0xff, v0.h1788; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte2_e32 v2, v51789; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1790; GFX11-TRUE16-NEXT: v_or_b16 v4.l, v1.l, v0.l1791; GFX11-TRUE16-NEXT: v_or_b16 v4.h, v1.h, v0.h1792; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte1_e32 v1, v51793; GFX11-TRUE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v51794; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1795; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.l, 0x900, v4.l1796; GFX11-TRUE16-NEXT: v_add_nc_u16 v4.h, 0x900, v4.h1797; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1798; GFX11-TRUE16-NEXT: s_clause 0x11799; GFX11-TRUE16-NEXT: global_store_b128 v6, v[0:3], s[0:1]1800; GFX11-TRUE16-NEXT: global_store_b32 v6, v4, s[2:3]1801; GFX11-TRUE16-NEXT: s_endpgm1802;1803; GFX11-FAKE16-LABEL: load_v4i8_to_v4f32_2_uses:1804; GFX11-FAKE16: ; %bb.0:1805; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x341806; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v01807; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1808; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 2, v01809; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1810; GFX11-FAKE16-NEXT: global_load_b32 v0, v0, s[0:1]1811; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241812; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1813; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v01814; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, v0, 91815; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffffff00, v01816; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1817; GFX11-FAKE16-NEXT: v_add_nc_u16 v3, v1, 91818; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0xff, v21819; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffffff00, v11820; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1821; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v31822; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v4, v21823; GFX11-FAKE16-NEXT: v_mov_b32_e32 v4, 01824; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1825; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v1, v31826; GFX11-FAKE16-NEXT: v_add_nc_u16 v2, 0x900, v21827; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte3_e32 v3, v01828; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1829; GFX11-FAKE16-NEXT: v_add_nc_u16 v1, 0x900, v11830; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v21831; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte2_e32 v2, v01832; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)1833; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v11834; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte1_e32 v1, v01835; GFX11-FAKE16-NEXT: v_cvt_f32_ubyte0_e32 v0, v01836; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v5, v61837; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1838; GFX11-FAKE16-NEXT: s_clause 0x11839; GFX11-FAKE16-NEXT: global_store_b128 v4, v[0:3], s[0:1]1840; GFX11-FAKE16-NEXT: global_store_b32 v4, v5, s[2:3]1841; GFX11-FAKE16-NEXT: s_endpgm1842 %tid.x = call i32 @llvm.amdgcn.workitem.id.x()1843 %in.ptr = getelementptr <4 x i8>, ptr addrspace(1) %in, i32 %tid.x1844 %load = load <4 x i8>, ptr addrspace(1) %in.ptr, align 41845 %cvt = uitofp <4 x i8> %load to <4 x float>1846 store <4 x float> %cvt, ptr addrspace(1) %out, align 161847 %add = add <4 x i8> %load, <i8 9, i8 9, i8 9, i8 9> ; Second use of %load1848 store <4 x i8> %add, ptr addrspace(1) %out2, align 41849 ret void1850}1851 1852; Make sure this doesn't crash.1853define amdgpu_kernel void @load_v7i8_to_v7f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {1854; SI-LABEL: load_v7i8_to_v7f32:1855; SI: ; %bb.0:1856; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x91857; SI-NEXT: s_mov_b32 s7, 0xf0001858; SI-NEXT: s_mov_b32 s10, 01859; SI-NEXT: s_mov_b32 s11, s71860; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v01861; SI-NEXT: s_waitcnt lgkmcnt(0)1862; SI-NEXT: s_mov_b64 s[8:9], s[2:3]1863; SI-NEXT: v_mov_b32_e32 v1, 01864; SI-NEXT: buffer_load_ubyte v2, v[0:1], s[8:11], 0 addr64 offset:31865; SI-NEXT: buffer_load_ubyte v4, v[0:1], s[8:11], 0 addr64 offset:21866; SI-NEXT: buffer_load_ubyte v5, v[0:1], s[8:11], 0 addr64 offset:11867; SI-NEXT: buffer_load_ubyte v6, v[0:1], s[8:11], 0 addr641868; SI-NEXT: buffer_load_ubyte v7, v[0:1], s[8:11], 0 addr64 offset:51869; SI-NEXT: buffer_load_ubyte v8, v[0:1], s[8:11], 0 addr64 offset:41870; SI-NEXT: buffer_load_ubyte v9, v[0:1], s[8:11], 0 addr64 offset:61871; SI-NEXT: s_mov_b32 s6, -11872; SI-NEXT: s_mov_b32 s4, s01873; SI-NEXT: s_mov_b32 s5, s11874; SI-NEXT: s_waitcnt vmcnt(6)1875; SI-NEXT: v_cvt_f32_ubyte0_e32 v3, v21876; SI-NEXT: s_waitcnt vmcnt(5)1877; SI-NEXT: v_cvt_f32_ubyte0_e32 v2, v41878; SI-NEXT: s_waitcnt vmcnt(4)1879; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v51880; SI-NEXT: s_waitcnt vmcnt(3)1881; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v61882; SI-NEXT: s_waitcnt vmcnt(2)1883; SI-NEXT: v_cvt_f32_ubyte0_e32 v5, v71884; SI-NEXT: s_waitcnt vmcnt(1)1885; SI-NEXT: v_cvt_f32_ubyte0_e32 v4, v81886; SI-NEXT: s_waitcnt vmcnt(0)1887; SI-NEXT: v_cvt_f32_ubyte0_e32 v6, v91888; SI-NEXT: buffer_store_dword v6, off, s[4:7], 0 offset:241889; SI-NEXT: buffer_store_dwordx2 v[4:5], off, s[4:7], 0 offset:161890; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 01891; SI-NEXT: s_endpgm1892;1893; VI-LABEL: load_v7i8_to_v7f32:1894; VI: ; %bb.0:1895; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241896; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v01897; VI-NEXT: s_waitcnt lgkmcnt(0)1898; VI-NEXT: v_mov_b32_e32 v1, s31899; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v01900; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1901; VI-NEXT: v_add_u32_e32 v2, vcc, 5, v01902; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc1903; VI-NEXT: v_add_u32_e32 v4, vcc, 6, v01904; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc1905; VI-NEXT: v_add_u32_e32 v6, vcc, 1, v01906; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v1, vcc1907; VI-NEXT: v_add_u32_e32 v8, vcc, 2, v01908; VI-NEXT: v_addc_u32_e32 v9, vcc, 0, v1, vcc1909; VI-NEXT: v_add_u32_e32 v10, vcc, 3, v01910; VI-NEXT: v_addc_u32_e32 v11, vcc, 0, v1, vcc1911; VI-NEXT: flat_load_ubyte v12, v[2:3]1912; VI-NEXT: flat_load_ubyte v2, v[8:9]1913; VI-NEXT: flat_load_ubyte v3, v[10:11]1914; VI-NEXT: flat_load_ubyte v4, v[4:5]1915; VI-NEXT: flat_load_ubyte v5, v[0:1]1916; VI-NEXT: flat_load_ubyte v6, v[6:7]1917; VI-NEXT: v_add_u32_e32 v0, vcc, 4, v01918; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc1919; VI-NEXT: flat_load_ubyte v7, v[0:1]1920; VI-NEXT: s_mov_b32 s3, 0xf0001921; VI-NEXT: s_mov_b32 s2, -11922; VI-NEXT: s_waitcnt vmcnt(5)1923; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v21924; VI-NEXT: s_waitcnt vmcnt(4)1925; VI-NEXT: v_cvt_f32_ubyte0_e32 v3, v31926; VI-NEXT: s_waitcnt vmcnt(2)1927; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v51928; VI-NEXT: s_waitcnt vmcnt(1)1929; VI-NEXT: v_cvt_f32_ubyte0_e32 v1, v61930; VI-NEXT: v_cvt_f32_ubyte0_e32 v6, v41931; VI-NEXT: v_cvt_f32_ubyte0_e32 v5, v121932; VI-NEXT: s_waitcnt vmcnt(0)1933; VI-NEXT: v_cvt_f32_ubyte0_e32 v4, v71934; VI-NEXT: buffer_store_dwordx3 v[4:6], off, s[0:3], 0 offset:161935; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 01936; VI-NEXT: s_endpgm1937;1938; GFX10-LABEL: load_v7i8_to_v7f32:1939; GFX10: ; %bb.0:1940; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241941; GFX10-NEXT: v_lshlrev_b32_e32 v0, 3, v01942; GFX10-NEXT: v_mov_b32_e32 v8, 01943; GFX10-NEXT: s_waitcnt lgkmcnt(0)1944; GFX10-NEXT: s_clause 0x51945; GFX10-NEXT: global_load_ubyte v4, v0, s[2:3] offset:61946; GFX10-NEXT: global_load_ubyte v1, v0, s[2:3] offset:31947; GFX10-NEXT: global_load_ubyte v2, v0, s[2:3] offset:21948; GFX10-NEXT: global_load_ubyte v5, v0, s[2:3] offset:11949; GFX10-NEXT: global_load_short_d16 v7, v0, s[2:3] offset:41950; GFX10-NEXT: global_load_ubyte v0, v0, s[2:3]1951; GFX10-NEXT: s_waitcnt vmcnt(5)1952; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v6, v41953; GFX10-NEXT: s_waitcnt vmcnt(4)1954; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v3, v11955; GFX10-NEXT: s_waitcnt vmcnt(3)1956; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v2, v21957; GFX10-NEXT: s_waitcnt vmcnt(2)1958; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v1, v51959; GFX10-NEXT: s_waitcnt vmcnt(1)1960; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v5, v71961; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v4, v71962; GFX10-NEXT: s_waitcnt vmcnt(0)1963; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v01964; GFX10-NEXT: global_store_dwordx3 v8, v[4:6], s[0:1] offset:161965; GFX10-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1]1966; GFX10-NEXT: s_endpgm1967;1968; GFX9-LABEL: load_v7i8_to_v7f32:1969; GFX9: ; %bb.0:1970; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x241971; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v01972; GFX9-NEXT: v_mov_b32_e32 v10, 01973; GFX9-NEXT: s_waitcnt lgkmcnt(0)1974; GFX9-NEXT: global_load_ubyte v1, v0, s[2:3] offset:61975; GFX9-NEXT: global_load_ushort v2, v0, s[2:3] offset:41976; GFX9-NEXT: global_load_ubyte v3, v0, s[2:3] offset:31977; GFX9-NEXT: global_load_ubyte v7, v0, s[2:3] offset:21978; GFX9-NEXT: global_load_ubyte v8, v0, s[2:3] offset:11979; GFX9-NEXT: global_load_ubyte v9, v0, s[2:3]1980; GFX9-NEXT: s_waitcnt vmcnt(5)1981; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v6, v11982; GFX9-NEXT: s_waitcnt vmcnt(4)1983; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v5, v21984; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v4, v21985; GFX9-NEXT: s_waitcnt vmcnt(3)1986; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, v31987; GFX9-NEXT: s_waitcnt vmcnt(2)1988; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, v71989; GFX9-NEXT: s_waitcnt vmcnt(1)1990; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v1, v81991; GFX9-NEXT: s_waitcnt vmcnt(0)1992; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v91993; GFX9-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]1994; GFX9-NEXT: global_store_dwordx3 v10, v[4:6], s[0:1] offset:161995; GFX9-NEXT: s_endpgm1996;1997; GFX11-LABEL: load_v7i8_to_v7f32:1998; GFX11: ; %bb.0:1999; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242000; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v02001; GFX11-NEXT: v_mov_b32_e32 v8, 02002; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)2003; GFX11-NEXT: v_lshlrev_b32_e32 v0, 3, v02004; GFX11-NEXT: s_waitcnt lgkmcnt(0)2005; GFX11-NEXT: s_clause 0x52006; GFX11-NEXT: global_load_u8 v4, v0, s[2:3] offset:62007; GFX11-NEXT: global_load_u8 v1, v0, s[2:3] offset:32008; GFX11-NEXT: global_load_u8 v2, v0, s[2:3] offset:22009; GFX11-NEXT: global_load_u8 v5, v0, s[2:3] offset:12010; GFX11-NEXT: global_load_d16_b16 v7, v0, s[2:3] offset:42011; GFX11-NEXT: global_load_u8 v0, v0, s[2:3]2012; GFX11-NEXT: s_waitcnt vmcnt(5)2013; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v6, v42014; GFX11-NEXT: s_waitcnt vmcnt(4)2015; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v3, v12016; GFX11-NEXT: s_waitcnt vmcnt(3)2017; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v2, v22018; GFX11-NEXT: s_waitcnt vmcnt(2)2019; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v1, v52020; GFX11-NEXT: s_waitcnt vmcnt(1)2021; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v5, v72022; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v4, v72023; GFX11-NEXT: s_waitcnt vmcnt(0)2024; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v02025; GFX11-NEXT: s_clause 0x12026; GFX11-NEXT: global_store_b96 v8, v[4:6], s[0:1] offset:162027; GFX11-NEXT: global_store_b128 v8, v[0:3], s[0:1]2028; GFX11-NEXT: s_endpgm2029 %tid = call i32 @llvm.amdgcn.workitem.id.x()2030 %gep = getelementptr <7 x i8>, ptr addrspace(1) %in, i32 %tid2031 %load = load <7 x i8>, ptr addrspace(1) %gep, align 12032 %cvt = uitofp <7 x i8> %load to <7 x float>2033 store <7 x float> %cvt, ptr addrspace(1) %out, align 162034 ret void2035}2036 2037define amdgpu_kernel void @load_v8i8_to_v8f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2038; SI-LABEL: load_v8i8_to_v8f32:2039; SI: ; %bb.0:2040; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92041; SI-NEXT: s_mov_b32 s7, 0xf0002042; SI-NEXT: s_mov_b32 s10, 02043; SI-NEXT: s_mov_b32 s11, s72044; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v02045; SI-NEXT: s_waitcnt lgkmcnt(0)2046; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2047; SI-NEXT: v_mov_b32_e32 v1, 02048; SI-NEXT: buffer_load_dwordx2 v[7:8], v[0:1], s[8:11], 0 addr642049; SI-NEXT: s_mov_b32 s6, -12050; SI-NEXT: s_mov_b32 s4, s02051; SI-NEXT: s_mov_b32 s5, s12052; SI-NEXT: s_waitcnt vmcnt(0)2053; SI-NEXT: v_cvt_f32_ubyte3_e32 v3, v72054; SI-NEXT: v_cvt_f32_ubyte2_e32 v2, v72055; SI-NEXT: v_cvt_f32_ubyte1_e32 v1, v72056; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v72057; SI-NEXT: v_cvt_f32_ubyte3_e32 v7, v82058; SI-NEXT: v_cvt_f32_ubyte2_e32 v6, v82059; SI-NEXT: v_cvt_f32_ubyte1_e32 v5, v82060; SI-NEXT: v_cvt_f32_ubyte0_e32 v4, v82061; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 offset:162062; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 02063; SI-NEXT: s_endpgm2064;2065; VI-LABEL: load_v8i8_to_v8f32:2066; VI: ; %bb.0:2067; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242068; VI-NEXT: v_lshlrev_b32_e32 v0, 3, v02069; VI-NEXT: s_waitcnt lgkmcnt(0)2070; VI-NEXT: v_mov_b32_e32 v1, s32071; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02072; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2073; VI-NEXT: flat_load_dwordx2 v[7:8], v[0:1]2074; VI-NEXT: s_mov_b32 s3, 0xf0002075; VI-NEXT: s_mov_b32 s2, -12076; VI-NEXT: s_waitcnt vmcnt(0)2077; VI-NEXT: v_cvt_f32_ubyte3_e32 v3, v72078; VI-NEXT: v_cvt_f32_ubyte2_e32 v2, v72079; VI-NEXT: v_cvt_f32_ubyte1_e32 v1, v72080; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v72081; VI-NEXT: v_cvt_f32_ubyte3_e32 v7, v82082; VI-NEXT: v_cvt_f32_ubyte2_e32 v6, v82083; VI-NEXT: v_cvt_f32_ubyte1_e32 v5, v82084; VI-NEXT: v_cvt_f32_ubyte0_e32 v4, v82085; VI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:162086; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 02087; VI-NEXT: s_endpgm2088;2089; GFX10-LABEL: load_v8i8_to_v8f32:2090; GFX10: ; %bb.0:2091; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242092; GFX10-NEXT: v_lshlrev_b32_e32 v0, 3, v02093; GFX10-NEXT: v_mov_b32_e32 v10, 02094; GFX10-NEXT: s_waitcnt lgkmcnt(0)2095; GFX10-NEXT: global_load_dwordx2 v[8:9], v0, s[2:3]2096; GFX10-NEXT: s_waitcnt vmcnt(0)2097; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v7, v92098; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v6, v92099; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v5, v92100; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v4, v92101; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v3, v82102; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v2, v82103; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v1, v82104; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v82105; GFX10-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] offset:162106; GFX10-NEXT: global_store_dwordx4 v10, v[0:3], s[0:1]2107; GFX10-NEXT: s_endpgm2108;2109; GFX9-LABEL: load_v8i8_to_v8f32:2110; GFX9: ; %bb.0:2111; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242112; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v02113; GFX9-NEXT: v_mov_b32_e32 v9, 02114; GFX9-NEXT: s_waitcnt lgkmcnt(0)2115; GFX9-NEXT: global_load_dwordx2 v[7:8], v0, s[2:3]2116; GFX9-NEXT: s_waitcnt vmcnt(0)2117; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v3, v72118; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v2, v72119; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v1, v72120; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v72121; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v7, v82122; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v6, v82123; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v5, v82124; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v4, v82125; GFX9-NEXT: global_store_dwordx4 v9, v[4:7], s[0:1] offset:162126; GFX9-NEXT: global_store_dwordx4 v9, v[0:3], s[0:1]2127; GFX9-NEXT: s_endpgm2128;2129; GFX11-LABEL: load_v8i8_to_v8f32:2130; GFX11: ; %bb.0:2131; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242132; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v02133; GFX11-NEXT: v_mov_b32_e32 v10, 02134; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)2135; GFX11-NEXT: v_lshlrev_b32_e32 v0, 3, v02136; GFX11-NEXT: s_waitcnt lgkmcnt(0)2137; GFX11-NEXT: global_load_b64 v[8:9], v0, s[2:3]2138; GFX11-NEXT: s_waitcnt vmcnt(0)2139; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v7, v92140; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v6, v92141; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v5, v92142; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v4, v92143; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v3, v82144; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v2, v82145; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v1, v82146; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v82147; GFX11-NEXT: s_clause 0x12148; GFX11-NEXT: global_store_b128 v10, v[4:7], s[0:1] offset:162149; GFX11-NEXT: global_store_b128 v10, v[0:3], s[0:1]2150; GFX11-NEXT: s_endpgm2151 %tid = call i32 @llvm.amdgcn.workitem.id.x()2152 %gep = getelementptr <8 x i8>, ptr addrspace(1) %in, i32 %tid2153 %load = load <8 x i8>, ptr addrspace(1) %gep, align 82154 %cvt = uitofp <8 x i8> %load to <8 x float>2155 store <8 x float> %cvt, ptr addrspace(1) %out, align 162156 ret void2157}2158 2159define amdgpu_kernel void @i8_zext_inreg_i32_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2160; SI-LABEL: i8_zext_inreg_i32_to_f32:2161; SI: ; %bb.0:2162; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92163; SI-NEXT: s_mov_b32 s7, 0xf0002164; SI-NEXT: s_mov_b32 s10, 02165; SI-NEXT: s_mov_b32 s11, s72166; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02167; SI-NEXT: s_waitcnt lgkmcnt(0)2168; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2169; SI-NEXT: v_mov_b32_e32 v1, 02170; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr642171; SI-NEXT: s_mov_b32 s6, -12172; SI-NEXT: s_mov_b32 s4, s02173; SI-NEXT: s_mov_b32 s5, s12174; SI-NEXT: s_waitcnt vmcnt(0)2175; SI-NEXT: v_add_i32_e32 v0, vcc, 2, v02176; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02177; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02178; SI-NEXT: s_endpgm2179;2180; VI-LABEL: i8_zext_inreg_i32_to_f32:2181; VI: ; %bb.0:2182; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242183; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02184; VI-NEXT: s_waitcnt lgkmcnt(0)2185; VI-NEXT: v_mov_b32_e32 v1, s32186; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02187; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2188; VI-NEXT: flat_load_dword v0, v[0:1]2189; VI-NEXT: s_mov_b32 s3, 0xf0002190; VI-NEXT: s_mov_b32 s2, -12191; VI-NEXT: s_waitcnt vmcnt(0)2192; VI-NEXT: v_add_u32_e32 v0, vcc, 2, v02193; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02194; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02195; VI-NEXT: s_endpgm2196;2197; GFX10-LABEL: i8_zext_inreg_i32_to_f32:2198; GFX10: ; %bb.0:2199; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242200; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02201; GFX10-NEXT: v_mov_b32_e32 v1, 02202; GFX10-NEXT: s_waitcnt lgkmcnt(0)2203; GFX10-NEXT: global_load_dword v0, v0, s[2:3]2204; GFX10-NEXT: s_waitcnt vmcnt(0)2205; GFX10-NEXT: v_add_nc_u32_e32 v0, 2, v02206; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v02207; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2208; GFX10-NEXT: s_endpgm2209;2210; GFX9-LABEL: i8_zext_inreg_i32_to_f32:2211; GFX9: ; %bb.0:2212; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242213; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02214; GFX9-NEXT: v_mov_b32_e32 v1, 02215; GFX9-NEXT: s_waitcnt lgkmcnt(0)2216; GFX9-NEXT: global_load_dword v0, v0, s[2:3]2217; GFX9-NEXT: s_waitcnt vmcnt(0)2218; GFX9-NEXT: v_add_u32_e32 v0, 2, v02219; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v02220; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2221; GFX9-NEXT: s_endpgm2222;2223; GFX11-LABEL: i8_zext_inreg_i32_to_f32:2224; GFX11: ; %bb.0:2225; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242226; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02227; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)2228; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02229; GFX11-NEXT: s_waitcnt lgkmcnt(0)2230; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]2231; GFX11-NEXT: s_waitcnt vmcnt(0)2232; GFX11-NEXT: v_add_nc_u32_e32 v0, 2, v02233; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v02234; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2235; GFX11-NEXT: s_endpgm2236 %tid = call i32 @llvm.amdgcn.workitem.id.x()2237 %gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid2238 %load = load i32, ptr addrspace(1) %gep, align 42239 %add = add i32 %load, 22240 %inreg = and i32 %add, 2552241 %cvt = uitofp i32 %inreg to float2242 store float %cvt, ptr addrspace(1) %out, align 42243 ret void2244}2245 2246define amdgpu_kernel void @i8_zext_inreg_hi1_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2247; SI-LABEL: i8_zext_inreg_hi1_to_f32:2248; SI: ; %bb.0:2249; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92250; SI-NEXT: s_mov_b32 s7, 0xf0002251; SI-NEXT: s_mov_b32 s10, 02252; SI-NEXT: s_mov_b32 s11, s72253; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02254; SI-NEXT: s_waitcnt lgkmcnt(0)2255; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2256; SI-NEXT: v_mov_b32_e32 v1, 02257; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr642258; SI-NEXT: s_mov_b32 s6, -12259; SI-NEXT: s_mov_b32 s4, s02260; SI-NEXT: s_mov_b32 s5, s12261; SI-NEXT: s_waitcnt vmcnt(0)2262; SI-NEXT: v_cvt_f32_ubyte1_e32 v0, v02263; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02264; SI-NEXT: s_endpgm2265;2266; VI-LABEL: i8_zext_inreg_hi1_to_f32:2267; VI: ; %bb.0:2268; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242269; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02270; VI-NEXT: s_waitcnt lgkmcnt(0)2271; VI-NEXT: v_mov_b32_e32 v1, s32272; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02273; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2274; VI-NEXT: flat_load_dword v0, v[0:1]2275; VI-NEXT: s_mov_b32 s3, 0xf0002276; VI-NEXT: s_mov_b32 s2, -12277; VI-NEXT: s_waitcnt vmcnt(0)2278; VI-NEXT: v_cvt_f32_ubyte1_e32 v0, v02279; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02280; VI-NEXT: s_endpgm2281;2282; GFX10-LABEL: i8_zext_inreg_hi1_to_f32:2283; GFX10: ; %bb.0:2284; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242285; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02286; GFX10-NEXT: v_mov_b32_e32 v1, 02287; GFX10-NEXT: s_waitcnt lgkmcnt(0)2288; GFX10-NEXT: global_load_dword v0, v0, s[2:3]2289; GFX10-NEXT: s_waitcnt vmcnt(0)2290; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v0, v02291; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2292; GFX10-NEXT: s_endpgm2293;2294; GFX9-LABEL: i8_zext_inreg_hi1_to_f32:2295; GFX9: ; %bb.0:2296; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242297; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02298; GFX9-NEXT: v_mov_b32_e32 v1, 02299; GFX9-NEXT: s_waitcnt lgkmcnt(0)2300; GFX9-NEXT: global_load_dword v0, v0, s[2:3]2301; GFX9-NEXT: s_waitcnt vmcnt(0)2302; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, v02303; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2304; GFX9-NEXT: s_endpgm2305;2306; GFX11-LABEL: i8_zext_inreg_hi1_to_f32:2307; GFX11: ; %bb.0:2308; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242309; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02310; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2311; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02312; GFX11-NEXT: s_waitcnt lgkmcnt(0)2313; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]2314; GFX11-NEXT: s_waitcnt vmcnt(0)2315; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v0, v02316; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2317; GFX11-NEXT: s_endpgm2318 %tid = call i32 @llvm.amdgcn.workitem.id.x()2319 %gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid2320 %load = load i32, ptr addrspace(1) %gep, align 42321 %inreg = and i32 %load, 652802322 %shr = lshr i32 %inreg, 82323 %cvt = uitofp i32 %shr to float2324 store float %cvt, ptr addrspace(1) %out, align 42325 ret void2326}2327 2328; We don't get these ones because of the zext, but instcombine removes2329; them so it shouldn't really matter.2330define amdgpu_kernel void @i8_zext_i32_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2331; SI-LABEL: i8_zext_i32_to_f32:2332; SI: ; %bb.0:2333; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92334; SI-NEXT: s_mov_b32 s7, 0xf0002335; SI-NEXT: v_mov_b32_e32 v1, 02336; SI-NEXT: s_mov_b32 s10, 02337; SI-NEXT: s_mov_b32 s11, s72338; SI-NEXT: s_waitcnt lgkmcnt(0)2339; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2340; SI-NEXT: buffer_load_ubyte v0, v[0:1], s[8:11], 0 addr642341; SI-NEXT: s_mov_b32 s6, -12342; SI-NEXT: s_mov_b32 s4, s02343; SI-NEXT: s_mov_b32 s5, s12344; SI-NEXT: s_waitcnt vmcnt(0)2345; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02346; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02347; SI-NEXT: s_endpgm2348;2349; VI-LABEL: i8_zext_i32_to_f32:2350; VI: ; %bb.0:2351; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242352; VI-NEXT: s_waitcnt lgkmcnt(0)2353; VI-NEXT: v_mov_b32_e32 v1, s32354; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02355; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2356; VI-NEXT: flat_load_ubyte v0, v[0:1]2357; VI-NEXT: s_mov_b32 s3, 0xf0002358; VI-NEXT: s_mov_b32 s2, -12359; VI-NEXT: s_waitcnt vmcnt(0)2360; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02361; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02362; VI-NEXT: s_endpgm2363;2364; GFX10-LABEL: i8_zext_i32_to_f32:2365; GFX10: ; %bb.0:2366; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242367; GFX10-NEXT: v_mov_b32_e32 v1, 02368; GFX10-NEXT: s_waitcnt lgkmcnt(0)2369; GFX10-NEXT: global_load_ubyte v0, v0, s[2:3]2370; GFX10-NEXT: s_waitcnt vmcnt(0)2371; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v02372; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2373; GFX10-NEXT: s_endpgm2374;2375; GFX9-LABEL: i8_zext_i32_to_f32:2376; GFX9: ; %bb.0:2377; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242378; GFX9-NEXT: v_mov_b32_e32 v1, 02379; GFX9-NEXT: s_waitcnt lgkmcnt(0)2380; GFX9-NEXT: global_load_ubyte v0, v0, s[2:3]2381; GFX9-NEXT: s_waitcnt vmcnt(0)2382; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v02383; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2384; GFX9-NEXT: s_endpgm2385;2386; GFX11-LABEL: i8_zext_i32_to_f32:2387; GFX11: ; %bb.0:2388; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242389; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02390; GFX11-NEXT: s_waitcnt lgkmcnt(0)2391; GFX11-NEXT: global_load_u8 v0, v0, s[2:3]2392; GFX11-NEXT: s_waitcnt vmcnt(0)2393; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v02394; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2395; GFX11-NEXT: s_endpgm2396 %tid = call i32 @llvm.amdgcn.workitem.id.x()2397 %gep = getelementptr i8, ptr addrspace(1) %in, i32 %tid2398 %load = load i8, ptr addrspace(1) %gep, align 12399 %ext = zext i8 %load to i322400 %cvt = uitofp i32 %ext to float2401 store float %cvt, ptr addrspace(1) %out, align 42402 ret void2403}2404 2405define amdgpu_kernel void @v4i8_zext_v4i32_to_v4f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2406; SI-LABEL: v4i8_zext_v4i32_to_v4f32:2407; SI: ; %bb.0:2408; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92409; SI-NEXT: s_mov_b32 s7, 0xf0002410; SI-NEXT: s_mov_b32 s10, 02411; SI-NEXT: s_mov_b32 s11, s72412; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02413; SI-NEXT: s_waitcnt lgkmcnt(0)2414; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2415; SI-NEXT: v_mov_b32_e32 v1, 02416; SI-NEXT: buffer_load_ubyte v2, v[0:1], s[8:11], 0 addr64 offset:32417; SI-NEXT: buffer_load_ubyte v4, v[0:1], s[8:11], 0 addr64 offset:22418; SI-NEXT: buffer_load_ubyte v5, v[0:1], s[8:11], 0 addr64 offset:12419; SI-NEXT: buffer_load_ubyte v0, v[0:1], s[8:11], 0 addr642420; SI-NEXT: s_mov_b32 s6, -12421; SI-NEXT: s_mov_b32 s4, s02422; SI-NEXT: s_mov_b32 s5, s12423; SI-NEXT: s_waitcnt vmcnt(3)2424; SI-NEXT: v_cvt_f32_ubyte0_e32 v3, v22425; SI-NEXT: s_waitcnt vmcnt(2)2426; SI-NEXT: v_cvt_f32_ubyte0_e32 v2, v42427; SI-NEXT: s_waitcnt vmcnt(1)2428; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v52429; SI-NEXT: s_waitcnt vmcnt(0)2430; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02431; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 02432; SI-NEXT: s_endpgm2433;2434; VI-LABEL: v4i8_zext_v4i32_to_v4f32:2435; VI: ; %bb.0:2436; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242437; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02438; VI-NEXT: s_waitcnt lgkmcnt(0)2439; VI-NEXT: v_mov_b32_e32 v1, s32440; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02441; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2442; VI-NEXT: v_add_u32_e32 v2, vcc, 2, v02443; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc2444; VI-NEXT: v_add_u32_e32 v4, vcc, 3, v02445; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc2446; VI-NEXT: flat_load_ubyte v2, v[2:3]2447; VI-NEXT: flat_load_ubyte v3, v[4:5]2448; VI-NEXT: flat_load_ubyte v4, v[0:1]2449; VI-NEXT: v_add_u32_e32 v0, vcc, 1, v02450; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2451; VI-NEXT: flat_load_ubyte v1, v[0:1]2452; VI-NEXT: s_mov_b32 s3, 0xf0002453; VI-NEXT: s_mov_b32 s2, -12454; VI-NEXT: s_waitcnt vmcnt(3)2455; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v22456; VI-NEXT: s_waitcnt vmcnt(2)2457; VI-NEXT: v_cvt_f32_ubyte0_e32 v3, v32458; VI-NEXT: s_waitcnt vmcnt(1)2459; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v42460; VI-NEXT: s_waitcnt vmcnt(0)2461; VI-NEXT: v_cvt_f32_ubyte0_e32 v1, v12462; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 02463; VI-NEXT: s_endpgm2464;2465; GFX10-LABEL: v4i8_zext_v4i32_to_v4f32:2466; GFX10: ; %bb.0:2467; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242468; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02469; GFX10-NEXT: v_mov_b32_e32 v6, 02470; GFX10-NEXT: s_waitcnt lgkmcnt(0)2471; GFX10-NEXT: s_clause 0x32472; GFX10-NEXT: global_load_ubyte v1, v0, s[2:3] offset:32473; GFX10-NEXT: global_load_ubyte v2, v0, s[2:3] offset:22474; GFX10-NEXT: global_load_ubyte v4, v0, s[2:3] offset:12475; GFX10-NEXT: global_load_ubyte v5, v0, s[2:3]2476; GFX10-NEXT: s_waitcnt vmcnt(3)2477; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v3, v12478; GFX10-NEXT: s_waitcnt vmcnt(2)2479; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v2, v22480; GFX10-NEXT: s_waitcnt vmcnt(1)2481; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v1, v42482; GFX10-NEXT: s_waitcnt vmcnt(0)2483; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v52484; GFX10-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]2485; GFX10-NEXT: s_endpgm2486;2487; GFX9-LABEL: v4i8_zext_v4i32_to_v4f32:2488; GFX9: ; %bb.0:2489; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242490; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02491; GFX9-NEXT: v_mov_b32_e32 v6, 02492; GFX9-NEXT: s_waitcnt lgkmcnt(0)2493; GFX9-NEXT: global_load_ubyte v1, v0, s[2:3] offset:32494; GFX9-NEXT: global_load_ubyte v2, v0, s[2:3] offset:22495; GFX9-NEXT: global_load_ubyte v4, v0, s[2:3] offset:12496; GFX9-NEXT: global_load_ubyte v5, v0, s[2:3]2497; GFX9-NEXT: s_waitcnt vmcnt(3)2498; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v3, v12499; GFX9-NEXT: s_waitcnt vmcnt(2)2500; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, v22501; GFX9-NEXT: s_waitcnt vmcnt(1)2502; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v1, v42503; GFX9-NEXT: s_waitcnt vmcnt(0)2504; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v52505; GFX9-NEXT: global_store_dwordx4 v6, v[0:3], s[0:1]2506; GFX9-NEXT: s_endpgm2507;2508; GFX11-LABEL: v4i8_zext_v4i32_to_v4f32:2509; GFX11: ; %bb.0:2510; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242511; GFX11-NEXT: v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v0, 0x3ff, v02512; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2513; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02514; GFX11-NEXT: s_waitcnt lgkmcnt(0)2515; GFX11-NEXT: s_clause 0x32516; GFX11-NEXT: global_load_u8 v1, v0, s[2:3] offset:32517; GFX11-NEXT: global_load_u8 v2, v0, s[2:3] offset:22518; GFX11-NEXT: global_load_u8 v4, v0, s[2:3] offset:12519; GFX11-NEXT: global_load_u8 v0, v0, s[2:3]2520; GFX11-NEXT: s_waitcnt vmcnt(3)2521; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v3, v12522; GFX11-NEXT: s_waitcnt vmcnt(2)2523; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v2, v22524; GFX11-NEXT: s_waitcnt vmcnt(1)2525; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v1, v42526; GFX11-NEXT: s_waitcnt vmcnt(0)2527; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v02528; GFX11-NEXT: global_store_b128 v5, v[0:3], s[0:1]2529; GFX11-NEXT: s_endpgm2530 %tid = call i32 @llvm.amdgcn.workitem.id.x()2531 %gep = getelementptr <4 x i8>, ptr addrspace(1) %in, i32 %tid2532 %load = load <4 x i8>, ptr addrspace(1) %gep, align 12533 %ext = zext <4 x i8> %load to <4 x i32>2534 %cvt = uitofp <4 x i32> %ext to <4 x float>2535 store <4 x float> %cvt, ptr addrspace(1) %out, align 162536 ret void2537}2538 2539define amdgpu_kernel void @extract_byte0_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2540; SI-LABEL: extract_byte0_to_f32:2541; SI: ; %bb.0:2542; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92543; SI-NEXT: s_mov_b32 s7, 0xf0002544; SI-NEXT: s_mov_b32 s10, 02545; SI-NEXT: s_mov_b32 s11, s72546; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02547; SI-NEXT: s_waitcnt lgkmcnt(0)2548; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2549; SI-NEXT: v_mov_b32_e32 v1, 02550; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr642551; SI-NEXT: s_mov_b32 s6, -12552; SI-NEXT: s_mov_b32 s4, s02553; SI-NEXT: s_mov_b32 s5, s12554; SI-NEXT: s_waitcnt vmcnt(0)2555; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02556; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02557; SI-NEXT: s_endpgm2558;2559; VI-LABEL: extract_byte0_to_f32:2560; VI: ; %bb.0:2561; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242562; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02563; VI-NEXT: s_waitcnt lgkmcnt(0)2564; VI-NEXT: v_mov_b32_e32 v1, s32565; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02566; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2567; VI-NEXT: flat_load_dword v0, v[0:1]2568; VI-NEXT: s_mov_b32 s3, 0xf0002569; VI-NEXT: s_mov_b32 s2, -12570; VI-NEXT: s_waitcnt vmcnt(0)2571; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02572; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02573; VI-NEXT: s_endpgm2574;2575; GFX10-LABEL: extract_byte0_to_f32:2576; GFX10: ; %bb.0:2577; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242578; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02579; GFX10-NEXT: v_mov_b32_e32 v1, 02580; GFX10-NEXT: s_waitcnt lgkmcnt(0)2581; GFX10-NEXT: global_load_dword v0, v0, s[2:3]2582; GFX10-NEXT: s_waitcnt vmcnt(0)2583; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v02584; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2585; GFX10-NEXT: s_endpgm2586;2587; GFX9-LABEL: extract_byte0_to_f32:2588; GFX9: ; %bb.0:2589; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242590; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02591; GFX9-NEXT: v_mov_b32_e32 v1, 02592; GFX9-NEXT: s_waitcnt lgkmcnt(0)2593; GFX9-NEXT: global_load_dword v0, v0, s[2:3]2594; GFX9-NEXT: s_waitcnt vmcnt(0)2595; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v02596; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2597; GFX9-NEXT: s_endpgm2598;2599; GFX11-LABEL: extract_byte0_to_f32:2600; GFX11: ; %bb.0:2601; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242602; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02603; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2604; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02605; GFX11-NEXT: s_waitcnt lgkmcnt(0)2606; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]2607; GFX11-NEXT: s_waitcnt vmcnt(0)2608; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v0, v02609; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2610; GFX11-NEXT: s_endpgm2611 %tid = call i32 @llvm.amdgcn.workitem.id.x()2612 %gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid2613 %val = load i32, ptr addrspace(1) %gep2614 %and = and i32 %val, 2552615 %cvt = uitofp i32 %and to float2616 store float %cvt, ptr addrspace(1) %out2617 ret void2618}2619 2620define amdgpu_kernel void @extract_byte1_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2621; SI-LABEL: extract_byte1_to_f32:2622; SI: ; %bb.0:2623; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92624; SI-NEXT: s_mov_b32 s7, 0xf0002625; SI-NEXT: s_mov_b32 s10, 02626; SI-NEXT: s_mov_b32 s11, s72627; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02628; SI-NEXT: s_waitcnt lgkmcnt(0)2629; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2630; SI-NEXT: v_mov_b32_e32 v1, 02631; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr642632; SI-NEXT: s_mov_b32 s6, -12633; SI-NEXT: s_mov_b32 s4, s02634; SI-NEXT: s_mov_b32 s5, s12635; SI-NEXT: s_waitcnt vmcnt(0)2636; SI-NEXT: v_cvt_f32_ubyte1_e32 v0, v02637; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02638; SI-NEXT: s_endpgm2639;2640; VI-LABEL: extract_byte1_to_f32:2641; VI: ; %bb.0:2642; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242643; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02644; VI-NEXT: s_waitcnt lgkmcnt(0)2645; VI-NEXT: v_mov_b32_e32 v1, s32646; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02647; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2648; VI-NEXT: flat_load_dword v0, v[0:1]2649; VI-NEXT: s_mov_b32 s3, 0xf0002650; VI-NEXT: s_mov_b32 s2, -12651; VI-NEXT: s_waitcnt vmcnt(0)2652; VI-NEXT: v_cvt_f32_ubyte1_e32 v0, v02653; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02654; VI-NEXT: s_endpgm2655;2656; GFX10-LABEL: extract_byte1_to_f32:2657; GFX10: ; %bb.0:2658; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242659; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02660; GFX10-NEXT: v_mov_b32_e32 v1, 02661; GFX10-NEXT: s_waitcnt lgkmcnt(0)2662; GFX10-NEXT: global_load_dword v0, v0, s[2:3]2663; GFX10-NEXT: s_waitcnt vmcnt(0)2664; GFX10-NEXT: v_cvt_f32_ubyte1_e32 v0, v02665; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2666; GFX10-NEXT: s_endpgm2667;2668; GFX9-LABEL: extract_byte1_to_f32:2669; GFX9: ; %bb.0:2670; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242671; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02672; GFX9-NEXT: v_mov_b32_e32 v1, 02673; GFX9-NEXT: s_waitcnt lgkmcnt(0)2674; GFX9-NEXT: global_load_dword v0, v0, s[2:3]2675; GFX9-NEXT: s_waitcnt vmcnt(0)2676; GFX9-NEXT: v_cvt_f32_ubyte1_e32 v0, v02677; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2678; GFX9-NEXT: s_endpgm2679;2680; GFX11-LABEL: extract_byte1_to_f32:2681; GFX11: ; %bb.0:2682; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242683; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02684; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2685; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02686; GFX11-NEXT: s_waitcnt lgkmcnt(0)2687; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]2688; GFX11-NEXT: s_waitcnt vmcnt(0)2689; GFX11-NEXT: v_cvt_f32_ubyte1_e32 v0, v02690; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2691; GFX11-NEXT: s_endpgm2692 %tid = call i32 @llvm.amdgcn.workitem.id.x()2693 %gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid2694 %val = load i32, ptr addrspace(1) %gep2695 %srl = lshr i32 %val, 82696 %and = and i32 %srl, 2552697 %cvt = uitofp i32 %and to float2698 store float %cvt, ptr addrspace(1) %out2699 ret void2700}2701 2702define amdgpu_kernel void @extract_byte2_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2703; SI-LABEL: extract_byte2_to_f32:2704; SI: ; %bb.0:2705; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92706; SI-NEXT: s_mov_b32 s7, 0xf0002707; SI-NEXT: s_mov_b32 s10, 02708; SI-NEXT: s_mov_b32 s11, s72709; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02710; SI-NEXT: s_waitcnt lgkmcnt(0)2711; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2712; SI-NEXT: v_mov_b32_e32 v1, 02713; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr642714; SI-NEXT: s_mov_b32 s6, -12715; SI-NEXT: s_mov_b32 s4, s02716; SI-NEXT: s_mov_b32 s5, s12717; SI-NEXT: s_waitcnt vmcnt(0)2718; SI-NEXT: v_cvt_f32_ubyte2_e32 v0, v02719; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02720; SI-NEXT: s_endpgm2721;2722; VI-LABEL: extract_byte2_to_f32:2723; VI: ; %bb.0:2724; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242725; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02726; VI-NEXT: s_waitcnt lgkmcnt(0)2727; VI-NEXT: v_mov_b32_e32 v1, s32728; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02729; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2730; VI-NEXT: flat_load_dword v0, v[0:1]2731; VI-NEXT: s_mov_b32 s3, 0xf0002732; VI-NEXT: s_mov_b32 s2, -12733; VI-NEXT: s_waitcnt vmcnt(0)2734; VI-NEXT: v_cvt_f32_ubyte2_e32 v0, v02735; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02736; VI-NEXT: s_endpgm2737;2738; GFX10-LABEL: extract_byte2_to_f32:2739; GFX10: ; %bb.0:2740; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242741; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02742; GFX10-NEXT: v_mov_b32_e32 v1, 02743; GFX10-NEXT: s_waitcnt lgkmcnt(0)2744; GFX10-NEXT: global_load_dword v0, v0, s[2:3]2745; GFX10-NEXT: s_waitcnt vmcnt(0)2746; GFX10-NEXT: v_cvt_f32_ubyte2_e32 v0, v02747; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2748; GFX10-NEXT: s_endpgm2749;2750; GFX9-LABEL: extract_byte2_to_f32:2751; GFX9: ; %bb.0:2752; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242753; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02754; GFX9-NEXT: v_mov_b32_e32 v1, 02755; GFX9-NEXT: s_waitcnt lgkmcnt(0)2756; GFX9-NEXT: global_load_dword v0, v0, s[2:3]2757; GFX9-NEXT: s_waitcnt vmcnt(0)2758; GFX9-NEXT: v_cvt_f32_ubyte2_e32 v0, v02759; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2760; GFX9-NEXT: s_endpgm2761;2762; GFX11-LABEL: extract_byte2_to_f32:2763; GFX11: ; %bb.0:2764; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242765; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02766; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2767; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02768; GFX11-NEXT: s_waitcnt lgkmcnt(0)2769; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]2770; GFX11-NEXT: s_waitcnt vmcnt(0)2771; GFX11-NEXT: v_cvt_f32_ubyte2_e32 v0, v02772; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2773; GFX11-NEXT: s_endpgm2774 %tid = call i32 @llvm.amdgcn.workitem.id.x()2775 %gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid2776 %val = load i32, ptr addrspace(1) %gep2777 %srl = lshr i32 %val, 162778 %and = and i32 %srl, 2552779 %cvt = uitofp i32 %and to float2780 store float %cvt, ptr addrspace(1) %out2781 ret void2782}2783 2784define amdgpu_kernel void @extract_byte3_to_f32(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) nounwind {2785; SI-LABEL: extract_byte3_to_f32:2786; SI: ; %bb.0:2787; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92788; SI-NEXT: s_mov_b32 s7, 0xf0002789; SI-NEXT: s_mov_b32 s10, 02790; SI-NEXT: s_mov_b32 s11, s72791; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02792; SI-NEXT: s_waitcnt lgkmcnt(0)2793; SI-NEXT: s_mov_b64 s[8:9], s[2:3]2794; SI-NEXT: v_mov_b32_e32 v1, 02795; SI-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr642796; SI-NEXT: s_mov_b32 s6, -12797; SI-NEXT: s_mov_b32 s4, s02798; SI-NEXT: s_mov_b32 s5, s12799; SI-NEXT: s_waitcnt vmcnt(0)2800; SI-NEXT: v_cvt_f32_ubyte3_e32 v0, v02801; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02802; SI-NEXT: s_endpgm2803;2804; VI-LABEL: extract_byte3_to_f32:2805; VI: ; %bb.0:2806; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242807; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02808; VI-NEXT: s_waitcnt lgkmcnt(0)2809; VI-NEXT: v_mov_b32_e32 v1, s32810; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v02811; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2812; VI-NEXT: flat_load_dword v0, v[0:1]2813; VI-NEXT: s_mov_b32 s3, 0xf0002814; VI-NEXT: s_mov_b32 s2, -12815; VI-NEXT: s_waitcnt vmcnt(0)2816; VI-NEXT: v_cvt_f32_ubyte3_e32 v0, v02817; VI-NEXT: buffer_store_dword v0, off, s[0:3], 02818; VI-NEXT: s_endpgm2819;2820; GFX10-LABEL: extract_byte3_to_f32:2821; GFX10: ; %bb.0:2822; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242823; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02824; GFX10-NEXT: v_mov_b32_e32 v1, 02825; GFX10-NEXT: s_waitcnt lgkmcnt(0)2826; GFX10-NEXT: global_load_dword v0, v0, s[2:3]2827; GFX10-NEXT: s_waitcnt vmcnt(0)2828; GFX10-NEXT: v_cvt_f32_ubyte3_e32 v0, v02829; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2830; GFX10-NEXT: s_endpgm2831;2832; GFX9-LABEL: extract_byte3_to_f32:2833; GFX9: ; %bb.0:2834; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242835; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02836; GFX9-NEXT: v_mov_b32_e32 v1, 02837; GFX9-NEXT: s_waitcnt lgkmcnt(0)2838; GFX9-NEXT: global_load_dword v0, v0, s[2:3]2839; GFX9-NEXT: s_waitcnt vmcnt(0)2840; GFX9-NEXT: v_cvt_f32_ubyte3_e32 v0, v02841; GFX9-NEXT: global_store_dword v1, v0, s[0:1]2842; GFX9-NEXT: s_endpgm2843;2844; GFX11-LABEL: extract_byte3_to_f32:2845; GFX11: ; %bb.0:2846; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242847; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_and_b32 v0, 0x3ff, v02848; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2849; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02850; GFX11-NEXT: s_waitcnt lgkmcnt(0)2851; GFX11-NEXT: global_load_b32 v0, v0, s[2:3]2852; GFX11-NEXT: s_waitcnt vmcnt(0)2853; GFX11-NEXT: v_cvt_f32_ubyte3_e32 v0, v02854; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2855; GFX11-NEXT: s_endpgm2856 %tid = call i32 @llvm.amdgcn.workitem.id.x()2857 %gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid2858 %val = load i32, ptr addrspace(1) %gep2859 %srl = lshr i32 %val, 242860 %and = and i32 %srl, 2552861 %cvt = uitofp i32 %and to float2862 store float %cvt, ptr addrspace(1) %out2863 ret void2864}2865 2866define amdgpu_kernel void @cvt_ubyte0_or_multiuse(ptr addrspace(1) %in, ptr addrspace(1) %out) {2867; SI-LABEL: cvt_ubyte0_or_multiuse:2868; SI: ; %bb.0: ; %bb2869; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x92870; SI-NEXT: s_mov_b32 s7, 0xf0002871; SI-NEXT: v_lshlrev_b32_e32 v0, 2, v02872; SI-NEXT: v_mov_b32_e32 v1, 02873; SI-NEXT: s_mov_b32 s6, -12874; SI-NEXT: s_waitcnt lgkmcnt(0)2875; SI-NEXT: s_mov_b32 s4, s22876; SI-NEXT: s_mov_b32 s5, s32877; SI-NEXT: s_mov_b32 s2, 02878; SI-NEXT: s_mov_b32 s3, s72879; SI-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr642880; SI-NEXT: s_waitcnt vmcnt(0)2881; SI-NEXT: v_or_b32_e32 v0, 0x80000001, v02882; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v02883; SI-NEXT: v_add_f32_e32 v0, v0, v12884; SI-NEXT: buffer_store_dword v0, off, s[4:7], 02885; SI-NEXT: s_endpgm2886;2887; VI-LABEL: cvt_ubyte0_or_multiuse:2888; VI: ; %bb.0: ; %bb2889; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242890; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v02891; VI-NEXT: s_mov_b32 s7, 0xf0002892; VI-NEXT: s_mov_b32 s6, -12893; VI-NEXT: s_waitcnt lgkmcnt(0)2894; VI-NEXT: v_mov_b32_e32 v1, s12895; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v02896; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc2897; VI-NEXT: flat_load_dword v0, v[0:1]2898; VI-NEXT: s_mov_b32 s4, s22899; VI-NEXT: s_mov_b32 s5, s32900; VI-NEXT: s_waitcnt vmcnt(0)2901; VI-NEXT: v_or_b32_e32 v0, 0x80000001, v02902; VI-NEXT: v_cvt_f32_ubyte0_e32 v1, v02903; VI-NEXT: v_add_f32_e32 v0, v0, v12904; VI-NEXT: buffer_store_dword v0, off, s[4:7], 02905; VI-NEXT: s_endpgm2906;2907; GFX10-LABEL: cvt_ubyte0_or_multiuse:2908; GFX10: ; %bb.0: ; %bb2909; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242910; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v02911; GFX10-NEXT: v_mov_b32_e32 v2, 02912; GFX10-NEXT: s_waitcnt lgkmcnt(0)2913; GFX10-NEXT: global_load_dword v0, v0, s[0:1]2914; GFX10-NEXT: s_waitcnt vmcnt(0)2915; GFX10-NEXT: v_or_b32_e32 v0, 0x80000001, v02916; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v1, v02917; GFX10-NEXT: v_add_f32_e32 v0, v0, v12918; GFX10-NEXT: global_store_dword v2, v0, s[2:3]2919; GFX10-NEXT: s_endpgm2920;2921; GFX9-LABEL: cvt_ubyte0_or_multiuse:2922; GFX9: ; %bb.0: ; %bb2923; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x242924; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v02925; GFX9-NEXT: v_mov_b32_e32 v1, 02926; GFX9-NEXT: s_waitcnt lgkmcnt(0)2927; GFX9-NEXT: global_load_dword v0, v0, s[0:1]2928; GFX9-NEXT: s_waitcnt vmcnt(0)2929; GFX9-NEXT: v_or_b32_e32 v0, 0x80000001, v02930; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v2, v02931; GFX9-NEXT: v_add_f32_e32 v0, v0, v22932; GFX9-NEXT: global_store_dword v1, v0, s[2:3]2933; GFX9-NEXT: s_endpgm2934;2935; GFX11-LABEL: cvt_ubyte0_or_multiuse:2936; GFX11: ; %bb.0: ; %bb2937; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x242938; GFX11-NEXT: v_and_b32_e32 v0, 0x3ff, v02939; GFX11-NEXT: v_mov_b32_e32 v2, 02940; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)2941; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v02942; GFX11-NEXT: s_waitcnt lgkmcnt(0)2943; GFX11-NEXT: global_load_b32 v0, v0, s[0:1]2944; GFX11-NEXT: s_waitcnt vmcnt(0)2945; GFX11-NEXT: v_or_b32_e32 v0, 0x80000001, v02946; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v1, v02947; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)2948; GFX11-NEXT: v_add_f32_e32 v0, v0, v12949; GFX11-NEXT: global_store_b32 v2, v0, s[2:3]2950; GFX11-NEXT: s_endpgm2951bb:2952 %lid = tail call i32 @llvm.amdgcn.workitem.id.x()2953 %gep = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %lid2954 %load = load i32, ptr addrspace(1) %gep2955 %or = or i32 %load, -21474836472956 %and = and i32 %or, 2552957 %uitofp = uitofp i32 %and to float2958 %cast = bitcast i32 %or to float2959 %add = fadd float %cast, %uitofp2960 store float %add, ptr addrspace(1) %out2961 ret void2962}2963 2964%Vec = type { [4 x i8] }2965 2966define amdgpu_kernel void @cvt_f32_ubyte0_vector() local_unnamed_addr {2967; SI-LABEL: cvt_f32_ubyte0_vector:2968; SI: ; %bb.0: ; %entry2969; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x02970; SI-NEXT: s_mov_b32 s3, 0xf0002971; SI-NEXT: s_mov_b32 s2, -12972; SI-NEXT: s_waitcnt lgkmcnt(0)2973; SI-NEXT: buffer_load_ubyte v0, off, s[0:3], 0 offset:32974; SI-NEXT: buffer_load_ubyte v1, off, s[0:3], 0 offset:22975; SI-NEXT: buffer_load_ubyte v2, off, s[0:3], 0 offset:12976; SI-NEXT: buffer_load_ubyte v3, off, s[0:3], 02977; SI-NEXT: s_load_dword s0, s[0:1], 0x02978; SI-NEXT: s_waitcnt vmcnt(3)2979; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v02980; SI-NEXT: s_waitcnt lgkmcnt(0)2981; SI-NEXT: v_fma_f32 v0, s0, v0, 0.52982; SI-NEXT: v_cvt_u32_f32_e32 v0, v02983; SI-NEXT: s_waitcnt vmcnt(2)2984; SI-NEXT: buffer_store_byte v1, off, s[0:3], 02985; SI-NEXT: s_waitcnt vmcnt(2)2986; SI-NEXT: buffer_store_byte v2, off, s[0:3], 02987; SI-NEXT: s_waitcnt vmcnt(2)2988; SI-NEXT: buffer_store_byte v3, off, s[0:3], 02989; SI-NEXT: buffer_store_byte v0, off, s[0:3], 02990; SI-NEXT: s_endpgm2991;2992; VI-LABEL: cvt_f32_ubyte0_vector:2993; VI: ; %bb.0: ; %entry2994; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x02995; VI-NEXT: s_mov_b32 s3, 0xf0002996; VI-NEXT: s_mov_b32 s2, -12997; VI-NEXT: s_waitcnt lgkmcnt(0)2998; VI-NEXT: buffer_load_ubyte v0, off, s[0:3], 0 offset:32999; VI-NEXT: buffer_load_ubyte v1, off, s[0:3], 0 offset:23000; VI-NEXT: buffer_load_ubyte v2, off, s[0:3], 0 offset:13001; VI-NEXT: buffer_load_ubyte v3, off, s[0:3], 03002; VI-NEXT: s_load_dword s0, s[0:1], 0x03003; VI-NEXT: s_waitcnt vmcnt(3)3004; VI-NEXT: v_cvt_f32_ubyte0_e32 v0, v03005; VI-NEXT: s_waitcnt lgkmcnt(0)3006; VI-NEXT: v_mul_f32_e32 v0, s0, v03007; VI-NEXT: v_add_f32_e32 v0, 0.5, v03008; VI-NEXT: v_cvt_i32_f32_e32 v0, v03009; VI-NEXT: s_waitcnt vmcnt(2)3010; VI-NEXT: buffer_store_byte v1, off, s[0:3], 03011; VI-NEXT: s_waitcnt vmcnt(2)3012; VI-NEXT: buffer_store_byte v2, off, s[0:3], 03013; VI-NEXT: s_waitcnt vmcnt(2)3014; VI-NEXT: buffer_store_byte v3, off, s[0:3], 03015; VI-NEXT: buffer_store_byte v0, off, s[0:3], 03016; VI-NEXT: s_endpgm3017;3018; GFX10-LABEL: cvt_f32_ubyte0_vector:3019; GFX10: ; %bb.0: ; %entry3020; GFX10-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x03021; GFX10-NEXT: v_mov_b32_e32 v0, 03022; GFX10-NEXT: s_waitcnt lgkmcnt(0)3023; GFX10-NEXT: s_clause 0x33024; GFX10-NEXT: global_load_ubyte v1, v0, s[0:1] offset:33025; GFX10-NEXT: global_load_ubyte v2, v0, s[0:1] offset:23026; GFX10-NEXT: global_load_ubyte v3, v0, s[0:1] offset:13027; GFX10-NEXT: global_load_ubyte v4, v0, s[0:1]3028; GFX10-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)3029; GFX10-NEXT: s_load_dword s0, s[0:1], 0x03030; GFX10-NEXT: s_waitcnt vmcnt(3)3031; GFX10-NEXT: v_cvt_f32_ubyte0_e32 v0, v13032; GFX10-NEXT: s_waitcnt lgkmcnt(0)3033; GFX10-NEXT: v_fma_f32 v0, s0, v0, 0.53034; GFX10-NEXT: v_cvt_i32_f32_e32 v0, v03035; GFX10-NEXT: s_waitcnt vmcnt(2)3036; GFX10-NEXT: global_store_byte v[0:1], v2, off3037; GFX10-NEXT: s_waitcnt vmcnt(1)3038; GFX10-NEXT: global_store_byte v[0:1], v3, off3039; GFX10-NEXT: s_waitcnt vmcnt(0)3040; GFX10-NEXT: global_store_byte v[0:1], v4, off3041; GFX10-NEXT: global_store_byte v[0:1], v0, off3042; GFX10-NEXT: s_endpgm3043;3044; GFX9-LABEL: cvt_f32_ubyte0_vector:3045; GFX9: ; %bb.0: ; %entry3046; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off3047; GFX9-NEXT: s_waitcnt vmcnt(0)3048; GFX9-NEXT: global_load_ubyte v2, v[0:1], off offset:33049; GFX9-NEXT: global_load_dword v3, v[0:1], off3050; GFX9-NEXT: global_load_ubyte v4, v[0:1], off offset:23051; GFX9-NEXT: global_load_ubyte v5, v[0:1], off offset:13052; GFX9-NEXT: global_load_ubyte v6, v[0:1], off3053; GFX9-NEXT: s_waitcnt vmcnt(4)3054; GFX9-NEXT: v_cvt_f32_ubyte0_e32 v0, v23055; GFX9-NEXT: s_waitcnt vmcnt(3)3056; GFX9-NEXT: v_fma_f32 v0, v3, v0, 0.53057; GFX9-NEXT: v_cvt_i32_f32_e32 v0, v03058; GFX9-NEXT: s_waitcnt vmcnt(2)3059; GFX9-NEXT: global_store_byte v[0:1], v4, off3060; GFX9-NEXT: s_waitcnt vmcnt(2)3061; GFX9-NEXT: global_store_byte v[0:1], v5, off3062; GFX9-NEXT: s_waitcnt vmcnt(2)3063; GFX9-NEXT: global_store_byte v[0:1], v6, off3064; GFX9-NEXT: global_store_byte v[0:1], v0, off3065; GFX9-NEXT: s_endpgm3066;3067; GFX11-LABEL: cvt_f32_ubyte0_vector:3068; GFX11: ; %bb.0: ; %entry3069; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x03070; GFX11-NEXT: v_mov_b32_e32 v0, 03071; GFX11-NEXT: s_waitcnt lgkmcnt(0)3072; GFX11-NEXT: s_clause 0x33073; GFX11-NEXT: global_load_u8 v1, v0, s[0:1] offset:33074; GFX11-NEXT: global_load_u8 v2, v0, s[0:1] offset:23075; GFX11-NEXT: global_load_u8 v3, v0, s[0:1] offset:13076; GFX11-NEXT: global_load_u8 v0, v0, s[0:1]3077; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x03078; GFX11-NEXT: s_waitcnt vmcnt(3)3079; GFX11-NEXT: v_cvt_f32_ubyte0_e32 v1, v13080; GFX11-NEXT: s_waitcnt lgkmcnt(0)3081; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3082; GFX11-NEXT: v_fma_f32 v1, s0, v1, 0.53083; GFX11-NEXT: v_cvt_i32_f32_e32 v1, v13084; GFX11-NEXT: s_waitcnt vmcnt(0)3085; GFX11-NEXT: s_clause 0x33086; GFX11-NEXT: global_store_b8 v[0:1], v2, off3087; GFX11-NEXT: global_store_b8 v[0:1], v3, off3088; GFX11-NEXT: global_store_b8 v[0:1], v0, off3089; GFX11-NEXT: global_store_b8 v[0:1], v1, off3090; GFX11-NEXT: s_endpgm3091entry:3092 br label %for.body.i3093 3094for.body.i: ; preds = %for.body.i, %entry3095 %retval.sroa.0.0.copyload = load ptr, ptr addrspace(1) poison, align 83096 %add.ptr = getelementptr inbounds %Vec, ptr %retval.sroa.0.0.copyload, i64 03097 %retval.sroa.0.0..sroa_cast_adr = addrspacecast ptr %add.ptr to ptr addrspace(1)3098 %retval.sroa.0.0.copyload.i = load i32, ptr addrspace(1) %retval.sroa.0.0..sroa_cast_adr, align 13099 %p1.sroa.6.0.extract.shift = lshr i32 %retval.sroa.0.0.copyload.i, 243100 %p1.sroa.6.0.extract.trunc = trunc i32 %p1.sroa.6.0.extract.shift to i83101 %conv12 = uitofp i8 %p1.sroa.6.0.extract.trunc to float3102 %0 = load float, ptr addrspace(1) poison, align 83103 %mul = fmul contract float %0, %conv123104 %add = fadd contract float %mul, 5.000000e-013105 %conv13 = fptoui float %add to i83106 %retval.sroa.4.0.insert.ext = zext i8 %conv13 to i323107 %retval.sroa.4.0.insert.shift = shl nuw i32 %retval.sroa.4.0.insert.ext, 243108 %retval.sroa.3.0.insert.ext = and i32 %retval.sroa.0.0.copyload.i, 167116803109 %retval.sroa.3.0.insert.insert = or i32 %retval.sroa.4.0.insert.shift, %retval.sroa.3.0.insert.ext3110 %retval.sroa.2.0.insert.ext = and i32 %retval.sroa.0.0.copyload.i, 652803111 %retval.sroa.2.0.insert.insert = or i32 %retval.sroa.3.0.insert.insert, %retval.sroa.2.0.insert.ext3112 %retval.sroa.0.0.insert.ext = and i32 %retval.sroa.0.0.copyload.i, 2553113 %retval.sroa.0.0.insert.insert = or i32 %retval.sroa.2.0.insert.insert, %retval.sroa.0.0.insert.ext3114 store i32 %retval.sroa.0.0.insert.insert, ptr addrspace(1) poison, align 13115 ret void3116}3117 3118