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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck -enable-var-scope %s3;4; This code is used to trigger the following dag node, with different return type and vector element type: i16 extract_vec_elt <N x i8> v, 05 6define amdgpu_kernel void @eggs(i1 %arg, ptr addrspace(1) %arg1, ptr %arg2, ptr %arg3, ptr %arg4, ptr %arg5, ptr %arg6, ptr %arg7, ptr %arg8, ptr %arg9) {7; CHECK-LABEL: eggs:8; CHECK: ; %bb.0: ; %bb9; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s1710; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 011; CHECK-NEXT: s_load_dword s0, s[8:9], 0x012; CHECK-NEXT: s_load_dwordx16 s[12:27], s[8:9], 0x813; CHECK-NEXT: v_mov_b32_e32 v0, 014; CHECK-NEXT: s_waitcnt lgkmcnt(0)15; CHECK-NEXT: s_bitcmp0_b32 s0, 016; CHECK-NEXT: s_cbranch_scc1 .LBB0_217; CHECK-NEXT: ; %bb.1: ; %bb1018; CHECK-NEXT: global_load_dwordx2 v[8:9], v0, s[12:13]19; CHECK-NEXT: s_waitcnt vmcnt(0)20; CHECK-NEXT: v_and_b32_e32 v0, 0xff, v821; CHECK-NEXT: v_bfe_u32 v1, v8, 8, 822; CHECK-NEXT: v_bfe_u32 v2, v8, 16, 823; CHECK-NEXT: v_lshrrev_b32_e32 v3, 24, v824; CHECK-NEXT: v_and_b32_e32 v4, 0xff, v925; CHECK-NEXT: v_bfe_u32 v5, v9, 8, 826; CHECK-NEXT: v_bfe_u32 v7, v9, 16, 827; CHECK-NEXT: v_lshrrev_b32_e32 v6, 24, v928; CHECK-NEXT: s_branch .LBB0_329; CHECK-NEXT: .LBB0_2:30; CHECK-NEXT: v_mov_b32_e32 v1, 031; CHECK-NEXT: v_mov_b32_e32 v2, 032; CHECK-NEXT: v_mov_b32_e32 v3, 033; CHECK-NEXT: v_mov_b32_e32 v4, 034; CHECK-NEXT: v_mov_b32_e32 v5, 035; CHECK-NEXT: v_mov_b32_e32 v7, 036; CHECK-NEXT: v_mov_b32_e32 v6, 037; CHECK-NEXT: .LBB0_3: ; %bb4138; CHECK-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x4839; CHECK-NEXT: v_mov_b32_e32 v8, s1440; CHECK-NEXT: v_mov_b32_e32 v9, s1541; CHECK-NEXT: v_mov_b32_e32 v10, s1642; CHECK-NEXT: v_mov_b32_e32 v11, s1743; CHECK-NEXT: v_mov_b32_e32 v12, s1844; CHECK-NEXT: v_mov_b32_e32 v13, s1945; CHECK-NEXT: v_mov_b32_e32 v14, s2046; CHECK-NEXT: v_mov_b32_e32 v15, s2147; CHECK-NEXT: v_mov_b32_e32 v16, s2248; CHECK-NEXT: v_mov_b32_e32 v17, s2349; CHECK-NEXT: v_mov_b32_e32 v18, s2450; CHECK-NEXT: v_mov_b32_e32 v19, s2551; CHECK-NEXT: v_mov_b32_e32 v20, s2652; CHECK-NEXT: v_mov_b32_e32 v21, s2753; CHECK-NEXT: flat_store_byte v[8:9], v054; CHECK-NEXT: flat_store_byte v[10:11], v155; CHECK-NEXT: flat_store_byte v[12:13], v256; CHECK-NEXT: flat_store_byte v[14:15], v357; CHECK-NEXT: flat_store_byte v[16:17], v458; CHECK-NEXT: flat_store_byte v[18:19], v559; CHECK-NEXT: flat_store_byte v[20:21], v760; CHECK-NEXT: s_waitcnt lgkmcnt(0)61; CHECK-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]62; CHECK-NEXT: flat_store_byte v[0:1], v663; CHECK-NEXT: s_endpgm64bb:65 br i1 %arg, label %bb10, label %bb4166 67bb10: ; preds = %bb68 %tmp12 = load <1 x i8>, ptr addrspace(1) %arg169 %tmp13 = getelementptr i8, ptr addrspace(1) %arg1, i64 170 %tmp16 = load <1 x i8>, ptr addrspace(1) %tmp1371 %tmp17 = getelementptr i8, ptr addrspace(1) %arg1, i64 272 %tmp20 = load <1 x i8>, ptr addrspace(1) %tmp1773 %tmp21 = getelementptr i8, ptr addrspace(1) %arg1, i64 374 %tmp24 = load <1 x i8>, ptr addrspace(1) %tmp2175 %tmp25 = getelementptr i8, ptr addrspace(1) %arg1, i64 476 %tmp28 = load <1 x i8>, ptr addrspace(1) %tmp2577 %tmp29 = getelementptr i8, ptr addrspace(1) %arg1, i64 578 %tmp32 = load <1 x i8>, ptr addrspace(1) %tmp2979 %tmp33 = getelementptr i8, ptr addrspace(1) %arg1, i64 680 %tmp36 = load <1 x i8>, ptr addrspace(1) %tmp3381 %tmp37 = getelementptr i8, ptr addrspace(1) %arg1, i64 782 %tmp40 = load <1 x i8>, ptr addrspace(1) %tmp3783 br label %bb4184 85bb41: ; preds = %bb10, %bb86 %tmp42 = phi <1 x i8> [ %tmp40, %bb10 ], [ zeroinitializer, %bb ]87 %tmp43 = phi <1 x i8> [ %tmp36, %bb10 ], [ zeroinitializer, %bb ]88 %tmp44 = phi <1 x i8> [ %tmp32, %bb10 ], [ zeroinitializer, %bb ]89 %tmp45 = phi <1 x i8> [ %tmp28, %bb10 ], [ zeroinitializer, %bb ]90 %tmp46 = phi <1 x i8> [ %tmp24, %bb10 ], [ zeroinitializer, %bb ]91 %tmp47 = phi <1 x i8> [ %tmp20, %bb10 ], [ zeroinitializer, %bb ]92 %tmp48 = phi <1 x i8> [ %tmp16, %bb10 ], [ zeroinitializer, %bb ]93 %tmp49 = phi <1 x i8> [ %tmp12, %bb10 ], [ zeroinitializer, %bb ]94 store <1 x i8> %tmp49, ptr %arg295 store <1 x i8> %tmp48, ptr %arg396 store <1 x i8> %tmp47, ptr %arg497 store <1 x i8> %tmp46, ptr %arg598 store <1 x i8> %tmp45, ptr %arg699 store <1 x i8> %tmp44, ptr %arg7100 store <1 x i8> %tmp43, ptr %arg8101 store <1 x i8> %tmp42, ptr %arg9102 ret void103}104