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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s3; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s4; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX9-SDAG %s5; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX9-GISEL %s6; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s7; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s8; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s9; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s10; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-TRUE16 %s11; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL,GFX11-GISEL-FAKE16 %s12 13define float @fmul_select_f32_test1(float %x, i32 %bool.arg1, i32 %bool.arg2) {14; GFX7-LABEL: fmul_select_f32_test1:15; GFX7: ; %bb.0:16; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)17; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v218; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc19; GFX7-NEXT: v_mul_f32_e32 v0, v0, v120; GFX7-NEXT: s_setpc_b64 s[30:31]21;22; GFX9-LABEL: fmul_select_f32_test1:23; GFX9: ; %bb.0:24; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v226; GFX9-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc27; GFX9-NEXT: v_mul_f32_e32 v0, v0, v128; GFX9-NEXT: s_setpc_b64 s[30:31]29;30; GFX10-LABEL: fmul_select_f32_test1:31; GFX10: ; %bb.0:32; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)33; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v234; GFX10-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo35; GFX10-NEXT: v_mul_f32_e32 v0, v0, v136; GFX10-NEXT: s_setpc_b64 s[30:31]37;38; GFX11-LABEL: fmul_select_f32_test1:39; GFX11: ; %bb.0:40; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)41; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v242; GFX11-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc_lo43; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)44; GFX11-NEXT: v_mul_f32_e32 v0, v0, v145; GFX11-NEXT: s_setpc_b64 s[30:31]46 %bool = icmp eq i32 %bool.arg1, %bool.arg247 %y = select i1 %bool, float 2.000000e+00, float 1.000000e+0048 %ldexp = fmul float %x, %y49 ret float %ldexp50}51 52define float @fmul_select_f32_test2(float %x, i32 %bool.arg1, i32 %bool.arg2) {53; GFX7-LABEL: fmul_select_f32_test2:54; GFX7: ; %bb.0:55; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v257; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc58; GFX7-NEXT: v_mul_f32_e32 v0, v0, v159; GFX7-NEXT: s_setpc_b64 s[30:31]60;61; GFX9-LABEL: fmul_select_f32_test2:62; GFX9: ; %bb.0:63; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)64; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v265; GFX9-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc66; GFX9-NEXT: v_mul_f32_e32 v0, v0, v167; GFX9-NEXT: s_setpc_b64 s[30:31]68;69; GFX10-LABEL: fmul_select_f32_test2:70; GFX10: ; %bb.0:71; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)72; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v273; GFX10-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc_lo74; GFX10-NEXT: v_mul_f32_e32 v0, v0, v175; GFX10-NEXT: s_setpc_b64 s[30:31]76;77; GFX11-LABEL: fmul_select_f32_test2:78; GFX11: ; %bb.0:79; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)80; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v281; GFX11-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc_lo82; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)83; GFX11-NEXT: v_mul_f32_e32 v0, v0, v184; GFX11-NEXT: s_setpc_b64 s[30:31]85 %bool = icmp eq i32 %bool.arg1, %bool.arg286 %y = select i1 %bool, float 5.000000e-01, float 1.000000e+0087 %ldexp = fmul float %x, %y88 ret float %ldexp89}90 91define <2 x float> @fmul_select_v2f32_test3(<2 x float> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {92; GFX7-SDAG-LABEL: fmul_select_v2f32_test3:93; GFX7-SDAG: ; %bb.0:94; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)95; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v596; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc97; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v498; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc99; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2100; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3101; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]102;103; GFX7-GISEL-LABEL: fmul_select_v2f32_test3:104; GFX7-GISEL: ; %bb.0:105; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)106; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4107; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc108; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5109; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc110; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2111; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3112; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]113;114; GFX9-SDAG-LABEL: fmul_select_v2f32_test3:115; GFX9-SDAG: ; %bb.0:116; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)117; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5118; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc119; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4120; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc121; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2122; GFX9-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3123; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]124;125; GFX9-GISEL-LABEL: fmul_select_v2f32_test3:126; GFX9-GISEL: ; %bb.0:127; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)128; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4129; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc130; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5131; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc132; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2133; GFX9-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3134; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]135;136; GFX10-LABEL: fmul_select_v2f32_test3:137; GFX10: ; %bb.0:138; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)139; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4140; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc_lo141; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5142; GFX10-NEXT: v_mul_f32_e32 v0, v0, v2143; GFX10-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc_lo144; GFX10-NEXT: v_mul_f32_e32 v1, v1, v3145; GFX10-NEXT: s_setpc_b64 s[30:31]146;147; GFX11-LABEL: fmul_select_v2f32_test3:148; GFX11: ; %bb.0:149; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)150; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4151; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc_lo152; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5153; GFX11-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc_lo154; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)155; GFX11-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_mul_f32 v1, v1, v3156; GFX11-NEXT: s_setpc_b64 s[30:31]157 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2158 %y = select <2 x i1> %bool, <2 x float> <float 2.000000e+00, float 2.000000e+00>, <2 x float> <float 1.000000e+00, float 1.000000e+00>159 %ldexp = fmul <2 x float> %x, %y160 ret <2 x float> %ldexp161}162 163define <2 x float> @fmul_select_v2f32_test4(<2 x float> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {164; GFX7-SDAG-LABEL: fmul_select_v2f32_test4:165; GFX7-SDAG: ; %bb.0:166; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)167; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5168; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc169; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4170; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc171; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2172; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3173; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]174;175; GFX7-GISEL-LABEL: fmul_select_v2f32_test4:176; GFX7-GISEL: ; %bb.0:177; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)178; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4179; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc180; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5181; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc182; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2183; GFX7-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3184; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]185;186; GFX9-SDAG-LABEL: fmul_select_v2f32_test4:187; GFX9-SDAG: ; %bb.0:188; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)189; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5190; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc191; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4192; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc193; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v2194; GFX9-SDAG-NEXT: v_mul_f32_e32 v1, v1, v3195; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]196;197; GFX9-GISEL-LABEL: fmul_select_v2f32_test4:198; GFX9-GISEL: ; %bb.0:199; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)200; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v4201; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc202; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v5203; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc204; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v2205; GFX9-GISEL-NEXT: v_mul_f32_e32 v1, v1, v3206; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]207;208; GFX10-LABEL: fmul_select_v2f32_test4:209; GFX10: ; %bb.0:210; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)211; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4212; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc_lo213; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5214; GFX10-NEXT: v_mul_f32_e32 v0, v0, v2215; GFX10-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc_lo216; GFX10-NEXT: v_mul_f32_e32 v1, v1, v3217; GFX10-NEXT: s_setpc_b64 s[30:31]218;219; GFX11-LABEL: fmul_select_v2f32_test4:220; GFX11: ; %bb.0:221; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)222; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v4223; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc_lo224; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v3, v5225; GFX11-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc_lo226; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)227; GFX11-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_mul_f32 v1, v1, v3228; GFX11-NEXT: s_setpc_b64 s[30:31]229 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2230 %y = select <2 x i1> %bool, <2 x float> <float 5.000000e-01, float 5.000000e-01>, <2 x float> <float 1.000000e+00, float 1.000000e+00>231 %ldexp = fmul <2 x float> %x, %y232 ret <2 x float> %ldexp233}234 235define float @fmul_select_f32_test5(float %x, i32 %bool.arg1, i32 %bool.arg2) {236; GFX7-LABEL: fmul_select_f32_test5:237; GFX7: ; %bb.0:238; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)239; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2240; GFX7-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc241; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1242; GFX7-NEXT: s_setpc_b64 s[30:31]243;244; GFX9-LABEL: fmul_select_f32_test5:245; GFX9: ; %bb.0:246; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)247; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2248; GFX9-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc249; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1250; GFX9-NEXT: s_setpc_b64 s[30:31]251;252; GFX10-LABEL: fmul_select_f32_test5:253; GFX10: ; %bb.0:254; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)255; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2256; GFX10-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc_lo257; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1258; GFX10-NEXT: s_setpc_b64 s[30:31]259;260; GFX11-LABEL: fmul_select_f32_test5:261; GFX11: ; %bb.0:262; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)263; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2264; GFX11-NEXT: v_cndmask_b32_e64 v1, -1.0, -2.0, vcc_lo265; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)266; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1267; GFX11-NEXT: s_setpc_b64 s[30:31]268 %bool = icmp eq i32 %bool.arg1, %bool.arg2269 %y = select i1 %bool, float -2.000000e+00, float -1.000000e+00270 %ldexp = fmul float %x, %y271 ret float %ldexp272}273 274define float @fmul_select_f32_test6(float %x, i32 %bool.arg1, i32 %bool.arg2) {275; GFX7-SDAG-LABEL: fmul_select_f32_test6:276; GFX7-SDAG: ; %bb.0:277; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)278; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x41000000279; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0xc0400000280; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2281; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc282; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1283; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]284;285; GFX7-GISEL-LABEL: fmul_select_f32_test6:286; GFX7-GISEL: ; %bb.0:287; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)288; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0xc0400000289; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x41000000290; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2291; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc292; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1293; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]294;295; GFX9-SDAG-LABEL: fmul_select_f32_test6:296; GFX9-SDAG: ; %bb.0:297; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)298; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x41000000299; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xc0400000300; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2301; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc302; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1303; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]304;305; GFX9-GISEL-LABEL: fmul_select_f32_test6:306; GFX9-GISEL: ; %bb.0:307; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)308; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc0400000309; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x41000000310; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2311; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc312; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1313; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]314;315; GFX10-SDAG-LABEL: fmul_select_f32_test6:316; GFX10-SDAG: ; %bb.0:317; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)318; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xc0400000319; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2320; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x41000000, v3, vcc_lo321; GFX10-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1322; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]323;324; GFX10-GISEL-LABEL: fmul_select_f32_test6:325; GFX10-GISEL: ; %bb.0:326; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)327; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x41000000328; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2329; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc0400000, vcc_lo330; GFX10-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1331; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]332;333; GFX11-SDAG-LABEL: fmul_select_f32_test6:334; GFX11-SDAG: ; %bb.0:335; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)336; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0xc0400000337; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2338; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)339; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x41000000, v3, vcc_lo340; GFX11-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1341; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]342;343; GFX11-GISEL-LABEL: fmul_select_f32_test6:344; GFX11-GISEL: ; %bb.0:345; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)346; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x41000000347; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2348; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)349; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc0400000, vcc_lo350; GFX11-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1351; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]352 %bool = icmp eq i32 %bool.arg1, %bool.arg2353 %y = select i1 %bool, float -3.000000e+00, float 8.000000e+00354 %ldexp = fmul float %x, %y355 ret float %ldexp356}357 358define float @fmul_select_f32_test7_sel_log2val_pos59_pos92(float %x, i32 %bool.arg1, i32 %bool.arg2) {359; GFX7-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:360; GFX7: ; %bb.0:361; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)362; GFX7-NEXT: v_mov_b32_e32 v3, 0x5c363; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2364; GFX7-NEXT: v_cndmask_b32_e64 v1, v3, 59, vcc365; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v1366; GFX7-NEXT: s_setpc_b64 s[30:31]367;368; GFX9-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:369; GFX9: ; %bb.0:370; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)371; GFX9-NEXT: v_mov_b32_e32 v3, 0x5c372; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2373; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, 59, vcc374; GFX9-NEXT: v_ldexp_f32 v0, v0, v1375; GFX9-NEXT: s_setpc_b64 s[30:31]376;377; GFX10-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:378; GFX10: ; %bb.0:379; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)380; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2381; GFX10-NEXT: v_cndmask_b32_e64 v1, 0x5c, 59, vcc_lo382; GFX10-NEXT: v_ldexp_f32 v0, v0, v1383; GFX10-NEXT: s_setpc_b64 s[30:31]384;385; GFX11-LABEL: fmul_select_f32_test7_sel_log2val_pos59_pos92:386; GFX11: ; %bb.0:387; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)388; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2389; GFX11-NEXT: v_cndmask_b32_e64 v1, 0x5c, 59, vcc_lo390; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)391; GFX11-NEXT: v_ldexp_f32 v0, v0, v1392; GFX11-NEXT: s_setpc_b64 s[30:31]393 %bool = icmp eq i32 %bool.arg1, %bool.arg2394 %y = select i1 %bool, float 0x43A0000000000000, float 0x45B0000000000000395 %ldexp = fmul float %x, %y396 ret float %ldexp397}398 399define float @fmul_select_f32_test8(float %x, i32 %bool.arg1, i32 %bool.arg2) {400; GFX7-SDAG-LABEL: fmul_select_f32_test8:401; GFX7-SDAG: ; %bb.0:402; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)403; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0xc1000000404; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0x41800000405; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2406; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc407; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1408; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]409;410; GFX7-GISEL-LABEL: fmul_select_f32_test8:411; GFX7-GISEL: ; %bb.0:412; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)413; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0x41800000414; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0xc1000000415; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2416; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc417; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1418; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]419;420; GFX9-SDAG-LABEL: fmul_select_f32_test8:421; GFX9-SDAG: ; %bb.0:422; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)423; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xc1000000424; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x41800000425; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2426; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc427; GFX9-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1428; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]429;430; GFX9-GISEL-LABEL: fmul_select_f32_test8:431; GFX9-GISEL: ; %bb.0:432; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)433; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x41800000434; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xc1000000435; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2436; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc437; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1438; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]439;440; GFX10-SDAG-LABEL: fmul_select_f32_test8:441; GFX10-SDAG: ; %bb.0:442; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)443; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x41800000444; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2445; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc1000000, v3, vcc_lo446; GFX10-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1447; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]448;449; GFX10-GISEL-LABEL: fmul_select_f32_test8:450; GFX10-GISEL: ; %bb.0:451; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)452; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1000000453; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2454; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x41800000, vcc_lo455; GFX10-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1456; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]457;458; GFX11-SDAG-LABEL: fmul_select_f32_test8:459; GFX11-SDAG: ; %bb.0:460; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)461; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0x41800000462; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2463; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)464; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc1000000, v3, vcc_lo465; GFX11-SDAG-NEXT: v_mul_f32_e32 v0, v0, v1466; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]467;468; GFX11-GISEL-LABEL: fmul_select_f32_test8:469; GFX11-GISEL: ; %bb.0:470; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)471; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0xc1000000472; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2473; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)474; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x41800000, vcc_lo475; GFX11-GISEL-NEXT: v_mul_f32_e32 v0, v0, v1476; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]477 %bool = icmp eq i32 %bool.arg1, %bool.arg2478 %y = select i1 %bool, float 1.600000e+01, float -8.000000e+00479 %ldexp = fmul float %x, %y480 ret float %ldexp481}482 483define float @fmul_select_f32_test9(float %x, i32 %bool.arg1, i32 %bool.arg2) {484; GFX7-LABEL: fmul_select_f32_test9:485; GFX7: ; %bb.0:486; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)487; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2488; GFX7-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc489; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1490; GFX7-NEXT: s_setpc_b64 s[30:31]491;492; GFX9-LABEL: fmul_select_f32_test9:493; GFX9: ; %bb.0:494; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)495; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2496; GFX9-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc497; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1498; GFX9-NEXT: s_setpc_b64 s[30:31]499;500; GFX10-LABEL: fmul_select_f32_test9:501; GFX10: ; %bb.0:502; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)503; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2504; GFX10-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc_lo505; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1506; GFX10-NEXT: s_setpc_b64 s[30:31]507;508; GFX11-LABEL: fmul_select_f32_test9:509; GFX11: ; %bb.0:510; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)511; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2512; GFX11-NEXT: v_cndmask_b32_e64 v1, 2.0, 0, vcc_lo513; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)514; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1515; GFX11-NEXT: s_setpc_b64 s[30:31]516 %bool = icmp eq i32 %bool.arg1, %bool.arg2517 %y = select i1 %bool, float 0.000000e+00, float 2.000000e+00518 %ldexp = fmul float %x, %y519 ret float %ldexp520}521 522define float @fmul_select_f32_test10(float %x, i32 %bool.arg1, i32 %bool.arg2) {523; GFX7-LABEL: fmul_select_f32_test10:524; GFX7: ; %bb.0:525; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)526; GFX7-NEXT: v_bfrev_b32_e32 v3, 1527; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2528; GFX7-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc529; GFX7-NEXT: v_mul_f32_e32 v0, v0, v1530; GFX7-NEXT: s_setpc_b64 s[30:31]531;532; GFX9-LABEL: fmul_select_f32_test10:533; GFX9: ; %bb.0:534; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)535; GFX9-NEXT: v_bfrev_b32_e32 v3, 1536; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2537; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc538; GFX9-NEXT: v_mul_f32_e32 v0, v0, v1539; GFX9-NEXT: s_setpc_b64 s[30:31]540;541; GFX10-LABEL: fmul_select_f32_test10:542; GFX10: ; %bb.0:543; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)544; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2545; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x80000000, vcc_lo546; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1547; GFX10-NEXT: s_setpc_b64 s[30:31]548;549; GFX11-LABEL: fmul_select_f32_test10:550; GFX11: ; %bb.0:551; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)552; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2553; GFX11-NEXT: v_cndmask_b32_e64 v1, 0, 0x80000000, vcc_lo554; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)555; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1556; GFX11-NEXT: s_setpc_b64 s[30:31]557 %bool = icmp eq i32 %bool.arg1, %bool.arg2558 %y = select i1 %bool, float -0.000000e+00, float 0.000000e+00559 %ldexp = fmul float %x, %y560 ret float %ldexp561}562 563define float @fmul_select_f32_test11_sel_log2val_pos78_pos56(float %x, i32 %bool.arg1, i32 %bool.arg2) {564; GFX7-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:565; GFX7: ; %bb.0:566; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)567; GFX7-NEXT: v_mov_b32_e32 v3, 0x4e568; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2569; GFX7-NEXT: v_cndmask_b32_e32 v1, 56, v3, vcc570; GFX7-NEXT: v_ldexp_f32_e64 v0, -v0, v1571; GFX7-NEXT: s_setpc_b64 s[30:31]572;573; GFX9-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:574; GFX9: ; %bb.0:575; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)576; GFX9-NEXT: v_mov_b32_e32 v3, 0x4e577; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2578; GFX9-NEXT: v_cndmask_b32_e32 v1, 56, v3, vcc579; GFX9-NEXT: v_ldexp_f32 v0, -v0, v1580; GFX9-NEXT: s_setpc_b64 s[30:31]581;582; GFX10-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:583; GFX10: ; %bb.0:584; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2586; GFX10-NEXT: v_cndmask_b32_e64 v1, 56, 0x4e, vcc_lo587; GFX10-NEXT: v_ldexp_f32 v0, -v0, v1588; GFX10-NEXT: s_setpc_b64 s[30:31]589;590; GFX11-LABEL: fmul_select_f32_test11_sel_log2val_pos78_pos56:591; GFX11: ; %bb.0:592; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)593; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2594; GFX11-NEXT: v_cndmask_b32_e64 v1, 56, 0x4e, vcc_lo595; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)596; GFX11-NEXT: v_ldexp_f32 v0, -v0, v1597; GFX11-NEXT: s_setpc_b64 s[30:31]598 %bool = icmp eq i32 %bool.arg1, %bool.arg2599 %y = select i1 %bool, float 0xC4D0000000000000, float 0xC370000000000000600 %ldexp = fmul float %x, %y601 ret float %ldexp602}603 604define float @fmul_select_f32_test12_sel_log2val_neg48_pos68(float %x, i32 %bool.arg1, i32 %bool.arg2) {605; GFX7-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:606; GFX7-SDAG: ; %bb.0:607; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)608; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x44609; GFX7-SDAG-NEXT: v_not_b32_e32 v4, 47610; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2611; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc612; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v1613; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]614;615; GFX7-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:616; GFX7-GISEL: ; %bb.0:617; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)618; GFX7-GISEL-NEXT: v_not_b32_e32 v3, 47619; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x44620; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2621; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc622; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v1623; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]624;625; GFX9-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:626; GFX9-SDAG: ; %bb.0:627; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)628; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x44629; GFX9-SDAG-NEXT: v_not_b32_e32 v4, 47630; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2631; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc632; GFX9-SDAG-NEXT: v_ldexp_f32 v0, v0, v1633; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]634;635; GFX9-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:636; GFX9-GISEL: ; %bb.0:637; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)638; GFX9-GISEL-NEXT: v_not_b32_e32 v3, 47639; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x44640; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v2641; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc642; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v0, v1643; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]644;645; GFX10-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:646; GFX10-SDAG: ; %bb.0:647; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)648; GFX10-SDAG-NEXT: v_not_b32_e32 v3, 47649; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2650; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x44, v3, vcc_lo651; GFX10-SDAG-NEXT: v_ldexp_f32 v0, v0, v1652; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]653;654; GFX10-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:655; GFX10-GISEL: ; %bb.0:656; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)657; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x44658; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2659; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xffffffd0, vcc_lo660; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v0, v1661; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]662;663; GFX11-SDAG-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:664; GFX11-SDAG: ; %bb.0:665; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)666; GFX11-SDAG-NEXT: v_not_b32_e32 v3, 47667; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2668; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)669; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x44, v3, vcc_lo670; GFX11-SDAG-NEXT: v_ldexp_f32 v0, v0, v1671; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]672;673; GFX11-GISEL-LABEL: fmul_select_f32_test12_sel_log2val_neg48_pos68:674; GFX11-GISEL: ; %bb.0:675; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)676; GFX11-GISEL-NEXT: v_mov_b32_e32 v3, 0x44677; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v2678; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)679; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xffffffd0, vcc_lo680; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v0, v1681; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]682 %bool = icmp eq i32 %bool.arg1, %bool.arg2683 %y = select i1 %bool, float 0x3CF0000000000000, float 0x4430000000000000684 %ldexp = fmul float %x, %y685 ret float %ldexp686}687 688define double @fmul_select_f64_test1(double %x, i32 %bool.arg1, i32 %bool.arg2) {689; GFX7-LABEL: fmul_select_f64_test1:690; GFX7: ; %bb.0:691; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)692; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3693; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc694; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2695; GFX7-NEXT: s_setpc_b64 s[30:31]696;697; GFX9-LABEL: fmul_select_f64_test1:698; GFX9: ; %bb.0:699; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)700; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3701; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc702; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2703; GFX9-NEXT: s_setpc_b64 s[30:31]704;705; GFX10-LABEL: fmul_select_f64_test1:706; GFX10: ; %bb.0:707; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)708; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3709; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo710; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2711; GFX10-NEXT: s_setpc_b64 s[30:31]712;713; GFX11-LABEL: fmul_select_f64_test1:714; GFX11: ; %bb.0:715; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)716; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3717; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo718; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)719; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2720; GFX11-NEXT: s_setpc_b64 s[30:31]721 %bool = icmp eq i32 %bool.arg1, %bool.arg2722 %y = select i1 %bool, double 2.000000e+00, double 1.000000e+00723 %ldexp = fmul double %x, %y724 ret double %ldexp725}726 727define double @fmul_select_f64_test2(double %x, i32 %bool.arg1, i32 %bool.arg2) {728; GFX7-LABEL: fmul_select_f64_test2:729; GFX7: ; %bb.0:730; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)731; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3732; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc733; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2734; GFX7-NEXT: s_setpc_b64 s[30:31]735;736; GFX9-LABEL: fmul_select_f64_test2:737; GFX9: ; %bb.0:738; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)739; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3740; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc741; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2742; GFX9-NEXT: s_setpc_b64 s[30:31]743;744; GFX10-LABEL: fmul_select_f64_test2:745; GFX10: ; %bb.0:746; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)747; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3748; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo749; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2750; GFX10-NEXT: s_setpc_b64 s[30:31]751;752; GFX11-LABEL: fmul_select_f64_test2:753; GFX11: ; %bb.0:754; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)755; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3756; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo757; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)758; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v2759; GFX11-NEXT: s_setpc_b64 s[30:31]760 %bool = icmp eq i32 %bool.arg1, %bool.arg2761 %y = select i1 %bool, double 5.000000e-01, double 1.000000e+00762 %ldexp = fmul double %x, %y763 ret double %ldexp764}765 766define <2 x double> @fmul_select_v2f64_test3(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {767; GFX7-LABEL: fmul_select_v2f64_test3:768; GFX7: ; %bb.0:769; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)770; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6771; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc772; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7773; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4774; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc775; GFX7-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4776; GFX7-NEXT: s_setpc_b64 s[30:31]777;778; GFX9-LABEL: fmul_select_v2f64_test3:779; GFX9: ; %bb.0:780; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)781; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6782; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc783; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7784; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4785; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc786; GFX9-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4787; GFX9-NEXT: s_setpc_b64 s[30:31]788;789; GFX10-LABEL: fmul_select_v2f64_test3:790; GFX10: ; %bb.0:791; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)792; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6793; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo794; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7795; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4796; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo797; GFX10-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5798; GFX10-NEXT: s_setpc_b64 s[30:31]799;800; GFX11-LABEL: fmul_select_v2f64_test3:801; GFX11: ; %bb.0:802; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)803; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6804; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo805; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7806; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)807; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4808; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo809; GFX11-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5810; GFX11-NEXT: s_setpc_b64 s[30:31]811 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2812 %y = select <2 x i1> %bool, <2 x double> <double 2.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 1.000000e+00>813 %ldexp = fmul <2 x double> %x, %y814 ret <2 x double> %ldexp815}816 817define <2 x double> @fmul_select_v2f64_test4(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {818; GFX7-LABEL: fmul_select_v2f64_test4:819; GFX7: ; %bb.0:820; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)821; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6822; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc823; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7824; GFX7-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4825; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc826; GFX7-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4827; GFX7-NEXT: s_setpc_b64 s[30:31]828;829; GFX9-LABEL: fmul_select_v2f64_test4:830; GFX9: ; %bb.0:831; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)832; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v4, v6833; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc834; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v5, v7835; GFX9-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4836; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc837; GFX9-NEXT: v_ldexp_f64 v[2:3], v[2:3], v4838; GFX9-NEXT: s_setpc_b64 s[30:31]839;840; GFX10-LABEL: fmul_select_v2f64_test4:841; GFX10: ; %bb.0:842; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)843; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6844; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc_lo845; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7846; GFX10-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4847; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc_lo848; GFX10-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5849; GFX10-NEXT: s_setpc_b64 s[30:31]850;851; GFX11-LABEL: fmul_select_v2f64_test4:852; GFX11: ; %bb.0:853; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)854; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v6855; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, -1, vcc_lo856; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7857; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)858; GFX11-NEXT: v_ldexp_f64 v[0:1], v[0:1], v4859; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, -1, vcc_lo860; GFX11-NEXT: v_ldexp_f64 v[2:3], v[2:3], v5861; GFX11-NEXT: s_setpc_b64 s[30:31]862 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg2863 %y = select <2 x i1> %bool, <2 x double> <double 5.000000e-01, double 5.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e+00>864 %ldexp = fmul <2 x double> %x, %y865 ret <2 x double> %ldexp866}867 868define double @fmul_select_f64_test5(double %x, i32 %bool.arg1, i32 %bool.arg2) {869; GFX7-LABEL: fmul_select_f64_test5:870; GFX7: ; %bb.0:871; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)872; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3873; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc874; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2875; GFX7-NEXT: s_setpc_b64 s[30:31]876;877; GFX9-LABEL: fmul_select_f64_test5:878; GFX9: ; %bb.0:879; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)880; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3881; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc882; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2883; GFX9-NEXT: s_setpc_b64 s[30:31]884;885; GFX10-LABEL: fmul_select_f64_test5:886; GFX10: ; %bb.0:887; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)888; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3889; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo890; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2891; GFX10-NEXT: s_setpc_b64 s[30:31]892;893; GFX11-LABEL: fmul_select_f64_test5:894; GFX11: ; %bb.0:895; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)896; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3897; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo898; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)899; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2900; GFX11-NEXT: s_setpc_b64 s[30:31]901 %bool = icmp eq i32 %bool.arg1, %bool.arg2902 %y = select i1 %bool, double -5.000000e-01, double -1.000000e+00903 %ldexp = fmul double %x, %y904 ret double %ldexp905}906 907define double @fmul_select_f64_test6(double %x, i32 %bool.arg1, i32 %bool.arg2) {908; GFX7-LABEL: fmul_select_f64_test6:909; GFX7: ; %bb.0:910; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)911; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3912; GFX7-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc913; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2914; GFX7-NEXT: s_setpc_b64 s[30:31]915;916; GFX9-LABEL: fmul_select_f64_test6:917; GFX9: ; %bb.0:918; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)919; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3920; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc921; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2922; GFX9-NEXT: s_setpc_b64 s[30:31]923;924; GFX10-LABEL: fmul_select_f64_test6:925; GFX10: ; %bb.0:926; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)927; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3928; GFX10-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo929; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2930; GFX10-NEXT: s_setpc_b64 s[30:31]931;932; GFX11-LABEL: fmul_select_f64_test6:933; GFX11: ; %bb.0:934; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)935; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3936; GFX11-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo937; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)938; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v2939; GFX11-NEXT: s_setpc_b64 s[30:31]940 %bool = icmp eq i32 %bool.arg1, %bool.arg2941 %y = select i1 %bool, double -2.000000e+00, double -1.000000e+00942 %ldexp = fmul double %x, %y943 ret double %ldexp944}945 946define double @fmul_select_f64_test7(double %x, i32 %bool.arg1, i32 %bool.arg2) {947; GFX7-SDAG-LABEL: fmul_select_f64_test7:948; GFX7-SDAG: ; %bb.0:949; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)950; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0xbff00000951; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3952; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, 2.0, vcc953; GFX7-SDAG-NEXT: v_mov_b32_e32 v2, 0954; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]955; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]956;957; GFX7-GISEL-LABEL: fmul_select_f64_test7:958; GFX7-GISEL: ; %bb.0:959; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)960; GFX7-GISEL-NEXT: v_mov_b32_e32 v5, 0xbff00000961; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3962; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0963; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, 2.0, vcc964; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]965; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]966;967; GFX9-SDAG-LABEL: fmul_select_f64_test7:968; GFX9-SDAG: ; %bb.0:969; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)970; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xbff00000971; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3972; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, 2.0, vcc973; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0974; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]975; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]976;977; GFX9-GISEL-LABEL: fmul_select_f64_test7:978; GFX9-GISEL: ; %bb.0:979; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)980; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xbff00000981; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v3982; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0983; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, 2.0, vcc984; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]985; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]986;987; GFX10-LABEL: fmul_select_f64_test7:988; GFX10: ; %bb.0:989; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)990; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v3991; GFX10-NEXT: v_mov_b32_e32 v4, 0992; GFX10-NEXT: v_cndmask_b32_e64 v5, 0xbff00000, 2.0, vcc_lo993; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]994; GFX10-NEXT: s_setpc_b64 s[30:31]995;996; GFX11-LABEL: fmul_select_f64_test7:997; GFX11: ; %bb.0:998; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)999; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31000; GFX11-NEXT: v_mov_b32_e32 v4, 01001; GFX11-NEXT: v_cndmask_b32_e64 v5, 0xbff00000, 2.0, vcc_lo1002; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1003; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1004; GFX11-NEXT: s_setpc_b64 s[30:31]1005 %bool = icmp eq i32 %bool.arg1, %bool.arg21006 %y = select i1 %bool, double 2.000000e+00, double -1.000000e+001007 %ldexp = fmul double %x, %y1008 ret double %ldexp1009}1010 1011define double @fmul_select_f64_test8(double %x, i32 %bool.arg1, i32 %bool.arg2) {1012; GFX7-LABEL: fmul_select_f64_test8:1013; GFX7: ; %bb.0:1014; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1015; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31016; GFX7-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc1017; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v21018; GFX7-NEXT: s_setpc_b64 s[30:31]1019;1020; GFX9-LABEL: fmul_select_f64_test8:1021; GFX9: ; %bb.0:1022; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1023; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31024; GFX9-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc1025; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v21026; GFX9-NEXT: s_setpc_b64 s[30:31]1027;1028; GFX10-LABEL: fmul_select_f64_test8:1029; GFX10: ; %bb.0:1030; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1031; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31032; GFX10-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc_lo1033; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v21034; GFX10-NEXT: s_setpc_b64 s[30:31]1035;1036; GFX11-LABEL: fmul_select_f64_test8:1037; GFX11: ; %bb.0:1038; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1039; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31040; GFX11-NEXT: v_cndmask_b32_e64 v2, 5, 2, vcc_lo1041; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1042; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v21043; GFX11-NEXT: s_setpc_b64 s[30:31]1044 %bool = icmp eq i32 %bool.arg1, %bool.arg21045 %y = select i1 %bool, double -4.000000e+00, double -3.200000e+011046 %ldexp = fmul double %x, %y1047 ret double %ldexp1048}1049 1050define <2 x double> @fmul_select_v2f64_test9(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {1051; GFX7-LABEL: fmul_select_v2f64_test9:1052; GFX7: ; %bb.0:1053; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1054; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v4, v61055; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1056; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v5, v71057; GFX7-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v41058; GFX7-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1059; GFX7-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v41060; GFX7-NEXT: s_setpc_b64 s[30:31]1061;1062; GFX9-LABEL: fmul_select_v2f64_test9:1063; GFX9: ; %bb.0:1064; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1065; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v4, v61066; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1067; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v5, v71068; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v41069; GFX9-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1070; GFX9-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v41071; GFX9-NEXT: s_setpc_b64 s[30:31]1072;1073; GFX10-LABEL: fmul_select_v2f64_test9:1074; GFX10: ; %bb.0:1075; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1076; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v61077; GFX10-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo1078; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v71079; GFX10-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v41080; GFX10-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo1081; GFX10-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v51082; GFX10-NEXT: s_setpc_b64 s[30:31]1083;1084; GFX11-LABEL: fmul_select_v2f64_test9:1085; GFX11: ; %bb.0:1086; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1087; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v61088; GFX11-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo1089; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v71090; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)1091; GFX11-NEXT: v_ldexp_f64 v[0:1], -v[0:1], v41092; GFX11-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc_lo1093; GFX11-NEXT: v_ldexp_f64 v[2:3], -v[2:3], v51094; GFX11-NEXT: s_setpc_b64 s[30:31]1095 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg21096 %y = select <2 x i1> %bool, <2 x double> <double -2.000000e+00, double -2.000000e+00>, <2 x double> <double -1.000000e+00, double -1.000000e+00>1097 %ldexp = fmul <2 x double> %x, %y1098 ret <2 x double> %ldexp1099}1100 1101define <2 x double> @fmul_select_v2f64_test10(<2 x double> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {1102; GFX7-SDAG-LABEL: fmul_select_v2f64_test10:1103; GFX7-SDAG: ; %bb.0:1104; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1105; GFX7-SDAG-NEXT: v_mov_b32_e32 v8, 0xbff000001106; GFX7-SDAG-NEXT: v_mov_b32_e32 v9, 0x3fe000001107; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v4, v61108; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc1109; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v5, v71110; GFX7-SDAG-NEXT: v_mov_b32_e32 v8, 01111; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1112; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1113; GFX7-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41114; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1115;1116; GFX7-GISEL-LABEL: fmul_select_v2f64_test10:1117; GFX7-GISEL: ; %bb.0:1118; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1119; GFX7-GISEL-NEXT: v_mov_b32_e32 v9, 0x3fe000001120; GFX7-GISEL-NEXT: v_mov_b32_e32 v10, 0xbff000001121; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v4, v61122; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc1123; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v5, v71124; GFX7-GISEL-NEXT: v_mov_b32_e32 v8, 01125; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1126; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1127; GFX7-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41128; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1129;1130; GFX9-SDAG-LABEL: fmul_select_v2f64_test10:1131; GFX9-SDAG: ; %bb.0:1132; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1133; GFX9-SDAG-NEXT: v_mov_b32_e32 v8, 0xbff000001134; GFX9-SDAG-NEXT: v_mov_b32_e32 v9, 0x3fe000001135; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v4, v61136; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v9, v8, v9, vcc1137; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v5, v71138; GFX9-SDAG-NEXT: v_mov_b32_e32 v8, 01139; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1140; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1141; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41142; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1143;1144; GFX9-GISEL-LABEL: fmul_select_v2f64_test10:1145; GFX9-GISEL: ; %bb.0:1146; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1147; GFX9-GISEL-NEXT: v_mov_b32_e32 v9, 0x3fe000001148; GFX9-GISEL-NEXT: v_mov_b32_e32 v10, 0xbff000001149; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v4, v61150; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v9, v10, v9, vcc1151; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v5, v71152; GFX9-GISEL-NEXT: v_mov_b32_e32 v8, 01153; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc1154; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1155; GFX9-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41156; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1157;1158; GFX10-SDAG-LABEL: fmul_select_v2f64_test10:1159; GFX10-SDAG: ; %bb.0:1160; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1161; GFX10-SDAG-NEXT: v_mov_b32_e32 v8, 0x3fe000001162; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v61163; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v9, 0xbff00000, v8, vcc_lo1164; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v71165; GFX10-SDAG-NEXT: v_mov_b32_e32 v8, 01166; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo1167; GFX10-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1168; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41169; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1170;1171; GFX10-GISEL-LABEL: fmul_select_v2f64_test10:1172; GFX10-GISEL: ; %bb.0:1173; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1174; GFX10-GISEL-NEXT: v_mov_b32_e32 v9, 0xbff000001175; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v61176; GFX10-GISEL-NEXT: v_mov_b32_e32 v8, 01177; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v9, v9, 0x3fe00000, vcc_lo1178; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v71179; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1180; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo1181; GFX10-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41182; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1183;1184; GFX11-SDAG-LABEL: fmul_select_v2f64_test10:1185; GFX11-SDAG: ; %bb.0:1186; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1187; GFX11-SDAG-NEXT: v_mov_b32_e32 v8, 0x3fe000001188; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v61189; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1190; GFX11-SDAG-NEXT: v_dual_cndmask_b32 v9, 0xbff00000, v8 :: v_dual_mov_b32 v8, 01191; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v71192; GFX11-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1193; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo1194; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)1195; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41196; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1197;1198; GFX11-GISEL-LABEL: fmul_select_v2f64_test10:1199; GFX11-GISEL: ; %bb.0:1200; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1201; GFX11-GISEL-NEXT: v_dual_mov_b32 v9, 0xbff00000 :: v_dual_mov_b32 v8, 01202; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v4, v61203; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1204; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v9, v9, 0x3fe00000, vcc_lo1205; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v71206; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[8:9]1207; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v4, 0, 1, vcc_lo1208; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_1)1209; GFX11-GISEL-NEXT: v_ldexp_f64 v[2:3], v[2:3], v41210; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1211 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg21212 %y = select <2 x i1> %bool, <2 x double> <double 5.000000e-01, double 2.000000e+00>, <2 x double> <double -1.000000e+00, double 1.000000e+00>1213 %ldexp = fmul <2 x double> %x, %y1214 ret <2 x double> %ldexp1215}1216 1217define double @fmul_select_f64_test11(double %x, i32 %bool.arg1, i32 %bool.arg2) {1218; GFX7-SDAG-LABEL: fmul_select_f64_test11:1219; GFX7-SDAG: ; %bb.0:1220; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1221; GFX7-SDAG-NEXT: v_bfrev_b32_e32 v4, 11222; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31223; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, -2.0, vcc1224; GFX7-SDAG-NEXT: v_mov_b32_e32 v2, 01225; GFX7-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1226; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1227;1228; GFX7-GISEL-LABEL: fmul_select_f64_test11:1229; GFX7-GISEL: ; %bb.0:1230; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1231; GFX7-GISEL-NEXT: v_bfrev_b32_e32 v5, 11232; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31233; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 01234; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, -2.0, vcc1235; GFX7-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1236; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1237;1238; GFX9-SDAG-LABEL: fmul_select_f64_test11:1239; GFX9-SDAG: ; %bb.0:1240; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1241; GFX9-SDAG-NEXT: v_bfrev_b32_e32 v4, 11242; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31243; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v3, v4, -2.0, vcc1244; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 01245; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1246; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1247;1248; GFX9-GISEL-LABEL: fmul_select_f64_test11:1249; GFX9-GISEL: ; %bb.0:1250; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1251; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v5, 11252; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31253; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 01254; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v5, v5, -2.0, vcc1255; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1256; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1257;1258; GFX10-LABEL: fmul_select_f64_test11:1259; GFX10: ; %bb.0:1260; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1261; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31262; GFX10-NEXT: v_mov_b32_e32 v4, 01263; GFX10-NEXT: v_cndmask_b32_e64 v5, 0x80000000, -2.0, vcc_lo1264; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1265; GFX10-NEXT: s_setpc_b64 s[30:31]1266;1267; GFX11-LABEL: fmul_select_f64_test11:1268; GFX11: ; %bb.0:1269; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1270; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31271; GFX11-NEXT: v_mov_b32_e32 v4, 01272; GFX11-NEXT: v_cndmask_b32_e64 v5, 0x80000000, -2.0, vcc_lo1273; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1274; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1275; GFX11-NEXT: s_setpc_b64 s[30:31]1276 %bool = icmp eq i32 %bool.arg1, %bool.arg21277 %y = select i1 %bool, double -2.000000e+00, double -0.000000e+001278 %ldexp = fmul double %x, %y1279 ret double %ldexp1280}1281 1282define double @fmul_select_f64_test12(double %x, i32 %bool.arg1, i32 %bool.arg2) {1283; GFX7-LABEL: fmul_select_f64_test12:1284; GFX7: ; %bb.0:1285; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1286; GFX7-NEXT: v_bfrev_b32_e32 v5, 11287; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31288; GFX7-NEXT: v_mov_b32_e32 v4, 01289; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc1290; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1291; GFX7-NEXT: s_setpc_b64 s[30:31]1292;1293; GFX9-LABEL: fmul_select_f64_test12:1294; GFX9: ; %bb.0:1295; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1296; GFX9-NEXT: v_bfrev_b32_e32 v5, 11297; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31298; GFX9-NEXT: v_mov_b32_e32 v4, 01299; GFX9-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc1300; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1301; GFX9-NEXT: s_setpc_b64 s[30:31]1302;1303; GFX10-LABEL: fmul_select_f64_test12:1304; GFX10: ; %bb.0:1305; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1306; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31307; GFX10-NEXT: v_mov_b32_e32 v4, 01308; GFX10-NEXT: v_cndmask_b32_e64 v5, 0x80000000, 0, vcc_lo1309; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1310; GFX10-NEXT: s_setpc_b64 s[30:31]1311;1312; GFX11-LABEL: fmul_select_f64_test12:1313; GFX11: ; %bb.0:1314; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1315; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31316; GFX11-NEXT: v_mov_b32_e32 v4, 01317; GFX11-NEXT: v_cndmask_b32_e64 v5, 0x80000000, 0, vcc_lo1318; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1319; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1320; GFX11-NEXT: s_setpc_b64 s[30:31]1321 %bool = icmp eq i32 %bool.arg1, %bool.arg21322 %y = select i1 %bool, double 0.000000e+00, double -0.000000e+001323 %ldexp = fmul double %x, %y1324 ret double %ldexp1325}1326 1327define double @fmul_select_f64_test13(double %x, i32 %bool.arg1, i32 %bool.arg2) {1328; GFX7-LABEL: fmul_select_f64_test13:1329; GFX7: ; %bb.0:1330; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1331; GFX7-NEXT: v_mov_b32_e32 v5, 0x403000001332; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31333; GFX7-NEXT: v_mov_b32_e32 v4, 01334; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc1335; GFX7-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1336; GFX7-NEXT: s_setpc_b64 s[30:31]1337;1338; GFX9-LABEL: fmul_select_f64_test13:1339; GFX9: ; %bb.0:1340; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1341; GFX9-NEXT: v_mov_b32_e32 v5, 0x403000001342; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31343; GFX9-NEXT: v_mov_b32_e32 v4, 01344; GFX9-NEXT: v_cndmask_b32_e64 v5, v5, 0, vcc1345; GFX9-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1346; GFX9-NEXT: s_setpc_b64 s[30:31]1347;1348; GFX10-LABEL: fmul_select_f64_test13:1349; GFX10: ; %bb.0:1350; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1351; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31352; GFX10-NEXT: v_mov_b32_e32 v4, 01353; GFX10-NEXT: v_cndmask_b32_e64 v5, 0x40300000, 0, vcc_lo1354; GFX10-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1355; GFX10-NEXT: s_setpc_b64 s[30:31]1356;1357; GFX11-LABEL: fmul_select_f64_test13:1358; GFX11: ; %bb.0:1359; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1360; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31361; GFX11-NEXT: v_mov_b32_e32 v4, 01362; GFX11-NEXT: v_cndmask_b32_e64 v5, 0x40300000, 0, vcc_lo1363; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1364; GFX11-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]1365; GFX11-NEXT: s_setpc_b64 s[30:31]1366 %bool = icmp eq i32 %bool.arg1, %bool.arg21367 %y = select i1 %bool, double 0.000000e+00, double 1.600000e+011368 %ldexp = fmul double %x, %y1369 ret double %ldexp1370}1371 1372define double @fmul_select_f64_test14_sel_log2val_pos92_neg27(double %x, i32 %bool.arg1, i32 %bool.arg2) {1373; GFX7-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1374; GFX7-SDAG: ; %bb.0:1375; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1376; GFX7-SDAG-NEXT: v_not_b32_e32 v4, 261377; GFX7-SDAG-NEXT: v_mov_b32_e32 v5, 0x5c1378; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31379; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc1380; GFX7-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21381; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1382;1383; GFX7-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1384; GFX7-GISEL: ; %bb.0:1385; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1386; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x5c1387; GFX7-GISEL-NEXT: v_not_b32_e32 v5, 261388; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31389; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc1390; GFX7-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21391; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1392;1393; GFX9-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1394; GFX9-SDAG: ; %bb.0:1395; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1396; GFX9-SDAG-NEXT: v_not_b32_e32 v4, 261397; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x5c1398; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31399; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc1400; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21401; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1402;1403; GFX9-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1404; GFX9-GISEL: ; %bb.0:1405; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1406; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x5c1407; GFX9-GISEL-NEXT: v_not_b32_e32 v5, 261408; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31409; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc1410; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21411; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1412;1413; GFX10-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1414; GFX10-SDAG: ; %bb.0:1415; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1416; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x5c1417; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31418; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffe5, v4, vcc_lo1419; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21420; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1421;1422; GFX10-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1423; GFX10-GISEL: ; %bb.0:1424; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1425; GFX10-GISEL-NEXT: v_not_b32_e32 v4, 261426; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31427; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0x5c, vcc_lo1428; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21429; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1430;1431; GFX11-SDAG-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1432; GFX11-SDAG: ; %bb.0:1433; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1434; GFX11-SDAG-NEXT: v_mov_b32_e32 v4, 0x5c1435; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31436; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1437; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffe5, v4, vcc_lo1438; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21439; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1440;1441; GFX11-GISEL-LABEL: fmul_select_f64_test14_sel_log2val_pos92_neg27:1442; GFX11-GISEL: ; %bb.0:1443; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1444; GFX11-GISEL-NEXT: v_not_b32_e32 v4, 261445; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31446; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1447; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0x5c, vcc_lo1448; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21449; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1450 %bool = icmp eq i32 %bool.arg1, %bool.arg21451 %y = select i1 %bool, double 0x45B0000000000000, double 0x3E400000000000001452 %ldexp = fmul double %x, %y1453 ret double %ldexp1454}1455 1456define double @fmul_select_f64_test15_sel_log2val_neg42_neg33(double %x, i32 %bool.arg1, i32 %bool.arg2) {1457; GFX7-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1458; GFX7-SDAG: ; %bb.0:1459; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1460; GFX7-SDAG-NEXT: v_not_b32_e32 v4, 321461; GFX7-SDAG-NEXT: v_not_b32_e32 v5, 411462; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31463; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc1464; GFX7-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21465; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1466;1467; GFX7-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1468; GFX7-GISEL: ; %bb.0:1469; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1470; GFX7-GISEL-NEXT: v_not_b32_e32 v4, 411471; GFX7-GISEL-NEXT: v_not_b32_e32 v5, 321472; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31473; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc1474; GFX7-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21475; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1476;1477; GFX9-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1478; GFX9-SDAG: ; %bb.0:1479; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1480; GFX9-SDAG-NEXT: v_not_b32_e32 v4, 321481; GFX9-SDAG-NEXT: v_not_b32_e32 v5, 411482; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31483; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc1484; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21485; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1486;1487; GFX9-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1488; GFX9-GISEL: ; %bb.0:1489; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1490; GFX9-GISEL-NEXT: v_not_b32_e32 v4, 411491; GFX9-GISEL-NEXT: v_not_b32_e32 v5, 321492; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v31493; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v2, v5, v4, vcc1494; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21495; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1496;1497; GFX10-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1498; GFX10-SDAG: ; %bb.0:1499; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1500; GFX10-SDAG-NEXT: v_not_b32_e32 v4, 411501; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31502; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffdf, v4, vcc_lo1503; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21504; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1505;1506; GFX10-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1507; GFX10-GISEL: ; %bb.0:1508; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1509; GFX10-GISEL-NEXT: v_not_b32_e32 v4, 321510; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31511; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0xffffffd6, vcc_lo1512; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21513; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1514;1515; GFX11-SDAG-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1516; GFX11-SDAG: ; %bb.0:1517; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1518; GFX11-SDAG-NEXT: v_not_b32_e32 v4, 411519; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31520; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1521; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v2, 0xffffffdf, v4, vcc_lo1522; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21523; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1524;1525; GFX11-GISEL-LABEL: fmul_select_f64_test15_sel_log2val_neg42_neg33:1526; GFX11-GISEL: ; %bb.0:1527; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1528; GFX11-GISEL-NEXT: v_not_b32_e32 v4, 321529; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v31530; GFX11-GISEL-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1531; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v2, v4, 0xffffffd6, vcc_lo1532; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[0:1], v21533; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1534 %bool = icmp eq i32 %bool.arg1, %bool.arg21535 %y = select i1 %bool, double 0x3D50000000000000, double 0x3DE00000000000001536 %ldexp = fmul double %x, %y1537 ret double %ldexp1538}1539 1540 1541define half @fmul_select_f16_test1(half %x, i32 %bool.arg1, i32 %bool.arg2) {1542; GFX7-SDAG-LABEL: fmul_select_f16_test1:1543; GFX7-SDAG: ; %bb.0:1544; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1545; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v01546; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21547; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1548; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v01549; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11550; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1551;1552; GFX7-GISEL-LABEL: fmul_select_f16_test1:1553; GFX7-GISEL: ; %bb.0:1554; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1555; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v01556; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21557; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1558; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11559; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v01560; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1561;1562; GFX9-SDAG-LABEL: fmul_select_f16_test1:1563; GFX9-SDAG: ; %bb.0:1564; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1565; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21566; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1567; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v11568; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1569;1570; GFX9-GISEL-LABEL: fmul_select_f16_test1:1571; GFX9-GISEL: ; %bb.0:1572; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1573; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21574; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1575; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff80001576; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff1577; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v2, v31578; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v11579; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1580;1581; GFX10-SDAG-LABEL: fmul_select_f16_test1:1582; GFX10-SDAG: ; %bb.0:1583; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1584; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21585; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1586; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v11587; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1588;1589; GFX10-GISEL-LABEL: fmul_select_f16_test1:1590; GFX10-GISEL: ; %bb.0:1591; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1592; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21593; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff1594; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1595; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v21596; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v11597; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1598;1599; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test1:1600; GFX11-SDAG-TRUE16: ; %bb.0:1601; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1602; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21603; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1604; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1605; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l1606; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1607;1608; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test1:1609; GFX11-SDAG-FAKE16: ; %bb.0:1610; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1611; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21612; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1613; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1614; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v11615; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1616;1617; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test1:1618; GFX11-GISEL-TRUE16: ; %bb.0:1619; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1620; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21621; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0x7fff1622; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1623; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1624; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v21625; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l1626; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]1627;1628; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test1:1629; GFX11-GISEL-FAKE16: ; %bb.0:1630; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1631; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21632; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0x7fff1633; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1634; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1635; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v21636; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v11637; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]1638 %bool = icmp eq i32 %bool.arg1, %bool.arg21639 %y = select i1 %bool, half 2.000000e+00, half 1.000000e+001640 %ldexp = fmul half %x, %y1641 ret half %ldexp1642}1643 1644define half @fmul_select_f16_test2(half %x, i32 %bool.arg1, i32 %bool.arg2) {1645; GFX7-SDAG-LABEL: fmul_select_f16_test2:1646; GFX7-SDAG: ; %bb.0:1647; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1648; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v01649; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21650; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc1651; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v01652; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v11653; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1654;1655; GFX7-GISEL-LABEL: fmul_select_f16_test2:1656; GFX7-GISEL: ; %bb.0:1657; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1658; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v01659; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21660; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc1661; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v11662; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v01663; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1664;1665; GFX9-SDAG-LABEL: fmul_select_f16_test2:1666; GFX9-SDAG: ; %bb.0:1667; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1668; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21669; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc1670; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x80001671; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x7fff1672; GFX9-SDAG-NEXT: v_med3_i32 v1, v1, s4, v21673; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v11674; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1675;1676; GFX9-GISEL-LABEL: fmul_select_f16_test2:1677; GFX9-GISEL: ; %bb.0:1678; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1679; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v21680; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc1681; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff80001682; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff1683; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v2, v31684; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v11685; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1686;1687; GFX10-SDAG-LABEL: fmul_select_f16_test2:1688; GFX10-SDAG: ; %bb.0:1689; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1690; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21691; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x80001692; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1693; GFX10-SDAG-NEXT: v_med3_i32 v1, v1, s4, 0x7fff1694; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v11695; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1696;1697; GFX10-GISEL-LABEL: fmul_select_f16_test2:1698; GFX10-GISEL: ; %bb.0:1699; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1700; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21701; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff1702; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1703; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v21704; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v11705; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1706;1707; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test2:1708; GFX11-SDAG-TRUE16: ; %bb.0:1709; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1710; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21711; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x80001712; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1713; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1714; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff1715; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l1716; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1717;1718; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test2:1719; GFX11-SDAG-FAKE16: ; %bb.0:1720; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1721; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21722; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s0, 0x80001723; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1724; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1725; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff1726; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v11727; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1728;1729; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test2:1730; GFX11-GISEL-TRUE16: ; %bb.0:1731; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1732; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21733; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0x7fff1734; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1735; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1736; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v21737; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l1738; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]1739;1740; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test2:1741; GFX11-GISEL-FAKE16: ; %bb.0:1742; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1743; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v21744; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0x7fff1745; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1746; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1747; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v21748; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v11749; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]1750 %bool = icmp eq i32 %bool.arg1, %bool.arg21751 %y = select i1 %bool, half 5.000000e-01, half 1.000000e+001752 %ldexp = fmul half %x, %y1753 ret half %ldexp1754}1755 1756define <2 x half> @fmul_select_v2f16_test3(<2 x half> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {1757; GFX7-SDAG-LABEL: fmul_select_v2f16_test3:1758; GFX7-SDAG: ; %bb.0:1759; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1760; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v11761; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v01762; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v51763; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc1764; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v11765; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v01766; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41767; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc1768; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v31769; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v21770; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1771;1772; GFX7-GISEL-LABEL: fmul_select_v2f16_test3:1773; GFX7-GISEL: ; %bb.0:1774; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1775; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v01776; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v11777; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41778; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1779; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v51780; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc1781; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v21782; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v1, v1, v31783; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v01784; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v11785; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1786;1787; GFX9-SDAG-LABEL: fmul_select_v2f16_test3:1788; GFX9-SDAG: ; %bb.0:1789; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1790; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x3c001791; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x40001792; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41793; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc1794; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v31795; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc1796; GFX9-SDAG-NEXT: v_pack_b32_f16 v1, v1, v21797; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, v11798; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1799;1800; GFX9-GISEL-LABEL: fmul_select_v2f16_test3:1801; GFX9-GISEL: ; %bb.0:1802; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1803; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v31804; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1805; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41806; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc1807; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff80001808; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff1809; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v3, v41810; GFX9-GISEL-NEXT: v_med3_i32 v2, v2, v3, v41811; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v11812; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1813; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v11814; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1815;1816; GFX10-SDAG-LABEL: fmul_select_v2f16_test3:1817; GFX10-SDAG: ; %bb.0:1818; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1819; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 0x40001820; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41821; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo1822; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31823; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo1824; GFX10-SDAG-NEXT: v_pack_b32_f16 v1, v1, v21825; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v0, v11826; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1827;1828; GFX10-GISEL-LABEL: fmul_select_v2f16_test3:1829; GFX10-GISEL: ; %bb.0:1830; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1831; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31832; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff1833; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1834; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41835; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v31836; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1837; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v11838; GFX10-GISEL-NEXT: v_med3_i32 v2, 0xffff8000, v2, v31839; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v11840; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1841; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v11842; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1843;1844; GFX11-SDAG-TRUE16-LABEL: fmul_select_v2f16_test3:1845; GFX11-SDAG-TRUE16: ; %bb.0:1846; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1847; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41848; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0x3c001849; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v1, v31850; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1851; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, 0x4000, vcc_lo1852; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v2.l, 0x4000, s01853; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1854; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v1, v1.h, v1.l1855; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v0, v11856; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1857;1858; GFX11-SDAG-FAKE16-LABEL: fmul_select_v2f16_test3:1859; GFX11-SDAG-FAKE16: ; %bb.0:1860; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1861; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v5, 0x40001862; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41863; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1864; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo1865; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31866; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo1867; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v21868; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1869; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v0, v11870; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1871;1872; GFX11-GISEL-TRUE16-LABEL: fmul_select_v2f16_test3:1873; GFX11-GISEL-TRUE16: ; %bb.0:1874; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1875; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31876; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v3, 0x7fff1877; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1878; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41879; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1880; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v31881; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1882; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l1883; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1884; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v2, 0xffff8000, v2, v31885; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v2.l1886; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]1887;1888; GFX11-GISEL-FAKE16-LABEL: fmul_select_v2f16_test3:1889; GFX11-GISEL-FAKE16: ; %bb.0:1890; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1891; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31892; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x7fff1893; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo1894; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41895; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v01896; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1897; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v31898; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc_lo1899; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v11900; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1901; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v2, 0xffff8000, v2, v31902; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01903; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1904; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v21905; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v01906; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]1907 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg21908 %y = select <2 x i1> %bool, <2 x half> <half 2.000000e+00, half 2.000000e+00>, <2 x half> <half 1.000000e+00, half 1.000000e+00>1909 %ldexp = fmul <2 x half> %x, %y1910 ret <2 x half> %ldexp1911}1912 1913define <2 x half> @fmul_select_v2f16_test4(<2 x half> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {1914; GFX7-SDAG-LABEL: fmul_select_v2f16_test4:1915; GFX7-SDAG: ; %bb.0:1916; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1917; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v11918; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v01919; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v3, v51920; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc1921; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v11922; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v01923; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41924; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc1925; GFX7-SDAG-NEXT: v_mul_f32_e32 v1, v1, v31926; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v21927; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]1928;1929; GFX7-GISEL-LABEL: fmul_select_v2f16_test4:1930; GFX7-GISEL: ; %bb.0:1931; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1932; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v01933; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v11934; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41935; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1936; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v3, v51937; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v3, 0, -1, vcc1938; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v21939; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v1, v1, v31940; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v01941; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v11942; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]1943;1944; GFX9-SDAG-LABEL: fmul_select_v2f16_test4:1945; GFX9-SDAG: ; %bb.0:1946; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1947; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x3c001948; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x38001949; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41950; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v2, v5, v6, vcc1951; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v31952; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc1953; GFX9-SDAG-NEXT: v_pack_b32_f16 v1, v1, v21954; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, v11955; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1956;1957; GFX9-GISEL-LABEL: fmul_select_v2f16_test4:1958; GFX9-GISEL: ; %bb.0:1959; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1960; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v31961; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc1962; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v2, v41963; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc1964; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff80001965; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff1966; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v3, v41967; GFX9-GISEL-NEXT: v_med3_i32 v2, v2, v3, v41968; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v11969; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1970; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v11971; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1972;1973; GFX10-SDAG-LABEL: fmul_select_v2f16_test4:1974; GFX10-SDAG: ; %bb.0:1975; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1976; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 0x38001977; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41978; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo1979; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31980; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo1981; GFX10-SDAG-NEXT: v_pack_b32_f16 v1, v1, v21982; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v0, v11983; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1984;1985; GFX10-GISEL-LABEL: fmul_select_v2f16_test4:1986; GFX10-GISEL: ; %bb.0:1987; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1988; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v31989; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff1990; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo1991; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v41992; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v31993; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo1994; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v1, v0, v11995; GFX10-GISEL-NEXT: v_med3_i32 v2, 0xffff8000, v2, v31996; GFX10-GISEL-NEXT: v_and_b32_e32 v1, 0xffff, v11997; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1998; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v0, 16, v11999; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2000;2001; GFX11-SDAG-TRUE16-LABEL: fmul_select_v2f16_test4:2002; GFX11-SDAG-TRUE16: ; %bb.0:2003; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2004; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v42005; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0x3c002006; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v1, v32007; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2008; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, 0x3800, vcc_lo2009; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v2.l, 0x3800, s02010; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2011; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v1, v1.h, v1.l2012; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v0, v12013; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2014;2015; GFX11-SDAG-FAKE16-LABEL: fmul_select_v2f16_test4:2016; GFX11-SDAG-FAKE16: ; %bb.0:2017; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2018; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v5, 0x38002019; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v42020; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)2021; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x3c00, v5, vcc_lo2022; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v32023; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v5, vcc_lo2024; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v22025; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2026; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v0, v12027; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2028;2029; GFX11-GISEL-TRUE16-LABEL: fmul_select_v2f16_test4:2030; GFX11-GISEL-TRUE16: ; %bb.0:2031; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2032; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v32033; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v3, 0x7fff2034; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo2035; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v42036; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2037; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v32038; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo2039; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2040; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2041; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v2, 0xffff8000, v2, v32042; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v0.h, v2.l2043; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2044;2045; GFX11-GISEL-FAKE16-LABEL: fmul_select_v2f16_test4:2046; GFX11-GISEL-FAKE16: ; %bb.0:2047; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2048; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v32049; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x7fff2050; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo2051; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v42052; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v02053; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2054; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v32055; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v2, 0, -1, vcc_lo2056; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12057; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2058; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v2, 0xffff8000, v2, v32059; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v02060; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2061; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v22062; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v02063; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2064 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg22065 %y = select <2 x i1> %bool, <2 x half> <half 5.000000e-01, half 5.000000e-01>, <2 x half> <half 1.000000e+00, half 1.000000e+00>2066 %ldexp = fmul <2 x half> %x, %y2067 ret <2 x half> %ldexp2068}2069 2070define half @fmul_select_f16_test5(half %x, i32 %bool.arg1, i32 %bool.arg2) {2071; GFX7-SDAG-LABEL: fmul_select_f16_test5:2072; GFX7-SDAG: ; %bb.0:2073; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2074; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02075; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22076; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc2077; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02078; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12079; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2080;2081; GFX7-GISEL-LABEL: fmul_select_f16_test5:2082; GFX7-GISEL: ; %bb.0:2083; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2084; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02085; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22086; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc2087; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12088; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02089; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2090;2091; GFX9-LABEL: fmul_select_f16_test5:2092; GFX9: ; %bb.0:2093; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2094; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22095; GFX9-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc2096; GFX9-NEXT: v_ldexp_f16_e32 v0, v0, v12097; GFX9-NEXT: s_setpc_b64 s[30:31]2098;2099; GFX10-LABEL: fmul_select_f16_test5:2100; GFX10: ; %bb.0:2101; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2102; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22103; GFX10-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo2104; GFX10-NEXT: v_ldexp_f16_e32 v0, v0, v12105; GFX10-NEXT: s_setpc_b64 s[30:31]2106;2107; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test5:2108; GFX11-SDAG-TRUE16: ; %bb.0:2109; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2110; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22111; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo2112; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2113; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2114; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2115;2116; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test5:2117; GFX11-SDAG-FAKE16: ; %bb.0:2118; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2119; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22120; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo2121; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2122; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12123; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2124;2125; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test5:2126; GFX11-GISEL-TRUE16: ; %bb.0:2127; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2128; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22129; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo2130; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2131; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2132; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2133;2134; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test5:2135; GFX11-GISEL-FAKE16: ; %bb.0:2136; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2137; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22138; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 3, 1, vcc_lo2139; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2140; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12141; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2142 %bool = icmp eq i32 %bool.arg1, %bool.arg22143 %y = select i1 %bool, half 2.000000e+00, half 8.000000e+002144 %ldexp = fmul half %x, %y2145 ret half %ldexp2146}2147 2148define half @fmul_select_f16_test6(half %x, i32 %bool.arg1, i32 %bool.arg2) {2149; GFX7-SDAG-LABEL: fmul_select_f16_test6:2150; GFX7-SDAG: ; %bb.0:2151; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2152; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02153; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x404000002154; GFX7-SDAG-NEXT: v_mov_b32_e32 v4, 0xc10000002155; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22156; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02157; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2158; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v12159; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2160;2161; GFX7-GISEL-LABEL: fmul_select_f16_test6:2162; GFX7-GISEL: ; %bb.0:2163; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2164; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0xc8002165; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0x42002166; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22167; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc2168; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02169; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v12170; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v12171; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02172; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2173;2174; GFX9-SDAG-LABEL: fmul_select_f16_test6:2175; GFX9-SDAG: ; %bb.0:2176; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2177; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x42002178; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xc8002179; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22180; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2181; GFX9-SDAG-NEXT: v_mul_f16_e32 v0, v0, v12182; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2183;2184; GFX9-GISEL-LABEL: fmul_select_f16_test6:2185; GFX9-GISEL: ; %bb.0:2186; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2187; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc8002188; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x42002189; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22190; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc2191; GFX9-GISEL-NEXT: v_mul_f16_e32 v0, v0, v12192; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2193;2194; GFX10-SDAG-LABEL: fmul_select_f16_test6:2195; GFX10-SDAG: ; %bb.0:2196; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2197; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xc8002198; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22199; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x4200, v3, vcc_lo2200; GFX10-SDAG-NEXT: v_mul_f16_e32 v0, v0, v12201; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2202;2203; GFX10-GISEL-LABEL: fmul_select_f16_test6:2204; GFX10-GISEL: ; %bb.0:2205; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2206; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x42002207; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22208; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0xc800, vcc_lo2209; GFX10-GISEL-NEXT: v_mul_f16_e32 v0, v0, v12210; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2211;2212; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test6:2213; GFX11-SDAG-TRUE16: ; %bb.0:2214; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2215; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x42002216; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22217; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2218; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, 0xc800, vcc_lo2219; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l2220; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2221;2222; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test6:2223; GFX11-SDAG-FAKE16: ; %bb.0:2224; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2225; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc8002226; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22227; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2228; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4200, v3, vcc_lo2229; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v12230; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2231;2232; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test6:2233; GFX11-GISEL-TRUE16: ; %bb.0:2234; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2235; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22236; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0x42002237; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2238; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, 0xc800, vcc_lo2239; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v0.h2240; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2241;2242; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test6:2243; GFX11-GISEL-FAKE16: ; %bb.0:2244; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2245; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x42002246; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22247; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2248; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, v3, 0xc800, vcc_lo2249; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v12250; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2251 %bool = icmp eq i32 %bool.arg1, %bool.arg22252 %y = select i1 %bool, half -8.000000e+00, half 3.000000e+002253 %ldexp = fmul half %x, %y2254 ret half %ldexp2255}2256 2257define half @fmul_select_f16_test7(half %x, i32 %bool.arg1, i32 %bool.arg2) {2258; GFX7-SDAG-LABEL: fmul_select_f16_test7:2259; GFX7-SDAG: ; %bb.0:2260; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2261; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02262; GFX7-SDAG-NEXT: v_mov_b32_e32 v3, 0x410000002263; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22264; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, -4.0, v3, vcc2265; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02266; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v12267; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2268;2269; GFX7-GISEL-LABEL: fmul_select_f16_test7:2270; GFX7-GISEL: ; %bb.0:2271; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2272; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0x48002273; GFX7-GISEL-NEXT: v_mov_b32_e32 v4, 0xc4002274; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22275; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc2276; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02277; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v12278; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v12279; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02280; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2281;2282; GFX9-SDAG-LABEL: fmul_select_f16_test7:2283; GFX9-SDAG: ; %bb.0:2284; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2285; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xc4002286; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x48002287; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22288; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2289; GFX9-SDAG-NEXT: v_mul_f16_e32 v0, v0, v12290; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2291;2292; GFX9-GISEL-LABEL: fmul_select_f16_test7:2293; GFX9-GISEL: ; %bb.0:2294; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2295; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x48002296; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xc4002297; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22298; GFX9-GISEL-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc2299; GFX9-GISEL-NEXT: v_mul_f16_e32 v0, v0, v12300; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2301;2302; GFX10-SDAG-LABEL: fmul_select_f16_test7:2303; GFX10-SDAG: ; %bb.0:2304; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2305; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x48002306; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22307; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xc400, v3, vcc_lo2308; GFX10-SDAG-NEXT: v_mul_f16_e32 v0, v0, v12309; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2310;2311; GFX10-GISEL-LABEL: fmul_select_f16_test7:2312; GFX10-GISEL: ; %bb.0:2313; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2314; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0xc4002315; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22316; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, v3, 0x4800, vcc_lo2317; GFX10-GISEL-NEXT: v_mul_f16_e32 v0, v0, v12318; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2319;2320; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test7:2321; GFX11-SDAG-TRUE16: ; %bb.0:2322; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2323; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xc4002324; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22325; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2326; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, 0x4800, vcc_lo2327; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l2328; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2329;2330; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test7:2331; GFX11-SDAG-FAKE16: ; %bb.0:2332; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2333; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x48002334; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22335; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2336; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xc400, v3, vcc_lo2337; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v12338; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2339;2340; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test7:2341; GFX11-GISEL-TRUE16: ; %bb.0:2342; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2343; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22344; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0xc4002345; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2346; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, 0x4800, vcc_lo2347; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v0.h2348; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2349;2350; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test7:2351; GFX11-GISEL-FAKE16: ; %bb.0:2352; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2353; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0xc4002354; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22355; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2356; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, v3, 0x4800, vcc_lo2357; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v12358; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2359 %bool = icmp eq i32 %bool.arg1, %bool.arg22360 %y = select i1 %bool, half 8.000000e+00, half -4.000000e+002361 %ldexp = fmul half %x, %y2362 ret half %ldexp2363}2364 2365define half @fmul_select_f16_test8(half %x, i32 %bool.arg1, i32 %bool.arg2) {2366; GFX7-SDAG-LABEL: fmul_select_f16_test8:2367; GFX7-SDAG: ; %bb.0:2368; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2369; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02370; GFX7-SDAG-NEXT: v_bfrev_b32_e32 v3, 12371; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22372; GFX7-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc2373; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02374; GFX7-SDAG-NEXT: v_mul_f32_e32 v0, v0, v12375; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2376;2377; GFX7-GISEL-LABEL: fmul_select_f16_test8:2378; GFX7-GISEL: ; %bb.0:2379; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2380; GFX7-GISEL-NEXT: v_mov_b32_e32 v3, 0x80002381; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22382; GFX7-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc2383; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02384; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v12385; GFX7-GISEL-NEXT: v_mul_f32_e32 v0, v0, v12386; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02387; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2388;2389; GFX9-LABEL: fmul_select_f16_test8:2390; GFX9: ; %bb.0:2391; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2392; GFX9-NEXT: v_mov_b32_e32 v3, 0x80002393; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22394; GFX9-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc2395; GFX9-NEXT: v_mul_f16_e32 v0, v0, v12396; GFX9-NEXT: s_setpc_b64 s[30:31]2397;2398; GFX10-LABEL: fmul_select_f16_test8:2399; GFX10: ; %bb.0:2400; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2401; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22402; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0x8000, vcc_lo2403; GFX10-NEXT: v_mul_f16_e32 v0, v0, v12404; GFX10-NEXT: s_setpc_b64 s[30:31]2405;2406; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test8:2407; GFX11-SDAG-TRUE16: ; %bb.0:2408; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2409; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22410; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, 0, 0x8000, vcc_lo2411; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2412; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l2413; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2414;2415; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test8:2416; GFX11-SDAG-FAKE16: ; %bb.0:2417; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2418; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22419; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x8000, vcc_lo2420; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2421; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v12422; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2423;2424; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test8:2425; GFX11-GISEL-TRUE16: ; %bb.0:2426; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2427; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22428; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, 0, 0x8000, vcc_lo2429; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2430; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v0.h2431; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2432;2433; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test8:2434; GFX11-GISEL-FAKE16: ; %bb.0:2435; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2436; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22437; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0x8000, vcc_lo2438; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2439; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v12440; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2441 %bool = icmp eq i32 %bool.arg1, %bool.arg22442 %y = select i1 %bool, half -0.000000e+00, half 0.000000e+002443 %ldexp = fmul half %x, %y2444 ret half %ldexp2445}2446 2447define half @fmul_select_f16_test9(half %x, i32 %bool.arg1, i32 %bool.arg2) {2448; GFX7-SDAG-LABEL: fmul_select_f16_test9:2449; GFX7-SDAG: ; %bb.0:2450; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2451; GFX7-SDAG-NEXT: v_cvt_f16_f32_e64 v0, -v02452; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22453; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc2454; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02455; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12456; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2457;2458; GFX7-GISEL-LABEL: fmul_select_f16_test9:2459; GFX7-GISEL: ; %bb.0:2460; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2461; GFX7-GISEL-NEXT: v_cvt_f32_f16_e64 v0, -v02462; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22463; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc2464; GFX7-GISEL-NEXT: v_add_i32_e32 v1, vcc, 5, v12465; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12466; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02467; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2468;2469; GFX9-SDAG-LABEL: fmul_select_f16_test9:2470; GFX9-SDAG: ; %bb.0:2471; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2472; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22473; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc2474; GFX9-SDAG-NEXT: v_ldexp_f16_e64 v0, -v0, v12475; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2476;2477; GFX9-GISEL-LABEL: fmul_select_f16_test9:2478; GFX9-GISEL: ; %bb.0:2479; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2480; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22481; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc2482; GFX9-GISEL-NEXT: v_add_u32_e32 v1, 5, v12483; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff80002484; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff2485; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v2, v32486; GFX9-GISEL-NEXT: v_ldexp_f16_e64 v0, -v0, v12487; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2488;2489; GFX10-SDAG-LABEL: fmul_select_f16_test9:2490; GFX10-SDAG: ; %bb.0:2491; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2492; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22493; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc_lo2494; GFX10-SDAG-NEXT: v_ldexp_f16_e64 v0, -v0, v12495; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2496;2497; GFX10-GISEL-LABEL: fmul_select_f16_test9:2498; GFX10-GISEL: ; %bb.0:2499; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2500; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22501; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff2502; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo2503; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v1, 5, v12504; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v22505; GFX10-GISEL-NEXT: v_ldexp_f16_e64 v0, -v0, v12506; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2507;2508; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test9:2509; GFX11-SDAG-TRUE16: ; %bb.0:2510; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2511; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22512; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc_lo2513; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2514; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v0.l, v1.l2515; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2516;2517; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test9:2518; GFX11-SDAG-FAKE16: ; %bb.0:2519; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2520; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22521; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 5, 4, vcc_lo2522; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2523; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v0, v12524; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2525;2526; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test9:2527; GFX11-GISEL-TRUE16: ; %bb.0:2528; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2529; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22530; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0x7fff2531; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo2532; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2533; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v1, 5, v12534; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v22535; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2536; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v0.l, v1.l2537; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2538;2539; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test9:2540; GFX11-GISEL-FAKE16: ; %bb.0:2541; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2542; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22543; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0x7fff2544; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo2545; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2546; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v1, 5, v12547; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v22548; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2549; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v0, v12550; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2551 %bool = icmp eq i32 %bool.arg1, %bool.arg22552 %y = select i1 %bool, half -1.600000e+01, half -3.200000e+012553 %ldexp = fmul half %x, %y2554 ret half %ldexp2555}2556 2557define half @fmul_select_f16_test10_sel_log2val_neg11_pos11(half %x, i32 %bool.arg1, i32 %bool.arg2) {2558; GFX7-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2559; GFX7-SDAG: ; %bb.0:2560; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2561; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02562; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22563; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc2564; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02565; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12566; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2567;2568; GFX7-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2569; GFX7-GISEL: ; %bb.0:2570; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2571; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02572; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22573; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc2574; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12575; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02576; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2577;2578; GFX9-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2579; GFX9-SDAG: ; %bb.0:2580; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2581; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22582; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc2583; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x80002584; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x7fff2585; GFX9-SDAG-NEXT: v_med3_i32 v1, v1, s4, v22586; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v12587; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2588;2589; GFX9-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2590; GFX9-GISEL: ; %bb.0:2591; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2592; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22593; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc2594; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v12595; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2596;2597; GFX10-SDAG-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2598; GFX10-SDAG: ; %bb.0:2599; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2600; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22601; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x80002602; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo2603; GFX10-SDAG-NEXT: v_med3_i32 v1, v1, s4, 0x7fff2604; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v12605; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2606;2607; GFX10-GISEL-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2608; GFX10-GISEL: ; %bb.0:2609; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2610; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22611; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo2612; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v12613; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2614;2615; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2616; GFX11-SDAG-TRUE16: ; %bb.0:2617; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2618; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22619; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x80002620; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo2621; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2622; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff2623; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2624; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2625;2626; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2627; GFX11-SDAG-FAKE16: ; %bb.0:2628; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2629; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22630; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s0, 0x80002631; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo2632; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2633; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff2634; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12635; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2636;2637; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2638; GFX11-GISEL-TRUE16: ; %bb.0:2639; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2640; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22641; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo2642; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2643; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2644; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2645;2646; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test10_sel_log2val_neg11_pos11:2647; GFX11-GISEL-FAKE16: ; %bb.0:2648; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2649; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22650; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 11, -11, vcc_lo2651; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2652; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12653; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2654 %bool = icmp eq i32 %bool.arg1, %bool.arg22655 %y = select i1 %bool, half 0xH1000, half 0xH68002656 %ldexp = fmul half %x, %y2657 ret half %ldexp2658}2659 2660define half @fmul_select_f16_test11_sel_log2val_pos7_neg14(half %x, i32 %bool.arg1, i32 %bool.arg2) {2661; GFX7-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2662; GFX7-SDAG: ; %bb.0:2663; GFX7-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2664; GFX7-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v02665; GFX7-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22666; GFX7-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc2667; GFX7-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v02668; GFX7-SDAG-NEXT: v_ldexp_f32_e32 v0, v0, v12669; GFX7-SDAG-NEXT: s_setpc_b64 s[30:31]2670;2671; GFX7-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2672; GFX7-GISEL: ; %bb.0:2673; GFX7-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2674; GFX7-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v02675; GFX7-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22676; GFX7-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc2677; GFX7-GISEL-NEXT: v_ldexp_f32_e32 v0, v0, v12678; GFX7-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v02679; GFX7-GISEL-NEXT: s_setpc_b64 s[30:31]2680;2681; GFX9-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2682; GFX9-SDAG: ; %bb.0:2683; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2684; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22685; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc2686; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x80002687; GFX9-SDAG-NEXT: v_mov_b32_e32 v2, 0x7fff2688; GFX9-SDAG-NEXT: v_med3_i32 v1, v1, s4, v22689; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v12690; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2691;2692; GFX9-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2693; GFX9-GISEL: ; %bb.0:2694; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2695; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22696; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc2697; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v12698; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2699;2700; GFX10-SDAG-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2701; GFX10-SDAG: ; %bb.0:2702; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2703; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22704; GFX10-SDAG-NEXT: s_movk_i32 s4, 0x80002705; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo2706; GFX10-SDAG-NEXT: v_med3_i32 v1, v1, s4, 0x7fff2707; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v0, v12708; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2709;2710; GFX10-GISEL-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2711; GFX10-GISEL: ; %bb.0:2712; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2713; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22714; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo2715; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v0, v12716; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2717;2718; GFX11-SDAG-TRUE16-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2719; GFX11-SDAG-TRUE16: ; %bb.0:2720; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2721; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22722; GFX11-SDAG-TRUE16-NEXT: s_movk_i32 s0, 0x80002723; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo2724; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2725; GFX11-SDAG-TRUE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff2726; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2727; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2728;2729; GFX11-SDAG-FAKE16-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2730; GFX11-SDAG-FAKE16: ; %bb.0:2731; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2732; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22733; GFX11-SDAG-FAKE16-NEXT: s_movk_i32 s0, 0x80002734; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo2735; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2736; GFX11-SDAG-FAKE16-NEXT: v_med3_i32 v1, v1, s0, 0x7fff2737; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12738; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2739;2740; GFX11-GISEL-TRUE16-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2741; GFX11-GISEL-TRUE16: ; %bb.0:2742; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2743; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22744; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo2745; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2746; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v0.l, v1.l2747; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2748;2749; GFX11-GISEL-FAKE16-LABEL: fmul_select_f16_test11_sel_log2val_pos7_neg14:2750; GFX11-GISEL-FAKE16: ; %bb.0:2751; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2752; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22753; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, -14, 7, vcc_lo2754; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2755; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v0, v12756; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2757 %bool = icmp eq i32 %bool.arg1, %bool.arg22758 %y = select i1 %bool, half 0xH5800, half 0xH04002759 %ldexp = fmul half %x, %y2760 ret half %ldexp2761}2762 2763define bfloat @fmul_select_bf16_test1(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {2764; GFX7-LABEL: fmul_select_bf16_test1:2765; GFX7: ; %bb.0:2766; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2767; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v02768; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22769; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 2.0, vcc2770; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02771; GFX7-NEXT: v_mul_f32_e32 v0, v0, v12772; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02773; GFX7-NEXT: s_setpc_b64 s[30:31]2774;2775; GFX9-LABEL: fmul_select_bf16_test1:2776; GFX9: ; %bb.0:2777; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2778; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22779; GFX9-NEXT: v_mov_b32_e32 v1, 0x3f802780; GFX9-NEXT: v_mov_b32_e32 v2, 0x40002781; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2782; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v02783; GFX9-NEXT: v_mul_f32_e32 v0, v0, v12784; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 12785; GFX9-NEXT: s_movk_i32 s4, 0x7fff2786; GFX9-NEXT: v_add3_u32 v1, v1, v0, s42787; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v02788; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02789; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc2790; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v02791; GFX9-NEXT: s_setpc_b64 s[30:31]2792;2793; GFX10-LABEL: fmul_select_bf16_test1:2794; GFX10: ; %bb.0:2795; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2796; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22797; GFX10-NEXT: v_mov_b32_e32 v1, 0x40002798; GFX10-NEXT: v_mov_b32_e32 v2, 0x3f802799; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v02800; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2801; GFX10-NEXT: v_mul_f32_e32 v0, v0, v12802; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 12803; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v02804; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02805; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2806; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2807; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v02808; GFX10-NEXT: s_setpc_b64 s[30:31]2809;2810; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test1:2811; GFX11-SDAG-TRUE16: ; %bb.0:2812; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2813; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x3f802814; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 02815; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22816; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l2817; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2818; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l2819; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x4000, vcc_lo2820; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v02821; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)2822; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 12823; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v02824; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02825; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2826; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2827; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2828; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h2829; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2830;2831; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test1:2832; GFX11-SDAG-FAKE16: ; %bb.0:2833; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2834; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0x4000 :: v_dual_lshlrev_b32 v0, 16, v02835; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22836; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2837; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo2838; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v12839; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2840; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v12841; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 12842; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v02843; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02844; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2845; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2846; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2847; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2848; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v02849; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2850;2851; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test1:2852; GFX11-GISEL-TRUE16: ; %bb.0:2853; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2854; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x3f802855; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 02856; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22857; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l2858; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2859; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l2860; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x4000, vcc_lo2861; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v02862; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)2863; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 12864; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v02865; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02866; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2867; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2868; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2869; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h2870; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2871;2872; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test1:2873; GFX11-GISEL-FAKE16: ; %bb.0:2874; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2875; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0x4000 :: v_dual_lshlrev_b32 v0, 16, v02876; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22877; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2878; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo2879; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v12880; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2881; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v12882; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 12883; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v02884; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02885; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2886; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2887; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2888; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2889; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v02890; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2891 %bool = icmp eq i32 %bool.arg1, %bool.arg22892 %y = select i1 %bool, bfloat 2.000000e+00, bfloat 1.000000e+002893 %ldexp = fmul bfloat %x, %y2894 ret bfloat %ldexp2895}2896 2897define bfloat @fmul_select_bf16_test2(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {2898; GFX7-LABEL: fmul_select_bf16_test2:2899; GFX7: ; %bb.0:2900; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2901; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v02902; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22903; GFX7-NEXT: v_cndmask_b32_e64 v1, 1.0, 0.5, vcc2904; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02905; GFX7-NEXT: v_mul_f32_e32 v0, v0, v12906; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02907; GFX7-NEXT: s_setpc_b64 s[30:31]2908;2909; GFX9-LABEL: fmul_select_bf16_test2:2910; GFX9: ; %bb.0:2911; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2912; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v22913; GFX9-NEXT: v_mov_b32_e32 v1, 0x3f802914; GFX9-NEXT: v_mov_b32_e32 v2, 0x3f002915; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2916; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v02917; GFX9-NEXT: v_mul_f32_e32 v0, v0, v12918; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 12919; GFX9-NEXT: s_movk_i32 s4, 0x7fff2920; GFX9-NEXT: v_add3_u32 v1, v1, v0, s42921; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v02922; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v02923; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc2924; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v02925; GFX9-NEXT: s_setpc_b64 s[30:31]2926;2927; GFX10-LABEL: fmul_select_bf16_test2:2928; GFX10: ; %bb.0:2929; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2930; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22931; GFX10-NEXT: v_mov_b32_e32 v1, 0x3f002932; GFX10-NEXT: v_mov_b32_e32 v2, 0x3f802933; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v02934; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD2935; GFX10-NEXT: v_mul_f32_e32 v0, v0, v12936; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 12937; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v02938; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02939; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2940; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2941; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v02942; GFX10-NEXT: s_setpc_b64 s[30:31]2943;2944; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test2:2945; GFX11-SDAG-TRUE16: ; %bb.0:2946; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2947; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x3f802948; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 02949; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22950; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l2951; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2952; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l2953; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x3f00, vcc_lo2954; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v02955; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)2956; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 12957; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v02958; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02959; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2960; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2961; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2962; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h2963; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2964;2965; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test2:2966; GFX11-SDAG-FAKE16: ; %bb.0:2967; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2968; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0x3f00 :: v_dual_lshlrev_b32 v0, 16, v02969; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22970; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2971; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo2972; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v12973; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2974; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v12975; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 12976; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v02977; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v02978; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2979; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff2980; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo2981; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2982; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v02983; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2984;2985; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test2:2986; GFX11-GISEL-TRUE16: ; %bb.0:2987; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2988; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x3f802989; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 02990; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v22991; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l2992; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2993; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l2994; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x3f00, vcc_lo2995; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v02996; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)2997; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 12998; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v02999; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03000; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3001; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3002; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3003; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3004; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3005;3006; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test2:3007; GFX11-GISEL-FAKE16: ; %bb.0:3008; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3009; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0x3f00 :: v_dual_lshlrev_b32 v0, 16, v03010; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23011; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3012; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v3, vcc_lo3013; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13014; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3015; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13016; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13017; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03018; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03019; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3020; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3021; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3022; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3023; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03024; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3025 %bool = icmp eq i32 %bool.arg1, %bool.arg23026 %y = select i1 %bool, bfloat 5.000000e-01, bfloat 1.000000e+003027 %ldexp = fmul bfloat %x, %y3028 ret bfloat %ldexp3029}3030 3031define <2 x bfloat> @fmul_select_v2bf16_test3(<2 x bfloat> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {3032; GFX7-LABEL: fmul_select_v2bf16_test3:3033; GFX7: ; %bb.0:3034; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3035; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v43036; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03037; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v13038; GFX7-NEXT: v_cndmask_b32_e64 v2, 1.0, 2.0, vcc3039; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v3, v53040; GFX7-NEXT: v_cndmask_b32_e64 v3, 1.0, 2.0, vcc3041; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v13042; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03043; GFX7-NEXT: v_mul_f32_e32 v1, v1, v33044; GFX7-NEXT: v_mul_f32_e32 v0, v0, v23045; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03046; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v13047; GFX7-NEXT: s_setpc_b64 s[30:31]3048;3049; GFX9-LABEL: fmul_select_v2bf16_test3:3050; GFX9: ; %bb.0:3051; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3052; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v33053; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v43054; GFX9-NEXT: v_mov_b32_e32 v1, 0x3f803055; GFX9-NEXT: v_mov_b32_e32 v2, 0x40003056; GFX9-NEXT: v_cndmask_b32_sdwa v3, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3057; GFX9-NEXT: s_mov_b64 vcc, s[4:5]3058; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3059; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v03060; GFX9-NEXT: v_mul_f32_e32 v1, v2, v13061; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 13062; GFX9-NEXT: s_movk_i32 s4, 0x7fff3063; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v03064; GFX9-NEXT: v_add3_u32 v2, v2, v1, s43065; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v13066; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v13067; GFX9-NEXT: v_mul_f32_e32 v0, v0, v33068; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc3069; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 13070; GFX9-NEXT: v_add3_u32 v2, v2, v0, s43071; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v03072; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v03073; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc3074; GFX9-NEXT: s_mov_b32 s4, 0x70603023075; GFX9-NEXT: v_perm_b32 v0, v0, v1, s43076; GFX9-NEXT: s_setpc_b64 s[30:31]3077;3078; GFX10-LABEL: fmul_select_v2bf16_test3:3079; GFX10: ; %bb.0:3080; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3081; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43082; GFX10-NEXT: v_mov_b32_e32 v2, 0x40003083; GFX10-NEXT: v_mov_b32_e32 v4, 0x3f803084; GFX10-NEXT: v_cmp_eq_u32_e64 s4, v1, v33085; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v03086; GFX10-NEXT: v_and_b32_e32 v0, 0xffff0000, v03087; GFX10-NEXT: v_cndmask_b32_sdwa v3, v4, v2, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3088; GFX10-NEXT: s_mov_b32 vcc_lo, s43089; GFX10-NEXT: v_cndmask_b32_sdwa v2, v4, v2, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3090; GFX10-NEXT: v_mul_f32_e32 v0, v0, v33091; GFX10-NEXT: v_mul_f32_e32 v1, v1, v23092; GFX10-NEXT: v_bfe_u32 v3, v0, 16, 13093; GFX10-NEXT: v_or_b32_e32 v5, 0x400000, v03094; GFX10-NEXT: v_bfe_u32 v2, v1, 16, 13095; GFX10-NEXT: v_or_b32_e32 v4, 0x400000, v13096; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v13097; GFX10-NEXT: v_add3_u32 v3, v3, v0, 0x7fff3098; GFX10-NEXT: v_add3_u32 v2, v2, v1, 0x7fff3099; GFX10-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo3100; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03101; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3102; GFX10-NEXT: v_perm_b32 v0, v0, v1, 0x70603023103; GFX10-NEXT: s_setpc_b64 s[30:31]3104;3105; GFX11-SDAG-TRUE16-LABEL: fmul_select_v2bf16_test3:3106; GFX11-SDAG-TRUE16: ; %bb.0:3107; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3108; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43109; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0x3f803110; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v1, v33111; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 03112; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v03113; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v03114; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.l, 0x4000, vcc_lo3115; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, 0x4000, s03116; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3117; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v2, v4, v33118; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l3119; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3120; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v33121; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13122; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v03123; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03124; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3125; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3126; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo3127; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 13128; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v23129; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v23130; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3131; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff3132; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3133; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h3134; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3135;3136; GFX11-SDAG-FAKE16-LABEL: fmul_select_v2bf16_test3:3137; GFX11-SDAG-FAKE16: ; %bb.0:3138; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3139; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v5, 0x40003140; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v33141; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v03142; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v03143; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)3144; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo3145; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43146; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo3147; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v23148; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3149; GFX11-SDAG-FAKE16-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_lshlrev_b32 v1, 16, v13150; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v03151; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)3152; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v1, v3, v13153; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 13154; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v1, 16, 13155; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v13156; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v13157; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)3158; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff3159; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff3160; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)3161; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo3162; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03163; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3164; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3165; GFX11-SDAG-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0x70603023166; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3167;3168; GFX11-GISEL-TRUE16-LABEL: fmul_select_v2bf16_test3:3169; GFX11-GISEL-TRUE16: ; %bb.0:3170; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3171; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43172; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0x3f803173; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v1, v33174; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 03175; GFX11-GISEL-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v03176; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v03177; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.l, 0x4000, vcc_lo3178; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, 0x4000, s03179; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3180; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v2, v4, v33181; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l3182; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3183; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v33184; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13185; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v03186; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03187; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3188; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3189; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo3190; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 13191; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v23192; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v23193; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3194; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff3195; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3196; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h3197; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3198;3199; GFX11-GISEL-FAKE16-LABEL: fmul_select_v2bf16_test3:3200; GFX11-GISEL-FAKE16: ; %bb.0:3201; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3202; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v5, 0x40003203; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v33204; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v03205; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v03206; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)3207; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo3208; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43209; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo3210; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v23211; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3212; GFX11-GISEL-FAKE16-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_lshlrev_b32 v1, 16, v13213; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v03214; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)3215; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v1, v3, v13216; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 13217; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v2, v1, 16, 13218; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v13219; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v13220; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)3221; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff3222; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff3223; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)3224; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo3225; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03226; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3227; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3228; GFX11-GISEL-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0x70603023229; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3230 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg23231 %y = select <2 x i1> %bool, <2 x bfloat> <bfloat 2.000000e+00, bfloat 2.000000e+00>, <2 x bfloat> <bfloat 1.000000e+00, bfloat 1.000000e+00>3232 %ldexp = fmul <2 x bfloat> %x, %y3233 ret <2 x bfloat> %ldexp3234}3235 3236define <2 x bfloat> @fmul_select_v2bf16_test4(<2 x bfloat> %x, <2 x i32> %bool.arg1, <2 x i32> %bool.arg2) {3237; GFX7-LABEL: fmul_select_v2bf16_test4:3238; GFX7: ; %bb.0:3239; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3240; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v2, v43241; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03242; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v13243; GFX7-NEXT: v_cndmask_b32_e64 v2, 1.0, 0.5, vcc3244; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v3, v53245; GFX7-NEXT: v_cndmask_b32_e64 v3, 1.0, 0.5, vcc3246; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v13247; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03248; GFX7-NEXT: v_mul_f32_e32 v1, v1, v33249; GFX7-NEXT: v_mul_f32_e32 v0, v0, v23250; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03251; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v13252; GFX7-NEXT: s_setpc_b64 s[30:31]3253;3254; GFX9-LABEL: fmul_select_v2bf16_test4:3255; GFX9: ; %bb.0:3256; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3257; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], v1, v33258; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v2, v43259; GFX9-NEXT: v_mov_b32_e32 v1, 0x3f803260; GFX9-NEXT: v_mov_b32_e32 v2, 0x3f003261; GFX9-NEXT: v_cndmask_b32_sdwa v3, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3262; GFX9-NEXT: s_mov_b64 vcc, s[4:5]3263; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3264; GFX9-NEXT: v_lshlrev_b32_e32 v2, 16, v03265; GFX9-NEXT: v_mul_f32_e32 v1, v2, v13266; GFX9-NEXT: v_bfe_u32 v2, v1, 16, 13267; GFX9-NEXT: s_movk_i32 s4, 0x7fff3268; GFX9-NEXT: v_and_b32_e32 v0, 0xffff0000, v03269; GFX9-NEXT: v_add3_u32 v2, v2, v1, s43270; GFX9-NEXT: v_or_b32_e32 v4, 0x400000, v13271; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v1, v13272; GFX9-NEXT: v_mul_f32_e32 v0, v0, v33273; GFX9-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc3274; GFX9-NEXT: v_bfe_u32 v2, v0, 16, 13275; GFX9-NEXT: v_add3_u32 v2, v2, v0, s43276; GFX9-NEXT: v_or_b32_e32 v3, 0x400000, v03277; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v03278; GFX9-NEXT: v_cndmask_b32_e32 v0, v2, v3, vcc3279; GFX9-NEXT: s_mov_b32 s4, 0x70603023280; GFX9-NEXT: v_perm_b32 v0, v0, v1, s43281; GFX9-NEXT: s_setpc_b64 s[30:31]3282;3283; GFX10-LABEL: fmul_select_v2bf16_test4:3284; GFX10: ; %bb.0:3285; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3286; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43287; GFX10-NEXT: v_mov_b32_e32 v2, 0x3f003288; GFX10-NEXT: v_mov_b32_e32 v4, 0x3f803289; GFX10-NEXT: v_cmp_eq_u32_e64 s4, v1, v33290; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v03291; GFX10-NEXT: v_and_b32_e32 v0, 0xffff0000, v03292; GFX10-NEXT: v_cndmask_b32_sdwa v3, v4, v2, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3293; GFX10-NEXT: s_mov_b32 vcc_lo, s43294; GFX10-NEXT: v_cndmask_b32_sdwa v2, v4, v2, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3295; GFX10-NEXT: v_mul_f32_e32 v0, v0, v33296; GFX10-NEXT: v_mul_f32_e32 v1, v1, v23297; GFX10-NEXT: v_bfe_u32 v3, v0, 16, 13298; GFX10-NEXT: v_or_b32_e32 v5, 0x400000, v03299; GFX10-NEXT: v_bfe_u32 v2, v1, 16, 13300; GFX10-NEXT: v_or_b32_e32 v4, 0x400000, v13301; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v13302; GFX10-NEXT: v_add3_u32 v3, v3, v0, 0x7fff3303; GFX10-NEXT: v_add3_u32 v2, v2, v1, 0x7fff3304; GFX10-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo3305; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03306; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3307; GFX10-NEXT: v_perm_b32 v0, v0, v1, 0x70603023308; GFX10-NEXT: s_setpc_b64 s[30:31]3309;3310; GFX11-SDAG-TRUE16-LABEL: fmul_select_v2bf16_test4:3311; GFX11-SDAG-TRUE16: ; %bb.0:3312; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3313; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43314; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0x3f803315; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v1, v33316; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 03317; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v03318; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v03319; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.l, 0x3f00, vcc_lo3320; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, 0x3f00, s03321; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3322; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v2, v4, v33323; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l3324; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3325; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v33326; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13327; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v03328; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03329; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3330; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3331; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo3332; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 13333; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v23334; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v23335; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3336; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff3337; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3338; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h3339; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3340;3341; GFX11-SDAG-FAKE16-LABEL: fmul_select_v2bf16_test4:3342; GFX11-SDAG-FAKE16: ; %bb.0:3343; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3344; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v5, 0x3f003345; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v33346; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v03347; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v03348; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)3349; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo3350; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43351; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo3352; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v23353; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3354; GFX11-SDAG-FAKE16-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_lshlrev_b32 v1, 16, v13355; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v03356; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)3357; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v1, v3, v13358; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 13359; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v2, v1, 16, 13360; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v13361; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v13362; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)3363; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff3364; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff3365; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)3366; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo3367; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03368; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3369; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3370; GFX11-SDAG-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0x70603023371; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3372;3373; GFX11-GISEL-TRUE16-LABEL: fmul_select_v2bf16_test4:3374; GFX11-GISEL-TRUE16: ; %bb.0:3375; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3376; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43377; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v2.l, 0x3f803378; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, v1, v33379; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 03380; GFX11-GISEL-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v03381; GFX11-GISEL-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 16, v03382; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.l, 0x3f00, vcc_lo3383; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v1.l, v2.l, 0x3f00, s03384; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3385; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v2, v4, v33386; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l3387; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3388; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v0, v33389; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13390; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v4, 0x400000, v03391; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03392; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3393; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3394; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo3395; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 13396; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v23397; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v23398; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3399; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v3, v3, v2, 0x7fff3400; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3401; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.h3402; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3403;3404; GFX11-GISEL-FAKE16-LABEL: fmul_select_v2bf16_test4:3405; GFX11-GISEL-FAKE16: ; %bb.0:3406; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3407; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v5, 0x3f003408; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v33409; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v03410; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff0000, v03411; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)3412; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3f80, v5, vcc_lo3413; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v2, v43414; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v2, 0x3f80, v5, vcc_lo3415; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v23416; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3417; GFX11-GISEL-FAKE16-NEXT: v_dual_mul_f32 v0, v0, v2 :: v_dual_lshlrev_b32 v1, 16, v13418; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v03419; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)3420; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v1, v3, v13421; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v3, v0, 16, 13422; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v2, v1, 16, 13423; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v13424; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v13425; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)3426; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v3, v3, v0, 0x7fff3427; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v2, v2, v1, 0x7fff3428; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)3429; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo3430; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03431; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v5, vcc_lo3432; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3433; GFX11-GISEL-FAKE16-NEXT: v_perm_b32 v0, v0, v1, 0x70603023434; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3435 %bool = icmp eq <2 x i32> %bool.arg1, %bool.arg23436 %y = select <2 x i1> %bool, <2 x bfloat> <bfloat 5.000000e-01, bfloat 5.000000e-01>, <2 x bfloat> <bfloat 1.000000e+00, bfloat 1.000000e+00>3437 %ldexp = fmul <2 x bfloat> %x, %y3438 ret <2 x bfloat> %ldexp3439}3440 3441define bfloat @fmul_select_bf16_test5(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {3442; GFX7-LABEL: fmul_select_bf16_test5:3443; GFX7: ; %bb.0:3444; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3445; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03446; GFX7-NEXT: v_mov_b32_e32 v3, 0x410000003447; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23448; GFX7-NEXT: v_cndmask_b32_e64 v1, v3, 2.0, vcc3449; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03450; GFX7-NEXT: v_mul_f32_e32 v0, v0, v13451; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03452; GFX7-NEXT: s_setpc_b64 s[30:31]3453;3454; GFX9-LABEL: fmul_select_bf16_test5:3455; GFX9: ; %bb.0:3456; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3457; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23458; GFX9-NEXT: v_mov_b32_e32 v1, 0x41003459; GFX9-NEXT: v_mov_b32_e32 v2, 0x40003460; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3461; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v03462; GFX9-NEXT: v_mul_f32_e32 v0, v0, v13463; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 13464; GFX9-NEXT: s_movk_i32 s4, 0x7fff3465; GFX9-NEXT: v_add3_u32 v1, v1, v0, s43466; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v03467; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v03468; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc3469; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v03470; GFX9-NEXT: s_setpc_b64 s[30:31]3471;3472; GFX10-LABEL: fmul_select_bf16_test5:3473; GFX10: ; %bb.0:3474; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3475; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23476; GFX10-NEXT: v_mov_b32_e32 v1, 0x40003477; GFX10-NEXT: v_mov_b32_e32 v2, 0x41003478; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v03479; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3480; GFX10-NEXT: v_mul_f32_e32 v0, v0, v13481; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 13482; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v03483; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03484; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3485; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3486; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v03487; GFX10-NEXT: s_setpc_b64 s[30:31]3488;3489; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test5:3490; GFX11-SDAG-TRUE16: ; %bb.0:3491; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3492; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x41003493; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 03494; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23495; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l3496; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3497; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l3498; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x4000, vcc_lo3499; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v03500; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3501; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13502; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03503; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03504; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3505; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3506; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3507; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3508; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3509;3510; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test5:3511; GFX11-SDAG-FAKE16: ; %bb.0:3512; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3513; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0x4000 :: v_dual_lshlrev_b32 v0, 16, v03514; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23515; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3516; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4100, v3, vcc_lo3517; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13518; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3519; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13520; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13521; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03522; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03523; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3524; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3525; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3526; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3527; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03528; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3529;3530; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test5:3531; GFX11-GISEL-TRUE16: ; %bb.0:3532; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3533; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x41003534; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 03535; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23536; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l3537; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3538; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l3539; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x4000, vcc_lo3540; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v03541; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3542; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13543; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03544; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03545; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3546; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3547; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3548; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3549; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3550;3551; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test5:3552; GFX11-GISEL-FAKE16: ; %bb.0:3553; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3554; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0x4000 :: v_dual_lshlrev_b32 v0, 16, v03555; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23556; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3557; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4100, v3, vcc_lo3558; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13559; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3560; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13561; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13562; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03563; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03564; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3565; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3566; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3567; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3568; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03569; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3570 %bool = icmp eq i32 %bool.arg1, %bool.arg23571 %y = select i1 %bool, bfloat 2.000000e+00, bfloat 8.000000e+003572 %ldexp = fmul bfloat %x, %y3573 ret bfloat %ldexp3574}3575 3576define bfloat @fmul_select_bf16_test6(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {3577; GFX7-LABEL: fmul_select_bf16_test6:3578; GFX7: ; %bb.0:3579; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3580; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03581; GFX7-NEXT: v_mov_b32_e32 v3, 0x404000003582; GFX7-NEXT: v_mov_b32_e32 v4, 0xc10000003583; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23584; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc3585; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03586; GFX7-NEXT: v_mul_f32_e32 v0, v0, v13587; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03588; GFX7-NEXT: s_setpc_b64 s[30:31]3589;3590; GFX9-LABEL: fmul_select_bf16_test6:3591; GFX9: ; %bb.0:3592; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3593; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23594; GFX9-NEXT: v_mov_b32_e32 v1, 0x40403595; GFX9-NEXT: v_mov_b32_e32 v2, 0xffffc1003596; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3597; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v03598; GFX9-NEXT: v_mul_f32_e32 v0, v0, v13599; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 13600; GFX9-NEXT: s_movk_i32 s4, 0x7fff3601; GFX9-NEXT: v_add3_u32 v1, v1, v0, s43602; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v03603; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v03604; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc3605; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v03606; GFX9-NEXT: s_setpc_b64 s[30:31]3607;3608; GFX10-LABEL: fmul_select_bf16_test6:3609; GFX10: ; %bb.0:3610; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3611; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23612; GFX10-NEXT: v_mov_b32_e32 v1, 0xffffc1003613; GFX10-NEXT: v_mov_b32_e32 v2, 0x40403614; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v03615; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3616; GFX10-NEXT: v_mul_f32_e32 v0, v0, v13617; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 13618; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v03619; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03620; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3621; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3622; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v03623; GFX10-NEXT: s_setpc_b64 s[30:31]3624;3625; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test6:3626; GFX11-SDAG-TRUE16: ; %bb.0:3627; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3628; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x40403629; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 03630; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23631; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l3632; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3633; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l3634; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xc100, vcc_lo3635; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v03636; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3637; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13638; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03639; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03640; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3641; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3642; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3643; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3644; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3645;3646; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test6:3647; GFX11-SDAG-FAKE16: ; %bb.0:3648; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3649; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0xffffc100 :: v_dual_lshlrev_b32 v0, 16, v03650; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23651; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3652; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4040, v3, vcc_lo3653; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13654; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3655; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13656; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13657; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03658; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03659; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3660; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3661; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3662; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3663; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03664; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3665;3666; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test6:3667; GFX11-GISEL-TRUE16: ; %bb.0:3668; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3669; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x40403670; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 03671; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23672; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l3673; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3674; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l3675; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xc100, vcc_lo3676; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v03677; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3678; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13679; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03680; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03681; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3682; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3683; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3684; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3685; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3686;3687; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test6:3688; GFX11-GISEL-FAKE16: ; %bb.0:3689; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3690; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0xffffc100 :: v_dual_lshlrev_b32 v0, 16, v03691; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23692; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3693; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4040, v3, vcc_lo3694; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13695; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3696; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13697; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13698; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03699; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03700; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3701; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3702; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3703; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3704; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03705; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3706 %bool = icmp eq i32 %bool.arg1, %bool.arg23707 %y = select i1 %bool, bfloat -8.000000e+00, bfloat 3.000000e+003708 %ldexp = fmul bfloat %x, %y3709 ret bfloat %ldexp3710}3711 3712define bfloat @fmul_select_bf16_test7(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {3713; GFX7-LABEL: fmul_select_bf16_test7:3714; GFX7: ; %bb.0:3715; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3716; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03717; GFX7-NEXT: v_mov_b32_e32 v3, 0x410000003718; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23719; GFX7-NEXT: v_cndmask_b32_e32 v1, -4.0, v3, vcc3720; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03721; GFX7-NEXT: v_mul_f32_e32 v0, v0, v13722; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03723; GFX7-NEXT: s_setpc_b64 s[30:31]3724;3725; GFX9-LABEL: fmul_select_bf16_test7:3726; GFX9: ; %bb.0:3727; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3728; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23729; GFX9-NEXT: v_mov_b32_e32 v1, 0xffffc0803730; GFX9-NEXT: v_mov_b32_e32 v2, 0x41003731; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3732; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v03733; GFX9-NEXT: v_mul_f32_e32 v0, v0, v13734; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 13735; GFX9-NEXT: s_movk_i32 s4, 0x7fff3736; GFX9-NEXT: v_add3_u32 v1, v1, v0, s43737; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v03738; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v03739; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc3740; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v03741; GFX9-NEXT: s_setpc_b64 s[30:31]3742;3743; GFX10-LABEL: fmul_select_bf16_test7:3744; GFX10: ; %bb.0:3745; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3746; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23747; GFX10-NEXT: v_mov_b32_e32 v1, 0x41003748; GFX10-NEXT: v_mov_b32_e32 v2, 0xffffc0803749; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v03750; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3751; GFX10-NEXT: v_mul_f32_e32 v0, v0, v13752; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 13753; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v03754; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03755; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3756; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3757; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v03758; GFX10-NEXT: s_setpc_b64 s[30:31]3759;3760; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test7:3761; GFX11-SDAG-TRUE16: ; %bb.0:3762; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3763; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xc0803764; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 03765; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23766; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l3767; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3768; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l3769; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x4100, vcc_lo3770; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v03771; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3772; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13773; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03774; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03775; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3776; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3777; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3778; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3779; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3780;3781; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test7:3782; GFX11-SDAG-FAKE16: ; %bb.0:3783; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3784; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0x4100 :: v_dual_lshlrev_b32 v0, 16, v03785; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23786; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3787; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xffffc080, v3, vcc_lo3788; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13789; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3790; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13791; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13792; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03793; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03794; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3795; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3796; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3797; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3798; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03799; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3800;3801; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test7:3802; GFX11-GISEL-TRUE16: ; %bb.0:3803; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3804; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xc0803805; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 03806; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23807; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l3808; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3809; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l3810; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x4100, vcc_lo3811; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v03812; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3813; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13814; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03815; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03816; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3817; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3818; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3819; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3820; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3821;3822; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test7:3823; GFX11-GISEL-FAKE16: ; %bb.0:3824; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3825; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0x4100 :: v_dual_lshlrev_b32 v0, 16, v03826; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23827; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3828; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xffffc080, v3, vcc_lo3829; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13830; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3831; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13832; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13833; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03834; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03835; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3836; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3837; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3838; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3839; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03840; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3841 %bool = icmp eq i32 %bool.arg1, %bool.arg23842 %y = select i1 %bool, bfloat 8.000000e+00, bfloat -4.000000e+003843 %ldexp = fmul bfloat %x, %y3844 ret bfloat %ldexp3845}3846 3847define bfloat @fmul_select_bf16_test8(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {3848; GFX7-LABEL: fmul_select_bf16_test8:3849; GFX7: ; %bb.0:3850; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3851; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03852; GFX7-NEXT: v_bfrev_b32_e32 v3, 13853; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23854; GFX7-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc3855; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03856; GFX7-NEXT: v_mul_f32_e32 v0, v0, v13857; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03858; GFX7-NEXT: s_setpc_b64 s[30:31]3859;3860; GFX9-LABEL: fmul_select_bf16_test8:3861; GFX9: ; %bb.0:3862; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3863; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23864; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff80003865; GFX9-NEXT: v_mov_b32_e32 v2, 03866; GFX9-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3867; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v03868; GFX9-NEXT: v_mul_f32_e32 v0, v0, v13869; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 13870; GFX9-NEXT: s_movk_i32 s4, 0x7fff3871; GFX9-NEXT: v_add3_u32 v1, v1, v0, s43872; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v03873; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v03874; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc3875; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v03876; GFX9-NEXT: s_setpc_b64 s[30:31]3877;3878; GFX10-LABEL: fmul_select_bf16_test8:3879; GFX10: ; %bb.0:3880; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3881; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23882; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v03883; GFX10-NEXT: v_cndmask_b32_e64 v1, 0, 0xffff8000, vcc_lo3884; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v13885; GFX10-NEXT: v_mul_f32_e32 v0, v0, v13886; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 13887; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v03888; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03889; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3890; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3891; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v03892; GFX10-NEXT: s_setpc_b64 s[30:31]3893;3894; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test8:3895; GFX11-SDAG-TRUE16: ; %bb.0:3896; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3897; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 03898; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23899; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l3900; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3901; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l3902; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, 0, 0x8000, vcc_lo3903; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v3, v03904; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3905; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13906; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03907; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03908; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3909; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3910; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3911; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3912; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3913;3914; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test8:3915; GFX11-SDAG-FAKE16: ; %bb.0:3916; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3917; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23918; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v03919; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffff8000, vcc_lo3920; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3921; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13922; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13923; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3924; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13925; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03926; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03927; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3928; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3929; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3930; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03931; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3932;3933; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test8:3934; GFX11-GISEL-TRUE16: ; %bb.0:3935; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3936; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 03937; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23938; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l3939; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)3940; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l3941; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, 0, 0x8000, vcc_lo3942; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v3, v03943; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3944; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 13945; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v03946; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03947; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3948; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3949; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3950; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h3951; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3952;3953; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test8:3954; GFX11-GISEL-FAKE16: ; %bb.0:3955; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3956; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v23957; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 16, v03958; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 0xffff8000, vcc_lo3959; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3960; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v13961; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v13962; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)3963; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 13964; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v03965; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v03966; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff3967; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3968; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo3969; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v03970; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3971 %bool = icmp eq i32 %bool.arg1, %bool.arg23972 %y = select i1 %bool, bfloat -0.000000e+00, bfloat 0.000000e+003973 %ldexp = fmul bfloat %x, %y3974 ret bfloat %ldexp3975}3976 3977define bfloat @fmul_select_bf16_test9(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {3978; GFX7-LABEL: fmul_select_bf16_test9:3979; GFX7: ; %bb.0:3980; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3981; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03982; GFX7-NEXT: v_mov_b32_e32 v3, 0xc20000003983; GFX7-NEXT: v_mov_b32_e32 v4, 0xc18000003984; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23985; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc3986; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03987; GFX7-NEXT: v_mul_f32_e32 v0, v0, v13988; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v03989; GFX7-NEXT: s_setpc_b64 s[30:31]3990;3991; GFX9-LABEL: fmul_select_bf16_test9:3992; GFX9: ; %bb.0:3993; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3994; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v23995; GFX9-NEXT: v_mov_b32_e32 v1, 0xffffc2003996; GFX9-NEXT: v_mov_b32_e32 v2, 0xffffc1803997; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3998; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v03999; GFX9-NEXT: v_mul_f32_e32 v0, v0, v14000; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 14001; GFX9-NEXT: s_movk_i32 s4, 0x7fff4002; GFX9-NEXT: v_add3_u32 v1, v1, v0, s44003; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v04004; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v04005; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc4006; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v04007; GFX9-NEXT: s_setpc_b64 s[30:31]4008;4009; GFX10-LABEL: fmul_select_bf16_test9:4010; GFX10: ; %bb.0:4011; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4012; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24013; GFX10-NEXT: v_mov_b32_e32 v1, 0xffffc1804014; GFX10-NEXT: v_mov_b32_e32 v2, 0xffffc2004015; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v04016; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4017; GFX10-NEXT: v_mul_f32_e32 v0, v0, v14018; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 14019; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v04020; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04021; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4022; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4023; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v04024; GFX10-NEXT: s_setpc_b64 s[30:31]4025;4026; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test9:4027; GFX11-SDAG-TRUE16: ; %bb.0:4028; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4029; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xc2004030; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 04031; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24032; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l4033; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)4034; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l4035; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xc180, vcc_lo4036; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v04037; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)4038; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 14039; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v04040; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04041; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4042; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4043; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4044; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h4045; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]4046;4047; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test9:4048; GFX11-SDAG-FAKE16: ; %bb.0:4049; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4050; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0xffffc180 :: v_dual_lshlrev_b32 v0, 16, v04051; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24052; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4053; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xffffc200, v3, vcc_lo4054; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14055; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4056; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v14057; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 14058; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v04059; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04060; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)4061; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4062; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4063; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)4064; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v04065; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]4066;4067; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test9:4068; GFX11-GISEL-TRUE16: ; %bb.0:4069; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4070; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xc2004071; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 04072; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24073; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l4074; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)4075; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l4076; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xc180, vcc_lo4077; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v04078; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)4079; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 14080; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v04081; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04082; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4083; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4084; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4085; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h4086; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]4087;4088; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test9:4089; GFX11-GISEL-FAKE16: ; %bb.0:4090; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4091; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0xffffc180 :: v_dual_lshlrev_b32 v0, 16, v04092; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24093; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4094; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xffffc200, v3, vcc_lo4095; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14096; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4097; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v14098; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 14099; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v04100; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04101; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)4102; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4103; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4104; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)4105; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v04106; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]4107 %bool = icmp eq i32 %bool.arg1, %bool.arg24108 %y = select i1 %bool, bfloat -1.600000e+01, bfloat -3.200000e+014109 %ldexp = fmul bfloat %x, %y4110 ret bfloat %ldexp4111}4112 4113define bfloat @fmul_select_bf16_test10_sel_log2val_pos65_pos56(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {4114; GFX7-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4115; GFX7: ; %bb.0:4116; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4117; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v04118; GFX7-NEXT: v_mov_b32_e32 v3, 0xdb8000004119; GFX7-NEXT: v_bfrev_b32_e32 v4, 74120; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v24121; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc4122; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v04123; GFX7-NEXT: v_mul_f32_e32 v0, v0, v14124; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v04125; GFX7-NEXT: s_setpc_b64 s[30:31]4126;4127; GFX9-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4128; GFX9: ; %bb.0:4129; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4130; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v24131; GFX9-NEXT: v_mov_b32_e32 v1, 0xffffdb804132; GFX9-NEXT: v_mov_b32_e32 v2, 0xffffe0004133; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4134; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v04135; GFX9-NEXT: v_mul_f32_e32 v0, v0, v14136; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 14137; GFX9-NEXT: s_movk_i32 s4, 0x7fff4138; GFX9-NEXT: v_add3_u32 v1, v1, v0, s44139; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v04140; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v04141; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc4142; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v04143; GFX9-NEXT: s_setpc_b64 s[30:31]4144;4145; GFX10-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4146; GFX10: ; %bb.0:4147; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4148; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24149; GFX10-NEXT: v_mov_b32_e32 v1, 0xffffe0004150; GFX10-NEXT: v_mov_b32_e32 v2, 0xffffdb804151; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v04152; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4153; GFX10-NEXT: v_mul_f32_e32 v0, v0, v14154; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 14155; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v04156; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04157; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4158; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4159; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v04160; GFX10-NEXT: s_setpc_b64 s[30:31]4161;4162; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4163; GFX11-SDAG-TRUE16: ; %bb.0:4164; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4165; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xdb804166; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 04167; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24168; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l4169; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)4170; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l4171; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xe000, vcc_lo4172; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v04173; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)4174; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 14175; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v04176; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04177; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4178; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4179; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4180; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h4181; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]4182;4183; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4184; GFX11-SDAG-FAKE16: ; %bb.0:4185; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4186; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0xffffe000 :: v_dual_lshlrev_b32 v0, 16, v04187; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24188; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4189; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xffffdb80, v3, vcc_lo4190; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14191; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4192; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v14193; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 14194; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v04195; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04196; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)4197; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4198; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4199; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)4200; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v04201; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]4202;4203; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4204; GFX11-GISEL-TRUE16: ; %bb.0:4205; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4206; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xdb804207; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 04208; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24209; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l4210; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)4211; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l4212; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xe000, vcc_lo4213; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v04214; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)4215; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 14216; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v04217; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04218; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4219; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4220; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4221; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h4222; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]4223;4224; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test10_sel_log2val_pos65_pos56:4225; GFX11-GISEL-FAKE16: ; %bb.0:4226; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4227; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0xffffe000 :: v_dual_lshlrev_b32 v0, 16, v04228; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24229; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4230; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xffffdb80, v3, vcc_lo4231; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14232; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4233; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v14234; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 14235; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v04236; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04237; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)4238; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4239; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4240; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)4241; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v04242; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]4243 %bool = icmp eq i32 %bool.arg1, %bool.arg24244 %y = select i1 %bool, bfloat 0xRE000, bfloat 0xRDB804245 %ldexp = fmul bfloat %x, %y4246 ret bfloat %ldexp4247}4248 4249define bfloat @fmul_select_bf16_test11_sel_log2val_neg22_pos25(bfloat %x, i32 %bool.arg1, i32 %bool.arg2) {4250; GFX7-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4251; GFX7: ; %bb.0:4252; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4253; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v04254; GFX7-NEXT: v_bfrev_b32_e32 v3, 504255; GFX7-NEXT: v_mov_b32_e32 v4, 0x348000004256; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, v1, v24257; GFX7-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc4258; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v04259; GFX7-NEXT: v_mul_f32_e32 v0, v0, v14260; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v04261; GFX7-NEXT: s_setpc_b64 s[30:31]4262;4263; GFX9-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4264; GFX9: ; %bb.0:4265; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4266; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, v1, v24267; GFX9-NEXT: v_mov_b32_e32 v1, 0x4c004268; GFX9-NEXT: v_mov_b32_e32 v2, 0x34804269; GFX9-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4270; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v04271; GFX9-NEXT: v_mul_f32_e32 v0, v0, v14272; GFX9-NEXT: v_bfe_u32 v1, v0, 16, 14273; GFX9-NEXT: s_movk_i32 s4, 0x7fff4274; GFX9-NEXT: v_add3_u32 v1, v1, v0, s44275; GFX9-NEXT: v_or_b32_e32 v2, 0x400000, v04276; GFX9-NEXT: v_cmp_u_f32_e32 vcc, v0, v04277; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc4278; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v04279; GFX9-NEXT: s_setpc_b64 s[30:31]4280;4281; GFX10-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4282; GFX10: ; %bb.0:4283; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4284; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24285; GFX10-NEXT: v_mov_b32_e32 v1, 0x34804286; GFX10-NEXT: v_mov_b32_e32 v2, 0x4c004287; GFX10-NEXT: v_lshlrev_b32_e32 v0, 16, v04288; GFX10-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc_lo dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD4289; GFX10-NEXT: v_mul_f32_e32 v0, v0, v14290; GFX10-NEXT: v_bfe_u32 v1, v0, 16, 14291; GFX10-NEXT: v_or_b32_e32 v2, 0x400000, v04292; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04293; GFX10-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4294; GFX10-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4295; GFX10-NEXT: v_lshrrev_b32_e32 v0, 16, v04296; GFX10-NEXT: s_setpc_b64 s[30:31]4297;4298; GFX11-SDAG-TRUE16-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4299; GFX11-SDAG-TRUE16: ; %bb.0:4300; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4301; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x4c004302; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 04303; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24304; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l4305; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)4306; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l4307; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x3480, vcc_lo4308; GFX11-SDAG-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v04309; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)4310; GFX11-SDAG-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 14311; GFX11-SDAG-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v04312; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04313; GFX11-SDAG-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4314; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4315; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4316; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h4317; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]4318;4319; GFX11-SDAG-FAKE16-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4320; GFX11-SDAG-FAKE16: ; %bb.0:4321; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4322; GFX11-SDAG-FAKE16-NEXT: v_dual_mov_b32 v3, 0x3480 :: v_dual_lshlrev_b32 v0, 16, v04323; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24324; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4325; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4c00, v3, vcc_lo4326; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14327; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4328; GFX11-SDAG-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v14329; GFX11-SDAG-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 14330; GFX11-SDAG-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v04331; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04332; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)4333; GFX11-SDAG-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4334; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4335; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)4336; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v04337; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]4338;4339; GFX11-GISEL-TRUE16-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4340; GFX11-GISEL-TRUE16: ; %bb.0:4341; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4342; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x4c004343; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.l, 04344; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24345; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v4.h, v0.l4346; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)4347; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v4.l4348; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x3480, vcc_lo4349; GFX11-GISEL-TRUE16-NEXT: v_mul_f32_e32 v0, v4, v04350; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)4351; GFX11-GISEL-TRUE16-NEXT: v_bfe_u32 v1, v0, 16, 14352; GFX11-GISEL-TRUE16-NEXT: v_or_b32_e32 v2, 0x400000, v04353; GFX11-GISEL-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04354; GFX11-GISEL-TRUE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4355; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4356; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4357; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, v0.h4358; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]4359;4360; GFX11-GISEL-FAKE16-LABEL: fmul_select_bf16_test11_sel_log2val_neg22_pos25:4361; GFX11-GISEL-FAKE16: ; %bb.0:4362; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4363; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v3, 0x3480 :: v_dual_lshlrev_b32 v0, 16, v04364; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, v1, v24365; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)4366; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4c00, v3, vcc_lo4367; GFX11-GISEL-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v14368; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4369; GFX11-GISEL-FAKE16-NEXT: v_mul_f32_e32 v0, v0, v14370; GFX11-GISEL-FAKE16-NEXT: v_bfe_u32 v1, v0, 16, 14371; GFX11-GISEL-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v04372; GFX11-GISEL-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v0, v04373; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)4374; GFX11-GISEL-FAKE16-NEXT: v_add3_u32 v1, v1, v0, 0x7fff4375; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e32 v0, v1, v2, vcc_lo4376; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)4377; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v0, 16, v04378; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]4379 %bool = icmp eq i32 %bool.arg1, %bool.arg24380 %y = select i1 %bool, bfloat 0xR3480, bfloat 0xR4C004381 %ldexp = fmul bfloat %x, %y4382 ret bfloat %ldexp4383}4384 4385