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1; RUN: llc -mtriple=amdgcn < %s | FileCheck %s2 3; Test for a bug where DAGCombiner::ReassociateOps() was creating adds4; with offset in the first operand and base pointers in the second.5 6; CHECK-LABEL: {{^}}store_same_base_ptr:7; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR:v\[[0-9]+:[0-9]+\]]], [[SADDR:s\[[0-9]+:[0-9]+\]]]8; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]]9; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]]10; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]]11 12define amdgpu_kernel void @store_same_base_ptr(ptr addrspace(1) %out) {13entry:14 %id = call i32 @llvm.amdgcn.workitem.id.x() #015 %offset = sext i32 %id to i6416 %offset0 = add i64 %offset, 102717 %ptr0 = getelementptr i32, ptr addrspace(1) %out, i64 %offset018 store volatile i32 3, ptr addrspace(1) %ptr019 %offset1 = add i64 %offset, 102620 %ptr1 = getelementptr i32, ptr addrspace(1) %out, i64 %offset121 store volatile i32 2, ptr addrspace(1) %ptr122 %offset2 = add i64 %offset, 102523 %ptr2 = getelementptr i32, ptr addrspace(1) %out, i64 %offset224 store volatile i32 1, ptr addrspace(1) %ptr225 %offset3 = add i64 %offset, 102426 %ptr3 = getelementptr i32, ptr addrspace(1) %out, i64 %offset327 store volatile i32 0, ptr addrspace(1) %ptr328 ret void29}30 31declare i32 @llvm.amdgcn.workitem.id.x() #032 33attributes #0 = { nounwind readnone }34