85 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -enable-var-scope -check-prefix=GCN %s3 4define amdgpu_kernel void @eq_t(float %x) {5; GCN-LABEL: eq_t:6; GCN: ; %bb.0:7; GCN-NEXT: s_load_dword s0, s[4:5], 0x248; GCN-NEXT: s_waitcnt lgkmcnt(0)9; GCN-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, 1.010; GCN-NEXT: v_cndmask_b32_e64 v0, 2.0, 4.0, s[0:1]11; GCN-NEXT: flat_store_dword v[0:1], v012; GCN-NEXT: s_endpgm13 %c1 = fcmp olt float %x, 1.014 %s1 = select i1 %c1, i32 56789, i32 115 %c2 = icmp eq i32 %s1, 5678916 %s2 = select i1 %c2, float 4.0, float 2.017 store float %s2, ptr poison, align 418 ret void19}20 21define amdgpu_kernel void @ne_t(float %x) {22; GCN-LABEL: ne_t:23; GCN: ; %bb.0:24; GCN-NEXT: s_load_dword s0, s[4:5], 0x2425; GCN-NEXT: s_waitcnt lgkmcnt(0)26; GCN-NEXT: v_cmp_nlt_f32_e64 s[0:1], s0, 1.027; GCN-NEXT: v_cndmask_b32_e64 v0, 2.0, 4.0, s[0:1]28; GCN-NEXT: flat_store_dword v[0:1], v029; GCN-NEXT: s_endpgm30 %c1 = fcmp olt float %x, 1.031 %s1 = select i1 %c1, i32 56789, i32 132 %c2 = icmp ne i32 %s1, 5678933 %s2 = select i1 %c2, float 4.0, float 2.034 store float %s2, ptr poison, align 435 ret void36}37 38define amdgpu_kernel void @eq_f(float %x) {39; GCN-LABEL: eq_f:40; GCN: ; %bb.0:41; GCN-NEXT: s_load_dword s0, s[4:5], 0x2442; GCN-NEXT: s_waitcnt lgkmcnt(0)43; GCN-NEXT: v_cmp_nlt_f32_e64 s[0:1], s0, 1.044; GCN-NEXT: v_cndmask_b32_e64 v0, 2.0, 4.0, s[0:1]45; GCN-NEXT: flat_store_dword v[0:1], v046; GCN-NEXT: s_endpgm47 %c1 = fcmp olt float %x, 1.048 %s1 = select i1 %c1, i32 1, i32 5678949 %c2 = icmp eq i32 %s1, 5678950 %s2 = select i1 %c2, float 4.0, float 2.051 store float %s2, ptr poison, align 452 ret void53}54 55define amdgpu_kernel void @ne_f(float %x) {56; GCN-LABEL: ne_f:57; GCN: ; %bb.0:58; GCN-NEXT: s_load_dword s0, s[4:5], 0x2459; GCN-NEXT: s_waitcnt lgkmcnt(0)60; GCN-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, 1.061; GCN-NEXT: v_cndmask_b32_e64 v0, 2.0, 4.0, s[0:1]62; GCN-NEXT: flat_store_dword v[0:1], v063; GCN-NEXT: s_endpgm64 %c1 = fcmp olt float %x, 1.065 %s1 = select i1 %c1, i32 1, i32 5678966 %c2 = icmp ne i32 %s1, 5678967 %s2 = select i1 %c2, float 4.0, float 2.068 store float %s2, ptr poison, align 469 ret void70}71 72define amdgpu_kernel void @different_constants(float %x) {73; GCN-LABEL: different_constants:74; GCN: ; %bb.0:75; GCN-NEXT: v_mov_b32_e32 v0, 2.076; GCN-NEXT: flat_store_dword v[0:1], v077; GCN-NEXT: s_endpgm78 %c1 = fcmp olt float %x, 1.079 %s1 = select i1 %c1, i32 56789, i32 180 %c2 = icmp eq i32 %s1, 567881 %s2 = select i1 %c2, float 4.0, float 2.082 store float %s2, ptr poison, align 483 ret void84}85