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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=machine-scheduler -verify-machineinstrs %s -o - | FileCheck %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -passes=machine-scheduler %s -o - | FileCheck %s4--- |5 6 declare void @llvm.dbg.value(metadata, metadata, metadata) #07 8 define amdgpu_kernel void @could_not_use_debug_inst_to_query_mi2mimap() #1 {9 ret void10 }11 12 declare hidden float @foo(float, float, float) local_unnamed_addr #113 14 attributes #0 = { nounwind readnone speculatable }15 attributes #1 = {nounwind }16 17...18---19name: could_not_use_debug_inst_to_query_mi2mimap20tracksRegLiveness: true21frameInfo:22 hasCalls: true23body: |24 ; CHECK-LABEL: name: could_not_use_debug_inst_to_query_mi2mimap25 ; CHECK: bb.0:26 ; CHECK-NEXT: successors: %bb.1(0x80000000)27 ; CHECK-NEXT: {{ $}}28 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF29 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF30 ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF31 ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF32 ; CHECK-NEXT: [[DEF4:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF33 ; CHECK-NEXT: [[DEF5:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF34 ; CHECK-NEXT: [[DEF6:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF35 ; CHECK-NEXT: [[DEF7:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF36 ; CHECK-NEXT: [[V_MUL_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 1082130432, [[DEF]], implicit $mode, implicit $exec37 ; CHECK-NEXT: [[DEF8:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF38 ; CHECK-NEXT: [[DEF9:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF39 ; CHECK-NEXT: {{ $}}40 ; CHECK-NEXT: bb.1:41 ; CHECK-NEXT: successors: %bb.2(0x80000000)42 ; CHECK-NEXT: {{ $}}43 ; CHECK-NEXT: DBG_VALUE44 ; CHECK-NEXT: DBG_VALUE45 ; CHECK-NEXT: DBG_VALUE46 ; CHECK-NEXT: {{ $}}47 ; CHECK-NEXT: bb.2:48 ; CHECK-NEXT: successors: %bb.3(0x80000000)49 ; CHECK-NEXT: {{ $}}50 ; CHECK-NEXT: S_BRANCH %bb.351 ; CHECK-NEXT: {{ $}}52 ; CHECK-NEXT: bb.3:53 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec54 ; CHECK-NEXT: [[DEF10:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF55 ; CHECK-NEXT: [[DEF11:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF56 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_MOV_B32_e32_]]57 ; CHECK-NEXT: [[V_MUL_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF6]], [[DEF6]], implicit $mode, implicit $exec58 ; CHECK-NEXT: [[V_MUL_F32_e32_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF6]], [[DEF6]], implicit $mode, implicit $exec59 ; CHECK-NEXT: [[V_MUL_F32_e32_3:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec60 ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec61 ; CHECK-NEXT: [[DEF12:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF62 ; CHECK-NEXT: [[V_ADD_F32_e32_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], implicit $mode, implicit $exec63 ; CHECK-NEXT: [[V_MUL_F32_e32_4:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[DEF6]], [[DEF6]], implicit $mode, implicit $exec64 ; CHECK-NEXT: dead [[V_MUL_F32_e32_5:%[0-9]+]]:vgpr_32 = nofpexcept V_MUL_F32_e32 [[V_MUL_F32_e32_4]], [[DEF12]], implicit $mode, implicit $exec65 ; CHECK-NEXT: dead [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAC_F32_e32 [[V_ADD_F32_e32_]], [[COPY]], [[V_MOV_B32_e32_1]], implicit $mode, implicit $exec66 ; CHECK-NEXT: [[DEF13:%[0-9]+]]:sreg_64 = IMPLICIT_DEF67 ; CHECK-NEXT: $sgpr4 = IMPLICIT_DEF68 ; CHECK-NEXT: $vgpr0 = COPY [[DEF10]]69 ; CHECK-NEXT: $vgpr0 = COPY [[V_MOV_B32_e32_]]70 ; CHECK-NEXT: $vgpr1 = COPY [[DEF6]]71 ; CHECK-NEXT: $vgpr0 = COPY [[V_MUL_F32_e32_1]]72 ; CHECK-NEXT: $vgpr1 = COPY [[V_MUL_F32_e32_2]]73 ; CHECK-NEXT: $vgpr2 = COPY [[V_MUL_F32_e32_3]]74 ; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL [[DEF13]], @foo, csr_amdgpu, implicit undef $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit-def $vgpr075 ; CHECK-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e32 [[V_MUL_F32_e32_]], [[DEF7]], implicit $mode, implicit $exec76 ; CHECK-NEXT: [[V_ADD_F32_e32_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAC_F32_e32 [[DEF11]], [[DEF8]], [[V_ADD_F32_e32_1]], implicit $mode, implicit $exec77 ; CHECK-NEXT: dead [[V_MAD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF3]], 0, [[DEF]], 0, 0, implicit $mode, implicit $exec78 ; CHECK-NEXT: dead [[V_MAD_F32_e64_1:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF4]], 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec79 ; CHECK-NEXT: dead [[V_MAD_F32_e64_2:%[0-9]+]]:vgpr_32 = nofpexcept V_MAD_F32_e64 0, [[V_ADD_F32_e32_1]], 0, [[DEF5]], 0, [[DEF2]], 0, 0, implicit $mode, implicit $exec80 ; CHECK-NEXT: [[DEF14:%[0-9]+]]:vreg_64 = IMPLICIT_DEF81 ; CHECK-NEXT: GLOBAL_STORE_DWORD [[DEF14]], [[DEF9]], 0, 0, implicit $exec82 ; CHECK-NEXT: S_ENDPGM 083 bb.0:84 successors: %bb.185 86 %0:vreg_64 = IMPLICIT_DEF87 %1:vgpr_32 = IMPLICIT_DEF88 %2:vgpr_32 = IMPLICIT_DEF89 %3:vgpr_32 = IMPLICIT_DEF90 %4:vgpr_32 = IMPLICIT_DEF91 %5:vgpr_32 = IMPLICIT_DEF92 %6:vgpr_32 = IMPLICIT_DEF93 %7:vgpr_32 = IMPLICIT_DEF94 %8:vgpr_32 = IMPLICIT_DEF95 %9:vgpr_32 = nofpexcept V_MUL_F32_e32 1082130432, %1, implicit $mode, implicit $exec96 %10:vgpr_32 = IMPLICIT_DEF97 %11:vgpr_32 = IMPLICIT_DEF98 99 bb.1:100 successors: %bb.2101 102 DBG_VALUE103 DBG_VALUE104 DBG_VALUE105 106 bb.2:107 successors: %bb.3108 109 S_BRANCH %bb.3110 111 bb.3:112 %12:vgpr_32 = V_MOV_B32_e32 0, implicit $exec113 %13:vgpr_32 = COPY %12114 %14:vgpr_32 = IMPLICIT_DEF115 %15:vgpr_32 = IMPLICIT_DEF116 %16:vgpr_32 = nofpexcept V_MUL_F32_e32 %7, %7, implicit $mode, implicit $exec117 %17:vgpr_32 = nofpexcept V_MUL_F32_e32 %7, %7, implicit $mode, implicit $exec118 %18:vgpr_32 = nofpexcept V_MUL_F32_e32 %12, %12, implicit $mode, implicit $exec119 %19:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec120 %20:vgpr_32 = IMPLICIT_DEF121 %21:vgpr_32 = nofpexcept V_ADD_F32_e32 %12, %12, implicit $mode, implicit $exec122 %22:vgpr_32 = nofpexcept V_MUL_F32_e32 %7, %7, implicit $mode, implicit $exec123 %23:vgpr_32 = nofpexcept V_MUL_F32_e32 %22, %20, implicit $mode, implicit $exec124 %19:vgpr_32 = nofpexcept V_MAC_F32_e32 %21, %13, %19, implicit $mode, implicit $exec125 %24:sreg_64 = IMPLICIT_DEF126 $vgpr0 = COPY %14127 $vgpr0 = COPY %12128 $vgpr1 = COPY %7129 $vgpr0 = COPY %16130 $vgpr1 = COPY %17131 $vgpr2 = COPY %18132 $sgpr4 = IMPLICIT_DEF133 dead $sgpr30_sgpr31 = SI_CALL %24, @foo, csr_amdgpu, implicit undef $sgpr0_sgpr1_sgpr2_sgpr3, implicit killed $sgpr4, implicit killed $vgpr0, implicit killed $vgpr1, implicit killed $vgpr2, implicit-def $vgpr0134 %25:vgpr_32 = nofpexcept V_ADD_F32_e32 %9, %8, implicit $mode, implicit $exec135 %25:vgpr_32 = nofpexcept V_MAC_F32_e32 %15, %10, %25, implicit $mode, implicit $exec136 %26:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, %4, 0, %1, 0, 0, implicit $mode, implicit $exec137 %27:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, %5, 0, %2, 0, 0, implicit $mode, implicit $exec138 %28:vgpr_32 = nofpexcept V_MAD_F32_e64 0, %25, 0, %6, 0, %3, 0, 0, implicit $mode, implicit $exec139 GLOBAL_STORE_DWORD %0, %11, 0, 0, implicit $exec140 S_ENDPGM 0141 142...143