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1; RUN: llc -mtriple=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900 %s3; RUN: llc -mtriple=amdgcn -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900 %s5 6; GCN-LABEL: name: uniform_add_SIC7; GCN: S_SUB_I32 killed %{{[0-9]+}}, 328define amdgpu_kernel void @uniform_add_SIC(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {9 %a = load i32, ptr addrspace(1) %in10 %result = add i32 %a, -3211 store i32 %result, ptr addrspace(1) %out12 ret void13}14 15; GCN-LABEL: name: divergent_add_SIC16; SI: V_SUB_CO_U32_e64 killed %{{[0-9]+}}, 3217; GFX900: V_SUB_U32_e64 killed %{{[0-9]+}}, 3218define amdgpu_kernel void @divergent_add_SIC(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {19 %tid = call i32 @llvm.amdgcn.workitem.id.x()20 %gep = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid21 %a = load volatile i32, ptr addrspace(1) %gep22 %result = add i32 %a, -3223 store i32 %result, ptr addrspace(1) %out24 ret void25}26 27declare i32 @llvm.amdgcn.workitem.id.x() #128 29attributes #0 = { nounwind }30attributes #1 = { nounwind readnone speculatable }31