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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -passes=amdgpu-unify-divergent-exit-nodes -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a %s -o - | FileCheck %s3 4declare void @foo(ptr)5declare i1 @bar(ptr)6declare i32 @bar32(ptr)7 8define void @musttail_call_without_return_value(ptr %p) {9; CHECK-LABEL: define void @musttail_call_without_return_value(10; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] {11; CHECK-NEXT: [[ENTRY:.*:]]12; CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[P]], align 113; CHECK-NEXT: br i1 [[LOAD]], label %[[BB_0:.*]], label %[[BB_1:.*]]14; CHECK: [[BB_0]]:15; CHECK-NEXT: musttail call void @foo(ptr [[P]])16; CHECK-NEXT: ret void17; CHECK: [[BB_1]]:18; CHECK-NEXT: ret void19;20entry:21 %load = load i1, ptr %p, align 122 br i1 %load, label %bb.0, label %bb.123 24bb.0:25 musttail call void @foo(ptr %p)26 ret void27 28bb.1:29 ret void30}31 32define void @musttail_call_without_return_value_callbr(ptr %p) {33; CHECK-LABEL: define void @musttail_call_without_return_value_callbr(34; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {35; CHECK-NEXT: [[ENTRY:.*:]]36; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 137; CHECK-NEXT: callbr void asm "", "r,!i"(i32 [[LOAD]])38; CHECK-NEXT: to label %[[BB_0:.*]] [label %bb.1]39; CHECK: [[BB_0]]:40; CHECK-NEXT: musttail call void @foo(ptr [[P]])41; CHECK-NEXT: ret void42; CHECK: [[BB_1:.*:]]43; CHECK-NEXT: ret void44;45entry:46 %load = load i32, ptr %p, align 147 callbr void asm "", "r,!i"(i32 %load) to label %bb.0 [label %bb.1]48 49bb.0:50 musttail call void @foo(ptr %p)51 ret void52 53bb.1:54 ret void55}56 57define i1 @musttail_call_with_return_value(ptr %p) {58; CHECK-LABEL: define i1 @musttail_call_with_return_value(59; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {60; CHECK-NEXT: [[ENTRY:.*:]]61; CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[P]], align 162; CHECK-NEXT: br i1 [[LOAD]], label %[[BB_0:.*]], label %[[BB_1:.*]]63; CHECK: [[BB_0]]:64; CHECK-NEXT: [[RET:%.*]] = musttail call i1 @bar(ptr [[P]])65; CHECK-NEXT: ret i1 [[RET]]66; CHECK: [[BB_1]]:67; CHECK-NEXT: ret i1 [[LOAD]]68;69entry:70 %load = load i1, ptr %p, align 171 br i1 %load, label %bb.0, label %bb.172 73bb.0:74 %ret = musttail call i1 @bar(ptr %p)75 ret i1 %ret76 77bb.1:78 ret i1 %load79}80 81define i32 @musttail_call_with_return_value_callbr(ptr %p) {82; CHECK-LABEL: define i32 @musttail_call_with_return_value_callbr(83; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0]] {84; CHECK-NEXT: [[ENTRY:.*:]]85; CHECK-NEXT: [[LOAD:%.*]] = load i32, ptr [[P]], align 186; CHECK-NEXT: callbr void asm "", "r,!i"(i32 [[LOAD]])87; CHECK-NEXT: to label %[[BB_0:.*]] [label %bb.1]88; CHECK: [[BB_0]]:89; CHECK-NEXT: [[RET:%.*]] = musttail call i32 @bar32(ptr [[P]])90; CHECK-NEXT: ret i32 [[RET]]91; CHECK: [[BB_1:.*:]]92; CHECK-NEXT: ret i32 [[LOAD]]93;94entry:95 %load = load i32, ptr %p, align 196 callbr void asm "", "r,!i"(i32 %load) to label %bb.0 [label %bb.1]97 98bb.0:99 %ret = musttail call i32 @bar32(ptr %p)100 ret i32 %ret101 102bb.1:103 ret i32 %load104}105