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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck %s3 4; Try to stress ds.bpermute and ds.permute instructions with AGPR/AV5; inputs. It's not permissible to mix AGPRs and VGPR data operands.6 7define void @ds_bpermute_b32_a_a__use_a(ptr addrspace(3) %lds) #0 {8; CHECK-LABEL: ds_bpermute_b32_a_a__use_a:9; CHECK: ; %bb.0:10; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)11; CHECK-NEXT: ;;#ASMSTART12; CHECK-NEXT: ; def a013; CHECK-NEXT: ;;#ASMEND14; CHECK-NEXT: ;;#ASMSTART15; CHECK-NEXT: ; def a116; CHECK-NEXT: ;;#ASMEND17; CHECK-NEXT: v_accvgpr_read_b32 v0, a018; CHECK-NEXT: v_accvgpr_read_b32 v1, a119; CHECK-NEXT: ds_bpermute_b32 v0, v0, v120; CHECK-NEXT: s_waitcnt lgkmcnt(0)21; CHECK-NEXT: v_accvgpr_write_b32 a0, v022; CHECK-NEXT: ;;#ASMSTART23; CHECK-NEXT: ; use a024; CHECK-NEXT: ;;#ASMEND25; CHECK-NEXT: s_setpc_b64 s[30:31]26 %op0 = call i32 asm "; def $0", "=a"()27 %op1 = call i32 asm "; def $0", "=a"()28 %bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)29 call void asm sideeffect "; use $0", "a"(i32 %bpermute)30 ret void31}32 33define void @ds_bpermute_b32_v_a__use_a(ptr addrspace(3) %lds) #0 {34; CHECK-LABEL: ds_bpermute_b32_v_a__use_a:35; CHECK: ; %bb.0:36; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)37; CHECK-NEXT: ;;#ASMSTART38; CHECK-NEXT: ; def v039; CHECK-NEXT: ;;#ASMEND40; CHECK-NEXT: ;;#ASMSTART41; CHECK-NEXT: ; def a042; CHECK-NEXT: ;;#ASMEND43; CHECK-NEXT: v_accvgpr_read_b32 v1, a044; CHECK-NEXT: ds_bpermute_b32 v0, v0, v145; CHECK-NEXT: s_waitcnt lgkmcnt(0)46; CHECK-NEXT: v_accvgpr_write_b32 a0, v047; CHECK-NEXT: ;;#ASMSTART48; CHECK-NEXT: ; use a049; CHECK-NEXT: ;;#ASMEND50; CHECK-NEXT: s_setpc_b64 s[30:31]51 %op0 = call i32 asm "; def $0", "=v"()52 %op1 = call i32 asm "; def $0", "=a"()53 %bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)54 call void asm sideeffect "; use $0", "a"(i32 %bpermute)55 ret void56}57 58define void @ds_bpermute_b32_a_v__use_a(ptr addrspace(3) %lds) #0 {59; CHECK-LABEL: ds_bpermute_b32_a_v__use_a:60; CHECK: ; %bb.0:61; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)62; CHECK-NEXT: ;;#ASMSTART63; CHECK-NEXT: ; def a064; CHECK-NEXT: ;;#ASMEND65; CHECK-NEXT: ;;#ASMSTART66; CHECK-NEXT: ; def v067; CHECK-NEXT: ;;#ASMEND68; CHECK-NEXT: v_accvgpr_read_b32 v1, a069; CHECK-NEXT: ds_bpermute_b32 v0, v1, v070; CHECK-NEXT: s_waitcnt lgkmcnt(0)71; CHECK-NEXT: v_accvgpr_write_b32 a0, v072; CHECK-NEXT: ;;#ASMSTART73; CHECK-NEXT: ; use a074; CHECK-NEXT: ;;#ASMEND75; CHECK-NEXT: s_setpc_b64 s[30:31]76 %op0 = call i32 asm "; def $0", "=a"()77 %op1 = call i32 asm "; def $0", "=v"()78 %bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)79 call void asm sideeffect "; use $0", "a"(i32 %bpermute)80 ret void81}82 83define void @ds_bpermute_b32_a_a__use_v(ptr addrspace(3) %lds) #0 {84; CHECK-LABEL: ds_bpermute_b32_a_a__use_v:85; CHECK: ; %bb.0:86; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)87; CHECK-NEXT: ;;#ASMSTART88; CHECK-NEXT: ; def a089; CHECK-NEXT: ;;#ASMEND90; CHECK-NEXT: ;;#ASMSTART91; CHECK-NEXT: ; def a192; CHECK-NEXT: ;;#ASMEND93; CHECK-NEXT: v_accvgpr_read_b32 v0, a094; CHECK-NEXT: v_accvgpr_read_b32 v1, a195; CHECK-NEXT: ds_bpermute_b32 v0, v0, v196; CHECK-NEXT: s_waitcnt lgkmcnt(0)97; CHECK-NEXT: ;;#ASMSTART98; CHECK-NEXT: ; use v099; CHECK-NEXT: ;;#ASMEND100; CHECK-NEXT: s_setpc_b64 s[30:31]101 %op0 = call i32 asm "; def $0", "=a"()102 %op1 = call i32 asm "; def $0", "=a"()103 %bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)104 call void asm sideeffect "; use $0", "v"(i32 %bpermute)105 ret void106}107 108define void @ds_bpermute_b32_v_v__use_a(ptr addrspace(3) %lds) #0 {109; CHECK-LABEL: ds_bpermute_b32_v_v__use_a:110; CHECK: ; %bb.0:111; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)112; CHECK-NEXT: ;;#ASMSTART113; CHECK-NEXT: ; def v0114; CHECK-NEXT: ;;#ASMEND115; CHECK-NEXT: ;;#ASMSTART116; CHECK-NEXT: ; def v1117; CHECK-NEXT: ;;#ASMEND118; CHECK-NEXT: ds_bpermute_b32 v0, v0, v1119; CHECK-NEXT: s_waitcnt lgkmcnt(0)120; CHECK-NEXT: v_accvgpr_write_b32 a0, v0121; CHECK-NEXT: ;;#ASMSTART122; CHECK-NEXT: ; use a0123; CHECK-NEXT: ;;#ASMEND124; CHECK-NEXT: s_setpc_b64 s[30:31]125 %op0 = call i32 asm "; def $0", "=v"()126 %op1 = call i32 asm "; def $0", "=v"()127 %bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)128 call void asm sideeffect "; use $0", "a"(i32 %bpermute)129 ret void130}131 132define void @ds_bpermute_b32_av_av__use_av(ptr addrspace(3) %lds) #0 {133; CHECK-LABEL: ds_bpermute_b32_av_av__use_av:134; CHECK: ; %bb.0:135; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)136; CHECK-NEXT: ;;#ASMSTART137; CHECK-NEXT: ; def v0138; CHECK-NEXT: ;;#ASMEND139; CHECK-NEXT: ;;#ASMSTART140; CHECK-NEXT: ; def v1141; CHECK-NEXT: ;;#ASMEND142; CHECK-NEXT: ds_bpermute_b32 v0, v0, v1143; CHECK-NEXT: s_waitcnt lgkmcnt(0)144; CHECK-NEXT: ;;#ASMSTART145; CHECK-NEXT: ; use v0146; CHECK-NEXT: ;;#ASMEND147; CHECK-NEXT: s_setpc_b64 s[30:31]148 %op0 = call i32 asm "; def $0", "=^VA"()149 %op1 = call i32 asm "; def $0", "=^VA"()150 %bpermute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)151 call void asm sideeffect "; use $0", "^VA"(i32 %bpermute)152 ret void153}154 155define i32 @ds_bpermute_b32_av_av_no_vgprs(ptr addrspace(3) %lds) #0 {156; CHECK-LABEL: ds_bpermute_b32_av_av_no_vgprs:157; CHECK: ; %bb.0:158; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)159; CHECK-NEXT: v_accvgpr_write_b32 a2, v40 ; Reload Reuse160; CHECK-NEXT: v_accvgpr_write_b32 a3, v41 ; Reload Reuse161; CHECK-NEXT: v_accvgpr_write_b32 a4, v42 ; Reload Reuse162; CHECK-NEXT: v_accvgpr_write_b32 a5, v43 ; Reload Reuse163; CHECK-NEXT: v_accvgpr_write_b32 a6, v44 ; Reload Reuse164; CHECK-NEXT: v_accvgpr_write_b32 a7, v45 ; Reload Reuse165; CHECK-NEXT: v_accvgpr_write_b32 a8, v46 ; Reload Reuse166; CHECK-NEXT: v_accvgpr_write_b32 a9, v47 ; Reload Reuse167; CHECK-NEXT: v_accvgpr_write_b32 a10, v56 ; Reload Reuse168; CHECK-NEXT: v_accvgpr_write_b32 a11, v57 ; Reload Reuse169; CHECK-NEXT: v_accvgpr_write_b32 a12, v58 ; Reload Reuse170; CHECK-NEXT: v_accvgpr_write_b32 a13, v59 ; Reload Reuse171; CHECK-NEXT: v_accvgpr_write_b32 a14, v60 ; Reload Reuse172; CHECK-NEXT: v_accvgpr_write_b32 a15, v61 ; Reload Reuse173; CHECK-NEXT: v_accvgpr_write_b32 a16, v62 ; Reload Reuse174; CHECK-NEXT: v_accvgpr_write_b32 a17, v63 ; Reload Reuse175; CHECK-NEXT: ;;#ASMSTART176; CHECK-NEXT: ; def a0177; CHECK-NEXT: ;;#ASMEND178; CHECK-NEXT: ;;#ASMSTART179; CHECK-NEXT: ; def a1180; CHECK-NEXT: ;;#ASMEND181; CHECK-NEXT: ;;#ASMSTART182; CHECK-NEXT: ; def v[0:31]183; CHECK-NEXT: ;;#ASMEND184; CHECK-NEXT: ;;#ASMSTART185; CHECK-NEXT: ; use v[0:31]186; CHECK-NEXT: ;;#ASMEND187; CHECK-NEXT: v_accvgpr_read_b32 v0, a0188; CHECK-NEXT: v_accvgpr_read_b32 v1, a1189; CHECK-NEXT: ds_bpermute_b32 v0, v0, v1190; CHECK-NEXT: v_accvgpr_read_b32 v63, a17 ; Reload Reuse191; CHECK-NEXT: v_accvgpr_read_b32 v62, a16 ; Reload Reuse192; CHECK-NEXT: v_accvgpr_read_b32 v61, a15 ; Reload Reuse193; CHECK-NEXT: v_accvgpr_read_b32 v60, a14 ; Reload Reuse194; CHECK-NEXT: v_accvgpr_read_b32 v59, a13 ; Reload Reuse195; CHECK-NEXT: v_accvgpr_read_b32 v58, a12 ; Reload Reuse196; CHECK-NEXT: v_accvgpr_read_b32 v57, a11 ; Reload Reuse197; CHECK-NEXT: v_accvgpr_read_b32 v56, a10 ; Reload Reuse198; CHECK-NEXT: v_accvgpr_read_b32 v47, a9 ; Reload Reuse199; CHECK-NEXT: v_accvgpr_read_b32 v46, a8 ; Reload Reuse200; CHECK-NEXT: v_accvgpr_read_b32 v45, a7 ; Reload Reuse201; CHECK-NEXT: v_accvgpr_read_b32 v44, a6 ; Reload Reuse202; CHECK-NEXT: v_accvgpr_read_b32 v43, a5 ; Reload Reuse203; CHECK-NEXT: v_accvgpr_read_b32 v42, a4 ; Reload Reuse204; CHECK-NEXT: v_accvgpr_read_b32 v41, a3 ; Reload Reuse205; CHECK-NEXT: v_accvgpr_read_b32 v40, a2 ; Reload Reuse206; CHECK-NEXT: s_waitcnt lgkmcnt(0)207; CHECK-NEXT: s_setpc_b64 s[30:31]208 %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 10209 %gep.1 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 24210 %op0 = call i32 asm sideeffect "; def $0", "=^VA"()211 %op1 = call i32 asm sideeffect "; def $0", "=^VA"()212 %vgpr.def = call { <32 x i32>, <32 x i32> } asm sideeffect "; def $0", "=${v[0:31]},=${v[32:63]}"()213 %vgpr.0 = extractvalue { <32 x i32>, <32 x i32> } %vgpr.def, 0214 %vgpr.1 = extractvalue { <32 x i32>, <32 x i32> } %vgpr.def, 1215 %permute = call i32 @llvm.amdgcn.ds.bpermute(i32 %op0, i32 %op1)216 call void asm sideeffect "; use $0", "{v[0:31]},{v[32:63]}"(<32 x i32> %vgpr.0, <32 x i32> %vgpr.1)217 ret i32 %permute218}219 220define void @ds_permute_b32_a_a__use_a(ptr addrspace(3) %lds) #0 {221; CHECK-LABEL: ds_permute_b32_a_a__use_a:222; CHECK: ; %bb.0:223; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)224; CHECK-NEXT: ;;#ASMSTART225; CHECK-NEXT: ; def a0226; CHECK-NEXT: ;;#ASMEND227; CHECK-NEXT: ;;#ASMSTART228; CHECK-NEXT: ; def a1229; CHECK-NEXT: ;;#ASMEND230; CHECK-NEXT: v_accvgpr_read_b32 v0, a0231; CHECK-NEXT: v_accvgpr_read_b32 v1, a1232; CHECK-NEXT: ds_permute_b32 v0, v0, v1233; CHECK-NEXT: s_waitcnt lgkmcnt(0)234; CHECK-NEXT: v_accvgpr_write_b32 a0, v0235; CHECK-NEXT: ;;#ASMSTART236; CHECK-NEXT: ; use a0237; CHECK-NEXT: ;;#ASMEND238; CHECK-NEXT: s_setpc_b64 s[30:31]239 %op0 = call i32 asm "; def $0", "=a"()240 %op1 = call i32 asm "; def $0", "=a"()241 %permute = call i32 @llvm.amdgcn.ds.permute(i32 %op0, i32 %op1)242 call void asm sideeffect "; use $0", "a"(i32 %permute)243 ret void244}245 246define void @ds_permute_b32_av_av__use_av(ptr addrspace(3) %lds) #0 {247; CHECK-LABEL: ds_permute_b32_av_av__use_av:248; CHECK: ; %bb.0:249; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)250; CHECK-NEXT: ;;#ASMSTART251; CHECK-NEXT: ; def v0252; CHECK-NEXT: ;;#ASMEND253; CHECK-NEXT: ;;#ASMSTART254; CHECK-NEXT: ; def v1255; CHECK-NEXT: ;;#ASMEND256; CHECK-NEXT: ds_permute_b32 v0, v0, v1257; CHECK-NEXT: s_waitcnt lgkmcnt(0)258; CHECK-NEXT: ;;#ASMSTART259; CHECK-NEXT: ; use v0260; CHECK-NEXT: ;;#ASMEND261; CHECK-NEXT: s_setpc_b64 s[30:31]262 %op0 = call i32 asm "; def $0", "=^VA"()263 %op1 = call i32 asm "; def $0", "=^VA"()264 %permute = call i32 @llvm.amdgcn.ds.permute(i32 %op0, i32 %op1)265 call void asm sideeffect "; use $0", "^VA"(i32 %permute)266 ret void267}268 269define i32 @ds_permute_b32_av_av_no_vgprs(ptr addrspace(3) %lds) #0 {270; CHECK-LABEL: ds_permute_b32_av_av_no_vgprs:271; CHECK: ; %bb.0:272; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)273; CHECK-NEXT: v_accvgpr_write_b32 a2, v40 ; Reload Reuse274; CHECK-NEXT: v_accvgpr_write_b32 a3, v41 ; Reload Reuse275; CHECK-NEXT: v_accvgpr_write_b32 a4, v42 ; Reload Reuse276; CHECK-NEXT: v_accvgpr_write_b32 a5, v43 ; Reload Reuse277; CHECK-NEXT: v_accvgpr_write_b32 a6, v44 ; Reload Reuse278; CHECK-NEXT: v_accvgpr_write_b32 a7, v45 ; Reload Reuse279; CHECK-NEXT: v_accvgpr_write_b32 a8, v46 ; Reload Reuse280; CHECK-NEXT: v_accvgpr_write_b32 a9, v47 ; Reload Reuse281; CHECK-NEXT: v_accvgpr_write_b32 a10, v56 ; Reload Reuse282; CHECK-NEXT: v_accvgpr_write_b32 a11, v57 ; Reload Reuse283; CHECK-NEXT: v_accvgpr_write_b32 a12, v58 ; Reload Reuse284; CHECK-NEXT: v_accvgpr_write_b32 a13, v59 ; Reload Reuse285; CHECK-NEXT: v_accvgpr_write_b32 a14, v60 ; Reload Reuse286; CHECK-NEXT: v_accvgpr_write_b32 a15, v61 ; Reload Reuse287; CHECK-NEXT: v_accvgpr_write_b32 a16, v62 ; Reload Reuse288; CHECK-NEXT: v_accvgpr_write_b32 a17, v63 ; Reload Reuse289; CHECK-NEXT: ;;#ASMSTART290; CHECK-NEXT: ; def a0291; CHECK-NEXT: ;;#ASMEND292; CHECK-NEXT: ;;#ASMSTART293; CHECK-NEXT: ; def a1294; CHECK-NEXT: ;;#ASMEND295; CHECK-NEXT: ;;#ASMSTART296; CHECK-NEXT: ; def v[0:31]297; CHECK-NEXT: ;;#ASMEND298; CHECK-NEXT: ;;#ASMSTART299; CHECK-NEXT: ; use v[0:31]300; CHECK-NEXT: ;;#ASMEND301; CHECK-NEXT: v_accvgpr_read_b32 v0, a0302; CHECK-NEXT: v_accvgpr_read_b32 v1, a1303; CHECK-NEXT: ds_permute_b32 v0, v0, v1304; CHECK-NEXT: v_accvgpr_read_b32 v63, a17 ; Reload Reuse305; CHECK-NEXT: v_accvgpr_read_b32 v62, a16 ; Reload Reuse306; CHECK-NEXT: v_accvgpr_read_b32 v61, a15 ; Reload Reuse307; CHECK-NEXT: v_accvgpr_read_b32 v60, a14 ; Reload Reuse308; CHECK-NEXT: v_accvgpr_read_b32 v59, a13 ; Reload Reuse309; CHECK-NEXT: v_accvgpr_read_b32 v58, a12 ; Reload Reuse310; CHECK-NEXT: v_accvgpr_read_b32 v57, a11 ; Reload Reuse311; CHECK-NEXT: v_accvgpr_read_b32 v56, a10 ; Reload Reuse312; CHECK-NEXT: v_accvgpr_read_b32 v47, a9 ; Reload Reuse313; CHECK-NEXT: v_accvgpr_read_b32 v46, a8 ; Reload Reuse314; CHECK-NEXT: v_accvgpr_read_b32 v45, a7 ; Reload Reuse315; CHECK-NEXT: v_accvgpr_read_b32 v44, a6 ; Reload Reuse316; CHECK-NEXT: v_accvgpr_read_b32 v43, a5 ; Reload Reuse317; CHECK-NEXT: v_accvgpr_read_b32 v42, a4 ; Reload Reuse318; CHECK-NEXT: v_accvgpr_read_b32 v41, a3 ; Reload Reuse319; CHECK-NEXT: v_accvgpr_read_b32 v40, a2 ; Reload Reuse320; CHECK-NEXT: s_waitcnt lgkmcnt(0)321; CHECK-NEXT: s_setpc_b64 s[30:31]322 %gep.0 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 10323 %gep.1 = getelementptr inbounds [512 x i32], ptr addrspace(3) %lds, i32 0, i32 24324 %op0 = call i32 asm sideeffect "; def $0", "=^VA"()325 %op1 = call i32 asm sideeffect "; def $0", "=^VA"()326 %vgpr.def = call { <32 x i32>, <32 x i32> } asm sideeffect "; def $0", "=${v[0:31]},=${v[32:63]}"()327 %vgpr.0 = extractvalue { <32 x i32>, <32 x i32> } %vgpr.def, 0328 %vgpr.1 = extractvalue { <32 x i32>, <32 x i32> } %vgpr.def, 1329 %permute = call i32 @llvm.amdgcn.ds.permute(i32 %op0, i32 %op1)330 call void asm sideeffect "; use $0", "{v[0:31]},{v[32:63]}"(<32 x i32> %vgpr.0, <32 x i32> %vgpr.1)331 ret i32 %permute332}333 334attributes #0 = { nounwind "amdgpu-waves-per-eu"="10,10" }335