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1; RUN: llc -mtriple=amdgcn -mcpu=bonaire -mattr=+load-store-opt < %s | FileCheck -enable-var-scope -check-prefixes=GCN,CI %s2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=+load-store-opt < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s3 4@lds = addrspace(3) global [512 x float] poison, align 45@lds.f64 = addrspace(3) global [512 x double] poison, align 86 7 8; GCN-LABEL: @simple_read2st64_f32_0_19; CI: s_mov_b32 m010; GFX9-NOT: m011 12; GCN: ds_read2st64_b32 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]], v{{[0-9]+}} offset1:113; GCN: s_waitcnt lgkmcnt(0)14; GCN: v_add_f32_e32 [[RESULT:v[0-9]+]], v[[LO_VREG]], v[[HI_VREG]]15; CI: buffer_store_dword [[RESULT]]16; GFX9: global_store_dword v{{[0-9]+}}, [[RESULT]], s{{\[[0-9]+:[0-9]+\]}}17define amdgpu_kernel void @simple_read2st64_f32_0_1(ptr addrspace(1) %out) #0 {18 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #119 %arrayidx0 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %x.i20 %val0 = load float, ptr addrspace(3) %arrayidx0, align 421 %add.x = add nsw i32 %x.i, 6422 %arrayidx1 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %add.x23 %val1 = load float, ptr addrspace(3) %arrayidx1, align 424 %sum = fadd float %val0, %val125 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i32 %x.i26 store float %sum, ptr addrspace(1) %out.gep, align 427 ret void28}29 30; GCN-LABEL: @simple_read2st64_f32_1_231; CI: s_mov_b32 m032; GFX9-NOT: m033 34; GCN: ds_read2st64_b32 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]], v{{[0-9]+}} offset0:1 offset1:235; GCN: s_waitcnt lgkmcnt(0)36; GCN: v_add_f32_e32 [[RESULT:v[0-9]+]], v[[LO_VREG]], v[[HI_VREG]]37; CI: buffer_store_dword [[RESULT]]38; GFX9: global_store_dword v{{[0-9]+}}, [[RESULT]], s{{\[[0-9]+:[0-9]+\]}}39define amdgpu_kernel void @simple_read2st64_f32_1_2(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {40 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #141 %add.x.0 = add nsw i32 %x.i, 6442 %arrayidx0 = getelementptr inbounds float, ptr addrspace(3) %lds, i32 %add.x.043 %val0 = load float, ptr addrspace(3) %arrayidx0, align 444 %add.x.1 = add nsw i32 %x.i, 12845 %arrayidx1 = getelementptr inbounds float, ptr addrspace(3) %lds, i32 %add.x.146 %val1 = load float, ptr addrspace(3) %arrayidx1, align 447 %sum = fadd float %val0, %val148 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i32 %x.i49 store float %sum, ptr addrspace(1) %out.gep, align 450 ret void51}52 53; GCN-LABEL: @simple_read2st64_f32_max_offset54; CI: s_mov_b32 m055; GFX9-NOT: m056 57; GCN: ds_read2st64_b32 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]], v{{[0-9]+}} offset0:1 offset1:25558; GCN: s_waitcnt lgkmcnt(0)59; GCN: v_add_f32_e32 [[RESULT:v[0-9]+]], v[[LO_VREG]], v[[HI_VREG]]60; CI: buffer_store_dword [[RESULT]]61; GFX9: global_store_dword v{{[0-9]+}}, [[RESULT]], s{{\[[0-9]+:[0-9]+\]}}62define amdgpu_kernel void @simple_read2st64_f32_max_offset(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {63 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #164 %add.x.0 = add nsw i32 %x.i, 6465 %arrayidx0 = getelementptr inbounds float, ptr addrspace(3) %lds, i32 %add.x.066 %val0 = load float, ptr addrspace(3) %arrayidx0, align 467 %add.x.1 = add nsw i32 %x.i, 1632068 %arrayidx1 = getelementptr inbounds float, ptr addrspace(3) %lds, i32 %add.x.169 %val1 = load float, ptr addrspace(3) %arrayidx1, align 470 %sum = fadd float %val0, %val171 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i32 %x.i72 store float %sum, ptr addrspace(1) %out.gep, align 473 ret void74}75 76; GCN-LABEL: @simple_read2st64_f32_over_max_offset77; CI: s_mov_b32 m078; GFX9-NOT: m079 80; GCN-NOT: ds_read2st64_b3281; GCN-DAG: v_add_{{i|u}}32_e32 [[BIGADD:v[0-9]+]], {{(vcc, )?}}0x10000, {{v[0-9]+}}82; GCN-DAG: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:25683; GCN-DAG: ds_read_b32 {{v[0-9]+}}, [[BIGADD]]{{$}}84; GCN: s_endpgm85define amdgpu_kernel void @simple_read2st64_f32_over_max_offset(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {86 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #187 %add.x.0 = add nsw i32 %x.i, 6488 %arrayidx0 = getelementptr inbounds float, ptr addrspace(3) %lds, i32 %add.x.089 %val0 = load float, ptr addrspace(3) %arrayidx0, align 490 %add.x.1 = add nsw i32 %x.i, 1638491 %arrayidx1 = getelementptr inbounds float, ptr addrspace(3) %lds, i32 %add.x.192 %val1 = load float, ptr addrspace(3) %arrayidx1, align 493 %sum = fadd float %val0, %val194 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i32 %x.i95 store float %sum, ptr addrspace(1) %out.gep, align 496 ret void97}98 99; GCN-LABEL: @odd_invalid_read2st64_f32_0100; CI: s_mov_b32 m0101; GFX9-NOT: m0102 103; GCN-NOT: ds_read2st64_b32104; GCN: s_endpgm105define amdgpu_kernel void @odd_invalid_read2st64_f32_0(ptr addrspace(1) %out) #0 {106 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1107 %arrayidx0 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %x.i108 %val0 = load float, ptr addrspace(3) %arrayidx0, align 4109 %add.x = add nsw i32 %x.i, 63110 %arrayidx1 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %add.x111 %val1 = load float, ptr addrspace(3) %arrayidx1, align 4112 %sum = fadd float %val0, %val1113 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i32 %x.i114 store float %sum, ptr addrspace(1) %out.gep, align 4115 ret void116}117 118; GCN-LABEL: @odd_invalid_read2st64_f32_1119; CI: s_mov_b32 m0120; GFX9-NOT: m0121 122; GCN-NOT: ds_read2st64_b32123; GCN: s_endpgm124define amdgpu_kernel void @odd_invalid_read2st64_f32_1(ptr addrspace(1) %out) #0 {125 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1126 %add.x.0 = add nsw i32 %x.i, 64127 %arrayidx0 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %add.x.0128 %val0 = load float, ptr addrspace(3) %arrayidx0, align 4129 %add.x.1 = add nsw i32 %x.i, 127130 %arrayidx1 = getelementptr inbounds [512 x float], ptr addrspace(3) @lds, i32 0, i32 %add.x.1131 %val1 = load float, ptr addrspace(3) %arrayidx1, align 4132 %sum = fadd float %val0, %val1133 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i32 %x.i134 store float %sum, ptr addrspace(1) %out.gep, align 4135 ret void136}137 138; GCN-LABEL: @simple_read2st64_f64_0_1139; CI: s_mov_b32 m0140; GFX9-NOT: m0141 142; GCN: ds_read2st64_b64 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]], v{{[0-9]+}} offset1:1143; GCN: s_waitcnt lgkmcnt(0)144; GCN: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], v[[[LO_VREG]]:{{[0-9]+\]}}, v{{\[[0-9]+}}:[[HI_VREG]]]145; CI: buffer_store_dwordx2 [[RESULT]]146; GFX9: global_store_dwordx2 v{{[0-9]+}}, [[RESULT]], s{{\[[0-9]+:[0-9]+\]}}147define amdgpu_kernel void @simple_read2st64_f64_0_1(ptr addrspace(1) %out) #0 {148 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1149 %arrayidx0 = getelementptr inbounds [512 x double], ptr addrspace(3) @lds.f64, i32 0, i32 %x.i150 %val0 = load double, ptr addrspace(3) %arrayidx0, align 8151 %add.x = add nsw i32 %x.i, 64152 %arrayidx1 = getelementptr inbounds [512 x double], ptr addrspace(3) @lds.f64, i32 0, i32 %add.x153 %val1 = load double, ptr addrspace(3) %arrayidx1, align 8154 %sum = fadd double %val0, %val1155 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i156 store double %sum, ptr addrspace(1) %out.gep, align 8157 ret void158}159 160; GCN-LABEL: @simple_read2st64_f64_1_2161; CI: s_mov_b32 m0162; GFX9-NOT: m0163 164; GCN: ds_read2st64_b64 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]], v{{[0-9]+}} offset0:1 offset1:2165; GCN: s_waitcnt lgkmcnt(0)166; GCN: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], v[[[LO_VREG]]:{{[0-9]+\]}}, v{{\[[0-9]+}}:[[HI_VREG]]]167 168; CI: buffer_store_dwordx2 [[RESULT]]169; GFX9: global_store_dwordx2 v{{[0-9]+}}, [[RESULT]], s{{\[[0-9]+:[0-9]+\]}}170define amdgpu_kernel void @simple_read2st64_f64_1_2(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {171 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1172 %add.x.0 = add nsw i32 %x.i, 64173 %arrayidx0 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.0174 %val0 = load double, ptr addrspace(3) %arrayidx0, align 8175 %add.x.1 = add nsw i32 %x.i, 128176 %arrayidx1 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.1177 %val1 = load double, ptr addrspace(3) %arrayidx1, align 8178 %sum = fadd double %val0, %val1179 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i180 store double %sum, ptr addrspace(1) %out.gep, align 8181 ret void182}183 184; Alignment only185 186; GCN-LABEL: @misaligned_read2st64_f64187; CI: s_mov_b32 m0188; GFX9-NOT: m0189 190; GCN: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset1:1191; GCN: ds_read2_b32 v{{\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset0:128 offset1:129192; GCN: s_endpgm193define amdgpu_kernel void @misaligned_read2st64_f64(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {194 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1195 %arrayidx0 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %x.i196 %val0 = load double, ptr addrspace(3) %arrayidx0, align 4197 %add.x = add nsw i32 %x.i, 64198 %arrayidx1 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x199 %val1 = load double, ptr addrspace(3) %arrayidx1, align 4200 %sum = fadd double %val0, %val1201 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i202 store double %sum, ptr addrspace(1) %out.gep, align 4203 ret void204}205 206; The maximum is not the usual 0xff because 0xff * 8 * 64 > 0xffff207; GCN-LABEL: @simple_read2st64_f64_max_offset208; CI: s_mov_b32 m0209; GFX9-NOT: m0210 211; GCN: ds_read2st64_b64 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]], v{{[0-9]+}} offset0:4 offset1:127212; GCN: s_waitcnt lgkmcnt(0)213; GCN: v_add_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], v[[[LO_VREG]]:{{[0-9]+\]}}, v{{\[[0-9]+}}:[[HI_VREG]]]214 215; CI: buffer_store_dwordx2 [[RESULT]]216; GFX9: global_store_dwordx2 v{{[0-9]+}}, [[RESULT]], s{{\[[0-9]+:[0-9]+\]}}217define amdgpu_kernel void @simple_read2st64_f64_max_offset(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {218 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1219 %add.x.0 = add nsw i32 %x.i, 256220 %arrayidx0 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.0221 %val0 = load double, ptr addrspace(3) %arrayidx0, align 8222 %add.x.1 = add nsw i32 %x.i, 8128223 %arrayidx1 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.1224 %val1 = load double, ptr addrspace(3) %arrayidx1, align 8225 %sum = fadd double %val0, %val1226 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i227 store double %sum, ptr addrspace(1) %out.gep, align 8228 ret void229}230 231; GCN-LABEL: @simple_read2st64_f64_over_max_offset232; CI: s_mov_b32 m0233; GFX9-NOT: m0234 235; GCN-NOT: ds_read2st64_b64236; GCN-DAG: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset:512237; GCN-DAG: v_add_{{i|u}}32_e32 [[BIGADD:v[0-9]+]], {{(vcc, )?}}0x10000, {{v[0-9]+}}238; GCN: ds_read_b64 {{v\[[0-9]+:[0-9]+\]}}, [[BIGADD]]239; GCN: s_endpgm240define amdgpu_kernel void @simple_read2st64_f64_over_max_offset(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {241 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1242 %add.x.0 = add nsw i32 %x.i, 64243 %arrayidx0 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.0244 %val0 = load double, ptr addrspace(3) %arrayidx0, align 8245 %add.x.1 = add nsw i32 %x.i, 8192246 %arrayidx1 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.1247 %val1 = load double, ptr addrspace(3) %arrayidx1, align 8248 %sum = fadd double %val0, %val1249 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i250 store double %sum, ptr addrspace(1) %out.gep, align 8251 ret void252}253 254; GCN-LABEL: @invalid_read2st64_f64_odd_offset255; CI: s_mov_b32 m0256; GFX9-NOT: m0257 258; GCN-NOT: ds_read2st64_b64259; GCN: s_endpgm260define amdgpu_kernel void @invalid_read2st64_f64_odd_offset(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {261 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1262 %add.x.0 = add nsw i32 %x.i, 64263 %arrayidx0 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.0264 %val0 = load double, ptr addrspace(3) %arrayidx0, align 8265 %add.x.1 = add nsw i32 %x.i, 8129266 %arrayidx1 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x.1267 %val1 = load double, ptr addrspace(3) %arrayidx1, align 8268 %sum = fadd double %val0, %val1269 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i270 store double %sum, ptr addrspace(1) %out.gep, align 8271 ret void272}273 274; The stride of 8 elements is 8 * 8 bytes. We need to make sure the275; stride in elements, not bytes, is a multiple of 64.276 277; GCN-LABEL: @byte_size_only_divisible_64_read2_f64278; CI: s_mov_b32 m0279; GFX9-NOT: m0280 281; GCN-NOT: ds_read2st_b64282; GCN: ds_read2_b64 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}} offset1:8283; GCN: s_endpgm284define amdgpu_kernel void @byte_size_only_divisible_64_read2_f64(ptr addrspace(1) %out, ptr addrspace(3) %lds) #0 {285 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1286 %arrayidx0 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %x.i287 %val0 = load double, ptr addrspace(3) %arrayidx0, align 8288 %add.x = add nsw i32 %x.i, 8289 %arrayidx1 = getelementptr inbounds double, ptr addrspace(3) %lds, i32 %add.x290 %val1 = load double, ptr addrspace(3) %arrayidx1, align 8291 %sum = fadd double %val0, %val1292 %out.gep = getelementptr inbounds double, ptr addrspace(1) %out, i32 %x.i293 store double %sum, ptr addrspace(1) %out.gep, align 4294 ret void295}296 297declare i32 @llvm.amdgcn.workitem.id.x() #1298declare i32 @llvm.amdgcn.workitem.id.y() #1299 300attributes #0 = { nounwind }301attributes #1 = { nounwind readnone }302