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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s4# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s5# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW64 %s6# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=MUBUFW32 %s7 8# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW64 %s9# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s10# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s11 12---13name: s_add_u32__inline_imm__fi_offset014tracksRegLiveness: true15stack:16 - { id: 0, size: 32, alignment: 16 }17machineFunctionInfo:18 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'19 frameOffsetReg: '$sgpr33'20 stackPtrOffsetReg: '$sgpr32'21body: |22 bb.0:23 ; MUBUFW64-LABEL: name: s_add_u32__inline_imm__fi_offset024 ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc25 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 12, $sgpr4, implicit-def dead $scc26 ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr727 ;28 ; MUBUFW32-LABEL: name: s_add_u32__inline_imm__fi_offset029 ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc30 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 12, $sgpr4, implicit-def dead $scc31 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr732 ;33 ; FLATSCRW64-LABEL: name: s_add_u32__inline_imm__fi_offset034 ; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 12, $sgpr32, implicit-def dead $scc35 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr736 ;37 ; FLATSCRW32-LABEL: name: s_add_u32__inline_imm__fi_offset038 ; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 12, $sgpr32, implicit-def dead $scc39 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr740 renamable $sgpr7 = S_ADD_U32 12, %stack.0, implicit-def dead $scc41 SI_RETURN implicit $sgpr742 43...44 45---46name: s_add_u32__kernel__literal__fi_offset96__offset_literal47tracksRegLiveness: true48stack:49 - { id: 0, size: 96, alignment: 16 }50 - { id: 1, size: 128, alignment: 4 }51machineFunctionInfo:52 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'53 frameOffsetReg: '$sgpr33'54 stackPtrOffsetReg: '$sgpr32'55 isEntryFunction: true56body: |57 bb.0:58 ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal59 ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr360 ; MUBUFW64-NEXT: {{ $}}61 ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr362 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr363 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 16464 ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr765 ;66 ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal67 ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr368 ; MUBUFW32-NEXT: {{ $}}69 ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr370 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr371 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 16472 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr773 ;74 ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal75 ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 16476 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr777 ;78 ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal79 ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 16480 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr781 renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def dead $scc82 SI_RETURN implicit $sgpr783...84 85---86name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc87tracksRegLiveness: true88stack:89 - { id: 0, size: 96, alignment: 16 }90 - { id: 1, size: 128, alignment: 4 }91machineFunctionInfo:92 scratchRSrcReg: '$sgpr0_sgpr1_sgpr2_sgpr3'93 frameOffsetReg: '$sgpr33'94 stackPtrOffsetReg: '$sgpr32'95 isEntryFunction: true96body: |97 bb.0:98 ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc99 ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3100 ; MUBUFW64-NEXT: {{ $}}101 ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3102 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3103 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc104 ; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc105 ;106 ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc107 ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3108 ; MUBUFW32-NEXT: {{ $}}109 ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3110 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3111 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc112 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc113 ;114 ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc115 ; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc116 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc117 ;118 ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc119 ; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc120 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc121 renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def $scc122 SI_RETURN implicit $sgpr7, implicit $scc123...124