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1; RUN: llc -mtriple=amdgcn -mcpu=verde < %s | FileCheck %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck %s3 4; CHECK-LABEL: {{^}}else_no_execfix:5; CHECK: ; %Flow6; CHECK-NEXT: s_andn2_saveexec_b64 [[DST:s\[[0-9]+:[0-9]+\]]], [[DST]]7define amdgpu_ps float @else_no_execfix(i32 %z, float %v) #0 {8main_body:9 %cc = icmp sgt i32 %z, 510 br i1 %cc, label %if, label %else11 12if:13 %v.if = fmul float %v, 2.014 br label %end15 16else:17 %v.else = fmul float %v, 3.018 br label %end19 20end:21 %r = phi float [ %v.if, %if ], [ %v.else, %else ]22 ret float %r23}24 25; CHECK-LABEL: {{^}}else_execfix_leave_wqm:26; CHECK: ; %bb.0:27; CHECK-NEXT: s_mov_b64 [[INIT_EXEC:s\[[0-9]+:[0-9]+\]]], exec28; CHECK: ; %Flow29; CHECK-NEXT: s_or_saveexec_b64 [[DST:s\[[0-9]+:[0-9]+\]]],30; CHECK-NEXT: s_and_b64 exec, exec, [[INIT_EXEC]]31; CHECK-NEXT: s_and_b64 [[AND_INIT:s\[[0-9]+:[0-9]+\]]], exec, [[DST]]32; CHECK-NEXT: s_xor_b64 exec, exec, [[AND_INIT]]33define amdgpu_ps void @else_execfix_leave_wqm(i32 %z, float %v) #0 {34main_body:35 %cc = icmp sgt i32 %z, 536 br i1 %cc, label %if, label %else37 38if:39 %v.if = fmul float %v, 2.040 br label %end41 42else:43 %c = fmul float %v, 3.044 %tex = call <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 15, float %c, <8 x i32> poison, <4 x i32> poison, i1 0, i32 0, i32 0)45 %v.else = extractelement <4 x float> %tex, i32 046 br label %end47 48end:49 %r = phi float [ %v.if, %if ], [ %v.else, %else ]50 call void @llvm.amdgcn.raw.ptr.buffer.store.f32(float %r, ptr addrspace(8) poison, i32 0, i32 0, i32 0)51 ret void52}53 54declare void @llvm.amdgcn.raw.ptr.buffer.store.f32(float, ptr addrspace(8), i32, i32, i32 immarg) #155declare <4 x float> @llvm.amdgcn.image.sample.1d.v4f32.f32(i32 immarg, float, <8 x i32>, <4 x i32>, i1 immarg, i32 immarg, i32 immarg) #256 57attributes #0 = { nounwind }58attributes #1 = { nounwind writeonly }59attributes #2 = { nounwind readonly }60