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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s3 4; FIXME: Inefficient codegen which skips an optimization of load +5; extractelement when the vector element type is not byte-sized.6define i1 @extractloadi1(ptr %ptr, i32 %idx) {7; CHECK-LABEL: extractloadi1:8; CHECK: ; %bb.0:9; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10; CHECK-NEXT: flat_load_ubyte v0, v[0:1]11; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)12; CHECK-NEXT: v_lshrrev_b32_e32 v1, 2, v013; CHECK-NEXT: v_lshlrev_b32_e32 v3, 5, v014; CHECK-NEXT: v_and_b32_e32 v4, 2, v015; CHECK-NEXT: v_lshrrev_b32_e32 v5, 6, v016; CHECK-NEXT: v_lshrrev_b32_e32 v6, 4, v017; CHECK-NEXT: v_lshlrev_b32_e32 v7, 3, v018; CHECK-NEXT: v_lshlrev_b32_e32 v8, 1, v019; CHECK-NEXT: v_or_b32_e32 v1, v1, v320; CHECK-NEXT: v_and_b32_e32 v3, 0x100, v721; CHECK-NEXT: v_and_b32_e32 v7, 0x100, v822; CHECK-NEXT: v_lshlrev_b32_e32 v4, 7, v423; CHECK-NEXT: v_or_b32_e32 v3, v6, v324; CHECK-NEXT: v_or_b32_e32 v5, v5, v725; CHECK-NEXT: v_or_b32_e32 v0, v0, v426; CHECK-NEXT: v_and_b32_e32 v1, 0x103, v127; CHECK-NEXT: v_lshlrev_b32_e32 v4, 16, v528; CHECK-NEXT: v_lshlrev_b32_e32 v5, 16, v129; CHECK-NEXT: v_or_b32_e32 v1, v3, v430; CHECK-NEXT: v_or_b32_e32 v0, v0, v531; CHECK-NEXT: v_lshlrev_b32_e32 v2, 3, v232; CHECK-NEXT: v_lshr_b64 v[0:1], v[0:1], v233; CHECK-NEXT: s_setpc_b64 s[30:31]34 %val = load <8 x i1>, ptr %ptr35 %ret = extractelement <8 x i1> %val, i32 %idx36 ret i1 %ret37}38