127 lines · plain
1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=GCN %s2 3; GCN-LABEL: {{^}}store_build_vector_multiple_uses_v4i32:4; GCN: buffer_load_dword5; GCN: buffer_load_dword6; GCN: buffer_load_dword7; GCN: buffer_load_dword8 9; GCN: buffer_store_dwordx410; GCN: buffer_store_dwordx411 12; GCN: buffer_store_dword13; GCN: buffer_store_dword14; GCN: buffer_store_dword15; GCN: buffer_store_dword16define amdgpu_kernel void @store_build_vector_multiple_uses_v4i32(ptr addrspace(1) noalias %out0,17 ptr addrspace(1) noalias %out1,18 ptr addrspace(1) noalias %out2,19 ptr addrspace(1) %in) {20 %elt0 = load volatile i32, ptr addrspace(1) %in21 %elt1 = load volatile i32, ptr addrspace(1) %in22 %elt2 = load volatile i32, ptr addrspace(1) %in23 %elt3 = load volatile i32, ptr addrspace(1) %in24 25 %vec0 = insertelement <4 x i32> poison, i32 %elt0, i32 026 %vec1 = insertelement <4 x i32> %vec0, i32 %elt1, i32 127 %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 228 %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 329 30 store <4 x i32> %vec3, ptr addrspace(1) %out031 store <4 x i32> %vec3, ptr addrspace(1) %out132 33 %extract0 = extractelement <4 x i32> %vec3, i32 034 %extract1 = extractelement <4 x i32> %vec3, i32 135 %extract2 = extractelement <4 x i32> %vec3, i32 236 %extract3 = extractelement <4 x i32> %vec3, i32 337 38 store volatile i32 %extract0, ptr addrspace(1) %out239 store volatile i32 %extract1, ptr addrspace(1) %out240 store volatile i32 %extract2, ptr addrspace(1) %out241 store volatile i32 %extract3, ptr addrspace(1) %out242 43 ret void44}45 46; GCN-LABEL: {{^}}store_build_vector_multiple_extract_uses_v4i32:47; GCN: buffer_load_dword48; GCN: buffer_load_dword49; GCN: buffer_load_dword50; GCN: buffer_load_dword51 52; GCN: buffer_store_dwordx453 54; GCN: buffer_store_dword55; GCN: buffer_store_dword56; GCN: buffer_store_dword57; GCN: buffer_store_dword58define amdgpu_kernel void @store_build_vector_multiple_extract_uses_v4i32(ptr addrspace(1) noalias %out0,59 ptr addrspace(1) noalias %out1,60 ptr addrspace(1) noalias %out2,61 ptr addrspace(1) %in) {62 %elt0 = load volatile i32, ptr addrspace(1) %in63 %elt1 = load volatile i32, ptr addrspace(1) %in64 %elt2 = load volatile i32, ptr addrspace(1) %in65 %elt3 = load volatile i32, ptr addrspace(1) %in66 67 %vec0 = insertelement <4 x i32> poison, i32 %elt0, i32 068 %vec1 = insertelement <4 x i32> %vec0, i32 %elt1, i32 169 %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 270 %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 371 72 %extract0 = extractelement <4 x i32> %vec3, i32 073 %extract1 = extractelement <4 x i32> %vec3, i32 174 %extract2 = extractelement <4 x i32> %vec3, i32 275 %extract3 = extractelement <4 x i32> %vec3, i32 376 77 %op0 = add i32 %extract0, 378 %op1 = sub i32 %extract1, 979 %op2 = xor i32 %extract2, 123141280 %op3 = and i32 %extract3, 25823341231281 82 store <4 x i32> %vec3, ptr addrspace(1) %out083 84 store volatile i32 %op0, ptr addrspace(1) %out285 store volatile i32 %op1, ptr addrspace(1) %out286 store volatile i32 %op2, ptr addrspace(1) %out287 store volatile i32 %op3, ptr addrspace(1) %out288 89 ret void90}91 92; GCN-LABEL: {{^}}store_build_vector_multiple_uses_v4i32_bitcast_to_v2i64:93; GCN: buffer_load_dword94; GCN: buffer_load_dword95; GCN: buffer_load_dword96; GCN: buffer_load_dword97 98; GCN: buffer_store_dwordx499 100; GCN: buffer_store_dwordx2101; GCN: buffer_store_dwordx2102define amdgpu_kernel void @store_build_vector_multiple_uses_v4i32_bitcast_to_v2i64(ptr addrspace(1) noalias %out0,103 ptr addrspace(1) noalias %out1,104 ptr addrspace(1) noalias %out2,105 ptr addrspace(1) %in) {106 %elt0 = load volatile i32, ptr addrspace(1) %in107 %elt1 = load volatile i32, ptr addrspace(1) %in108 %elt2 = load volatile i32, ptr addrspace(1) %in109 %elt3 = load volatile i32, ptr addrspace(1) %in110 111 %vec0 = insertelement <4 x i32> poison, i32 %elt0, i32 0112 %vec1 = insertelement <4 x i32> %vec0, i32 %elt1, i32 1113 %vec2 = insertelement <4 x i32> %vec1, i32 %elt2, i32 2114 %vec3 = insertelement <4 x i32> %vec2, i32 %elt3, i32 3115 116 %bc.vec3 = bitcast <4 x i32> %vec3 to <2 x i64>117 store <2 x i64> %bc.vec3, ptr addrspace(1) %out0118 119 %extract0 = extractelement <2 x i64> %bc.vec3, i32 0120 %extract1 = extractelement <2 x i64> %bc.vec3, i32 1121 122 store volatile i64 %extract0, ptr addrspace(1) %out2123 store volatile i64 %extract1, ptr addrspace(1) %out2124 125 ret void126}127