94 lines · plain
1; RUN: llc -mtriple=amdgcn-- < %s | FileCheck -check-prefix=GCN %s2; RUN: llc -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=GCN %s3 4; How the replacement of i64 stores with v2i32 stores resulted in5; breaking other users of the bitcast if they already existed6 7; GCN-LABEL: {{^}}extract_vector_elt_select_error:8; GCN: buffer_store_dword9; GCN: buffer_store_dword10; GCN: buffer_store_dwordx211define amdgpu_kernel void @extract_vector_elt_select_error(ptr addrspace(1) %out, ptr addrspace(1) %in, i64 %val) #0 {12 %vec = bitcast i64 %val to <2 x i32>13 %elt0 = extractelement <2 x i32> %vec, i32 014 %elt1 = extractelement <2 x i32> %vec, i32 115 16 store volatile i32 %elt0, ptr addrspace(1) %out17 store volatile i32 %elt1, ptr addrspace(1) %out18 store volatile i64 %val, ptr addrspace(1) %in19 ret void20}21 22; GCN-LABEL: {{^}}extract_vector_elt_v2i64:23define amdgpu_kernel void @extract_vector_elt_v2i64(ptr addrspace(1) %out, <2 x i64> %foo) #0 {24 %p0 = extractelement <2 x i64> %foo, i32 025 %p1 = extractelement <2 x i64> %foo, i32 126 %out1 = getelementptr i64, ptr addrspace(1) %out, i32 127 store volatile i64 %p1, ptr addrspace(1) %out28 store volatile i64 %p0, ptr addrspace(1) %out129 ret void30}31 32; GCN-LABEL: {{^}}dyn_extract_vector_elt_v2i64:33; GCN-NOT: buffer_load34; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 135; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}36; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}37; GCN: store_dwordx2 v[{{[0-9:]+}}]38define amdgpu_kernel void @dyn_extract_vector_elt_v2i64(ptr addrspace(1) %out, <2 x i64> %foo, i32 %elt) #0 {39 %dynelt = extractelement <2 x i64> %foo, i32 %elt40 store volatile i64 %dynelt, ptr addrspace(1) %out41 ret void42}43 44; GCN-LABEL: {{^}}dyn_extract_vector_elt_v2i64_2:45; GCN: buffer_load_dwordx446; GCN-NOT: buffer_load47; GCN-DAG: s_cmp_eq_u32 [[IDX:s[0-9]+]], 148; GCN-DAG: s_cselect_b64 [[C1:[^,]+]], -1, 049; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C1]]50; GCN-DAG: v_cndmask_b32_e{{32|64}} v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, [[C1]]51; GCN: store_dwordx2 v[{{[0-9:]+}}]52define amdgpu_kernel void @dyn_extract_vector_elt_v2i64_2(ptr addrspace(1) %out, ptr addrspace(1) %foo, i32 %elt, <2 x i64> %arst) #0 {53 %load = load volatile <2 x i64>, ptr addrspace(1) %foo54 %or = or <2 x i64> %load, %arst55 %dynelt = extractelement <2 x i64> %or, i32 %elt56 store volatile i64 %dynelt, ptr addrspace(1) %out57 ret void58}59 60; GCN-LABEL: {{^}}dyn_extract_vector_elt_v3i64:61; GCN-NOT: buffer_load62; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 163; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}64; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}65; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 266; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}67; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}68; GCN: store_dwordx2 v[{{[0-9:]+}}]69define amdgpu_kernel void @dyn_extract_vector_elt_v3i64(ptr addrspace(1) %out, <3 x i64> %foo, i32 %elt) #0 {70 %dynelt = extractelement <3 x i64> %foo, i32 %elt71 store volatile i64 %dynelt, ptr addrspace(1) %out72 ret void73}74 75; GCN-LABEL: {{^}}dyn_extract_vector_elt_v4i64:76; GCN-NOT: buffer_load77; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 178; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}79; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}80; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 281; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}82; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}83; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 384; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}85; GCN-DAG: s_cselect_b32 s{{[0-9]+}}, s{{[0-9]+}}, s{{[0-9]+}}86; GCN: store_dwordx2 v[{{[0-9:]+}}]87define amdgpu_kernel void @dyn_extract_vector_elt_v4i64(ptr addrspace(1) %out, <4 x i64> %foo, i32 %elt) #0 {88 %dynelt = extractelement <4 x i64> %foo, i32 %elt89 store volatile i64 %dynelt, ptr addrspace(1) %out90 ret void91}92 93attributes #0 = { nounwind }94