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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -march=amdgcn < %s | FileCheck -check-prefix=SI %s3 4declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone5 6declare double @fabs(double) readnone7declare double @llvm.fabs.f64(double) readnone8declare <2 x double> @llvm.fabs.v2f64(<2 x double>) readnone9declare <4 x double> @llvm.fabs.v4f64(<4 x double>) readnone10 11define amdgpu_kernel void @v_fabs_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) {12; SI-LABEL: v_fabs_f64:13; SI: ; %bb.0:14; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x915; SI-NEXT: s_mov_b32 s7, 0xf00016; SI-NEXT: s_mov_b32 s10, 017; SI-NEXT: v_lshlrev_b32_e32 v0, 3, v018; SI-NEXT: v_mov_b32_e32 v1, 019; SI-NEXT: s_mov_b32 s11, s720; SI-NEXT: s_waitcnt lgkmcnt(0)21; SI-NEXT: s_mov_b64 s[8:9], s[2:3]22; SI-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[8:11], 0 addr6423; SI-NEXT: s_mov_b32 s6, -124; SI-NEXT: s_mov_b32 s4, s025; SI-NEXT: s_mov_b32 s5, s126; SI-NEXT: s_waitcnt vmcnt(0)27; SI-NEXT: v_and_b32_e32 v1, 0x7fffffff, v128; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 029; SI-NEXT: s_endpgm30 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone31 %tidext = sext i32 %tid to i6432 %gep = getelementptr double, ptr addrspace(1) %in, i64 %tidext33 %val = load double, ptr addrspace(1) %gep, align 834 %fabs = call double @llvm.fabs.f64(double %val)35 store double %fabs, ptr addrspace(1) %out36 ret void37}38 39define amdgpu_kernel void @fabs_f64(ptr addrspace(1) %out, double %in) {40; SI-LABEL: fabs_f64:41; SI: ; %bb.0:42; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x943; SI-NEXT: s_mov_b32 s7, 0xf00044; SI-NEXT: s_waitcnt lgkmcnt(0)45; SI-NEXT: s_bitset0_b32 s3, 3146; SI-NEXT: s_mov_b32 s6, -147; SI-NEXT: s_mov_b32 s4, s048; SI-NEXT: s_mov_b32 s5, s149; SI-NEXT: v_mov_b32_e32 v0, s250; SI-NEXT: v_mov_b32_e32 v1, s351; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 052; SI-NEXT: s_endpgm53 %fabs = call double @llvm.fabs.f64(double %in)54 store double %fabs, ptr addrspace(1) %out55 ret void56}57 58define amdgpu_kernel void @fabs_v2f64(ptr addrspace(1) %out, <2 x double> %in) {59; SI-LABEL: fabs_v2f64:60; SI: ; %bb.0:61; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd62; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x963; SI-NEXT: s_mov_b32 s7, 0xf00064; SI-NEXT: s_waitcnt lgkmcnt(0)65; SI-NEXT: s_bitset0_b32 s3, 3166; SI-NEXT: s_bitset0_b32 s1, 3167; SI-NEXT: s_mov_b32 s6, -168; SI-NEXT: v_mov_b32_e32 v0, s069; SI-NEXT: v_mov_b32_e32 v2, s270; SI-NEXT: v_mov_b32_e32 v1, s171; SI-NEXT: v_mov_b32_e32 v3, s372; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 073; SI-NEXT: s_endpgm74 %fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %in)75 store <2 x double> %fabs, ptr addrspace(1) %out76 ret void77}78 79define amdgpu_kernel void @fabs_v4f64(ptr addrspace(1) %out, <4 x double> %in) {80; SI-LABEL: fabs_v4f64:81; SI: ; %bb.0:82; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x1183; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x984; SI-NEXT: s_mov_b32 s3, 0xf00085; SI-NEXT: s_mov_b32 s2, -186; SI-NEXT: s_waitcnt lgkmcnt(0)87; SI-NEXT: s_and_b32 s4, s11, 0x7fffffff88; SI-NEXT: s_and_b32 s5, s15, 0x7fffffff89; SI-NEXT: s_and_b32 s6, s13, 0x7fffffff90; SI-NEXT: s_and_b32 s7, s9, 0x7fffffff91; SI-NEXT: v_mov_b32_e32 v0, s1292; SI-NEXT: v_mov_b32_e32 v2, s1493; SI-NEXT: v_mov_b32_e32 v4, s894; SI-NEXT: v_mov_b32_e32 v6, s1095; SI-NEXT: v_mov_b32_e32 v1, s696; SI-NEXT: v_mov_b32_e32 v3, s597; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:1698; SI-NEXT: v_mov_b32_e32 v5, s799; SI-NEXT: v_mov_b32_e32 v7, s4100; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0101; SI-NEXT: s_endpgm102 %fabs = call <4 x double> @llvm.fabs.v4f64(<4 x double> %in)103 store <4 x double> %fabs, ptr addrspace(1) %out104 ret void105}106 107define amdgpu_kernel void @fabs_fold_f64(ptr addrspace(1) %out, [8 x i32], double %in0, [8 x i32], double %in1) {108; SI-LABEL: fabs_fold_f64:109; SI: ; %bb.0:110; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x1d111; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x13112; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9113; SI-NEXT: s_mov_b32 s3, 0xf000114; SI-NEXT: s_mov_b32 s2, -1115; SI-NEXT: s_waitcnt lgkmcnt(0)116; SI-NEXT: v_mov_b32_e32 v0, s6117; SI-NEXT: v_mov_b32_e32 v1, s7118; SI-NEXT: v_mul_f64 v[0:1], |s[8:9]|, v[0:1]119; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0120; SI-NEXT: s_endpgm121 %fabs = call double @llvm.fabs.f64(double %in0)122 %fmul = fmul double %fabs, %in1123 store double %fmul, ptr addrspace(1) %out124 ret void125}126 127define amdgpu_kernel void @fabs_fn_fold_f64(ptr addrspace(1) %out, [8 x i32], double %in0, [8 x i32], double %in1) {128; SI-LABEL: fabs_fn_fold_f64:129; SI: ; %bb.0:130; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x1d131; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x13132; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9133; SI-NEXT: s_mov_b32 s3, 0xf000134; SI-NEXT: s_mov_b32 s2, -1135; SI-NEXT: s_waitcnt lgkmcnt(0)136; SI-NEXT: v_mov_b32_e32 v0, s6137; SI-NEXT: v_mov_b32_e32 v1, s7138; SI-NEXT: v_mul_f64 v[0:1], |s[8:9]|, v[0:1]139; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0140; SI-NEXT: s_endpgm141 %fabs = call double @fabs(double %in0)142 %fmul = fmul double %fabs, %in1143 store double %fmul, ptr addrspace(1) %out144 ret void145}146 147define amdgpu_kernel void @fabs_free_f64(ptr addrspace(1) %out, i64 %in) {148; SI-LABEL: fabs_free_f64:149; SI: ; %bb.0:150; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9151; SI-NEXT: s_mov_b32 s7, 0xf000152; SI-NEXT: s_waitcnt lgkmcnt(0)153; SI-NEXT: s_bitset0_b32 s3, 31154; SI-NEXT: s_mov_b32 s6, -1155; SI-NEXT: s_mov_b32 s4, s0156; SI-NEXT: s_mov_b32 s5, s1157; SI-NEXT: v_mov_b32_e32 v0, s2158; SI-NEXT: v_mov_b32_e32 v1, s3159; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0160; SI-NEXT: s_endpgm161 %bc= bitcast i64 %in to double162 %fabs = call double @llvm.fabs.f64(double %bc)163 store double %fabs, ptr addrspace(1) %out164 ret void165}166 167define amdgpu_kernel void @fabs_fn_free_f64(ptr addrspace(1) %out, i64 %in) {168; SI-LABEL: fabs_fn_free_f64:169; SI: ; %bb.0:170; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9171; SI-NEXT: s_mov_b32 s7, 0xf000172; SI-NEXT: s_waitcnt lgkmcnt(0)173; SI-NEXT: s_bitset0_b32 s3, 31174; SI-NEXT: s_mov_b32 s6, -1175; SI-NEXT: s_mov_b32 s4, s0176; SI-NEXT: s_mov_b32 s5, s1177; SI-NEXT: v_mov_b32_e32 v0, s2178; SI-NEXT: v_mov_b32_e32 v1, s3179; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0180; SI-NEXT: s_endpgm181 %bc= bitcast i64 %in to double182 %fabs = call double @fabs(double %bc)183 store double %fabs, ptr addrspace(1) %out184 ret void185}186