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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -march=amdgcn -enable-misched=0 < %s | FileCheck -check-prefixes=GCN,SI %s3; RUN: llc -march=amdgcn -mcpu=tonga -enable-misched=0 < %s | FileCheck -check-prefixes=GCN,VI %s4 5 6; DAGCombiner will transform:7; (fabsf (f32 bitcast (i32 a))) => (f32 bitcast (and (i32 a), 0x7FFFFFFF))8; unless isFabsFree returns true9define amdgpu_kernel void @s_fabsf_fn_free(ptr addrspace(1) %out, i32 %in) {10; SI-LABEL: s_fabsf_fn_free:11; SI: ; %bb.0:12; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x913; SI-NEXT: s_load_dword s4, s[4:5], 0xb14; SI-NEXT: s_mov_b32 s3, 0xf00015; SI-NEXT: s_mov_b32 s2, -116; SI-NEXT: s_waitcnt lgkmcnt(0)17; SI-NEXT: s_bitset0_b32 s4, 3118; SI-NEXT: v_mov_b32_e32 v0, s419; SI-NEXT: buffer_store_dword v0, off, s[0:3], 020; SI-NEXT: s_endpgm21;22; VI-LABEL: s_fabsf_fn_free:23; VI: ; %bb.0:24; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2425; VI-NEXT: s_load_dword s2, s[4:5], 0x2c26; VI-NEXT: s_waitcnt lgkmcnt(0)27; VI-NEXT: v_mov_b32_e32 v0, s028; VI-NEXT: s_bitset0_b32 s2, 3129; VI-NEXT: v_mov_b32_e32 v1, s130; VI-NEXT: v_mov_b32_e32 v2, s231; VI-NEXT: flat_store_dword v[0:1], v232; VI-NEXT: s_endpgm33 %bc= bitcast i32 %in to float34 %fabs = call float @fabsf(float %bc)35 store float %fabs, ptr addrspace(1) %out36 ret void37}38 39define amdgpu_kernel void @s_fabsf_free(ptr addrspace(1) %out, i32 %in) {40; SI-LABEL: s_fabsf_free:41; SI: ; %bb.0:42; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x943; SI-NEXT: s_load_dword s4, s[4:5], 0xb44; SI-NEXT: s_mov_b32 s3, 0xf00045; SI-NEXT: s_mov_b32 s2, -146; SI-NEXT: s_waitcnt lgkmcnt(0)47; SI-NEXT: s_bitset0_b32 s4, 3148; SI-NEXT: v_mov_b32_e32 v0, s449; SI-NEXT: buffer_store_dword v0, off, s[0:3], 050; SI-NEXT: s_endpgm51;52; VI-LABEL: s_fabsf_free:53; VI: ; %bb.0:54; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2455; VI-NEXT: s_load_dword s2, s[4:5], 0x2c56; VI-NEXT: s_waitcnt lgkmcnt(0)57; VI-NEXT: v_mov_b32_e32 v0, s058; VI-NEXT: s_bitset0_b32 s2, 3159; VI-NEXT: v_mov_b32_e32 v1, s160; VI-NEXT: v_mov_b32_e32 v2, s261; VI-NEXT: flat_store_dword v[0:1], v262; VI-NEXT: s_endpgm63 %bc= bitcast i32 %in to float64 %fabs = call float @llvm.fabs.f32(float %bc)65 store float %fabs, ptr addrspace(1) %out66 ret void67}68 69define amdgpu_kernel void @s_fabsf_f32(ptr addrspace(1) %out, float %in) {70; SI-LABEL: s_fabsf_f32:71; SI: ; %bb.0:72; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x973; SI-NEXT: s_load_dword s4, s[4:5], 0xb74; SI-NEXT: s_mov_b32 s3, 0xf00075; SI-NEXT: s_mov_b32 s2, -176; SI-NEXT: s_waitcnt lgkmcnt(0)77; SI-NEXT: s_bitset0_b32 s4, 3178; SI-NEXT: v_mov_b32_e32 v0, s479; SI-NEXT: buffer_store_dword v0, off, s[0:3], 080; SI-NEXT: s_endpgm81;82; VI-LABEL: s_fabsf_f32:83; VI: ; %bb.0:84; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2485; VI-NEXT: s_load_dword s2, s[4:5], 0x2c86; VI-NEXT: s_waitcnt lgkmcnt(0)87; VI-NEXT: v_mov_b32_e32 v0, s088; VI-NEXT: s_bitset0_b32 s2, 3189; VI-NEXT: v_mov_b32_e32 v1, s190; VI-NEXT: v_mov_b32_e32 v2, s291; VI-NEXT: flat_store_dword v[0:1], v292; VI-NEXT: s_endpgm93 %fabs = call float @llvm.fabs.f32(float %in)94 store float %fabs, ptr addrspace(1) %out95 ret void96}97 98define amdgpu_kernel void @fabs_v2f32(ptr addrspace(1) %out, <2 x float> %in) {99; SI-LABEL: fabs_v2f32:100; SI: ; %bb.0:101; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9102; SI-NEXT: s_waitcnt lgkmcnt(0)103; SI-NEXT: s_mov_b64 s[4:5], s[2:3]104; SI-NEXT: s_mov_b32 s3, 0xf000105; SI-NEXT: s_mov_b32 s2, -1106; SI-NEXT: s_bitset0_b32 s5, 31107; SI-NEXT: s_bitset0_b32 s4, 31108; SI-NEXT: v_mov_b32_e32 v0, s4109; SI-NEXT: v_mov_b32_e32 v1, s5110; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0111; SI-NEXT: s_endpgm112;113; VI-LABEL: fabs_v2f32:114; VI: ; %bb.0:115; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24116; VI-NEXT: s_waitcnt lgkmcnt(0)117; VI-NEXT: s_bitset0_b32 s3, 31118; VI-NEXT: s_bitset0_b32 s2, 31119; VI-NEXT: v_mov_b32_e32 v3, s1120; VI-NEXT: v_mov_b32_e32 v0, s2121; VI-NEXT: v_mov_b32_e32 v1, s3122; VI-NEXT: v_mov_b32_e32 v2, s0123; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]124; VI-NEXT: s_endpgm125 %fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %in)126 store <2 x float> %fabs, ptr addrspace(1) %out127 ret void128}129 130define amdgpu_kernel void @fabsf_v4f32(ptr addrspace(1) %out, <4 x float> %in) {131; SI-LABEL: fabsf_v4f32:132; SI: ; %bb.0:133; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9134; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0xd135; SI-NEXT: s_mov_b32 s3, 0xf000136; SI-NEXT: s_mov_b32 s2, -1137; SI-NEXT: s_waitcnt lgkmcnt(0)138; SI-NEXT: s_bitset0_b32 s7, 31139; SI-NEXT: s_bitset0_b32 s6, 31140; SI-NEXT: s_bitset0_b32 s5, 31141; SI-NEXT: s_bitset0_b32 s4, 31142; SI-NEXT: v_mov_b32_e32 v0, s4143; SI-NEXT: v_mov_b32_e32 v1, s5144; SI-NEXT: v_mov_b32_e32 v2, s6145; SI-NEXT: v_mov_b32_e32 v3, s7146; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0147; SI-NEXT: s_endpgm148;149; VI-LABEL: fabsf_v4f32:150; VI: ; %bb.0:151; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x24152; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34153; VI-NEXT: s_waitcnt lgkmcnt(0)154; VI-NEXT: v_mov_b32_e32 v4, s6155; VI-NEXT: s_bitset0_b32 s3, 31156; VI-NEXT: s_bitset0_b32 s2, 31157; VI-NEXT: s_bitset0_b32 s1, 31158; VI-NEXT: s_bitset0_b32 s0, 31159; VI-NEXT: v_mov_b32_e32 v0, s0160; VI-NEXT: v_mov_b32_e32 v1, s1161; VI-NEXT: v_mov_b32_e32 v2, s2162; VI-NEXT: v_mov_b32_e32 v3, s3163; VI-NEXT: v_mov_b32_e32 v5, s7164; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]165; VI-NEXT: s_endpgm166 %fabs = call <4 x float> @llvm.fabs.v4f32(<4 x float> %in)167 store <4 x float> %fabs, ptr addrspace(1) %out168 ret void169}170 171define amdgpu_kernel void @fabsf_fn_fold(ptr addrspace(1) %out, float %in0, float %in1) {172; SI-LABEL: fabsf_fn_fold:173; SI: ; %bb.0:174; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9175; SI-NEXT: s_mov_b32 s7, 0xf000176; SI-NEXT: s_mov_b32 s6, -1177; SI-NEXT: s_waitcnt lgkmcnt(0)178; SI-NEXT: s_mov_b32 s4, s0179; SI-NEXT: s_mov_b32 s5, s1180; SI-NEXT: v_mov_b32_e32 v0, s3181; SI-NEXT: v_mul_f32_e64 v0, |s2|, v0182; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0183; SI-NEXT: s_endpgm184;185; VI-LABEL: fabsf_fn_fold:186; VI: ; %bb.0:187; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24188; VI-NEXT: s_waitcnt lgkmcnt(0)189; VI-NEXT: v_mov_b32_e32 v0, s3190; VI-NEXT: v_mul_f32_e64 v2, |s2|, v0191; VI-NEXT: v_mov_b32_e32 v0, s0192; VI-NEXT: v_mov_b32_e32 v1, s1193; VI-NEXT: flat_store_dword v[0:1], v2194; VI-NEXT: s_endpgm195 %fabs = call float @fabsf(float %in0)196 %fmul = fmul float %fabs, %in1197 store float %fmul, ptr addrspace(1) %out198 ret void199}200 201define amdgpu_kernel void @fabs_fold(ptr addrspace(1) %out, float %in0, float %in1) {202; SI-LABEL: fabs_fold:203; SI: ; %bb.0:204; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9205; SI-NEXT: s_mov_b32 s7, 0xf000206; SI-NEXT: s_mov_b32 s6, -1207; SI-NEXT: s_waitcnt lgkmcnt(0)208; SI-NEXT: s_mov_b32 s4, s0209; SI-NEXT: s_mov_b32 s5, s1210; SI-NEXT: v_mov_b32_e32 v0, s3211; SI-NEXT: v_mul_f32_e64 v0, |s2|, v0212; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0213; SI-NEXT: s_endpgm214;215; VI-LABEL: fabs_fold:216; VI: ; %bb.0:217; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24218; VI-NEXT: s_waitcnt lgkmcnt(0)219; VI-NEXT: v_mov_b32_e32 v0, s3220; VI-NEXT: v_mul_f32_e64 v2, |s2|, v0221; VI-NEXT: v_mov_b32_e32 v0, s0222; VI-NEXT: v_mov_b32_e32 v1, s1223; VI-NEXT: flat_store_dword v[0:1], v2224; VI-NEXT: s_endpgm225 %fabs = call float @llvm.fabs.f32(float %in0)226 %fmul = fmul float %fabs, %in1227 store float %fmul, ptr addrspace(1) %out228 ret void229}230 231define amdgpu_kernel void @bitpreserve_fabsf_f32(ptr addrspace(1) %out, float %in) {232; SI-LABEL: bitpreserve_fabsf_f32:233; SI: ; %bb.0:234; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9235; SI-NEXT: s_load_dword s4, s[4:5], 0xb236; SI-NEXT: s_mov_b32 s3, 0xf000237; SI-NEXT: s_mov_b32 s2, -1238; SI-NEXT: s_waitcnt lgkmcnt(0)239; SI-NEXT: v_add_f32_e64 v0, |s4|, 1.0240; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0241; SI-NEXT: s_endpgm242;243; VI-LABEL: bitpreserve_fabsf_f32:244; VI: ; %bb.0:245; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24246; VI-NEXT: s_load_dword s2, s[4:5], 0x2c247; VI-NEXT: s_waitcnt lgkmcnt(0)248; VI-NEXT: v_mov_b32_e32 v0, s0249; VI-NEXT: v_add_f32_e64 v2, |s2|, 1.0250; VI-NEXT: v_mov_b32_e32 v1, s1251; VI-NEXT: flat_store_dword v[0:1], v2252; VI-NEXT: s_endpgm253 %in.bc = bitcast float %in to i32254 %int.abs = and i32 %in.bc, 2147483647255 %bc = bitcast i32 %int.abs to float256 %fadd = fadd float %bc, 1.0257 store float %fadd, ptr addrspace(1) %out258 ret void259}260 261declare float @fabsf(float) readnone262declare float @llvm.fabs.f32(float) readnone263declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone264declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone265;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:266; GCN: {{.*}}267