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1; RUN: llc -mtriple=amdgcn -mcpu=gfx801 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI,VI-FLUSH,GCN-FLUSH %s2; RUN: llc -mtriple=amdgcn -mcpu=gfx801 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GCN,VI,VI-DENORM,GCN-DENORM %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=ieee < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9,GFX9-DENORM,GCN-DENORM %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -denormal-fp-math-f32=preserve-sign < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9,GFX9-FLUSH,GCN-FLUSH %s5 6; GCN-LABEL: {{^}}test_no_fold_canonicalize_loaded_value_f32:7; VI: v_mul_f32_e32 v{{[0-9]+}}, 1.0, v{{[0-9]+}}8; GFX9: v_max_f32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}9define amdgpu_kernel void @test_no_fold_canonicalize_loaded_value_f32(ptr addrspace(1) %arg) {10 %id = tail call i32 @llvm.amdgcn.workitem.id.x()11 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id12 %v = load float, ptr addrspace(1) %gep, align 413 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)14 store float %canonicalized, ptr addrspace(1) %gep, align 415 ret void16}17 18; GCN-LABEL: {{^}}test_fold_canonicalize_fmul_value_f32:19; GCN: v_mul_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}20; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]21; GCN-NOT: 1.022define amdgpu_kernel void @test_fold_canonicalize_fmul_value_f32(ptr addrspace(1) %arg) {23 %id = tail call i32 @llvm.amdgcn.workitem.id.x()24 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id25 %load = load float, ptr addrspace(1) %gep, align 426 %v = fmul float %load, 15.027 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)28 store float %canonicalized, ptr addrspace(1) %gep, align 429 ret void30}31 32; GCN-LABEL: {{^}}test_fold_canonicalize_fmul_legacy_value_f32:33; GCN: v_mul_legacy_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}34; GCN-NOT: v_mul35; GCN-NOT: v_max36; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]37define amdgpu_kernel void @test_fold_canonicalize_fmul_legacy_value_f32(ptr addrspace(1) %arg) {38 %id = tail call i32 @llvm.amdgcn.workitem.id.x()39 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id40 %load = load float, ptr addrspace(1) %gep, align 441 %v = call float @llvm.amdgcn.fmul.legacy(float %load, float 15.0)42 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)43 store float %canonicalized, ptr addrspace(1) %gep, align 444 ret void45}46 47; GCN-LABEL: {{^}}test_fold_canonicalize_sub_value_f32:48; GCN: v_sub_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}49; GCN-NOT: v_mul50; GCN-NOT: v_max51; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]52define amdgpu_kernel void @test_fold_canonicalize_sub_value_f32(ptr addrspace(1) %arg) {53 %id = tail call i32 @llvm.amdgcn.workitem.id.x()54 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id55 %load = load float, ptr addrspace(1) %gep, align 456 %v = fsub float 15.0, %load57 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)58 store float %canonicalized, ptr addrspace(1) %gep, align 459 ret void60}61 62; GCN-LABEL: {{^}}test_fold_canonicalize_add_value_f32:63; GCN: v_add_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}64; GCN-NOT: v_mul65; GCN-NOT: v_max66; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]67define amdgpu_kernel void @test_fold_canonicalize_add_value_f32(ptr addrspace(1) %arg) {68 %id = tail call i32 @llvm.amdgcn.workitem.id.x()69 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id70 %load = load float, ptr addrspace(1) %gep, align 471 %v = fadd float %load, 15.072 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)73 store float %canonicalized, ptr addrspace(1) %gep, align 474 ret void75}76 77; GCN-LABEL: {{^}}test_fold_canonicalize_sqrt_value_f32:78; GCN: v_sqrt_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}79; GCN-NOT: v_mul80; GCN-NOT: v_max81; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]82define amdgpu_kernel void @test_fold_canonicalize_sqrt_value_f32(ptr addrspace(1) %arg) {83 %id = tail call i32 @llvm.amdgcn.workitem.id.x()84 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id85 %load = load float, ptr addrspace(1) %gep, align 486 %v = call afn float @llvm.sqrt.f32(float %load)87 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)88 store float %canonicalized, ptr addrspace(1) %gep, align 489 ret void90}91 92; GCN-LABEL: test_fold_canonicalize_fceil_value_f32:93; GCN: v_ceil_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}94; GCN-NOT: v_mul95; GCN-NOT: v_max96; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]97define amdgpu_kernel void @test_fold_canonicalize_fceil_value_f32(ptr addrspace(1) %arg) {98 %id = tail call i32 @llvm.amdgcn.workitem.id.x()99 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id100 %load = load float, ptr addrspace(1) %gep, align 4101 %v = call float @llvm.ceil.f32(float %load)102 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)103 store float %canonicalized, ptr addrspace(1) %gep, align 4104 ret void105}106 107; GCN-LABEL: test_fold_canonicalize_floor_value_f32:108; GCN: v_floor_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}109; GCN-NOT: v_mul110; GCN-NOT: v_max111; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]112define amdgpu_kernel void @test_fold_canonicalize_floor_value_f32(ptr addrspace(1) %arg) {113 %id = tail call i32 @llvm.amdgcn.workitem.id.x()114 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id115 %load = load float, ptr addrspace(1) %gep, align 4116 %v = call float @llvm.floor.f32(float %load)117 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)118 store float %canonicalized, ptr addrspace(1) %gep, align 4119 ret void120}121 122; GCN-LABEL: test_fold_canonicalize_fma_value_f32:123; GCN: s_mov_b32 [[SREG:s[0-9]+]], 0x41700000124; GCN: v_fma_f32 [[V:v[0-9]+]], v{{[0-9]+}}, [[SREG]], [[SREG]]125; GCN-NOT: v_mul126; GCN-NOT: v_max127; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]128define amdgpu_kernel void @test_fold_canonicalize_fma_value_f32(ptr addrspace(1) %arg) {129 %id = tail call i32 @llvm.amdgcn.workitem.id.x()130 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id131 %load = load float, ptr addrspace(1) %gep, align 4132 %v = call float @llvm.fma.f32(float %load, float 15.0, float 15.0)133 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)134 store float %canonicalized, ptr addrspace(1) %gep, align 4135 ret void136}137 138; GCN-LABEL: test_fold_canonicalize_fmad_ftz_value_f32:139; GCN: v_mac_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+$}}140; GCN-NOT: v_mul141; GCN-NOT: v_max142; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]143define amdgpu_kernel void @test_fold_canonicalize_fmad_ftz_value_f32(ptr addrspace(1) %arg) {144 %id = tail call i32 @llvm.amdgcn.workitem.id.x()145 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id146 %load = load float, ptr addrspace(1) %gep, align 4147 %v = call float @llvm.amdgcn.fmad.ftz.f32(float %load, float 15.0, float 15.0)148 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)149 store float %canonicalized, ptr addrspace(1) %gep, align 4150 ret void151}152 153; GCN-LABEL: test_fold_canonicalize_fmuladd_value_f32:154; GCN-FLUSH: v_mac_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}155; GCN-DENORM: s_mov_b32 [[SREG:s[0-9]+]], 0x41700000156; GCN-DENORM: v_fma_f32 [[V:v[0-9]+]], v{{[0-9]+}}, [[SREG]], [[SREG]]157; GCN-NOT: v_mul158; GCN-NOT: v_max159; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]160; GCN-NOT: 1.0161define amdgpu_kernel void @test_fold_canonicalize_fmuladd_value_f32(ptr addrspace(1) %arg) {162 %id = tail call i32 @llvm.amdgcn.workitem.id.x()163 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id164 %load = load float, ptr addrspace(1) %gep, align 4165 %v = call float @llvm.fmuladd.f32(float %load, float 15.0, float 15.0)166 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)167 store float %canonicalized, ptr addrspace(1) %gep, align 4168 ret void169}170 171; GCN-LABEL: test_fold_canonicalize_canonicalize_value_f32:172; GCN: {{flat|global}}_load_dword [[LOAD:v[0-9]+]],173; VI: v_mul_f32_e32 [[V:v[0-9]+]], 1.0, [[LOAD]]174; GFX9: v_max_f32_e32 [[V:v[0-9]+]], [[LOAD]], [[LOAD]]175 176; GCN-NOT: v_mul177; GCN-NOT: v_max178; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]179define amdgpu_kernel void @test_fold_canonicalize_canonicalize_value_f32(ptr addrspace(1) %arg) {180 %id = tail call i32 @llvm.amdgcn.workitem.id.x()181 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id182 %load = load float, ptr addrspace(1) %gep, align 4183 %v = call float @llvm.canonicalize.f32(float %load)184 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)185 store float %canonicalized, ptr addrspace(1) %gep, align 4186 ret void187}188 189; GCN-LABEL: test_fold_canonicalize_fpextend_value_f64_f32:190; GCN: v_cvt_f64_f32_e32 [[V:v\[[0-9]+:[0-9]+\]]], v{{[0-9]+}}191; GCN-NOT: v_mul192; GCN-NOT: v_max193; GCN: {{flat|global}}_store_dwordx2 v{{.+}}, [[V]]194define amdgpu_kernel void @test_fold_canonicalize_fpextend_value_f64_f32(ptr addrspace(1) %arg, ptr addrspace(1) %out) {195 %id = tail call i32 @llvm.amdgcn.workitem.id.x()196 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id197 %load = load float, ptr addrspace(1) %gep, align 4198 %v = fpext float %load to double199 %canonicalized = tail call double @llvm.canonicalize.f64(double %v)200 %gep2 = getelementptr inbounds double, ptr addrspace(1) %out, i32 %id201 store double %canonicalized, ptr addrspace(1) %gep2, align 8202 ret void203}204 205; GCN-LABEL: test_fold_canonicalize_fpextend_value_f32_f16:206; GCN: v_cvt_f32_f16_e32 [[V:v[0-9]+]], v{{[0-9]+}}207; GCN-NOT: v_mul208; GCN-NOT: v_max209; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]210define amdgpu_kernel void @test_fold_canonicalize_fpextend_value_f32_f16(ptr addrspace(1) %arg, ptr addrspace(1) %out) {211 %id = tail call i32 @llvm.amdgcn.workitem.id.x()212 %gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id213 %load = load half, ptr addrspace(1) %gep, align 2214 %v = fpext half %load to float215 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)216 %gep2 = getelementptr inbounds float, ptr addrspace(1) %out, i32 %id217 store float %canonicalized, ptr addrspace(1) %gep2, align 4218 ret void219}220 221; GCN-LABEL: test_fold_canonicalize_fpextend_value_f32_f16_flushf16:222; GCN: v_cvt_f32_f16_e32 [[V:v[0-9]+]], v{{[0-9]+}}223; GCN-NOT: v_mul224; GCN-NOT: v_max225; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]226define amdgpu_kernel void @test_fold_canonicalize_fpextend_value_f32_f16_flushf16(ptr addrspace(1) %arg, ptr addrspace(1) %out) #2 {227 %id = tail call i32 @llvm.amdgcn.workitem.id.x()228 %gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id229 %load = load half, ptr addrspace(1) %gep, align 2230 %v = fpext half %load to float231 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)232 %gep2 = getelementptr inbounds float, ptr addrspace(1) %out, i32 %id233 store float %canonicalized, ptr addrspace(1) %gep2, align 4234 ret void235}236 237; GCN-LABEL: test_fold_canonicalize_fpround_value_f32_f64:238; GCN: v_cvt_f32_f64_e32 [[V:v[0-9]+]], v[{{[0-9:]+}}]239; GCN-NOT: v_mul240; GCN-NOT: v_max241; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]242define amdgpu_kernel void @test_fold_canonicalize_fpround_value_f32_f64(ptr addrspace(1) %arg, ptr addrspace(1) %out) {243 %id = tail call i32 @llvm.amdgcn.workitem.id.x()244 %gep = getelementptr inbounds double, ptr addrspace(1) %arg, i32 %id245 %load = load double, ptr addrspace(1) %gep, align 8246 %v = fptrunc double %load to float247 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)248 %gep2 = getelementptr inbounds float, ptr addrspace(1) %out, i32 %id249 store float %canonicalized, ptr addrspace(1) %gep2, align 4250 ret void251}252 253; GCN-LABEL: test_fold_canonicalize_fpround_value_f16_f32:254; GCN: v_cvt_f16_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}255; GCN-NOT: v_max256; GCN-NOT: v_mul257; GCN: {{flat|global}}_store_short v{{.+}}, [[V]]258define amdgpu_kernel void @test_fold_canonicalize_fpround_value_f16_f32(ptr addrspace(1) %arg, ptr addrspace(1) %out) {259 %id = tail call i32 @llvm.amdgcn.workitem.id.x()260 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id261 %load = load float, ptr addrspace(1) %gep, align 4262 %v = fptrunc float %load to half263 %canonicalized = tail call half @llvm.canonicalize.f16(half %v)264 %gep2 = getelementptr inbounds half, ptr addrspace(1) %out, i32 %id265 store half %canonicalized, ptr addrspace(1) %gep2, align 2266 ret void267}268 269; GCN-LABEL: test_fold_canonicalize_fpround_value_f16_f32_flushf16:270; GCN: v_cvt_f16_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}271; GCN-NOT: v_max272; GCN-NOT: v_mul273; GCN: {{flat|global}}_store_short v{{.+}}, [[V]]274define amdgpu_kernel void @test_fold_canonicalize_fpround_value_f16_f32_flushf16(ptr addrspace(1) %arg, ptr addrspace(1) %out) #2 {275 %id = tail call i32 @llvm.amdgcn.workitem.id.x()276 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id277 %load = load float, ptr addrspace(1) %gep, align 4278 %v = fptrunc float %load to half279 %canonicalized = tail call half @llvm.canonicalize.f16(half %v)280 %gep2 = getelementptr inbounds half, ptr addrspace(1) %out, i32 %id281 store half %canonicalized, ptr addrspace(1) %gep2, align 2282 ret void283}284 285; GCN-LABEL: test_fold_canonicalize_fpround_value_v2f16_v2f32:286; GCN-DAG: v_cvt_f16_f32_e32 [[V0:v[0-9]+]], v{{[0-9]+}}287; VI-DAG: v_cvt_f16_f32_sdwa [[V1:v[0-9]+]], v{{[0-9]+}}288; VI: v_or_b32_e32 [[V:v[0-9]+]], [[V0]], [[V1]]289; GFX9: v_cvt_f16_f32_e32 [[V1:v[0-9]+]], v{{[0-9]+}}290; GFX9: v_pack_b32_f16 [[V:v[0-9]+]], [[V1]], [[V0]]291; GCN-NOT: v_mul292; GCN-NOT: v_max293; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]294define amdgpu_kernel void @test_fold_canonicalize_fpround_value_v2f16_v2f32(ptr addrspace(1) %arg, ptr addrspace(1) %out) {295 %id = tail call i32 @llvm.amdgcn.workitem.id.x()296 %gep = getelementptr inbounds <2 x float>, ptr addrspace(1) %arg, i32 %id297 %load = load <2 x float>, ptr addrspace(1) %gep, align 8298 %v = fptrunc <2 x float> %load to <2 x half>299 %canonicalized = tail call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %v)300 %gep2 = getelementptr inbounds <2 x half>, ptr addrspace(1) %out, i32 %id301 store <2 x half> %canonicalized, ptr addrspace(1) %gep2, align 4302 ret void303}304 305; GCN-LABEL: test_no_fold_canonicalize_fneg_value_f32:306; VI: v_mul_f32_e32 v{{[0-9]+}}, -1.0, v{{[0-9]+}}307; GFX9: v_max_f32_e64 v{{[0-9]+}}, -v{{[0-9]+}}, -v{{[0-9]+}}308define amdgpu_kernel void @test_no_fold_canonicalize_fneg_value_f32(ptr addrspace(1) %arg) {309 %id = tail call i32 @llvm.amdgcn.workitem.id.x()310 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id311 %load = load float, ptr addrspace(1) %gep, align 4312 %v = fneg float %load313 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)314 store float %canonicalized, ptr addrspace(1) %gep, align 4315 ret void316}317 318; GCN-LABEL: test_fold_canonicalize_fneg_value_f32:319; GCN: v_xor_b32_e32 [[V:v[0-9]+]], 0x80000000, v{{[0-9]+}}320; GCN-NOT: v_mul321; GCN-NOT: v_max322; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]323define amdgpu_kernel void @test_fold_canonicalize_fneg_value_f32(ptr addrspace(1) %arg) {324 %id = tail call i32 @llvm.amdgcn.workitem.id.x()325 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id326 %load = load float, ptr addrspace(1) %gep, align 4327 %v0 = fadd float %load, 0.0328 %v = fneg float %v0329 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)330 store float %canonicalized, ptr addrspace(1) %gep, align 4331 ret void332}333 334; GCN-LABEL: test_no_fold_canonicalize_fabs_value_f32:335; VI: v_mul_f32_e64 v{{[0-9]+}}, 1.0, |v{{[0-9]+}}|336; GFX9: v_max_f32_e64 v{{[0-9]+}}, |v{{[0-9]+}}|, |v{{[0-9]+}}|337define amdgpu_kernel void @test_no_fold_canonicalize_fabs_value_f32(ptr addrspace(1) %arg) {338 %id = tail call i32 @llvm.amdgcn.workitem.id.x()339 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id340 %load = load float, ptr addrspace(1) %gep, align 4341 %v = tail call float @llvm.fabs.f32(float %load)342 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)343 store float %canonicalized, ptr addrspace(1) %gep, align 4344 ret void345}346 347; GCN-LABEL: test_no_fold_canonicalize_fcopysign_value_f32:348; VI: v_mul_f32_e64 v{{[0-9]+}}, 1.0, |v{{[0-9]+}}|349; GFX9: v_max_f32_e64 v{{[0-9]+}}, |v{{[0-9]+}}|, |v{{[0-9]+}}|350 351; GCN-NOT: v_mul_352; GCN-NOT: v_max_353define amdgpu_kernel void @test_no_fold_canonicalize_fcopysign_value_f32(ptr addrspace(1) %arg, float %sign) {354 %id = tail call i32 @llvm.amdgcn.workitem.id.x()355 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id356 %load = load float, ptr addrspace(1) %gep, align 4357 %canon.load = tail call float @llvm.canonicalize.f32(float %load)358 %copysign = call float @llvm.copysign.f32(float %canon.load, float %sign)359 %v = tail call float @llvm.fabs.f32(float %load)360 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)361 store float %canonicalized, ptr addrspace(1) %gep, align 4362 ret void363}364 365; GCN-LABEL: test_fold_canonicalize_fabs_value_f32:366; GCN: v_and_b32_e32 [[V:v[0-9]+]], 0x7fffffff, v{{[0-9]+}}367; GCN-NOT: v_mul368; GCN-NOT: v_max369; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]370define amdgpu_kernel void @test_fold_canonicalize_fabs_value_f32(ptr addrspace(1) %arg) {371 %id = tail call i32 @llvm.amdgcn.workitem.id.x()372 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id373 %load = load float, ptr addrspace(1) %gep, align 4374 %v0 = fadd float %load, 0.0375 %v = tail call float @llvm.fabs.f32(float %v0)376 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)377 store float %canonicalized, ptr addrspace(1) %gep, align 4378 ret void379}380 381; GCN-LABEL: test_fold_canonicalize_sin_value_f32:382; GCN: v_sin_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}383; GCN-NOT: v_mul384; GCN-NOT: v_max385; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]386define amdgpu_kernel void @test_fold_canonicalize_sin_value_f32(ptr addrspace(1) %arg) {387 %id = tail call i32 @llvm.amdgcn.workitem.id.x()388 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id389 %load = load float, ptr addrspace(1) %gep, align 4390 %v = tail call float @llvm.sin.f32(float %load)391 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)392 store float %canonicalized, ptr addrspace(1) %gep, align 4393 ret void394}395 396; GCN-LABEL: test_fold_canonicalize_cos_value_f32:397; GCN: v_cos_f32_e32 [[V:v[0-9]+]], v{{[0-9]+}}398; GCN-NOT: v_mul399; GCN-NOT: v_max400; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]401define amdgpu_kernel void @test_fold_canonicalize_cos_value_f32(ptr addrspace(1) %arg) {402 %id = tail call i32 @llvm.amdgcn.workitem.id.x()403 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id404 %load = load float, ptr addrspace(1) %gep, align 4405 %v = tail call float @llvm.cos.f32(float %load)406 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)407 store float %canonicalized, ptr addrspace(1) %gep, align 4408 ret void409}410 411; GCN-LABEL: test_fold_canonicalize_sin_value_f16:412; GCN: v_sin_f16_e32 [[V0:v[0-9]+]], v{{[0-9]+}}413; GCN-NOT: v_mul414; GCN-NOT: v_max415; GCN: {{flat|global}}_store_short v{{.+}}, [[V0]]416define amdgpu_kernel void @test_fold_canonicalize_sin_value_f16(ptr addrspace(1) %arg) {417 %id = tail call i32 @llvm.amdgcn.workitem.id.x()418 %gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id419 %load = load half, ptr addrspace(1) %gep, align 2420 %v = tail call half @llvm.sin.f16(half %load)421 %canonicalized = tail call half @llvm.canonicalize.f16(half %v)422 store half %canonicalized, ptr addrspace(1) %gep, align 2423 ret void424}425 426; GCN-LABEL: test_fold_canonicalize_cos_value_f16:427; GCN: v_cos_f16_e32 [[V0:v[0-9]+]], v{{[0-9]+}}428; GCN-NOT: v_mul429; GCN-NOT: v_max430; GCN: {{flat|global}}_store_short v{{.+}}, [[V0]]431define amdgpu_kernel void @test_fold_canonicalize_cos_value_f16(ptr addrspace(1) %arg) {432 %id = tail call i32 @llvm.amdgcn.workitem.id.x()433 %gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id434 %load = load half, ptr addrspace(1) %gep, align 2435 %v = tail call half @llvm.cos.f16(half %load)436 %canonicalized = tail call half @llvm.canonicalize.f16(half %v)437 store half %canonicalized, ptr addrspace(1) %gep, align 2438 ret void439}440 441; GCN-LABEL: test_fold_canonicalize_qNaN_value_f32:442; GCN: v_mov_b32_e32 [[V:v[0-9]+]], 0x7fc00000443; GCN-NOT: v_mul444; GCN-NOT: v_max445; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]446define amdgpu_kernel void @test_fold_canonicalize_qNaN_value_f32(ptr addrspace(1) %arg) {447 %id = tail call i32 @llvm.amdgcn.workitem.id.x()448 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id449 %canonicalized = tail call float @llvm.canonicalize.f32(float 0x7FF8000000000000)450 store float %canonicalized, ptr addrspace(1) %gep, align 4451 ret void452}453 454; GCN-LABEL: test_fold_canonicalize_minnum_value_from_load_f32_ieee_mode:455; GCN: {{flat|global}}_load_dword [[VAL:v[0-9]+]]456; VI: v_mul_f32_e32 [[QUIET:v[0-9]+]], 1.0, [[VAL]]457; GFX9: v_max_f32_e32 [[QUIET:v[0-9]+]], [[VAL]], [[VAL]]458 459; GCN: v_min_f32_e32 [[V:v[0-9]+]], 0, [[QUIET]]460; GCN-NOT: v_max461; GCN-NOT: v_mul462 463; GFX9: {{flat|global}}_store_dword v{{.+}}, [[V]]464define amdgpu_kernel void @test_fold_canonicalize_minnum_value_from_load_f32_ieee_mode(ptr addrspace(1) %arg) {465 %id = tail call i32 @llvm.amdgcn.workitem.id.x()466 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id467 %load = load float, ptr addrspace(1) %gep, align 4468 %v = tail call float @llvm.minnum.f32(float %load, float 0.0)469 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)470 store float %canonicalized, ptr addrspace(1) %gep, align 4471 ret void472}473 474; define amdgpu_kernel void @test_fold_canonicalize_minnum_value_from_load_f32_nnan_ieee_mode(ptr addrspace(1) %arg) #1 {475; %id = tail call i32 @llvm.amdgcn.workitem.id.x()476; %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id477; %load = load float, ptr addrspace(1) %gep, align 4478; %v = tail call float @llvm.minnum.f32(float %load, float 0.0)479; %canonicalized = tail call float @llvm.canonicalize.f32(float %v)480; store float %canonicalized, ptr addrspace(1) %gep, align 4481; ret void482; }483 484; GCN-LABEL: test_fold_canonicalize_minnum_value_f32:485; GCN: v_min_f32_e32 [[V:v[0-9]+]], 0, v{{[0-9]+}}486; GCN-NOT: v_mul487; GCN-NOT: v_max488; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]489define amdgpu_kernel void @test_fold_canonicalize_minnum_value_f32(ptr addrspace(1) %arg) {490 %id = tail call i32 @llvm.amdgcn.workitem.id.x()491 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id492 %load = load float, ptr addrspace(1) %gep, align 4493 %v0 = fadd float %load, 0.0494 %v = tail call float @llvm.minnum.f32(float %v0, float 0.0)495 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)496 store float %canonicalized, ptr addrspace(1) %gep, align 4497 ret void498}499 500; FIXME: Should there be more checks here? minnum with sNaN operand is simplified to qNaN.501 502; GCN-LABEL: test_fold_canonicalize_sNaN_value_f32:503; GCN: v_mov_b32_e32 v{{.+}}, 0x7fc00000504define amdgpu_kernel void @test_fold_canonicalize_sNaN_value_f32(ptr addrspace(1) %arg) {505 %id = tail call i32 @llvm.amdgcn.workitem.id.x()506 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id507 %load = load float, ptr addrspace(1) %gep, align 4508 %v = tail call float @llvm.minnum.f32(float %load, float bitcast (i32 2139095041 to float))509 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)510 store float %canonicalized, ptr addrspace(1) %gep, align 4511 ret void512}513 514; define amdgpu_kernel void @test_fold_canonicalize_denorm_value_f32(ptr addrspace(1) %arg) {515; %id = tail call i32 @llvm.amdgcn.workitem.id.x()516; %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id517; %load = load float, ptr addrspace(1) %gep, align 4518; %v = tail call float @llvm.minnum.f32(float %load, float bitcast (i32 8388607 to float))519; %canonicalized = tail call float @llvm.canonicalize.f32(float %v)520; store float %canonicalized, ptr addrspace(1) %gep, align 4521; ret void522; }523 524; GCN-LABEL: test_fold_canonicalize_maxnum_value_from_load_f32_ieee_mode:525; GCN: {{flat|global}}_load_dword [[VAL:v[0-9]+]]526 527; GFX9: v_max_f32_e32 [[RESULT:v[0-9]+]], 0, [[VAL]]528 529; VI-FLUSH: v_mul_f32_e32 [[QUIET:v[0-9]+]], 1.0, [[VAL]]530; VI-FLUSH: v_max_f32_e32 [[RESULT:v[0-9]+]], 0, [[QUIET]]531 532; VI-DENORM: v_max_f32_e32 [[RESULT:v[0-9]+]], 0, [[VAL]]533 534; GCN-NOT: v_mul535; GCN-NOT: v_max536; GCN: {{flat|global}}_store_dword v{{.+}}, [[RESULT]]537define amdgpu_kernel void @test_fold_canonicalize_maxnum_value_from_load_f32_ieee_mode(ptr addrspace(1) %arg) {538 %id = tail call i32 @llvm.amdgcn.workitem.id.x()539 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id540 %load = load float, ptr addrspace(1) %gep, align 4541 %v = tail call float @llvm.maxnum.f32(float %load, float 0.0)542 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)543 store float %canonicalized, ptr addrspace(1) %gep, align 4544 ret void545}546 547; GCN-LABEL: test_fold_canonicalize_maxnum_value_f32:548; GCN: v_max_f32_e32 [[V:v[0-9]+]], 0, v{{[0-9]+}}549; GCN-NOT: v_max550; GCN-NOT: v_mul551; GCN: {{flat|global}}_store_dword v{{.+}}, [[V]]552define amdgpu_kernel void @test_fold_canonicalize_maxnum_value_f32(ptr addrspace(1) %arg) {553 %id = tail call i32 @llvm.amdgcn.workitem.id.x()554 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id555 %load = load float, ptr addrspace(1) %gep, align 4556 %v0 = fadd float %load, 0.0557 %v = tail call float @llvm.maxnum.f32(float %v0, float 0.0)558 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)559 store float %canonicalized, ptr addrspace(1) %gep, align 4560 ret void561}562 563; GCN-LABEL: test_fold_canonicalize_maxnum_value_f64:564; GCN: v_max_f64 [[V:v\[[0-9]+:[0-9]+\]]], v[{{[0-9:]+}}], 0565; GCN-NOT: v_mul566; GCN-NOT: v_max567; GCN: {{flat|global}}_store_dwordx2 v{{.+}}, [[V]]568define amdgpu_kernel void @test_fold_canonicalize_maxnum_value_f64(ptr addrspace(1) %arg) {569 %id = tail call i32 @llvm.amdgcn.workitem.id.x()570 %gep = getelementptr inbounds double, ptr addrspace(1) %arg, i32 %id571 %load = load double, ptr addrspace(1) %gep, align 8572 %v0 = fadd double %load, 0.0573 %v = tail call double @llvm.maxnum.f64(double %v0, double 0.0)574 %canonicalized = tail call double @llvm.canonicalize.f64(double %v)575 store double %canonicalized, ptr addrspace(1) %gep, align 8576 ret void577}578 579; GCN-LABEL: test_fold_canonicalize_fmul_value_f32_no_ieee:580; GCN: v_mul_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}581; GCN-NOT: v_mul582; GCN-NOT: v_max583; GCN-NEXT: ; return584define amdgpu_ps float @test_fold_canonicalize_fmul_value_f32_no_ieee(float %arg) {585entry:586 %v = fmul float %arg, 15.0587 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)588 ret float %canonicalized589}590 591; GCN-LABEL: test_fold_canonicalize_fmul_nnan_value_f32_no_ieee:592; GCN: v_mul_f32_e32 [[V:v[0-9]+]], 0x41700000, v{{[0-9]+}}593; GCN-NOT: v_mul594; GCN-NOT: v_max595; GCN-NEXT: ; return596define amdgpu_ps float @test_fold_canonicalize_fmul_nnan_value_f32_no_ieee(float %arg) {597entry:598 %v = fmul nnan float %arg, 15.0599 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)600 ret float %canonicalized601}602 603; GCN-LABEL: {{^}}test_fold_canonicalize_fdiv_value_f32_no_ieee:604; GCN: v_div_fixup_f32605; GCN-NOT: v_max606; GCN-NOT: v_mul607; GCN: ; return608define amdgpu_ps float @test_fold_canonicalize_fdiv_value_f32_no_ieee(float %arg0) {609entry:610 %v = fdiv float 15.0, %arg0611 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)612 ret float %canonicalized613}614 615; GCN-LABEL: {{^}}test_fold_canonicalize_load_nnan_value_f32616; GFX9-DENORM: global_load_dword [[V:v[0-9]+]],617; GFX9-DENORM: global_store_dword v{{[0-9]+}}, [[V]], s{{\[[0-9]+:[0-9]+\]}}618; GFX9-DENORM-NOT: 1.0619; GFX9-DENORM-NOT: v_max620; VI-FLUSH: v_mul_f32_e32 v{{[0-9]+}}, 1.0, v{{[0-9]+}}621; GFX9-FLUSH: v_max_f32_e32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}622define amdgpu_kernel void @test_fold_canonicalize_load_nnan_value_f32(ptr addrspace(1) %arg, ptr addrspace(1) %out) #1 {623 %id = tail call i32 @llvm.amdgcn.workitem.id.x()624 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id625 %v = load float, ptr addrspace(1) %gep, align 4626 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)627 %gep2 = getelementptr inbounds float, ptr addrspace(1) %out, i32 %id628 store float %canonicalized, ptr addrspace(1) %gep2, align 4629 ret void630}631 632; GCN-LABEL: {{^}}test_fold_canonicalize_load_nnan_value_f64633; GCN: {{flat|global}}_load_dwordx2 [[V:v\[[0-9:]+\]]],634; GCN: {{flat|global}}_store_dwordx2 v{{.+}}, [[V]]635; GCN-NOT: v_mul_636; GCN-NOT: v_max_637define amdgpu_kernel void @test_fold_canonicalize_load_nnan_value_f64(ptr addrspace(1) %arg, ptr addrspace(1) %out) #1 {638 %id = tail call i32 @llvm.amdgcn.workitem.id.x()639 %gep = getelementptr inbounds double, ptr addrspace(1) %arg, i32 %id640 %v = load double, ptr addrspace(1) %gep, align 8641 %canonicalized = tail call double @llvm.canonicalize.f64(double %v)642 %gep2 = getelementptr inbounds double, ptr addrspace(1) %out, i32 %id643 store double %canonicalized, ptr addrspace(1) %gep2, align 8644 ret void645}646 647; GCN-LABEL: {{^}}test_fold_canonicalize_load_nnan_value_f16648; GCN: {{flat|global}}_load_ushort [[V1:v[0-9]+]],649; GCN: v_max_f16_e32 [[V2:v[0-9]+]], [[V1]], [[V1]]650; GCN: {{flat|global}}_store_short v{{.+}}, [[V2]]651define amdgpu_kernel void @test_fold_canonicalize_load_nnan_value_f16(ptr addrspace(1) %arg, ptr addrspace(1) %out) #1 {652 %id = tail call i32 @llvm.amdgcn.workitem.id.x()653 %gep = getelementptr inbounds half, ptr addrspace(1) %arg, i32 %id654 %v = load half, ptr addrspace(1) %gep, align 2655 %canonicalized = tail call half @llvm.canonicalize.f16(half %v)656 %gep2 = getelementptr inbounds half, ptr addrspace(1) %out, i32 %id657 store half %canonicalized, ptr addrspace(1) %gep2, align 2658 ret void659}660 661; GCN-LABEL: {{^}}test_fold_canonicalize_select_value_f32:662; GCN: v_add_f32663; GCN: v_add_f32664; GCN: v_cndmask_b32665; GCN-NOT: v_mul_666; GCN-NOT: v_max_667define amdgpu_kernel void @test_fold_canonicalize_select_value_f32(ptr addrspace(1) %arg) {668 %id = tail call i32 @llvm.amdgcn.workitem.id.x()669 %gep = getelementptr inbounds float, ptr addrspace(1) %arg, i32 %id670 %load0 = load volatile float, ptr addrspace(1) %gep, align 4671 %load1 = load volatile float, ptr addrspace(1) %gep, align 4672 %load2 = load volatile i32, ptr addrspace(1) poison, align 4673 %v0 = fadd float %load0, 15.0674 %v1 = fadd float %load1, 32.0675 %cond = icmp eq i32 %load2, 0676 %select = select i1 %cond, float %v0, float %v1677 %canonicalized = tail call float @llvm.canonicalize.f32(float %select)678 store float %canonicalized, ptr addrspace(1) %gep, align 4679 ret void680}681 682; Need to quiet the nan with a separate instruction since it will be683; passed through the minnum.684; FIXME: canonicalize doens't work correctly without ieee_mode685 686; GCN-LABEL: {{^}}test_fold_canonicalize_minnum_value_no_ieee_mode:687; GFX9-NOT: v0688; GFX9-NOT: v1689; GFX9: v_min_f32_e32 v0, v0, v1690; GFX9-NEXT: ; return to shader691 692; VI-FLUSH: v_min_f32_e32 v0, v0, v1693; VI-FLUSH-NEXT: v_mul_f32_e32 v0, 1.0, v0694; VI-FLUSH-NEXT: ; return695 696; VI-DENORM-NOT: v0697; VI-DENORM: v_min_f32_e32 v0, v0, v1698; VI-DENORM-NEXT: ; return699define amdgpu_ps float @test_fold_canonicalize_minnum_value_no_ieee_mode(float %arg0, float %arg1) {700 %v = tail call float @llvm.minnum.f32(float %arg0, float %arg1)701 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)702 ret float %canonicalized703}704 705; GCN-LABEL: {{^}}test_fold_canonicalize_minnum_value_ieee_mode:706; GFX9: v_min_f32_e32 v0, v0, v1707; GFX9-NEXT: s_setpc_b64708 709; VI-DAG: v_mul_f32_e32 v0, 1.0, v0710; VI-DAG: v_mul_f32_e32 v1, 1.0, v1711; VI: v_min_f32_e32 v0, v0, v1712 713; VI-NEXT: s_setpc_b64714define float @test_fold_canonicalize_minnum_value_ieee_mode(float %arg0, float %arg1) {715 %v = tail call float @llvm.minnum.f32(float %arg0, float %arg1)716 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)717 ret float %canonicalized718}719 720; Canonicalizing flush necessary pre-gfx9721; GCN-LABEL: {{^}}test_fold_canonicalize_minnum_value_no_ieee_mode_nnan:722; GCN: v_min_f32_e32 v0, v0, v1723; VI-FLUSH-NEXT: v_mul_f32_e32 v0, 1.0, v0724; GCN-NEXT: ; return725define amdgpu_ps float @test_fold_canonicalize_minnum_value_no_ieee_mode_nnan(float %arg0, float %arg1) #1 {726 %v = tail call float @llvm.minnum.f32(float %arg0, float %arg1)727 %canonicalized = tail call float @llvm.canonicalize.f32(float %v)728 ret float %canonicalized729}730 731; GCN-LABEL: {{^}}v_test_canonicalize_build_vector_v2f16:732; GFX9-DAG: v_add_f16_e32733; GFX9-DAG: v_mul_f16_e32734; GFX9-NOT: v_max735; GFX9-NOT: v_pk_max736define <2 x half> @v_test_canonicalize_build_vector_v2f16(<2 x half> %vec) {737 %lo = extractelement <2 x half> %vec, i32 0738 %hi = extractelement <2 x half> %vec, i32 1739 %lo.op = fadd half %lo, 1.0740 %hi.op = fmul half %lo, 4.0741 %ins0 = insertelement <2 x half> poison, half %lo.op, i32 0742 %ins1 = insertelement <2 x half> %ins0, half %hi.op, i32 1743 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %ins1)744 ret <2 x half> %canonicalized745}746 747; GCN-LABEL: {{^}}v_test_canonicalize_build_vector_noncanon1_v2f16:748; GFX9: v_add_f16_e32749; GFX9: v_pk_max750define <2 x half> @v_test_canonicalize_build_vector_noncanon1_v2f16(<2 x half> %vec) {751 %lo = extractelement <2 x half> %vec, i32 0752 %lo.op = fadd half %lo, 1.0753 %ins = insertelement <2 x half> %vec, half %lo.op, i32 0754 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %ins)755 ret <2 x half> %canonicalized756}757 758; GCN-LABEL: {{^}}v_test_canonicalize_build_vector_noncanon0_v2f16:759; GFX9: v_add_f16_sdwa760; GFX9: v_pk_max761define <2 x half> @v_test_canonicalize_build_vector_noncanon0_v2f16(<2 x half> %vec) {762 %hi = extractelement <2 x half> %vec, i32 1763 %hi.op = fadd half %hi, 1.0764 %ins = insertelement <2 x half> %vec, half %hi.op, i32 1765 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %ins)766 ret <2 x half> %canonicalized767}768 769; GCN-LABEL: {{^}}v_test_canonicalize_extract_element_v2f16:770; GFX9: s_waitcnt771; GFX9-NEXT: v_mul_f16_e32 v0, 4.0, v0772; GFX9-NEXT: s_setpc_b64773define half @v_test_canonicalize_extract_element_v2f16(<2 x half> %vec) {774 %vec.op = fmul <2 x half> %vec, <half 4.0, half 4.0>775 %elt = extractelement <2 x half> %vec.op, i32 0776 %canonicalized = call half @llvm.canonicalize.f16(half %elt)777 ret half %canonicalized778}779 780; define <2 x half> @v_test_canonicalize_insertelement_v2f16(<2 x half> %vec, half %val, i32 %idx) {781; %vec.op = fmul <2 x half> %vec, <half 4.0, half 4.0>782; %ins.op = fmul half %val, 8.0783; %ins = insertelement <2 x half> %vec.op, half %ins.op, i32 %idx784; %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %ins)785; ret <2 x half> %canonicalized786; }787 788; GCN-LABEL: {{^}}v_test_canonicalize_insertelement_noncanon_vec_v2f16:789; GFX9: v_mul_f16790; GFX9: v_pk_max_f16 v0, v0, v0791; GFX9-NEXT: s_setpc_b64792define <2 x half> @v_test_canonicalize_insertelement_noncanon_vec_v2f16(<2 x half> %vec, half %val, i32 %idx) {793 %ins.op = fmul half %val, 8.0794 %ins = insertelement <2 x half> %vec, half %ins.op, i32 %idx795 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %ins)796 ret <2 x half> %canonicalized797}798 799; GCN-LABEL: {{^}}v_test_canonicalize_insertelement_noncanon_insval_v2f16:800; GFX9: v_pk_mul_f16801; GFX9: v_pk_max_f16 v0, v0, v0802; GFX9-NEXT: s_setpc_b64803define <2 x half> @v_test_canonicalize_insertelement_noncanon_insval_v2f16(<2 x half> %vec, half %val, i32 %idx) {804 %vec.op = fmul <2 x half> %vec, <half 4.0, half 4.0>805 %ins = insertelement <2 x half> %vec.op, half %val, i32 %idx806 %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %ins)807 ret <2 x half> %canonicalized808}809 810; define <2 x half> @v_test_canonicalize_cvt_pkrtz(float %a, float %b) {811; %cvt = call <2 x half> @llvm.amdgcn.cvt.pkrtz(float %a, float %b)812; %canonicalized = call <2 x half> @llvm.canonicalize.v2f16(<2 x half> %cvt)813; ret <2 x half> %canonicalized814; }815 816; GCN-LABEL: {{^}}v_test_canonicalize_cubeid:817; GCN: s_waitcnt818; GCN-NEXT: v_cubeid_f32 v0, v0, v1, v2819; GCN-NEXT: s_setpc_b64820define float @v_test_canonicalize_cubeid(float %a, float %b, float %c) {821 %cvt = call float @llvm.amdgcn.cubeid(float %a, float %b, float %c)822 %canonicalized = call float @llvm.canonicalize.f32(float %cvt)823 ret float %canonicalized824}825 826; GCN-LABEL: {{^}}v_test_canonicalize_frexp_mant:827; GCN: s_waitcnt828; GCN-NEXT: v_frexp_mant_f32_e32 v0, v0829; GCN-NEXT: s_setpc_b64830define float @v_test_canonicalize_frexp_mant(float %a) {831 %cvt = call float @llvm.amdgcn.frexp.mant.f32(float %a)832 %canonicalized = call float @llvm.canonicalize.f32(float %cvt)833 ret float %canonicalized834}835 836; GCN-LABEL: {{^}}v_test_canonicalize_amdgcn_log:837; GCN: s_waitcnt838; GCN-NEXT: v_log_f32839; GCN-NEXT: s_setpc_b64840define float @v_test_canonicalize_amdgcn_log(float %a) {841 %log = call float @llvm.amdgcn.log.f32(float %a)842 %canonicalized = call float @llvm.canonicalize.f32(float %log)843 ret float %canonicalized844}845 846; GCN-LABEL: {{^}}v_test_canonicalize_amdgcn_exp2:847; GCN: s_waitcnt848; GCN-NEXT: v_exp_f32849; GCN-NEXT: s_setpc_b64850define float @v_test_canonicalize_amdgcn_exp2(float %a) {851 %log = call float @llvm.amdgcn.exp2.f32(float %a)852 %canonicalized = call float @llvm.canonicalize.f32(float %log)853 ret float %canonicalized854}855 856; GCN-LABEL: {{^}}v_test_canonicalize_minimum:857; GCN: s_waitcnt858; GCN-NEXT: v_min_f32_e32 [[MIN:v[0-9]+]], v0, v1859; GCN-NEXT: v_mov_b32_e32 [[K:v[0-9]+]], 0x7fc00000860; GCN-NEXT: v_cmp_o_f32_e32 vcc, v0, v1861; GCN-NEXT: v_cndmask_b32_e32 v0, [[K]], [[MIN]], vcc862; VI-FLUSH-NEXT: v_mul_f32_e32 v0, 1.0, v0863; GCN-NEXT: s_setpc_b64864define float @v_test_canonicalize_minimum(float %a, float %b) {865 %min = call float @llvm.minimum.f32(float %a, float %b)866 %canonicalized = call float @llvm.canonicalize.f32(float %min)867 ret float %canonicalized868}869 870; GCN-LABEL: {{^}}v_test_canonicalize_maximum:871; GCN: s_waitcnt872; GCN-NEXT: v_max_f32_e32 [[MIN:v[0-9]+]], v0, v1873; GCN-NEXT: v_mov_b32_e32 [[K:v[0-9]+]], 0x7fc00000874; GCN-NEXT: v_cmp_o_f32_e32 vcc, v0, v1875; GCN-NEXT: v_cndmask_b32_e32 v0, [[K]], [[MIN]], vcc876; VI-FLUSH-NEXT: v_mul_f32_e32 v0, 1.0, v0877; GCN-NEXT: s_setpc_b64878define float @v_test_canonicalize_maximum(float %a, float %b) {879 %min = call float @llvm.maximum.f32(float %a, float %b)880 %canonicalized = call float @llvm.canonicalize.f32(float %min)881 ret float %canonicalized882}883 884; GCN-LABEL: {{^}}v_test_canonicalize_minimumnum:885; GCN: s_waitcnt886; VI-NEXT: v_mul_f32_e32 v1, 1.0, v1887; VI-NEXT: v_mul_f32_e32 v0, 1.0, v0888 889; GFX9-NEXT: v_max_f32_e32 v1, v1, v1890; GFX9-NEXT: v_max_f32_e32 v0, v0, v0891 892; GCN-NEXT: v_min_f32_e32 v0, v0, v1893; GCN-NEXT: s_setpc_b64894define float @v_test_canonicalize_minimumnum(float %a, float %b) {895 %min = call float @llvm.minimumnum.f32(float %a, float %b)896 %canonicalized = call float @llvm.canonicalize.f32(float %min)897 ret float %canonicalized898}899 900; GCN-LABEL: {{^}}v_test_canonicalize_maximumnum:901; GCN: s_waitcnt902; VI-NEXT: v_mul_f32_e32 v1, 1.0, v1903; VI-NEXT: v_mul_f32_e32 v0, 1.0, v0904 905; GFX9-NEXT: v_max_f32_e32 v1, v1, v1906; GFX9-NEXT: v_max_f32_e32 v0, v0, v0907 908; GCN-NEXT: v_max_f32_e32 v0, v0, v1909; GCN-NEXT: s_setpc_b64910define float @v_test_canonicalize_maximumnum(float %a, float %b) {911 %min = call float @llvm.maximumnum.f32(float %a, float %b)912 %canonicalized = call float @llvm.canonicalize.f32(float %min)913 ret float %canonicalized914}915 916; Avoid failing the test on FreeBSD11.0 which will match the GCN-NOT: 1.0917; in the .amd_amdgpu_isa "amdgcn-unknown-freebsd11.0--gfx802" directive918; GCN: .amd_amdgpu_isa919 920declare float @llvm.canonicalize.f32(float) #0921declare float @llvm.copysign.f32(float, float) #0922declare float @llvm.amdgcn.fmul.legacy(float, float) #0923declare float @llvm.amdgcn.fmad.ftz.f32(float, float, float) #0924declare double @llvm.canonicalize.f64(double) #0925declare half @llvm.canonicalize.f16(half) #0926declare <2 x half> @llvm.canonicalize.v2f16(<2 x half>) #0927declare i32 @llvm.amdgcn.workitem.id.x() #0928declare float @llvm.sqrt.f32(float) #0929declare float @llvm.ceil.f32(float) #0930declare float @llvm.floor.f32(float) #0931declare float @llvm.fma.f32(float, float, float) #0932declare float @llvm.fmuladd.f32(float, float, float) #0933declare float @llvm.fabs.f32(float) #0934declare float @llvm.sin.f32(float) #0935declare float @llvm.cos.f32(float) #0936declare half @llvm.sin.f16(half) #0937declare half @llvm.cos.f16(half) #0938declare float @llvm.minnum.f32(float, float) #0939declare float @llvm.maxnum.f32(float, float) #0940declare double @llvm.maxnum.f64(double, double) #0941declare <2 x half> @llvm.amdgcn.cvt.pkrtz(float, float) #0942declare float @llvm.amdgcn.cubeid(float, float, float) #0943declare float @llvm.amdgcn.frexp.mant.f32(float) #0944declare float @llvm.amdgcn.log.f32(float) #0945declare float @llvm.amdgcn.exp2.f32(float) #0946 947attributes #0 = { nounwind readnone }948attributes #1 = { "no-nans-fp-math"="true" }949attributes #2 = { "denormal-fp-math"="preserve-sign,preserve-sign" "denormal-fp-math-f32"="ieee,ieee" }950