1067 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=SIVI,SI %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=SIVI,VI %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX11 %s5 6declare double @llvm.copysign.f64(double, double) #07declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>) #08declare <3 x double> @llvm.copysign.v3f64(<3 x double>, <3 x double>) #09declare <4 x double> @llvm.copysign.v4f64(<4 x double>, <4 x double>) #010 11define amdgpu_kernel void @s_test_copysign_f64(ptr addrspace(1) %out, [8 x i32], double %mag, [8 x i32], double %sign) {12; SI-LABEL: s_test_copysign_f64:13; SI: ; %bb.0:14; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x915; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x1316; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x1d17; SI-NEXT: s_waitcnt lgkmcnt(0)18; SI-NEXT: s_brev_b32 s4, -219; SI-NEXT: s_mov_b32 s3, 0xf00020; SI-NEXT: s_mov_b32 s2, -121; SI-NEXT: v_mov_b32_e32 v0, s722; SI-NEXT: v_mov_b32_e32 v1, s523; SI-NEXT: v_bfi_b32 v1, s4, v0, v124; SI-NEXT: v_mov_b32_e32 v0, s625; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 026; SI-NEXT: s_endpgm27;28; VI-LABEL: s_test_copysign_f64:29; VI: ; %bb.0:30; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c31; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x7432; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x2433; VI-NEXT: s_waitcnt lgkmcnt(0)34; VI-NEXT: s_brev_b32 s2, -235; VI-NEXT: v_mov_b32_e32 v0, s136; VI-NEXT: v_mov_b32_e32 v1, s337; VI-NEXT: v_mov_b32_e32 v2, s438; VI-NEXT: v_bfi_b32 v1, s2, v0, v139; VI-NEXT: v_mov_b32_e32 v0, s040; VI-NEXT: v_mov_b32_e32 v3, s541; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]42; VI-NEXT: s_endpgm43;44; GFX11-LABEL: s_test_copysign_f64:45; GFX11: ; %bb.0:46; GFX11-NEXT: s_clause 0x247; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x7448; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x4c49; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x2450; GFX11-NEXT: v_mov_b32_e32 v2, 051; GFX11-NEXT: s_waitcnt lgkmcnt(0)52; GFX11-NEXT: v_mov_b32_e32 v0, s153; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)54; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s3, v055; GFX11-NEXT: v_mov_b32_e32 v0, s256; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]57; GFX11-NEXT: s_endpgm58 %result = call double @llvm.copysign.f64(double %mag, double %sign)59 store double %result, ptr addrspace(1) %out, align 860 ret void61}62 63define amdgpu_kernel void @s_test_copysign_f64_0(ptr addrspace(1) %out, [8 x i32], double %mag) {64; SI-LABEL: s_test_copysign_f64_0:65; SI: ; %bb.0:66; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x1367; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x968; SI-NEXT: s_mov_b32 s3, 0xf00069; SI-NEXT: s_mov_b32 s2, -170; SI-NEXT: s_waitcnt lgkmcnt(0)71; SI-NEXT: s_and_b32 s4, s7, 0x7fffffff72; SI-NEXT: v_mov_b32_e32 v0, s673; SI-NEXT: v_mov_b32_e32 v1, s474; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 075; SI-NEXT: s_endpgm76;77; VI-LABEL: s_test_copysign_f64_0:78; VI: ; %bb.0:79; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c80; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2481; VI-NEXT: s_waitcnt lgkmcnt(0)82; VI-NEXT: s_bitset0_b32 s1, 3183; VI-NEXT: v_mov_b32_e32 v2, s284; VI-NEXT: v_mov_b32_e32 v0, s085; VI-NEXT: v_mov_b32_e32 v1, s186; VI-NEXT: v_mov_b32_e32 v3, s387; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]88; VI-NEXT: s_endpgm89;90; GFX11-LABEL: s_test_copysign_f64_0:91; GFX11: ; %bb.0:92; GFX11-NEXT: s_clause 0x193; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c94; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x2495; GFX11-NEXT: s_waitcnt lgkmcnt(0)96; GFX11-NEXT: s_bitset0_b32 s1, 3197; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)98; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s199; GFX11-NEXT: v_mov_b32_e32 v0, s0100; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]101; GFX11-NEXT: s_endpgm102 %result = call double @llvm.copysign.f64(double %mag, double 0.0)103 store double %result, ptr addrspace(1) %out, align 8104 ret void105}106 107define amdgpu_kernel void @s_test_copysign_f64_1(ptr addrspace(1) %out, [8 x i32], double %mag) {108; SI-LABEL: s_test_copysign_f64_1:109; SI: ; %bb.0:110; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x13111; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9112; SI-NEXT: s_mov_b32 s3, 0xf000113; SI-NEXT: s_mov_b32 s2, -1114; SI-NEXT: s_waitcnt lgkmcnt(0)115; SI-NEXT: s_and_b32 s4, s7, 0x7fffffff116; SI-NEXT: v_mov_b32_e32 v0, s6117; SI-NEXT: v_mov_b32_e32 v1, s4118; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0119; SI-NEXT: s_endpgm120;121; VI-LABEL: s_test_copysign_f64_1:122; VI: ; %bb.0:123; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c124; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24125; VI-NEXT: s_waitcnt lgkmcnt(0)126; VI-NEXT: s_bitset0_b32 s1, 31127; VI-NEXT: v_mov_b32_e32 v2, s2128; VI-NEXT: v_mov_b32_e32 v0, s0129; VI-NEXT: v_mov_b32_e32 v1, s1130; VI-NEXT: v_mov_b32_e32 v3, s3131; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]132; VI-NEXT: s_endpgm133;134; GFX11-LABEL: s_test_copysign_f64_1:135; GFX11: ; %bb.0:136; GFX11-NEXT: s_clause 0x1137; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c138; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24139; GFX11-NEXT: s_waitcnt lgkmcnt(0)140; GFX11-NEXT: s_bitset0_b32 s1, 31141; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)142; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s1143; GFX11-NEXT: v_mov_b32_e32 v0, s0144; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]145; GFX11-NEXT: s_endpgm146 %result = call double @llvm.copysign.f64(double %mag, double 1.0)147 store double %result, ptr addrspace(1) %out, align 8148 ret void149}150 151define amdgpu_kernel void @s_test_copysign_f64_10(ptr addrspace(1) %out, [8 x i32], double %mag) {152; SI-LABEL: s_test_copysign_f64_10:153; SI: ; %bb.0:154; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x13155; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9156; SI-NEXT: s_mov_b32 s3, 0xf000157; SI-NEXT: s_mov_b32 s2, -1158; SI-NEXT: s_waitcnt lgkmcnt(0)159; SI-NEXT: s_and_b32 s4, s7, 0x7fffffff160; SI-NEXT: v_mov_b32_e32 v0, s6161; SI-NEXT: v_mov_b32_e32 v1, s4162; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0163; SI-NEXT: s_endpgm164;165; VI-LABEL: s_test_copysign_f64_10:166; VI: ; %bb.0:167; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c168; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24169; VI-NEXT: s_waitcnt lgkmcnt(0)170; VI-NEXT: s_bitset0_b32 s1, 31171; VI-NEXT: v_mov_b32_e32 v2, s2172; VI-NEXT: v_mov_b32_e32 v0, s0173; VI-NEXT: v_mov_b32_e32 v1, s1174; VI-NEXT: v_mov_b32_e32 v3, s3175; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]176; VI-NEXT: s_endpgm177;178; GFX11-LABEL: s_test_copysign_f64_10:179; GFX11: ; %bb.0:180; GFX11-NEXT: s_clause 0x1181; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c182; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24183; GFX11-NEXT: s_waitcnt lgkmcnt(0)184; GFX11-NEXT: s_bitset0_b32 s1, 31185; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)186; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s1187; GFX11-NEXT: v_mov_b32_e32 v0, s0188; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]189; GFX11-NEXT: s_endpgm190 %result = call double @llvm.copysign.f64(double %mag, double 10.0)191 store double %result, ptr addrspace(1) %out, align 8192 ret void193}194 195define amdgpu_kernel void @s_test_copysign_f64_neg1(ptr addrspace(1) %out, [8 x i32], double %mag) {196; SI-LABEL: s_test_copysign_f64_neg1:197; SI: ; %bb.0:198; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x13199; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9200; SI-NEXT: s_mov_b32 s3, 0xf000201; SI-NEXT: s_mov_b32 s2, -1202; SI-NEXT: s_waitcnt lgkmcnt(0)203; SI-NEXT: s_or_b32 s4, s7, 0x80000000204; SI-NEXT: v_mov_b32_e32 v0, s6205; SI-NEXT: v_mov_b32_e32 v1, s4206; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0207; SI-NEXT: s_endpgm208;209; VI-LABEL: s_test_copysign_f64_neg1:210; VI: ; %bb.0:211; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c212; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24213; VI-NEXT: s_waitcnt lgkmcnt(0)214; VI-NEXT: s_bitset1_b32 s1, 31215; VI-NEXT: v_mov_b32_e32 v2, s2216; VI-NEXT: v_mov_b32_e32 v0, s0217; VI-NEXT: v_mov_b32_e32 v1, s1218; VI-NEXT: v_mov_b32_e32 v3, s3219; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]220; VI-NEXT: s_endpgm221;222; GFX11-LABEL: s_test_copysign_f64_neg1:223; GFX11: ; %bb.0:224; GFX11-NEXT: s_clause 0x1225; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c226; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24227; GFX11-NEXT: s_waitcnt lgkmcnt(0)228; GFX11-NEXT: s_bitset1_b32 s1, 31229; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)230; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s1231; GFX11-NEXT: v_mov_b32_e32 v0, s0232; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]233; GFX11-NEXT: s_endpgm234 %result = call double @llvm.copysign.f64(double %mag, double -1.0)235 store double %result, ptr addrspace(1) %out, align 8236 ret void237}238 239define amdgpu_kernel void @s_test_copysign_f64_neg10(ptr addrspace(1) %out, [8 x i32], double %mag) {240; SI-LABEL: s_test_copysign_f64_neg10:241; SI: ; %bb.0:242; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x13243; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9244; SI-NEXT: s_mov_b32 s3, 0xf000245; SI-NEXT: s_mov_b32 s2, -1246; SI-NEXT: s_waitcnt lgkmcnt(0)247; SI-NEXT: s_or_b32 s4, s7, 0x80000000248; SI-NEXT: v_mov_b32_e32 v0, s6249; SI-NEXT: v_mov_b32_e32 v1, s4250; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0251; SI-NEXT: s_endpgm252;253; VI-LABEL: s_test_copysign_f64_neg10:254; VI: ; %bb.0:255; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c256; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24257; VI-NEXT: s_waitcnt lgkmcnt(0)258; VI-NEXT: s_bitset1_b32 s1, 31259; VI-NEXT: v_mov_b32_e32 v2, s2260; VI-NEXT: v_mov_b32_e32 v0, s0261; VI-NEXT: v_mov_b32_e32 v1, s1262; VI-NEXT: v_mov_b32_e32 v3, s3263; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]264; VI-NEXT: s_endpgm265;266; GFX11-LABEL: s_test_copysign_f64_neg10:267; GFX11: ; %bb.0:268; GFX11-NEXT: s_clause 0x1269; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c270; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24271; GFX11-NEXT: s_waitcnt lgkmcnt(0)272; GFX11-NEXT: s_bitset1_b32 s1, 31273; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)274; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s1275; GFX11-NEXT: v_mov_b32_e32 v0, s0276; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]277; GFX11-NEXT: s_endpgm278 %result = call double @llvm.copysign.f64(double %mag, double -10.0)279 store double %result, ptr addrspace(1) %out, align 8280 ret void281}282 283define amdgpu_kernel void @s_test_copysign_f64_f32(ptr addrspace(1) %out, [8 x i32], double %mag, [8 x i32], float %sign) {284; SI-LABEL: s_test_copysign_f64_f32:285; SI: ; %bb.0:286; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9287; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x13288; SI-NEXT: s_load_dword s4, s[4:5], 0x1d289; SI-NEXT: s_brev_b32 s5, -2290; SI-NEXT: s_mov_b32 s3, 0xf000291; SI-NEXT: s_mov_b32 s2, -1292; SI-NEXT: s_waitcnt lgkmcnt(0)293; SI-NEXT: v_mov_b32_e32 v0, s7294; SI-NEXT: v_mov_b32_e32 v1, s4295; SI-NEXT: v_bfi_b32 v1, s5, v0, v1296; SI-NEXT: v_mov_b32_e32 v0, s6297; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0298; SI-NEXT: s_endpgm299;300; VI-LABEL: s_test_copysign_f64_f32:301; VI: ; %bb.0:302; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c303; VI-NEXT: s_load_dword s6, s[4:5], 0x74304; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24305; VI-NEXT: s_brev_b32 s4, -2306; VI-NEXT: s_waitcnt lgkmcnt(0)307; VI-NEXT: v_mov_b32_e32 v0, s1308; VI-NEXT: v_mov_b32_e32 v1, s6309; VI-NEXT: v_mov_b32_e32 v2, s2310; VI-NEXT: v_bfi_b32 v1, s4, v0, v1311; VI-NEXT: v_mov_b32_e32 v0, s0312; VI-NEXT: v_mov_b32_e32 v3, s3313; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]314; VI-NEXT: s_endpgm315;316; GFX11-LABEL: s_test_copysign_f64_f32:317; GFX11: ; %bb.0:318; GFX11-NEXT: s_clause 0x2319; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x74320; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c321; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24322; GFX11-NEXT: v_mov_b32_e32 v2, 0323; GFX11-NEXT: s_waitcnt lgkmcnt(0)324; GFX11-NEXT: v_mov_b32_e32 v0, s6325; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)326; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v0327; GFX11-NEXT: v_mov_b32_e32 v0, s0328; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]329; GFX11-NEXT: s_endpgm330 %sign.ext = fpext float %sign to double331 %result = call double @llvm.copysign.f64(double %mag, double %sign.ext)332 store double %result, ptr addrspace(1) %out, align 8333 ret void334}335 336define amdgpu_kernel void @s_test_copysign_f64_f16(ptr addrspace(1) %out, [8 x i32], double %mag, [8 x i32], half %sign) {337; SI-LABEL: s_test_copysign_f64_f16:338; SI: ; %bb.0:339; SI-NEXT: s_load_dword s2, s[4:5], 0x1d340; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9341; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x13342; SI-NEXT: s_brev_b32 s6, -2343; SI-NEXT: s_mov_b32 s3, 0xf000344; SI-NEXT: s_waitcnt lgkmcnt(0)345; SI-NEXT: v_cvt_f32_f16_e32 v0, s2346; SI-NEXT: s_mov_b32 s2, -1347; SI-NEXT: v_mov_b32_e32 v1, s5348; SI-NEXT: v_bfi_b32 v1, s6, v1, v0349; SI-NEXT: v_mov_b32_e32 v0, s4350; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0351; SI-NEXT: s_endpgm352;353; VI-LABEL: s_test_copysign_f64_f16:354; VI: ; %bb.0:355; VI-NEXT: s_load_dword s6, s[4:5], 0x74356; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x4c357; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24358; VI-NEXT: s_brev_b32 s4, -2359; VI-NEXT: s_waitcnt lgkmcnt(0)360; VI-NEXT: v_lshlrev_b32_e64 v0, 16, s6361; VI-NEXT: v_mov_b32_e32 v1, s1362; VI-NEXT: v_mov_b32_e32 v2, s2363; VI-NEXT: v_bfi_b32 v1, s4, v1, v0364; VI-NEXT: v_mov_b32_e32 v0, s0365; VI-NEXT: v_mov_b32_e32 v3, s3366; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]367; VI-NEXT: s_endpgm368;369; GFX11-LABEL: s_test_copysign_f64_f16:370; GFX11: ; %bb.0:371; GFX11-NEXT: s_clause 0x2372; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x74373; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x4c374; GFX11-NEXT: s_load_b64 s[2:3], s[4:5], 0x24375; GFX11-NEXT: v_mov_b32_e32 v2, 0376; GFX11-NEXT: s_waitcnt lgkmcnt(0)377; GFX11-NEXT: v_mov_b16_e32 v0.h, s6378; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)379; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s1, v0380; GFX11-NEXT: v_mov_b32_e32 v0, s0381; GFX11-NEXT: global_store_b64 v2, v[0:1], s[2:3]382; GFX11-NEXT: s_endpgm383 %sign.ext = fpext half %sign to double384 %result = call double @llvm.copysign.f64(double %mag, double %sign.ext)385 store double %result, ptr addrspace(1) %out, align 8386 ret void387}388 389define amdgpu_kernel void @s_test_copysign_f64_0_mag(ptr addrspace(1) %out, double %sign) {390; SI-LABEL: s_test_copysign_f64_0_mag:391; SI: ; %bb.0:392; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9393; SI-NEXT: s_mov_b32 s7, 0xf000394; SI-NEXT: s_mov_b32 s6, -1395; SI-NEXT: v_mov_b32_e32 v0, 0396; SI-NEXT: s_waitcnt lgkmcnt(0)397; SI-NEXT: s_mov_b32 s4, s0398; SI-NEXT: s_and_b32 s0, s3, 0x80000000399; SI-NEXT: s_mov_b32 s5, s1400; SI-NEXT: v_mov_b32_e32 v1, s0401; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0402; SI-NEXT: s_endpgm403;404; VI-LABEL: s_test_copysign_f64_0_mag:405; VI: ; %bb.0:406; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24407; VI-NEXT: v_mov_b32_e32 v2, 0408; VI-NEXT: s_waitcnt lgkmcnt(0)409; VI-NEXT: v_mov_b32_e32 v0, s0410; VI-NEXT: s_and_b32 s0, s3, 0x80000000411; VI-NEXT: v_mov_b32_e32 v1, s1412; VI-NEXT: v_mov_b32_e32 v3, s0413; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]414; VI-NEXT: s_endpgm415;416; GFX11-LABEL: s_test_copysign_f64_0_mag:417; GFX11: ; %bb.0:418; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24419; GFX11-NEXT: s_waitcnt lgkmcnt(0)420; GFX11-NEXT: s_and_b32 s2, s3, 0x80000000421; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)422; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2423; GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1]424; GFX11-NEXT: s_endpgm425 %result = call double @llvm.copysign.f64(double 0.0, double %sign)426 store double %result, ptr addrspace(1) %out, align 4427 ret void428}429 430define amdgpu_kernel void @s_test_copysign_f64_1_mag(ptr addrspace(1) %out, double %sign) {431; SI-LABEL: s_test_copysign_f64_1_mag:432; SI: ; %bb.0:433; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9434; SI-NEXT: s_mov_b32 s7, 0xf000435; SI-NEXT: s_mov_b32 s6, -1436; SI-NEXT: v_mov_b32_e32 v0, 0437; SI-NEXT: s_waitcnt lgkmcnt(0)438; SI-NEXT: s_mov_b32 s4, s0439; SI-NEXT: s_and_b32 s0, s3, 0x80000000440; SI-NEXT: s_or_b32 s0, s0, 0x3ff00000441; SI-NEXT: s_mov_b32 s5, s1442; SI-NEXT: v_mov_b32_e32 v1, s0443; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0444; SI-NEXT: s_endpgm445;446; VI-LABEL: s_test_copysign_f64_1_mag:447; VI: ; %bb.0:448; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24449; VI-NEXT: v_mov_b32_e32 v2, 0450; VI-NEXT: s_waitcnt lgkmcnt(0)451; VI-NEXT: v_mov_b32_e32 v0, s0452; VI-NEXT: s_and_b32 s0, s3, 0x80000000453; VI-NEXT: s_or_b32 s0, s0, 0x3ff00000454; VI-NEXT: v_mov_b32_e32 v1, s1455; VI-NEXT: v_mov_b32_e32 v3, s0456; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]457; VI-NEXT: s_endpgm458;459; GFX11-LABEL: s_test_copysign_f64_1_mag:460; GFX11: ; %bb.0:461; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24462; GFX11-NEXT: s_waitcnt lgkmcnt(0)463; GFX11-NEXT: s_and_b32 s2, s3, 0x80000000464; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)465; GFX11-NEXT: s_or_b32 s2, s2, 0x3ff00000466; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2467; GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1]468; GFX11-NEXT: s_endpgm469 %result = call double @llvm.copysign.f64(double 1.0, double %sign)470 store double %result, ptr addrspace(1) %out, align 4471 ret void472}473 474define amdgpu_kernel void @s_test_copysign_f64_10_mag(ptr addrspace(1) %out, double %sign) {475; SI-LABEL: s_test_copysign_f64_10_mag:476; SI: ; %bb.0:477; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9478; SI-NEXT: s_mov_b32 s7, 0xf000479; SI-NEXT: s_mov_b32 s6, -1480; SI-NEXT: v_mov_b32_e32 v0, 0481; SI-NEXT: s_waitcnt lgkmcnt(0)482; SI-NEXT: s_mov_b32 s4, s0483; SI-NEXT: s_and_b32 s0, s3, 0x80000000484; SI-NEXT: s_or_b32 s0, s0, 0x40240000485; SI-NEXT: s_mov_b32 s5, s1486; SI-NEXT: v_mov_b32_e32 v1, s0487; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0488; SI-NEXT: s_endpgm489;490; VI-LABEL: s_test_copysign_f64_10_mag:491; VI: ; %bb.0:492; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24493; VI-NEXT: v_mov_b32_e32 v2, 0494; VI-NEXT: s_waitcnt lgkmcnt(0)495; VI-NEXT: v_mov_b32_e32 v0, s0496; VI-NEXT: s_and_b32 s0, s3, 0x80000000497; VI-NEXT: s_or_b32 s0, s0, 0x40240000498; VI-NEXT: v_mov_b32_e32 v1, s1499; VI-NEXT: v_mov_b32_e32 v3, s0500; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]501; VI-NEXT: s_endpgm502;503; GFX11-LABEL: s_test_copysign_f64_10_mag:504; GFX11: ; %bb.0:505; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24506; GFX11-NEXT: s_waitcnt lgkmcnt(0)507; GFX11-NEXT: s_and_b32 s2, s3, 0x80000000508; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)509; GFX11-NEXT: s_or_b32 s2, s2, 0x40240000510; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2511; GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1]512; GFX11-NEXT: s_endpgm513 %result = call double @llvm.copysign.f64(double 10.0, double %sign)514 store double %result, ptr addrspace(1) %out, align 4515 ret void516}517 518define amdgpu_kernel void @s_test_copysign_f64_neg1_mag(ptr addrspace(1) %out, double %sign) {519; SI-LABEL: s_test_copysign_f64_neg1_mag:520; SI: ; %bb.0:521; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9522; SI-NEXT: s_mov_b32 s7, 0xf000523; SI-NEXT: s_mov_b32 s6, -1524; SI-NEXT: v_mov_b32_e32 v0, 0525; SI-NEXT: s_waitcnt lgkmcnt(0)526; SI-NEXT: s_mov_b32 s4, s0527; SI-NEXT: s_and_b32 s0, s3, 0x80000000528; SI-NEXT: s_or_b32 s0, s0, 0x3ff00000529; SI-NEXT: s_mov_b32 s5, s1530; SI-NEXT: v_mov_b32_e32 v1, s0531; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0532; SI-NEXT: s_endpgm533;534; VI-LABEL: s_test_copysign_f64_neg1_mag:535; VI: ; %bb.0:536; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24537; VI-NEXT: v_mov_b32_e32 v2, 0538; VI-NEXT: s_waitcnt lgkmcnt(0)539; VI-NEXT: v_mov_b32_e32 v0, s0540; VI-NEXT: s_and_b32 s0, s3, 0x80000000541; VI-NEXT: s_or_b32 s0, s0, 0x3ff00000542; VI-NEXT: v_mov_b32_e32 v1, s1543; VI-NEXT: v_mov_b32_e32 v3, s0544; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]545; VI-NEXT: s_endpgm546;547; GFX11-LABEL: s_test_copysign_f64_neg1_mag:548; GFX11: ; %bb.0:549; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24550; GFX11-NEXT: s_waitcnt lgkmcnt(0)551; GFX11-NEXT: s_and_b32 s2, s3, 0x80000000552; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)553; GFX11-NEXT: s_or_b32 s2, s2, 0x3ff00000554; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2555; GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1]556; GFX11-NEXT: s_endpgm557 %result = call double @llvm.copysign.f64(double -1.0, double %sign)558 store double %result, ptr addrspace(1) %out, align 4559 ret void560}561 562define amdgpu_kernel void @s_test_copysign_f64_neg10_mag(ptr addrspace(1) %out, double %sign) {563; SI-LABEL: s_test_copysign_f64_neg10_mag:564; SI: ; %bb.0:565; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9566; SI-NEXT: s_mov_b32 s7, 0xf000567; SI-NEXT: s_mov_b32 s6, -1568; SI-NEXT: v_mov_b32_e32 v0, 0569; SI-NEXT: s_waitcnt lgkmcnt(0)570; SI-NEXT: s_mov_b32 s4, s0571; SI-NEXT: s_and_b32 s0, s3, 0x80000000572; SI-NEXT: s_or_b32 s0, s0, 0x40240000573; SI-NEXT: s_mov_b32 s5, s1574; SI-NEXT: v_mov_b32_e32 v1, s0575; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0576; SI-NEXT: s_endpgm577;578; VI-LABEL: s_test_copysign_f64_neg10_mag:579; VI: ; %bb.0:580; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24581; VI-NEXT: v_mov_b32_e32 v2, 0582; VI-NEXT: s_waitcnt lgkmcnt(0)583; VI-NEXT: v_mov_b32_e32 v0, s0584; VI-NEXT: s_and_b32 s0, s3, 0x80000000585; VI-NEXT: s_or_b32 s0, s0, 0x40240000586; VI-NEXT: v_mov_b32_e32 v1, s1587; VI-NEXT: v_mov_b32_e32 v3, s0588; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]589; VI-NEXT: s_endpgm590;591; GFX11-LABEL: s_test_copysign_f64_neg10_mag:592; GFX11: ; %bb.0:593; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24594; GFX11-NEXT: s_waitcnt lgkmcnt(0)595; GFX11-NEXT: s_and_b32 s2, s3, 0x80000000596; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)597; GFX11-NEXT: s_or_b32 s2, s2, 0x40240000598; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2599; GFX11-NEXT: global_store_b64 v0, v[0:1], s[0:1]600; GFX11-NEXT: s_endpgm601 %result = call double @llvm.copysign.f64(double -10.0, double %sign)602 store double %result, ptr addrspace(1) %out, align 4603 ret void604}605 606define amdgpu_kernel void @s_test_copysign_v2f64(ptr addrspace(1) %out, <2 x double> %mag, <2 x double> %sign) {607; SI-LABEL: s_test_copysign_v2f64:608; SI: ; %bb.0:609; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0xd610; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9611; SI-NEXT: s_brev_b32 s6, -2612; SI-NEXT: s_mov_b32 s3, 0xf000613; SI-NEXT: s_mov_b32 s2, -1614; SI-NEXT: s_waitcnt lgkmcnt(0)615; SI-NEXT: v_mov_b32_e32 v0, s11616; SI-NEXT: v_mov_b32_e32 v1, s15617; SI-NEXT: v_bfi_b32 v3, s6, v0, v1618; SI-NEXT: v_mov_b32_e32 v0, s9619; SI-NEXT: v_mov_b32_e32 v1, s13620; SI-NEXT: v_bfi_b32 v1, s6, v0, v1621; SI-NEXT: v_mov_b32_e32 v0, s8622; SI-NEXT: v_mov_b32_e32 v2, s10623; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0624; SI-NEXT: s_endpgm625;626; VI-LABEL: s_test_copysign_v2f64:627; VI: ; %bb.0:628; VI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x34629; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24630; VI-NEXT: s_brev_b32 s2, -2631; VI-NEXT: s_waitcnt lgkmcnt(0)632; VI-NEXT: v_mov_b32_e32 v0, s11633; VI-NEXT: v_mov_b32_e32 v1, s15634; VI-NEXT: v_mov_b32_e32 v2, s9635; VI-NEXT: v_bfi_b32 v3, s2, v0, v1636; VI-NEXT: v_mov_b32_e32 v0, s13637; VI-NEXT: v_mov_b32_e32 v5, s1638; VI-NEXT: v_bfi_b32 v1, s2, v2, v0639; VI-NEXT: v_mov_b32_e32 v0, s8640; VI-NEXT: v_mov_b32_e32 v2, s10641; VI-NEXT: v_mov_b32_e32 v4, s0642; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]643; VI-NEXT: s_endpgm644;645; GFX11-LABEL: s_test_copysign_v2f64:646; GFX11: ; %bb.0:647; GFX11-NEXT: s_clause 0x1648; GFX11-NEXT: s_load_b256 s[8:15], s[4:5], 0x34649; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24650; GFX11-NEXT: s_waitcnt lgkmcnt(0)651; GFX11-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v1, s15652; GFX11-NEXT: v_mov_b32_e32 v2, s13653; GFX11-NEXT: v_mov_b32_e32 v0, s8654; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)655; GFX11-NEXT: v_bfi_b32 v3, 0x7fffffff, s11, v1656; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s9, v2657; GFX11-NEXT: v_mov_b32_e32 v2, s10658; GFX11-NEXT: global_store_b128 v4, v[0:3], s[0:1]659; GFX11-NEXT: s_endpgm660 %result = call <2 x double> @llvm.copysign.v2f64(<2 x double> %mag, <2 x double> %sign)661 store <2 x double> %result, ptr addrspace(1) %out, align 16662 ret void663}664 665define amdgpu_kernel void @s_test_copysign_v3f64(ptr addrspace(1) %out, <3 x double> %mag, <3 x double> %sign) {666; SI-LABEL: s_test_copysign_v3f64:667; SI: ; %bb.0:668; SI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x11669; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9670; SI-NEXT: s_brev_b32 s6, -2671; SI-NEXT: s_mov_b32 s3, 0xf000672; SI-NEXT: s_mov_b32 s2, -1673; SI-NEXT: s_waitcnt lgkmcnt(0)674; SI-NEXT: v_mov_b32_e32 v0, s11675; SI-NEXT: v_mov_b32_e32 v1, s19676; SI-NEXT: v_bfi_b32 v3, s6, v0, v1677; SI-NEXT: v_mov_b32_e32 v0, s9678; SI-NEXT: v_mov_b32_e32 v1, s17679; SI-NEXT: v_bfi_b32 v1, s6, v0, v1680; SI-NEXT: v_mov_b32_e32 v0, s13681; SI-NEXT: v_mov_b32_e32 v2, s21682; SI-NEXT: v_bfi_b32 v5, s6, v0, v2683; SI-NEXT: v_mov_b32_e32 v4, s12684; SI-NEXT: v_mov_b32_e32 v0, s8685; SI-NEXT: v_mov_b32_e32 v2, s10686; SI-NEXT: buffer_store_dwordx2 v[4:5], off, s[0:3], 0 offset:16687; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0688; SI-NEXT: s_endpgm689;690; VI-LABEL: s_test_copysign_v3f64:691; VI: ; %bb.0:692; VI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x44693; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24694; VI-NEXT: s_brev_b32 s2, -2695; VI-NEXT: s_waitcnt lgkmcnt(0)696; VI-NEXT: v_mov_b32_e32 v0, s11697; VI-NEXT: v_mov_b32_e32 v1, s19698; VI-NEXT: v_mov_b32_e32 v2, s9699; VI-NEXT: v_bfi_b32 v3, s2, v0, v1700; VI-NEXT: v_mov_b32_e32 v0, s17701; VI-NEXT: v_bfi_b32 v1, s2, v2, v0702; VI-NEXT: v_mov_b32_e32 v0, s13703; VI-NEXT: v_mov_b32_e32 v2, s21704; VI-NEXT: v_bfi_b32 v5, s2, v0, v2705; VI-NEXT: s_add_u32 s2, s0, 16706; VI-NEXT: s_addc_u32 s3, s1, 0707; VI-NEXT: v_mov_b32_e32 v7, s3708; VI-NEXT: v_mov_b32_e32 v4, s12709; VI-NEXT: v_mov_b32_e32 v6, s2710; VI-NEXT: flat_store_dwordx2 v[6:7], v[4:5]711; VI-NEXT: v_mov_b32_e32 v5, s1712; VI-NEXT: v_mov_b32_e32 v0, s8713; VI-NEXT: v_mov_b32_e32 v2, s10714; VI-NEXT: v_mov_b32_e32 v4, s0715; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]716; VI-NEXT: s_endpgm717;718; GFX11-LABEL: s_test_copysign_v3f64:719; GFX11: ; %bb.0:720; GFX11-NEXT: s_clause 0x1721; GFX11-NEXT: s_load_b512 s[8:23], s[4:5], 0x44722; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24723; GFX11-NEXT: s_waitcnt lgkmcnt(0)724; GFX11-NEXT: v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v1, s19725; GFX11-NEXT: v_dual_mov_b32 v5, s21 :: v_dual_mov_b32 v0, s8726; GFX11-NEXT: v_dual_mov_b32 v7, s17 :: v_dual_mov_b32 v4, s12727; GFX11-NEXT: v_mov_b32_e32 v2, s10728; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)729; GFX11-NEXT: v_bfi_b32 v5, 0x7fffffff, s13, v5730; GFX11-NEXT: v_bfi_b32 v3, 0x7fffffff, s11, v1731; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s9, v7732; GFX11-NEXT: s_clause 0x1733; GFX11-NEXT: global_store_b64 v6, v[4:5], s[0:1] offset:16734; GFX11-NEXT: global_store_b128 v6, v[0:3], s[0:1]735; GFX11-NEXT: s_endpgm736 %result = call <3 x double> @llvm.copysign.v3f64(<3 x double> %mag, <3 x double> %sign)737 store <3 x double> %result, ptr addrspace(1) %out, align 32738 ret void739}740 741define amdgpu_kernel void @s_test_copysign_v4f64(ptr addrspace(1) %out, <4 x double> %mag, <4 x double> %sign) {742; SI-LABEL: s_test_copysign_v4f64:743; SI: ; %bb.0:744; SI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x11745; SI-NEXT: s_brev_b32 s6, -2746; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9747; SI-NEXT: s_mov_b32 s3, 0xf000748; SI-NEXT: s_mov_b32 s2, -1749; SI-NEXT: s_waitcnt lgkmcnt(0)750; SI-NEXT: v_mov_b32_e32 v0, s11751; SI-NEXT: v_mov_b32_e32 v1, s19752; SI-NEXT: v_bfi_b32 v3, s6, v0, v1753; SI-NEXT: v_mov_b32_e32 v0, s9754; SI-NEXT: v_mov_b32_e32 v1, s17755; SI-NEXT: v_bfi_b32 v1, s6, v0, v1756; SI-NEXT: v_mov_b32_e32 v0, s15757; SI-NEXT: v_mov_b32_e32 v2, s23758; SI-NEXT: v_bfi_b32 v7, s6, v0, v2759; SI-NEXT: v_mov_b32_e32 v0, s13760; SI-NEXT: v_mov_b32_e32 v2, s21761; SI-NEXT: v_bfi_b32 v5, s6, v0, v2762; SI-NEXT: v_mov_b32_e32 v4, s12763; SI-NEXT: v_mov_b32_e32 v6, s14764; SI-NEXT: v_mov_b32_e32 v0, s8765; SI-NEXT: v_mov_b32_e32 v2, s10766; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16767; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0768; SI-NEXT: s_endpgm769;770; VI-LABEL: s_test_copysign_v4f64:771; VI: ; %bb.0:772; VI-NEXT: s_load_dwordx16 s[8:23], s[4:5], 0x44773; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24774; VI-NEXT: s_brev_b32 s2, -2775; VI-NEXT: s_waitcnt lgkmcnt(0)776; VI-NEXT: v_mov_b32_e32 v0, s11777; VI-NEXT: v_mov_b32_e32 v1, s19778; VI-NEXT: v_mov_b32_e32 v2, s9779; VI-NEXT: v_bfi_b32 v3, s2, v0, v1780; VI-NEXT: v_mov_b32_e32 v0, s17781; VI-NEXT: v_bfi_b32 v1, s2, v2, v0782; VI-NEXT: v_mov_b32_e32 v0, s15783; VI-NEXT: v_mov_b32_e32 v2, s23784; VI-NEXT: v_bfi_b32 v7, s2, v0, v2785; VI-NEXT: v_mov_b32_e32 v0, s13786; VI-NEXT: v_mov_b32_e32 v2, s21787; VI-NEXT: v_bfi_b32 v5, s2, v0, v2788; VI-NEXT: s_add_u32 s2, s0, 16789; VI-NEXT: s_addc_u32 s3, s1, 0790; VI-NEXT: v_mov_b32_e32 v9, s3791; VI-NEXT: v_mov_b32_e32 v4, s12792; VI-NEXT: v_mov_b32_e32 v6, s14793; VI-NEXT: v_mov_b32_e32 v8, s2794; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]795; VI-NEXT: v_mov_b32_e32 v0, s8796; VI-NEXT: v_mov_b32_e32 v5, s1797; VI-NEXT: v_mov_b32_e32 v2, s10798; VI-NEXT: v_mov_b32_e32 v4, s0799; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]800; VI-NEXT: s_endpgm801;802; GFX11-LABEL: s_test_copysign_v4f64:803; GFX11: ; %bb.0:804; GFX11-NEXT: s_clause 0x1805; GFX11-NEXT: s_load_b512 s[8:23], s[4:5], 0x44806; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24807; GFX11-NEXT: s_waitcnt lgkmcnt(0)808; GFX11-NEXT: v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v1, s19809; GFX11-NEXT: v_dual_mov_b32 v3, s23 :: v_dual_mov_b32 v2, s14810; GFX11-NEXT: v_dual_mov_b32 v9, s21 :: v_dual_mov_b32 v4, s8811; GFX11-NEXT: v_dual_mov_b32 v5, s17 :: v_dual_mov_b32 v0, s12812; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)813; GFX11-NEXT: v_bfi_b32 v7, 0x7fffffff, s11, v1814; GFX11-NEXT: v_bfi_b32 v3, 0x7fffffff, s15, v3815; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4)816; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, s13, v9817; GFX11-NEXT: v_mov_b32_e32 v6, s10818; GFX11-NEXT: v_bfi_b32 v5, 0x7fffffff, s9, v5819; GFX11-NEXT: s_clause 0x1820; GFX11-NEXT: global_store_b128 v8, v[0:3], s[0:1] offset:16821; GFX11-NEXT: global_store_b128 v8, v[4:7], s[0:1]822; GFX11-NEXT: s_endpgm823 %result = call <4 x double> @llvm.copysign.v4f64(<4 x double> %mag, <4 x double> %sign)824 store <4 x double> %result, ptr addrspace(1) %out, align 32825 ret void826}827 828define double @v_test_copysign_f64(ptr addrspace(1) %out, [8 x i32], double %mag, [8 x i32], double %sign) {829; SIVI-LABEL: v_test_copysign_f64:830; SIVI: ; %bb.0:831; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)832; SIVI-NEXT: s_brev_b32 s4, -2833; SIVI-NEXT: v_mov_b32_e32 v0, v10834; SIVI-NEXT: v_bfi_b32 v1, s4, v11, v21835; SIVI-NEXT: s_setpc_b64 s[30:31]836;837; GFX11-LABEL: v_test_copysign_f64:838; GFX11: ; %bb.0:839; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)840; GFX11-NEXT: v_mov_b32_e32 v0, v10841; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, v11, v21842; GFX11-NEXT: s_setpc_b64 s[30:31]843 %result = call double @llvm.copysign.f64(double %mag, double %sign)844 ret double %result845}846 847define double @v_test_copysign_f64_0(ptr addrspace(1) %out, [8 x i32], double %mag) {848; SIVI-LABEL: v_test_copysign_f64_0:849; SIVI: ; %bb.0:850; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)851; SIVI-NEXT: v_mov_b32_e32 v0, v10852; SIVI-NEXT: v_and_b32_e32 v1, 0x7fffffff, v11853; SIVI-NEXT: s_setpc_b64 s[30:31]854;855; GFX11-LABEL: v_test_copysign_f64_0:856; GFX11: ; %bb.0:857; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)858; GFX11-NEXT: v_dual_mov_b32 v0, v10 :: v_dual_and_b32 v1, 0x7fffffff, v11859; GFX11-NEXT: s_setpc_b64 s[30:31]860 %result = call double @llvm.copysign.f64(double %mag, double 0.0)861 ret double %result862}863 864define double @v_test_copysign_f64_1(ptr addrspace(1) %out, [8 x i32], double %mag) {865; SIVI-LABEL: v_test_copysign_f64_1:866; SIVI: ; %bb.0:867; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)868; SIVI-NEXT: v_mov_b32_e32 v0, v10869; SIVI-NEXT: v_and_b32_e32 v1, 0x7fffffff, v11870; SIVI-NEXT: s_setpc_b64 s[30:31]871;872; GFX11-LABEL: v_test_copysign_f64_1:873; GFX11: ; %bb.0:874; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)875; GFX11-NEXT: v_dual_mov_b32 v0, v10 :: v_dual_and_b32 v1, 0x7fffffff, v11876; GFX11-NEXT: s_setpc_b64 s[30:31]877 %result = call double @llvm.copysign.f64(double %mag, double 1.0)878 ret double %result879}880 881define double @v_test_copysign_f64_10(ptr addrspace(1) %out, [8 x i32], double %mag) {882; SIVI-LABEL: v_test_copysign_f64_10:883; SIVI: ; %bb.0:884; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)885; SIVI-NEXT: v_mov_b32_e32 v0, v10886; SIVI-NEXT: v_and_b32_e32 v1, 0x7fffffff, v11887; SIVI-NEXT: s_setpc_b64 s[30:31]888;889; GFX11-LABEL: v_test_copysign_f64_10:890; GFX11: ; %bb.0:891; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)892; GFX11-NEXT: v_dual_mov_b32 v0, v10 :: v_dual_and_b32 v1, 0x7fffffff, v11893; GFX11-NEXT: s_setpc_b64 s[30:31]894 %result = call double @llvm.copysign.f64(double %mag, double 10.0)895 ret double %result896}897 898define double @v_test_copysign_f64_neg1(ptr addrspace(1) %out, [8 x i32], double %mag) {899; SIVI-LABEL: v_test_copysign_f64_neg1:900; SIVI: ; %bb.0:901; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)902; SIVI-NEXT: v_mov_b32_e32 v0, v10903; SIVI-NEXT: v_or_b32_e32 v1, 0x80000000, v11904; SIVI-NEXT: s_setpc_b64 s[30:31]905;906; GFX11-LABEL: v_test_copysign_f64_neg1:907; GFX11: ; %bb.0:908; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)909; GFX11-NEXT: v_mov_b32_e32 v0, v10910; GFX11-NEXT: v_or_b32_e32 v1, 0x80000000, v11911; GFX11-NEXT: s_setpc_b64 s[30:31]912 %result = call double @llvm.copysign.f64(double %mag, double -1.0)913 ret double %result914}915 916define double @v_test_copysign_f64_neg10(ptr addrspace(1) %out, [8 x i32], double %mag) {917; SIVI-LABEL: v_test_copysign_f64_neg10:918; SIVI: ; %bb.0:919; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)920; SIVI-NEXT: v_mov_b32_e32 v0, v10921; SIVI-NEXT: v_or_b32_e32 v1, 0x80000000, v11922; SIVI-NEXT: s_setpc_b64 s[30:31]923;924; GFX11-LABEL: v_test_copysign_f64_neg10:925; GFX11: ; %bb.0:926; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)927; GFX11-NEXT: v_mov_b32_e32 v0, v10928; GFX11-NEXT: v_or_b32_e32 v1, 0x80000000, v11929; GFX11-NEXT: s_setpc_b64 s[30:31]930 %result = call double @llvm.copysign.f64(double %mag, double -10.0)931 ret double %result932}933 934define double @v_test_copysign_f64_f32(ptr addrspace(1) %out, [8 x i32], double %mag, [8 x i32], float %sign) {935; SIVI-LABEL: v_test_copysign_f64_f32:936; SIVI: ; %bb.0:937; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)938; SIVI-NEXT: s_brev_b32 s4, -2939; SIVI-NEXT: v_mov_b32_e32 v0, v10940; SIVI-NEXT: v_bfi_b32 v1, s4, v11, v20941; SIVI-NEXT: s_setpc_b64 s[30:31]942;943; GFX11-LABEL: v_test_copysign_f64_f32:944; GFX11: ; %bb.0:945; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)946; GFX11-NEXT: v_mov_b32_e32 v0, v10947; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, v11, v20948; GFX11-NEXT: s_setpc_b64 s[30:31]949 %sign.ext = fpext float %sign to double950 %result = call double @llvm.copysign.f64(double %mag, double %sign.ext)951 ret double %result952}953 954define double @v_test_copysign_f64_f16(ptr addrspace(1) %out, [8 x i32], double %mag, [8 x i32], half %sign) {955; SI-LABEL: v_test_copysign_f64_f16:956; SI: ; %bb.0:957; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)958; SI-NEXT: s_brev_b32 s4, -2959; SI-NEXT: v_mov_b32_e32 v0, v10960; SI-NEXT: v_bfi_b32 v1, s4, v11, v20961; SI-NEXT: s_setpc_b64 s[30:31]962;963; VI-LABEL: v_test_copysign_f64_f16:964; VI: ; %bb.0:965; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)966; VI-NEXT: v_lshlrev_b32_e32 v1, 16, v20967; VI-NEXT: s_brev_b32 s4, -2968; VI-NEXT: v_mov_b32_e32 v0, v10969; VI-NEXT: v_bfi_b32 v1, s4, v11, v1970; VI-NEXT: s_setpc_b64 s[30:31]971;972; GFX11-LABEL: v_test_copysign_f64_f16:973; GFX11: ; %bb.0:974; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)975; GFX11-NEXT: v_mov_b16_e32 v1.h, v20.l976; GFX11-NEXT: v_mov_b32_e32 v0, v10977; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)978; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, v11, v1979; GFX11-NEXT: s_setpc_b64 s[30:31]980 %sign.ext = fpext half %sign to double981 %result = call double @llvm.copysign.f64(double %mag, double %sign.ext)982 ret double %result983}984 985define <2 x double> @v_test_copysign_v2f64(ptr addrspace(1) %out, <2 x double> %mag, <2 x double> %sign) {986; SIVI-LABEL: v_test_copysign_v2f64:987; SIVI: ; %bb.0:988; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)989; SIVI-NEXT: s_brev_b32 s4, -2990; SIVI-NEXT: v_mov_b32_e32 v0, v2991; SIVI-NEXT: v_bfi_b32 v1, s4, v3, v7992; SIVI-NEXT: v_bfi_b32 v3, s4, v5, v9993; SIVI-NEXT: v_mov_b32_e32 v2, v4994; SIVI-NEXT: s_setpc_b64 s[30:31]995;996; GFX11-LABEL: v_test_copysign_v2f64:997; GFX11: ; %bb.0:998; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)999; GFX11-NEXT: v_mov_b32_e32 v0, v21000; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, v3, v71001; GFX11-NEXT: v_bfi_b32 v3, 0x7fffffff, v5, v91002; GFX11-NEXT: v_mov_b32_e32 v2, v41003; GFX11-NEXT: s_setpc_b64 s[30:31]1004 %result = call <2 x double> @llvm.copysign.v2f64(<2 x double> %mag, <2 x double> %sign)1005 ret <2 x double> %result1006}1007 1008define <3 x double> @v_test_copysign_v3f64(ptr addrspace(1) %out, <3 x double> %mag, <3 x double> %sign) {1009; SIVI-LABEL: v_test_copysign_v3f64:1010; SIVI: ; %bb.0:1011; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1012; SIVI-NEXT: s_brev_b32 s4, -21013; SIVI-NEXT: v_mov_b32_e32 v0, v21014; SIVI-NEXT: v_bfi_b32 v1, s4, v3, v91015; SIVI-NEXT: v_bfi_b32 v3, s4, v5, v111016; SIVI-NEXT: v_bfi_b32 v5, s4, v7, v131017; SIVI-NEXT: v_mov_b32_e32 v2, v41018; SIVI-NEXT: v_mov_b32_e32 v4, v61019; SIVI-NEXT: s_setpc_b64 s[30:31]1020;1021; GFX11-LABEL: v_test_copysign_v3f64:1022; GFX11: ; %bb.0:1023; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1024; GFX11-NEXT: v_mov_b32_e32 v0, v21025; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, v3, v91026; GFX11-NEXT: v_bfi_b32 v3, 0x7fffffff, v5, v111027; GFX11-NEXT: v_bfi_b32 v5, 0x7fffffff, v7, v131028; GFX11-NEXT: v_mov_b32_e32 v2, v41029; GFX11-NEXT: v_mov_b32_e32 v4, v61030; GFX11-NEXT: s_setpc_b64 s[30:31]1031 %result = call <3 x double> @llvm.copysign.v3f64(<3 x double> %mag, <3 x double> %sign)1032 ret <3 x double> %result1033}1034 1035define <4 x double> @v_test_copysign_v4f64(ptr addrspace(1) %out, <4 x double> %mag, <4 x double> %sign) {1036; SIVI-LABEL: v_test_copysign_v4f64:1037; SIVI: ; %bb.0:1038; SIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1039; SIVI-NEXT: s_brev_b32 s4, -21040; SIVI-NEXT: v_mov_b32_e32 v0, v21041; SIVI-NEXT: v_bfi_b32 v1, s4, v3, v111042; SIVI-NEXT: v_bfi_b32 v3, s4, v5, v131043; SIVI-NEXT: v_bfi_b32 v5, s4, v7, v151044; SIVI-NEXT: v_bfi_b32 v7, s4, v9, v171045; SIVI-NEXT: v_mov_b32_e32 v2, v41046; SIVI-NEXT: v_mov_b32_e32 v4, v61047; SIVI-NEXT: v_mov_b32_e32 v6, v81048; SIVI-NEXT: s_setpc_b64 s[30:31]1049;1050; GFX11-LABEL: v_test_copysign_v4f64:1051; GFX11: ; %bb.0:1052; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1053; GFX11-NEXT: v_mov_b32_e32 v0, v21054; GFX11-NEXT: v_bfi_b32 v1, 0x7fffffff, v3, v111055; GFX11-NEXT: v_bfi_b32 v3, 0x7fffffff, v5, v131056; GFX11-NEXT: v_bfi_b32 v5, 0x7fffffff, v7, v151057; GFX11-NEXT: v_bfi_b32 v7, 0x7fffffff, v9, v171058; GFX11-NEXT: v_mov_b32_e32 v2, v41059; GFX11-NEXT: v_mov_b32_e32 v4, v61060; GFX11-NEXT: v_mov_b32_e32 v6, v81061; GFX11-NEXT: s_setpc_b64 s[30:31]1062 %result = call <4 x double> @llvm.copysign.v4f64(<4 x double> %mag, <4 x double> %sign)1063 ret <4 x double> %result1064}1065 1066attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }1067