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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,GFX678,GFX67,GFX6,GFX6-FASTFMA %s3; RUN: llc -mtriple=amdgcn -mcpu=pitcairn < %s | FileCheck -check-prefixes=GCN,GFX678,GFX67,GFX6,GFX6-SLOWFMA %s4; RUN: llc -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=GCN,GFX678,GFX67,GFX7 %s5; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=GCN,GFX678,GFX8 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GCN,GFX10 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GCN,GFX11 %s8; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s9 10; These tests check that fdiv is expanded correctly and also test that the11; scheduler is scheduling the RECIP_IEEE and MUL_IEEE instructions in separate12; instruction groups.13 14; These test check that fdiv using unsafe_fp_math, coarse fp div, and IEEE754 fp div.15 16define amdgpu_kernel void @s_fdiv_f32_ninf(ptr addrspace(1) %out, float %a, float %b) #0 {17; GFX6-FASTFMA-LABEL: s_fdiv_f32_ninf:18; GFX6-FASTFMA: ; %bb.0: ; %entry19; GFX6-FASTFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x920; GFX6-FASTFMA-NEXT: s_mov_b32 s7, 0xf00021; GFX6-FASTFMA-NEXT: s_mov_b32 s6, -122; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)23; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v1, s224; GFX6-FASTFMA-NEXT: s_mov_b32 s4, s025; GFX6-FASTFMA-NEXT: s_mov_b32 s5, s126; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[0:1], s3, s3, v127; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v228; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s329; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s2, v0, s230; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 331; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.032; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v333; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v0, v334; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v4, v035; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v3, v436; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v2, v4, v037; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 038; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v3, v439; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v0, s3, v140; GFX6-FASTFMA-NEXT: buffer_store_dword v0, off, s[4:7], 041; GFX6-FASTFMA-NEXT: s_endpgm42;43; GFX6-SLOWFMA-LABEL: s_fdiv_f32_ninf:44; GFX6-SLOWFMA: ; %bb.0: ; %entry45; GFX6-SLOWFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x946; GFX6-SLOWFMA-NEXT: s_mov_b32 s7, 0xf00047; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, -148; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)49; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v0, s250; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v051; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v2, s352; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s2, v2, s253; GFX6-SLOWFMA-NEXT: s_mov_b32 s4, s054; GFX6-SLOWFMA-NEXT: s_mov_b32 s5, s155; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v156; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 357; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.058; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v359; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v360; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v261; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v462; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v263; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 064; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v465; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, s3, v066; GFX6-SLOWFMA-NEXT: buffer_store_dword v0, off, s[4:7], 067; GFX6-SLOWFMA-NEXT: s_endpgm68;69; GFX7-LABEL: s_fdiv_f32_ninf:70; GFX7: ; %bb.0: ; %entry71; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x972; GFX7-NEXT: s_mov_b32 s7, 0xf00073; GFX7-NEXT: s_mov_b32 s6, -174; GFX7-NEXT: s_waitcnt lgkmcnt(0)75; GFX7-NEXT: v_mov_b32_e32 v1, s276; GFX7-NEXT: s_mov_b32 s4, s077; GFX7-NEXT: s_mov_b32 s5, s178; GFX7-NEXT: v_div_scale_f32 v2, s[0:1], s3, s3, v179; GFX7-NEXT: v_rcp_f32_e32 v3, v280; GFX7-NEXT: v_mov_b32_e32 v0, s381; GFX7-NEXT: v_div_scale_f32 v0, vcc, s2, v0, s282; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 383; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.084; GFX7-NEXT: v_fma_f32 v3, v4, v3, v385; GFX7-NEXT: v_mul_f32_e32 v4, v0, v386; GFX7-NEXT: v_fma_f32 v5, -v2, v4, v087; GFX7-NEXT: v_fma_f32 v4, v5, v3, v488; GFX7-NEXT: v_fma_f32 v0, -v2, v4, v089; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 090; GFX7-NEXT: v_div_fmas_f32 v0, v0, v3, v491; GFX7-NEXT: v_div_fixup_f32 v0, v0, s3, v192; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 093; GFX7-NEXT: s_endpgm94;95; GFX8-LABEL: s_fdiv_f32_ninf:96; GFX8: ; %bb.0: ; %entry97; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2498; GFX8-NEXT: s_waitcnt lgkmcnt(0)99; GFX8-NEXT: v_mov_b32_e32 v0, s2100; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0101; GFX8-NEXT: v_mov_b32_e32 v2, s3102; GFX8-NEXT: v_div_scale_f32 v2, vcc, s2, v2, s2103; GFX8-NEXT: v_rcp_f32_e32 v3, v1104; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3105; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.0106; GFX8-NEXT: v_fma_f32 v3, v4, v3, v3107; GFX8-NEXT: v_mul_f32_e32 v4, v2, v3108; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v2109; GFX8-NEXT: v_fma_f32 v4, v5, v3, v4110; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v2111; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0112; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v4113; GFX8-NEXT: v_div_fixup_f32 v2, v1, s3, v0114; GFX8-NEXT: v_mov_b32_e32 v0, s0115; GFX8-NEXT: v_mov_b32_e32 v1, s1116; GFX8-NEXT: flat_store_dword v[0:1], v2117; GFX8-NEXT: s_endpgm118;119; GFX10-LABEL: s_fdiv_f32_ninf:120; GFX10: ; %bb.0: ; %entry121; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24122; GFX10-NEXT: s_waitcnt lgkmcnt(0)123; GFX10-NEXT: v_div_scale_f32 v0, s4, s3, s3, s2124; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s2125; GFX10-NEXT: v_rcp_f32_e32 v1, v0126; GFX10-NEXT: s_denorm_mode 15127; GFX10-NEXT: v_fma_f32 v3, -v0, v1, 1.0128; GFX10-NEXT: v_fmac_f32_e32 v1, v3, v1129; GFX10-NEXT: v_mul_f32_e32 v3, v2, v1130; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v2131; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v1132; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v2133; GFX10-NEXT: s_denorm_mode 12134; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v3135; GFX10-NEXT: v_mov_b32_e32 v1, 0136; GFX10-NEXT: v_div_fixup_f32 v0, v0, s3, s2137; GFX10-NEXT: global_store_dword v1, v0, s[0:1]138; GFX10-NEXT: s_endpgm139;140; GFX11-LABEL: s_fdiv_f32_ninf:141; GFX11: ; %bb.0: ; %entry142; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24143; GFX11-NEXT: s_waitcnt lgkmcnt(0)144; GFX11-NEXT: v_div_scale_f32 v0, null, s3, s3, s2145; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s2146; GFX11-NEXT: v_rcp_f32_e32 v1, v0147; GFX11-NEXT: s_denorm_mode 15148; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)149; GFX11-NEXT: v_fma_f32 v3, -v0, v1, 1.0150; GFX11-NEXT: v_fmac_f32_e32 v1, v3, v1151; GFX11-NEXT: v_mul_f32_e32 v3, v2, v1152; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v2153; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v1154; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v2155; GFX11-NEXT: s_denorm_mode 12156; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v3157; GFX11-NEXT: v_mov_b32_e32 v1, 0158; GFX11-NEXT: v_div_fixup_f32 v0, v0, s3, s2159; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]160; GFX11-NEXT: s_endpgm161;162; EG-LABEL: s_fdiv_f32_ninf:163; EG: ; %bb.0: ; %entry164; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]165; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1166; EG-NEXT: CF_END167; EG-NEXT: PAD168; EG-NEXT: ALU clause starting at 4:169; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,170; EG-NEXT: MUL_IEEE T0.X, KC0[2].Z, PS,171; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,172; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)173entry:174 %fdiv = fdiv ninf float %a, %b175 store float %fdiv, ptr addrspace(1) %out176 ret void177}178 179define amdgpu_kernel void @s_fdiv_f32_ieee(ptr addrspace(1) %out, float %a, float %b) #1 {180; GFX6-FASTFMA-LABEL: s_fdiv_f32_ieee:181; GFX6-FASTFMA: ; %bb.0: ; %entry182; GFX6-FASTFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9183; GFX6-FASTFMA-NEXT: s_mov_b32 s7, 0xf000184; GFX6-FASTFMA-NEXT: s_mov_b32 s6, -1185; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)186; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s2187; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0188; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v1189; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v3, s3190; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, s2, v3, s2191; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v1, v2, 1.0192; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v4, v2, v2193; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v2194; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v3195; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v4196; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v3197; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v4198; GFX6-FASTFMA-NEXT: s_mov_b32 s4, s0199; GFX6-FASTFMA-NEXT: s_mov_b32 s5, s1200; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, s3, v0201; GFX6-FASTFMA-NEXT: buffer_store_dword v0, off, s[4:7], 0202; GFX6-FASTFMA-NEXT: s_endpgm203;204; GFX6-SLOWFMA-LABEL: s_fdiv_f32_ieee:205; GFX6-SLOWFMA: ; %bb.0: ; %entry206; GFX6-SLOWFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9207; GFX6-SLOWFMA-NEXT: s_mov_b32 s7, 0xf000208; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, -1209; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)210; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v0, s2211; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0212; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v2, s3213; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s2, v2, s2214; GFX6-SLOWFMA-NEXT: s_mov_b32 s4, s0215; GFX6-SLOWFMA-NEXT: s_mov_b32 s5, s1216; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v1217; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.0218; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v3219; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v3220; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v2221; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v4222; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v2223; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v4224; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, s3, v0225; GFX6-SLOWFMA-NEXT: buffer_store_dword v0, off, s[4:7], 0226; GFX6-SLOWFMA-NEXT: s_endpgm227;228; GFX7-LABEL: s_fdiv_f32_ieee:229; GFX7: ; %bb.0: ; %entry230; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9231; GFX7-NEXT: s_mov_b32 s7, 0xf000232; GFX7-NEXT: s_mov_b32 s6, -1233; GFX7-NEXT: s_waitcnt lgkmcnt(0)234; GFX7-NEXT: v_mov_b32_e32 v0, s2235; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0236; GFX7-NEXT: v_rcp_f32_e32 v2, v1237; GFX7-NEXT: v_mov_b32_e32 v3, s3238; GFX7-NEXT: v_div_scale_f32 v3, vcc, s2, v3, s2239; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.0240; GFX7-NEXT: v_fma_f32 v2, v4, v2, v2241; GFX7-NEXT: v_mul_f32_e32 v4, v3, v2242; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v3243; GFX7-NEXT: v_fma_f32 v4, v5, v2, v4244; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v3245; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v4246; GFX7-NEXT: s_mov_b32 s4, s0247; GFX7-NEXT: s_mov_b32 s5, s1248; GFX7-NEXT: v_div_fixup_f32 v0, v1, s3, v0249; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0250; GFX7-NEXT: s_endpgm251;252; GFX8-LABEL: s_fdiv_f32_ieee:253; GFX8: ; %bb.0: ; %entry254; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24255; GFX8-NEXT: s_waitcnt lgkmcnt(0)256; GFX8-NEXT: v_mov_b32_e32 v0, s2257; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0258; GFX8-NEXT: v_mov_b32_e32 v2, s3259; GFX8-NEXT: v_div_scale_f32 v2, vcc, s2, v2, s2260; GFX8-NEXT: v_rcp_f32_e32 v3, v1261; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.0262; GFX8-NEXT: v_fma_f32 v3, v4, v3, v3263; GFX8-NEXT: v_mul_f32_e32 v4, v2, v3264; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v2265; GFX8-NEXT: v_fma_f32 v4, v5, v3, v4266; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v2267; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v4268; GFX8-NEXT: v_div_fixup_f32 v2, v1, s3, v0269; GFX8-NEXT: v_mov_b32_e32 v0, s0270; GFX8-NEXT: v_mov_b32_e32 v1, s1271; GFX8-NEXT: flat_store_dword v[0:1], v2272; GFX8-NEXT: s_endpgm273;274; GFX10-LABEL: s_fdiv_f32_ieee:275; GFX10: ; %bb.0: ; %entry276; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24277; GFX10-NEXT: s_waitcnt lgkmcnt(0)278; GFX10-NEXT: v_div_scale_f32 v0, s4, s3, s3, s2279; GFX10-NEXT: v_rcp_f32_e32 v1, v0280; GFX10-NEXT: v_fma_f32 v2, -v0, v1, 1.0281; GFX10-NEXT: v_fmac_f32_e32 v1, v2, v1282; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s2283; GFX10-NEXT: v_mul_f32_e32 v3, v2, v1284; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v2285; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v1286; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v2287; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v3288; GFX10-NEXT: v_mov_b32_e32 v1, 0289; GFX10-NEXT: v_div_fixup_f32 v0, v0, s3, s2290; GFX10-NEXT: global_store_dword v1, v0, s[0:1]291; GFX10-NEXT: s_endpgm292;293; GFX11-LABEL: s_fdiv_f32_ieee:294; GFX11: ; %bb.0: ; %entry295; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24296; GFX11-NEXT: s_waitcnt lgkmcnt(0)297; GFX11-NEXT: v_div_scale_f32 v0, null, s3, s3, s2298; GFX11-NEXT: v_rcp_f32_e32 v1, v0299; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)300; GFX11-NEXT: v_fma_f32 v2, -v0, v1, 1.0301; GFX11-NEXT: v_fmac_f32_e32 v1, v2, v1302; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s2303; GFX11-NEXT: v_mul_f32_e32 v3, v2, v1304; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v2305; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v1306; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v2307; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v3308; GFX11-NEXT: v_mov_b32_e32 v1, 0309; GFX11-NEXT: v_div_fixup_f32 v0, v0, s3, s2310; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]311; GFX11-NEXT: s_endpgm312;313; EG-LABEL: s_fdiv_f32_ieee:314; EG: ; %bb.0: ; %entry315; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]316; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1317; EG-NEXT: CF_END318; EG-NEXT: PAD319; EG-NEXT: ALU clause starting at 4:320; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,321; EG-NEXT: MUL_IEEE T0.X, KC0[2].Z, PS,322; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,323; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)324entry:325 %fdiv = fdiv float %a, %b326 store float %fdiv, ptr addrspace(1) %out327 ret void328}329 330define amdgpu_kernel void @s_fdiv_25ulp_f32(ptr addrspace(1) %out, float %a, float %b) #0 {331; GFX67-LABEL: s_fdiv_25ulp_f32:332; GFX67: ; %bb.0: ; %entry333; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9334; GFX67-NEXT: v_mov_b32_e32 v0, 0x6f800000335; GFX67-NEXT: v_mov_b32_e32 v1, 0x2f800000336; GFX67-NEXT: s_waitcnt lgkmcnt(0)337; GFX67-NEXT: s_mov_b64 s[4:5], s[2:3]338; GFX67-NEXT: v_cmp_gt_f32_e64 vcc, |s5|, v0339; GFX67-NEXT: v_cndmask_b32_e32 v0, 1.0, v1, vcc340; GFX67-NEXT: v_mul_f32_e32 v1, s5, v0341; GFX67-NEXT: v_rcp_f32_e32 v1, v1342; GFX67-NEXT: s_mov_b32 s3, 0xf000343; GFX67-NEXT: s_mov_b32 s2, -1344; GFX67-NEXT: v_mul_f32_e32 v1, s4, v1345; GFX67-NEXT: v_mul_f32_e32 v0, v0, v1346; GFX67-NEXT: buffer_store_dword v0, off, s[0:3], 0347; GFX67-NEXT: s_endpgm348;349; GFX8-LABEL: s_fdiv_25ulp_f32:350; GFX8: ; %bb.0: ; %entry351; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24352; GFX8-NEXT: v_mov_b32_e32 v0, 0x6f800000353; GFX8-NEXT: v_mov_b32_e32 v1, 0x2f800000354; GFX8-NEXT: s_waitcnt lgkmcnt(0)355; GFX8-NEXT: v_cmp_gt_f32_e64 vcc, |s3|, v0356; GFX8-NEXT: v_cndmask_b32_e32 v0, 1.0, v1, vcc357; GFX8-NEXT: v_mul_f32_e32 v1, s3, v0358; GFX8-NEXT: v_rcp_f32_e32 v1, v1359; GFX8-NEXT: v_mul_f32_e32 v1, s2, v1360; GFX8-NEXT: v_mul_f32_e32 v2, v0, v1361; GFX8-NEXT: v_mov_b32_e32 v0, s0362; GFX8-NEXT: v_mov_b32_e32 v1, s1363; GFX8-NEXT: flat_store_dword v[0:1], v2364; GFX8-NEXT: s_endpgm365;366; GFX10-LABEL: s_fdiv_25ulp_f32:367; GFX10: ; %bb.0: ; %entry368; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24369; GFX10-NEXT: v_mov_b32_e32 v2, 0370; GFX10-NEXT: s_waitcnt lgkmcnt(0)371; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |s3|372; GFX10-NEXT: v_cndmask_b32_e64 v0, 1.0, 0x2f800000, s4373; GFX10-NEXT: v_mul_f32_e32 v1, s3, v0374; GFX10-NEXT: v_rcp_f32_e32 v1, v1375; GFX10-NEXT: v_mul_f32_e32 v1, s2, v1376; GFX10-NEXT: v_mul_f32_e32 v0, v0, v1377; GFX10-NEXT: global_store_dword v2, v0, s[0:1]378; GFX10-NEXT: s_endpgm379;380; GFX11-LABEL: s_fdiv_25ulp_f32:381; GFX11: ; %bb.0: ; %entry382; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24383; GFX11-NEXT: v_mov_b32_e32 v2, 0384; GFX11-NEXT: s_waitcnt lgkmcnt(0)385; GFX11-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |s3|386; GFX11-NEXT: v_cndmask_b32_e64 v0, 1.0, 0x2f800000, s4387; GFX11-NEXT: v_mul_f32_e32 v1, s3, v0388; GFX11-NEXT: v_rcp_f32_e32 v1, v1389; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)390; GFX11-NEXT: v_mul_f32_e32 v1, s2, v1391; GFX11-NEXT: v_mul_f32_e32 v0, v0, v1392; GFX11-NEXT: global_store_b32 v2, v0, s[0:1]393; GFX11-NEXT: s_endpgm394;395; EG-LABEL: s_fdiv_25ulp_f32:396; EG: ; %bb.0: ; %entry397; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]398; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1399; EG-NEXT: CF_END400; EG-NEXT: PAD401; EG-NEXT: ALU clause starting at 4:402; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,403; EG-NEXT: MUL_IEEE T0.X, KC0[2].Z, PS,404; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,405; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)406entry:407 %fdiv = fdiv float %a, %b, !fpmath !0408 store float %fdiv, ptr addrspace(1) %out409 ret void410}411 412; Use correct fdiv413define amdgpu_kernel void @s_fdiv_25ulp_ieee_f32(ptr addrspace(1) %out, float %a, float %b) #1 {414; GFX6-LABEL: s_fdiv_25ulp_ieee_f32:415; GFX6: ; %bb.0: ; %entry416; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9417; GFX6-NEXT: v_mov_b32_e32 v0, 0x7f800000418; GFX6-NEXT: s_mov_b32 s7, 0xf000419; GFX6-NEXT: s_mov_b32 s6, -1420; GFX6-NEXT: s_waitcnt lgkmcnt(0)421; GFX6-NEXT: v_frexp_mant_f32_e32 v1, s3422; GFX6-NEXT: v_mov_b32_e32 v2, s3423; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |s3|, v0424; GFX6-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc425; GFX6-NEXT: v_rcp_f32_e32 v1, v1426; GFX6-NEXT: v_frexp_mant_f32_e32 v3, s2427; GFX6-NEXT: v_mov_b32_e32 v4, s2428; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |s2|, v0429; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v2, s3430; GFX6-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc431; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v3, s2432; GFX6-NEXT: v_mul_f32_e32 v0, v0, v1433; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v3, v2434; GFX6-NEXT: s_mov_b32 s4, s0435; GFX6-NEXT: s_mov_b32 s5, s1436; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v1437; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0438; GFX6-NEXT: s_endpgm439;440; GFX7-LABEL: s_fdiv_25ulp_ieee_f32:441; GFX7: ; %bb.0: ; %entry442; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9443; GFX7-NEXT: s_waitcnt lgkmcnt(0)444; GFX7-NEXT: s_mov_b64 s[4:5], s[2:3]445; GFX7-NEXT: v_frexp_mant_f32_e32 v0, s5446; GFX7-NEXT: v_rcp_f32_e32 v0, v0447; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, s5448; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v2, s4449; GFX7-NEXT: v_frexp_mant_f32_e32 v3, s4450; GFX7-NEXT: v_mul_f32_e32 v0, v3, v0451; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v2, v1452; GFX7-NEXT: s_mov_b32 s3, 0xf000453; GFX7-NEXT: s_mov_b32 s2, -1454; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v1455; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0456; GFX7-NEXT: s_endpgm457;458; GFX8-LABEL: s_fdiv_25ulp_ieee_f32:459; GFX8: ; %bb.0: ; %entry460; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24461; GFX8-NEXT: s_waitcnt lgkmcnt(0)462; GFX8-NEXT: v_frexp_mant_f32_e32 v1, s3463; GFX8-NEXT: v_rcp_f32_e32 v1, v1464; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v0, s3465; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v2, s2466; GFX8-NEXT: v_frexp_mant_f32_e32 v3, s2467; GFX8-NEXT: v_sub_u32_e32 v0, vcc, v2, v0468; GFX8-NEXT: v_mul_f32_e32 v1, v3, v1469; GFX8-NEXT: v_ldexp_f32 v2, v1, v0470; GFX8-NEXT: v_mov_b32_e32 v0, s0471; GFX8-NEXT: v_mov_b32_e32 v1, s1472; GFX8-NEXT: flat_store_dword v[0:1], v2473; GFX8-NEXT: s_endpgm474;475; GFX10-LABEL: s_fdiv_25ulp_ieee_f32:476; GFX10: ; %bb.0: ; %entry477; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24478; GFX10-NEXT: s_waitcnt lgkmcnt(0)479; GFX10-NEXT: v_frexp_mant_f32_e32 v0, s3480; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, s3481; GFX10-NEXT: v_frexp_mant_f32_e32 v2, s2482; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v3, s2483; GFX10-NEXT: v_rcp_f32_e32 v0, v0484; GFX10-NEXT: v_sub_nc_u32_e32 v1, v3, v1485; GFX10-NEXT: v_mul_f32_e32 v0, v2, v0486; GFX10-NEXT: v_mov_b32_e32 v2, 0487; GFX10-NEXT: v_ldexp_f32 v0, v0, v1488; GFX10-NEXT: global_store_dword v2, v0, s[0:1]489; GFX10-NEXT: s_endpgm490;491; GFX11-LABEL: s_fdiv_25ulp_ieee_f32:492; GFX11: ; %bb.0: ; %entry493; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24494; GFX11-NEXT: s_waitcnt lgkmcnt(0)495; GFX11-NEXT: v_frexp_mant_f32_e32 v0, s3496; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, s3497; GFX11-NEXT: v_frexp_mant_f32_e32 v2, s2498; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v3, s2499; GFX11-NEXT: v_rcp_f32_e32 v0, v0500; GFX11-NEXT: v_sub_nc_u32_e32 v1, v3, v1501; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)502; GFX11-NEXT: v_mul_f32_e32 v0, v2, v0503; GFX11-NEXT: v_mov_b32_e32 v2, 0504; GFX11-NEXT: v_ldexp_f32 v0, v0, v1505; GFX11-NEXT: global_store_b32 v2, v0, s[0:1]506; GFX11-NEXT: s_endpgm507;508; EG-LABEL: s_fdiv_25ulp_ieee_f32:509; EG: ; %bb.0: ; %entry510; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]511; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1512; EG-NEXT: CF_END513; EG-NEXT: PAD514; EG-NEXT: ALU clause starting at 4:515; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,516; EG-NEXT: MUL_IEEE T0.X, KC0[2].Z, PS,517; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,518; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)519entry:520 %fdiv = fdiv float %a, %b, !fpmath !0521 store float %fdiv, ptr addrspace(1) %out522 ret void523}524 525define amdgpu_kernel void @s_fdiv_fast_ieee_f32(ptr addrspace(1) %out, float %a, float %b) #1 {526; GFX67-LABEL: s_fdiv_fast_ieee_f32:527; GFX67: ; %bb.0: ; %entry528; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9529; GFX67-NEXT: s_waitcnt lgkmcnt(0)530; GFX67-NEXT: s_mov_b64 s[4:5], s[2:3]531; GFX67-NEXT: v_rcp_f32_e32 v0, s5532; GFX67-NEXT: s_mov_b32 s3, 0xf000533; GFX67-NEXT: s_mov_b32 s2, -1534; GFX67-NEXT: v_mul_f32_e32 v0, s4, v0535; GFX67-NEXT: buffer_store_dword v0, off, s[0:3], 0536; GFX67-NEXT: s_endpgm537;538; GFX8-LABEL: s_fdiv_fast_ieee_f32:539; GFX8: ; %bb.0: ; %entry540; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24541; GFX8-NEXT: s_waitcnt lgkmcnt(0)542; GFX8-NEXT: v_rcp_f32_e32 v0, s3543; GFX8-NEXT: v_mul_f32_e32 v2, s2, v0544; GFX8-NEXT: v_mov_b32_e32 v0, s0545; GFX8-NEXT: v_mov_b32_e32 v1, s1546; GFX8-NEXT: flat_store_dword v[0:1], v2547; GFX8-NEXT: s_endpgm548;549; GFX10-LABEL: s_fdiv_fast_ieee_f32:550; GFX10: ; %bb.0: ; %entry551; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24552; GFX10-NEXT: v_mov_b32_e32 v1, 0553; GFX10-NEXT: s_waitcnt lgkmcnt(0)554; GFX10-NEXT: v_rcp_f32_e32 v0, s3555; GFX10-NEXT: v_mul_f32_e32 v0, s2, v0556; GFX10-NEXT: global_store_dword v1, v0, s[0:1]557; GFX10-NEXT: s_endpgm558;559; GFX11-LABEL: s_fdiv_fast_ieee_f32:560; GFX11: ; %bb.0: ; %entry561; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24562; GFX11-NEXT: s_waitcnt lgkmcnt(0)563; GFX11-NEXT: v_rcp_f32_e32 v0, s3564; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)565; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mul_f32 v0, s2, v0566; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]567; GFX11-NEXT: s_endpgm568;569; EG-LABEL: s_fdiv_fast_ieee_f32:570; EG: ; %bb.0: ; %entry571; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]572; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1573; EG-NEXT: CF_END574; EG-NEXT: PAD575; EG-NEXT: ALU clause starting at 4:576; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,577; EG-NEXT: MUL_IEEE T0.X, PS, KC0[2].Z,578; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,579; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)580entry:581 %fdiv = fdiv fast float %a, %b582 store float %fdiv, ptr addrspace(1) %out583 ret void584}585 586define amdgpu_kernel void @s_fdiv_f32_fast_math(ptr addrspace(1) %out, float %a, float %b) #0 {587; GFX67-LABEL: s_fdiv_f32_fast_math:588; GFX67: ; %bb.0: ; %entry589; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9590; GFX67-NEXT: s_waitcnt lgkmcnt(0)591; GFX67-NEXT: s_mov_b64 s[4:5], s[2:3]592; GFX67-NEXT: v_rcp_f32_e32 v0, s5593; GFX67-NEXT: s_mov_b32 s3, 0xf000594; GFX67-NEXT: s_mov_b32 s2, -1595; GFX67-NEXT: v_mul_f32_e32 v0, s4, v0596; GFX67-NEXT: buffer_store_dword v0, off, s[0:3], 0597; GFX67-NEXT: s_endpgm598;599; GFX8-LABEL: s_fdiv_f32_fast_math:600; GFX8: ; %bb.0: ; %entry601; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24602; GFX8-NEXT: s_waitcnt lgkmcnt(0)603; GFX8-NEXT: v_rcp_f32_e32 v0, s3604; GFX8-NEXT: v_mul_f32_e32 v2, s2, v0605; GFX8-NEXT: v_mov_b32_e32 v0, s0606; GFX8-NEXT: v_mov_b32_e32 v1, s1607; GFX8-NEXT: flat_store_dword v[0:1], v2608; GFX8-NEXT: s_endpgm609;610; GFX10-LABEL: s_fdiv_f32_fast_math:611; GFX10: ; %bb.0: ; %entry612; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24613; GFX10-NEXT: v_mov_b32_e32 v1, 0614; GFX10-NEXT: s_waitcnt lgkmcnt(0)615; GFX10-NEXT: v_rcp_f32_e32 v0, s3616; GFX10-NEXT: v_mul_f32_e32 v0, s2, v0617; GFX10-NEXT: global_store_dword v1, v0, s[0:1]618; GFX10-NEXT: s_endpgm619;620; GFX11-LABEL: s_fdiv_f32_fast_math:621; GFX11: ; %bb.0: ; %entry622; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24623; GFX11-NEXT: s_waitcnt lgkmcnt(0)624; GFX11-NEXT: v_rcp_f32_e32 v0, s3625; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)626; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mul_f32 v0, s2, v0627; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]628; GFX11-NEXT: s_endpgm629;630; EG-LABEL: s_fdiv_f32_fast_math:631; EG: ; %bb.0: ; %entry632; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]633; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1634; EG-NEXT: CF_END635; EG-NEXT: PAD636; EG-NEXT: ALU clause starting at 4:637; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,638; EG-NEXT: MUL_IEEE T0.X, PS, KC0[2].Z,639; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,640; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)641entry:642 %fdiv = fdiv fast float %a, %b643 store float %fdiv, ptr addrspace(1) %out644 ret void645}646 647define amdgpu_kernel void @s_fdiv_ulp25_f32_fast_math(ptr addrspace(1) %out, float %a, float %b) #0 {648; GFX67-LABEL: s_fdiv_ulp25_f32_fast_math:649; GFX67: ; %bb.0: ; %entry650; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9651; GFX67-NEXT: s_waitcnt lgkmcnt(0)652; GFX67-NEXT: s_mov_b64 s[4:5], s[2:3]653; GFX67-NEXT: v_rcp_f32_e32 v0, s5654; GFX67-NEXT: s_mov_b32 s3, 0xf000655; GFX67-NEXT: s_mov_b32 s2, -1656; GFX67-NEXT: v_mul_f32_e32 v0, s4, v0657; GFX67-NEXT: buffer_store_dword v0, off, s[0:3], 0658; GFX67-NEXT: s_endpgm659;660; GFX8-LABEL: s_fdiv_ulp25_f32_fast_math:661; GFX8: ; %bb.0: ; %entry662; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24663; GFX8-NEXT: s_waitcnt lgkmcnt(0)664; GFX8-NEXT: v_rcp_f32_e32 v0, s3665; GFX8-NEXT: v_mul_f32_e32 v2, s2, v0666; GFX8-NEXT: v_mov_b32_e32 v0, s0667; GFX8-NEXT: v_mov_b32_e32 v1, s1668; GFX8-NEXT: flat_store_dword v[0:1], v2669; GFX8-NEXT: s_endpgm670;671; GFX10-LABEL: s_fdiv_ulp25_f32_fast_math:672; GFX10: ; %bb.0: ; %entry673; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24674; GFX10-NEXT: v_mov_b32_e32 v1, 0675; GFX10-NEXT: s_waitcnt lgkmcnt(0)676; GFX10-NEXT: v_rcp_f32_e32 v0, s3677; GFX10-NEXT: v_mul_f32_e32 v0, s2, v0678; GFX10-NEXT: global_store_dword v1, v0, s[0:1]679; GFX10-NEXT: s_endpgm680;681; GFX11-LABEL: s_fdiv_ulp25_f32_fast_math:682; GFX11: ; %bb.0: ; %entry683; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24684; GFX11-NEXT: s_waitcnt lgkmcnt(0)685; GFX11-NEXT: v_rcp_f32_e32 v0, s3686; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)687; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mul_f32 v0, s2, v0688; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]689; GFX11-NEXT: s_endpgm690;691; EG-LABEL: s_fdiv_ulp25_f32_fast_math:692; EG: ; %bb.0: ; %entry693; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]694; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1695; EG-NEXT: CF_END696; EG-NEXT: PAD697; EG-NEXT: ALU clause starting at 4:698; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,699; EG-NEXT: MUL_IEEE T0.X, PS, KC0[2].Z,700; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,701; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)702entry:703 %fdiv = fdiv fast float %a, %b, !fpmath !0704 store float %fdiv, ptr addrspace(1) %out705 ret void706}707 708define amdgpu_kernel void @s_fdiv_f32_arcp_daz(ptr addrspace(1) %out, float %a, float %b) #0 {709; GFX6-FASTFMA-LABEL: s_fdiv_f32_arcp_daz:710; GFX6-FASTFMA: ; %bb.0: ; %entry711; GFX6-FASTFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9712; GFX6-FASTFMA-NEXT: s_mov_b32 s7, 0xf000713; GFX6-FASTFMA-NEXT: s_mov_b32 s6, -1714; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)715; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v1, s2716; GFX6-FASTFMA-NEXT: s_mov_b32 s4, s0717; GFX6-FASTFMA-NEXT: s_mov_b32 s5, s1718; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[0:1], s3, s3, v1719; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v2720; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s3721; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s2, v0, s2722; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3723; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.0724; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v3725; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v0, v3726; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v4, v0727; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v3, v4728; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v2, v4, v0729; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0730; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v3, v4731; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v0, s3, v1732; GFX6-FASTFMA-NEXT: buffer_store_dword v0, off, s[4:7], 0733; GFX6-FASTFMA-NEXT: s_endpgm734;735; GFX6-SLOWFMA-LABEL: s_fdiv_f32_arcp_daz:736; GFX6-SLOWFMA: ; %bb.0: ; %entry737; GFX6-SLOWFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9738; GFX6-SLOWFMA-NEXT: s_mov_b32 s7, 0xf000739; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, -1740; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)741; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v0, s2742; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0743; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v2, s3744; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s2, v2, s2745; GFX6-SLOWFMA-NEXT: s_mov_b32 s4, s0746; GFX6-SLOWFMA-NEXT: s_mov_b32 s5, s1747; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v1748; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3749; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.0750; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v3751; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v3752; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v2753; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v4754; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v2755; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0756; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v4757; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, s3, v0758; GFX6-SLOWFMA-NEXT: buffer_store_dword v0, off, s[4:7], 0759; GFX6-SLOWFMA-NEXT: s_endpgm760;761; GFX7-LABEL: s_fdiv_f32_arcp_daz:762; GFX7: ; %bb.0: ; %entry763; GFX7-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9764; GFX7-NEXT: s_mov_b32 s7, 0xf000765; GFX7-NEXT: s_mov_b32 s6, -1766; GFX7-NEXT: s_waitcnt lgkmcnt(0)767; GFX7-NEXT: v_mov_b32_e32 v1, s2768; GFX7-NEXT: s_mov_b32 s4, s0769; GFX7-NEXT: s_mov_b32 s5, s1770; GFX7-NEXT: v_div_scale_f32 v2, s[0:1], s3, s3, v1771; GFX7-NEXT: v_rcp_f32_e32 v3, v2772; GFX7-NEXT: v_mov_b32_e32 v0, s3773; GFX7-NEXT: v_div_scale_f32 v0, vcc, s2, v0, s2774; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3775; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.0776; GFX7-NEXT: v_fma_f32 v3, v4, v3, v3777; GFX7-NEXT: v_mul_f32_e32 v4, v0, v3778; GFX7-NEXT: v_fma_f32 v5, -v2, v4, v0779; GFX7-NEXT: v_fma_f32 v4, v5, v3, v4780; GFX7-NEXT: v_fma_f32 v0, -v2, v4, v0781; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0782; GFX7-NEXT: v_div_fmas_f32 v0, v0, v3, v4783; GFX7-NEXT: v_div_fixup_f32 v0, v0, s3, v1784; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0785; GFX7-NEXT: s_endpgm786;787; GFX8-LABEL: s_fdiv_f32_arcp_daz:788; GFX8: ; %bb.0: ; %entry789; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24790; GFX8-NEXT: s_waitcnt lgkmcnt(0)791; GFX8-NEXT: v_mov_b32_e32 v0, s2792; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], s3, s3, v0793; GFX8-NEXT: v_mov_b32_e32 v2, s3794; GFX8-NEXT: v_div_scale_f32 v2, vcc, s2, v2, s2795; GFX8-NEXT: v_rcp_f32_e32 v3, v1796; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3797; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.0798; GFX8-NEXT: v_fma_f32 v3, v4, v3, v3799; GFX8-NEXT: v_mul_f32_e32 v4, v2, v3800; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v2801; GFX8-NEXT: v_fma_f32 v4, v5, v3, v4802; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v2803; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0804; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v4805; GFX8-NEXT: v_div_fixup_f32 v2, v1, s3, v0806; GFX8-NEXT: v_mov_b32_e32 v0, s0807; GFX8-NEXT: v_mov_b32_e32 v1, s1808; GFX8-NEXT: flat_store_dword v[0:1], v2809; GFX8-NEXT: s_endpgm810;811; GFX10-LABEL: s_fdiv_f32_arcp_daz:812; GFX10: ; %bb.0: ; %entry813; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24814; GFX10-NEXT: s_waitcnt lgkmcnt(0)815; GFX10-NEXT: v_div_scale_f32 v0, s4, s3, s3, s2816; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s2817; GFX10-NEXT: v_rcp_f32_e32 v1, v0818; GFX10-NEXT: s_denorm_mode 15819; GFX10-NEXT: v_fma_f32 v3, -v0, v1, 1.0820; GFX10-NEXT: v_fmac_f32_e32 v1, v3, v1821; GFX10-NEXT: v_mul_f32_e32 v3, v2, v1822; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v2823; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v1824; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v2825; GFX10-NEXT: s_denorm_mode 12826; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v3827; GFX10-NEXT: v_mov_b32_e32 v1, 0828; GFX10-NEXT: v_div_fixup_f32 v0, v0, s3, s2829; GFX10-NEXT: global_store_dword v1, v0, s[0:1]830; GFX10-NEXT: s_endpgm831;832; GFX11-LABEL: s_fdiv_f32_arcp_daz:833; GFX11: ; %bb.0: ; %entry834; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24835; GFX11-NEXT: s_waitcnt lgkmcnt(0)836; GFX11-NEXT: v_div_scale_f32 v0, null, s3, s3, s2837; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, s2, s3, s2838; GFX11-NEXT: v_rcp_f32_e32 v1, v0839; GFX11-NEXT: s_denorm_mode 15840; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)841; GFX11-NEXT: v_fma_f32 v3, -v0, v1, 1.0842; GFX11-NEXT: v_fmac_f32_e32 v1, v3, v1843; GFX11-NEXT: v_mul_f32_e32 v3, v2, v1844; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v2845; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v1846; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v2847; GFX11-NEXT: s_denorm_mode 12848; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v3849; GFX11-NEXT: v_mov_b32_e32 v1, 0850; GFX11-NEXT: v_div_fixup_f32 v0, v0, s3, s2851; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]852; GFX11-NEXT: s_endpgm853;854; EG-LABEL: s_fdiv_f32_arcp_daz:855; EG: ; %bb.0: ; %entry856; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]857; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1858; EG-NEXT: CF_END859; EG-NEXT: PAD860; EG-NEXT: ALU clause starting at 4:861; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,862; EG-NEXT: MUL_IEEE T0.X, KC0[2].Z, PS,863; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,864; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)865entry:866 %fdiv = fdiv arcp float %a, %b867 store float %fdiv, ptr addrspace(1) %out868 ret void869}870 871define amdgpu_kernel void @s_fdiv_f32_arcp_ninf(ptr addrspace(1) %out, float %a, float %b) #0 {872; GFX67-LABEL: s_fdiv_f32_arcp_ninf:873; GFX67: ; %bb.0: ; %entry874; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9875; GFX67-NEXT: s_waitcnt lgkmcnt(0)876; GFX67-NEXT: s_mov_b64 s[4:5], s[2:3]877; GFX67-NEXT: v_rcp_f32_e32 v0, s5878; GFX67-NEXT: s_mov_b32 s3, 0xf000879; GFX67-NEXT: s_mov_b32 s2, -1880; GFX67-NEXT: v_mul_f32_e32 v0, s4, v0881; GFX67-NEXT: buffer_store_dword v0, off, s[0:3], 0882; GFX67-NEXT: s_endpgm883;884; GFX8-LABEL: s_fdiv_f32_arcp_ninf:885; GFX8: ; %bb.0: ; %entry886; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24887; GFX8-NEXT: s_waitcnt lgkmcnt(0)888; GFX8-NEXT: v_rcp_f32_e32 v0, s3889; GFX8-NEXT: v_mul_f32_e32 v2, s2, v0890; GFX8-NEXT: v_mov_b32_e32 v0, s0891; GFX8-NEXT: v_mov_b32_e32 v1, s1892; GFX8-NEXT: flat_store_dword v[0:1], v2893; GFX8-NEXT: s_endpgm894;895; GFX10-LABEL: s_fdiv_f32_arcp_ninf:896; GFX10: ; %bb.0: ; %entry897; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24898; GFX10-NEXT: v_mov_b32_e32 v1, 0899; GFX10-NEXT: s_waitcnt lgkmcnt(0)900; GFX10-NEXT: v_rcp_f32_e32 v0, s3901; GFX10-NEXT: v_mul_f32_e32 v0, s2, v0902; GFX10-NEXT: global_store_dword v1, v0, s[0:1]903; GFX10-NEXT: s_endpgm904;905; GFX11-LABEL: s_fdiv_f32_arcp_ninf:906; GFX11: ; %bb.0: ; %entry907; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24908; GFX11-NEXT: s_waitcnt lgkmcnt(0)909; GFX11-NEXT: v_rcp_f32_e32 v0, s3910; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)911; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mul_f32 v0, s2, v0912; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]913; GFX11-NEXT: s_endpgm914;915; EG-LABEL: s_fdiv_f32_arcp_ninf:916; EG: ; %bb.0: ; %entry917; EG-NEXT: ALU 3, @4, KC0[CB0:0-32], KC1[]918; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1919; EG-NEXT: CF_END920; EG-NEXT: PAD921; EG-NEXT: ALU clause starting at 4:922; EG-NEXT: RECIP_IEEE * T0.X, KC0[2].W,923; EG-NEXT: MUL_IEEE T0.X, PS, KC0[2].Z,924; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,925; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)926entry:927 %fdiv = fdiv arcp ninf float %a, %b928 store float %fdiv, ptr addrspace(1) %out929 ret void930}931 932define amdgpu_kernel void @s_fdiv_v2f32(ptr addrspace(1) %out, <2 x float> %a, <2 x float> %b) #0 {933; GFX6-FASTFMA-LABEL: s_fdiv_v2f32:934; GFX6-FASTFMA: ; %bb.0: ; %entry935; GFX6-FASTFMA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xb936; GFX6-FASTFMA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9937; GFX6-FASTFMA-NEXT: s_mov_b32 s3, 0xf000938; GFX6-FASTFMA-NEXT: s_mov_b32 s2, -1939; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)940; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v1, s9941; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], s11, s11, v1942; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v2943; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s11944; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s9, v0, s9945; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3946; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.0947; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v3948; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v0, v3949; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v4, v0950; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v3, v4951; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v2, v4, v0952; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0953; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v2, s8954; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v3, v4955; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], s10, s10, v2956; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v3957; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v1, v0, s11, v1958; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s10959; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s8, v0, s8960; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3961; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v3, v4, 1.0962; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v4, v4963; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v0, v4964; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v3, v5, v0965; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v4, v5966; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v3, v5, v0967; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0968; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v4, v5969; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v0, s10, v2970; GFX6-FASTFMA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0971; GFX6-FASTFMA-NEXT: s_endpgm972;973; GFX6-SLOWFMA-LABEL: s_fdiv_v2f32:974; GFX6-SLOWFMA: ; %bb.0: ; %entry975; GFX6-SLOWFMA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xb976; GFX6-SLOWFMA-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9977; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)978; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v0, s1979; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[6:7], s3, s3, v0980; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v2, s3981; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s1, v2, s1982; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v4, s0983; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v1984; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 3985; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v3, 1.0986; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v5, v3, v3987; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v2, v3988; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v1, v5, v2989; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v3, v5990; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v5, v2991; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0992; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[6:7], s2, s2, v4993; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v5994; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v3, s2995; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, s0, v3, s0996; GFX6-SLOWFMA-NEXT: s_mov_b32 s7, 0xf000997; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, -1998; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v2999; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v1, v1, s3, v01000; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31001; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, -v2, v5, 1.01002; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, v0, v5, v51003; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v01004; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v31005; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v0, v51006; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v31007; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01008; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v0, v2, v0, v51009; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v0, s2, v41010; GFX6-SLOWFMA-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01011; GFX6-SLOWFMA-NEXT: s_endpgm1012;1013; GFX7-LABEL: s_fdiv_v2f32:1014; GFX7: ; %bb.0: ; %entry1015; GFX7-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xb1016; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x91017; GFX7-NEXT: s_mov_b32 s3, 0xf0001018; GFX7-NEXT: s_mov_b32 s2, -11019; GFX7-NEXT: s_waitcnt lgkmcnt(0)1020; GFX7-NEXT: v_mov_b32_e32 v1, s91021; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], s11, s11, v11022; GFX7-NEXT: v_rcp_f32_e32 v3, v21023; GFX7-NEXT: v_mov_b32_e32 v0, s111024; GFX7-NEXT: v_div_scale_f32 v0, vcc, s9, v0, s91025; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31026; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.01027; GFX7-NEXT: v_fma_f32 v3, v4, v3, v31028; GFX7-NEXT: v_mul_f32_e32 v4, v0, v31029; GFX7-NEXT: v_fma_f32 v5, -v2, v4, v01030; GFX7-NEXT: v_fma_f32 v4, v5, v3, v41031; GFX7-NEXT: v_fma_f32 v0, -v2, v4, v01032; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01033; GFX7-NEXT: v_mov_b32_e32 v2, s81034; GFX7-NEXT: v_div_fmas_f32 v0, v0, v3, v41035; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], s10, s10, v21036; GFX7-NEXT: v_rcp_f32_e32 v4, v31037; GFX7-NEXT: v_div_fixup_f32 v1, v0, s11, v11038; GFX7-NEXT: v_mov_b32_e32 v0, s101039; GFX7-NEXT: v_div_scale_f32 v0, vcc, s8, v0, s81040; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31041; GFX7-NEXT: v_fma_f32 v5, -v3, v4, 1.01042; GFX7-NEXT: v_fma_f32 v4, v5, v4, v41043; GFX7-NEXT: v_mul_f32_e32 v5, v0, v41044; GFX7-NEXT: v_fma_f32 v6, -v3, v5, v01045; GFX7-NEXT: v_fma_f32 v5, v6, v4, v51046; GFX7-NEXT: v_fma_f32 v0, -v3, v5, v01047; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01048; GFX7-NEXT: v_div_fmas_f32 v0, v0, v4, v51049; GFX7-NEXT: v_div_fixup_f32 v0, v0, s10, v21050; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 01051; GFX7-NEXT: s_endpgm1052;1053; GFX8-LABEL: s_fdiv_v2f32:1054; GFX8: ; %bb.0: ; %entry1055; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1056; GFX8-NEXT: s_waitcnt lgkmcnt(0)1057; GFX8-NEXT: v_mov_b32_e32 v0, s11058; GFX8-NEXT: v_div_scale_f32 v1, s[6:7], s3, s3, v01059; GFX8-NEXT: v_mov_b32_e32 v2, s31060; GFX8-NEXT: v_div_scale_f32 v2, vcc, s1, v2, s11061; GFX8-NEXT: v_mov_b32_e32 v4, s01062; GFX8-NEXT: v_rcp_f32_e32 v3, v11063; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31064; GFX8-NEXT: v_fma_f32 v5, -v1, v3, 1.01065; GFX8-NEXT: v_fma_f32 v3, v5, v3, v31066; GFX8-NEXT: v_mul_f32_e32 v5, v2, v31067; GFX8-NEXT: v_fma_f32 v6, -v1, v5, v21068; GFX8-NEXT: v_fma_f32 v5, v6, v3, v51069; GFX8-NEXT: v_fma_f32 v1, -v1, v5, v21070; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01071; GFX8-NEXT: v_div_scale_f32 v2, s[6:7], s2, s2, v41072; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v51073; GFX8-NEXT: v_mov_b32_e32 v3, s21074; GFX8-NEXT: v_div_scale_f32 v3, vcc, s0, v3, s01075; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x241076; GFX8-NEXT: v_rcp_f32_e32 v5, v21077; GFX8-NEXT: v_div_fixup_f32 v1, v1, s3, v01078; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31079; GFX8-NEXT: v_fma_f32 v0, -v2, v5, 1.01080; GFX8-NEXT: v_fma_f32 v0, v0, v5, v51081; GFX8-NEXT: v_mul_f32_e32 v5, v3, v01082; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v31083; GFX8-NEXT: v_fma_f32 v5, v6, v0, v51084; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v31085; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01086; GFX8-NEXT: v_div_fmas_f32 v0, v2, v0, v51087; GFX8-NEXT: s_waitcnt lgkmcnt(0)1088; GFX8-NEXT: v_mov_b32_e32 v3, s11089; GFX8-NEXT: v_mov_b32_e32 v2, s01090; GFX8-NEXT: v_div_fixup_f32 v0, v0, s2, v41091; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]1092; GFX8-NEXT: s_endpgm1093;1094; GFX10-LABEL: s_fdiv_v2f32:1095; GFX10: ; %bb.0: ; %entry1096; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1097; GFX10-NEXT: s_waitcnt lgkmcnt(0)1098; GFX10-NEXT: v_div_scale_f32 v0, s6, s3, s3, s11099; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, s1, s3, s11100; GFX10-NEXT: v_rcp_f32_e32 v1, v01101; GFX10-NEXT: s_denorm_mode 151102; GFX10-NEXT: v_fma_f32 v3, -v0, v1, 1.01103; GFX10-NEXT: v_fmac_f32_e32 v1, v3, v11104; GFX10-NEXT: v_mul_f32_e32 v3, v2, v11105; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v21106; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v11107; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v21108; GFX10-NEXT: s_denorm_mode 121109; GFX10-NEXT: v_div_scale_f32 v2, s6, s2, s2, s01110; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v31111; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241112; GFX10-NEXT: v_rcp_f32_e32 v3, v21113; GFX10-NEXT: v_div_fixup_f32 v1, v0, s3, s11114; GFX10-NEXT: v_div_scale_f32 v0, vcc_lo, s0, s2, s01115; GFX10-NEXT: s_denorm_mode 151116; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.01117; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v31118; GFX10-NEXT: v_mul_f32_e32 v4, v0, v31119; GFX10-NEXT: v_fma_f32 v5, -v2, v4, v01120; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v31121; GFX10-NEXT: v_fma_f32 v0, -v2, v4, v01122; GFX10-NEXT: s_denorm_mode 121123; GFX10-NEXT: v_mov_b32_e32 v2, 01124; GFX10-NEXT: v_div_fmas_f32 v0, v0, v3, v41125; GFX10-NEXT: v_div_fixup_f32 v0, v0, s2, s01126; GFX10-NEXT: s_waitcnt lgkmcnt(0)1127; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7]1128; GFX10-NEXT: s_endpgm1129;1130; GFX11-LABEL: s_fdiv_v2f32:1131; GFX11: ; %bb.0: ; %entry1132; GFX11-NEXT: s_clause 0x11133; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c1134; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x241135; GFX11-NEXT: s_waitcnt lgkmcnt(0)1136; GFX11-NEXT: v_div_scale_f32 v0, null, s3, s3, s11137; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, s1, s3, s11138; GFX11-NEXT: v_rcp_f32_e32 v1, v01139; GFX11-NEXT: s_denorm_mode 151140; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1141; GFX11-NEXT: v_fma_f32 v3, -v0, v1, 1.01142; GFX11-NEXT: v_fmac_f32_e32 v1, v3, v11143; GFX11-NEXT: v_mul_f32_e32 v3, v2, v11144; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v21145; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v11146; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v21147; GFX11-NEXT: s_denorm_mode 121148; GFX11-NEXT: v_div_scale_f32 v2, null, s2, s2, s01149; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v31150; GFX11-NEXT: v_rcp_f32_e32 v3, v21151; GFX11-NEXT: v_div_fixup_f32 v1, v0, s3, s11152; GFX11-NEXT: v_div_scale_f32 v0, vcc_lo, s0, s2, s01153; GFX11-NEXT: s_denorm_mode 151154; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1155; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.01156; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v31157; GFX11-NEXT: v_mul_f32_e32 v4, v0, v31158; GFX11-NEXT: v_fma_f32 v5, -v2, v4, v01159; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v31160; GFX11-NEXT: v_fma_f32 v0, -v2, v4, v01161; GFX11-NEXT: s_denorm_mode 121162; GFX11-NEXT: v_mov_b32_e32 v2, 01163; GFX11-NEXT: v_div_fmas_f32 v0, v0, v3, v41164; GFX11-NEXT: v_div_fixup_f32 v0, v0, s2, s01165; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]1166; GFX11-NEXT: s_endpgm1167;1168; EG-LABEL: s_fdiv_v2f32:1169; EG: ; %bb.0: ; %entry1170; EG-NEXT: ALU 5, @4, KC0[CB0:0-32], KC1[]1171; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11172; EG-NEXT: CF_END1173; EG-NEXT: PAD1174; EG-NEXT: ALU clause starting at 4:1175; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Z,1176; EG-NEXT: MUL_IEEE T0.Y, KC0[3].X, PS,1177; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Y,1178; EG-NEXT: MUL_IEEE T0.X, KC0[2].W, PS,1179; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1180; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1181entry:1182 %fdiv = fdiv <2 x float> %a, %b1183 store <2 x float> %fdiv, ptr addrspace(1) %out1184 ret void1185}1186 1187define amdgpu_kernel void @s_fdiv_ulp25_v2f32(ptr addrspace(1) %out, <2 x float> %a, <2 x float> %b) #0 {1188; GFX67-LABEL: s_fdiv_ulp25_v2f32:1189; GFX67: ; %bb.0: ; %entry1190; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xb1191; GFX67-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x91192; GFX67-NEXT: s_mov_b32 s7, 0xf0001193; GFX67-NEXT: s_mov_b32 s6, -11194; GFX67-NEXT: s_waitcnt lgkmcnt(0)1195; GFX67-NEXT: v_rcp_f32_e32 v0, s21196; GFX67-NEXT: v_rcp_f32_e32 v1, s31197; GFX67-NEXT: v_mul_f32_e32 v0, s0, v01198; GFX67-NEXT: v_mul_f32_e32 v1, s1, v11199; GFX67-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01200; GFX67-NEXT: s_endpgm1201;1202; GFX8-LABEL: s_fdiv_ulp25_v2f32:1203; GFX8: ; %bb.0: ; %entry1204; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1205; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x241206; GFX8-NEXT: s_waitcnt lgkmcnt(0)1207; GFX8-NEXT: v_rcp_f32_e32 v0, s21208; GFX8-NEXT: v_rcp_f32_e32 v1, s31209; GFX8-NEXT: v_mov_b32_e32 v2, s41210; GFX8-NEXT: v_mov_b32_e32 v3, s51211; GFX8-NEXT: v_mul_f32_e32 v0, s0, v01212; GFX8-NEXT: v_mul_f32_e32 v1, s1, v11213; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]1214; GFX8-NEXT: s_endpgm1215;1216; GFX10-LABEL: s_fdiv_ulp25_v2f32:1217; GFX10: ; %bb.0: ; %entry1218; GFX10-NEXT: s_clause 0x11219; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1220; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241221; GFX10-NEXT: v_mov_b32_e32 v2, 01222; GFX10-NEXT: s_waitcnt lgkmcnt(0)1223; GFX10-NEXT: v_rcp_f32_e32 v0, s21224; GFX10-NEXT: v_rcp_f32_e32 v1, s31225; GFX10-NEXT: v_mul_f32_e32 v0, s0, v01226; GFX10-NEXT: v_mul_f32_e32 v1, s1, v11227; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[6:7]1228; GFX10-NEXT: s_endpgm1229;1230; GFX11-LABEL: s_fdiv_ulp25_v2f32:1231; GFX11: ; %bb.0: ; %entry1232; GFX11-NEXT: s_clause 0x11233; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c1234; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x241235; GFX11-NEXT: s_waitcnt lgkmcnt(0)1236; GFX11-NEXT: v_rcp_f32_e32 v0, s21237; GFX11-NEXT: v_rcp_f32_e32 v1, s31238; GFX11-NEXT: v_mov_b32_e32 v2, 01239; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1240; GFX11-NEXT: v_dual_mul_f32 v0, s0, v0 :: v_dual_mul_f32 v1, s1, v11241; GFX11-NEXT: global_store_b64 v2, v[0:1], s[4:5]1242; GFX11-NEXT: s_endpgm1243;1244; EG-LABEL: s_fdiv_ulp25_v2f32:1245; EG: ; %bb.0: ; %entry1246; EG-NEXT: ALU 5, @4, KC0[CB0:0-32], KC1[]1247; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11248; EG-NEXT: CF_END1249; EG-NEXT: PAD1250; EG-NEXT: ALU clause starting at 4:1251; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Z,1252; EG-NEXT: MUL_IEEE T0.Y, KC0[3].X, PS,1253; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Y,1254; EG-NEXT: MUL_IEEE T0.X, KC0[2].W, PS,1255; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1256; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1257entry:1258 %fdiv = fdiv arcp <2 x float> %a, %b, !fpmath !01259 store <2 x float> %fdiv, ptr addrspace(1) %out1260 ret void1261}1262 1263define amdgpu_kernel void @s_fdiv_v2f32_fast_math(ptr addrspace(1) %out, <2 x float> %a, <2 x float> %b) #0 {1264; GFX67-LABEL: s_fdiv_v2f32_fast_math:1265; GFX67: ; %bb.0: ; %entry1266; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xb1267; GFX67-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x91268; GFX67-NEXT: s_mov_b32 s7, 0xf0001269; GFX67-NEXT: s_mov_b32 s6, -11270; GFX67-NEXT: s_waitcnt lgkmcnt(0)1271; GFX67-NEXT: v_rcp_f32_e32 v0, s31272; GFX67-NEXT: v_rcp_f32_e32 v2, s21273; GFX67-NEXT: v_mul_f32_e32 v1, s1, v01274; GFX67-NEXT: v_mul_f32_e32 v0, s0, v21275; GFX67-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01276; GFX67-NEXT: s_endpgm1277;1278; GFX8-LABEL: s_fdiv_v2f32_fast_math:1279; GFX8: ; %bb.0: ; %entry1280; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1281; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x241282; GFX8-NEXT: s_waitcnt lgkmcnt(0)1283; GFX8-NEXT: v_rcp_f32_e32 v0, s31284; GFX8-NEXT: v_rcp_f32_e32 v2, s21285; GFX8-NEXT: v_mul_f32_e32 v1, s1, v01286; GFX8-NEXT: v_mul_f32_e32 v0, s0, v21287; GFX8-NEXT: v_mov_b32_e32 v2, s41288; GFX8-NEXT: v_mov_b32_e32 v3, s51289; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]1290; GFX8-NEXT: s_endpgm1291;1292; GFX10-LABEL: s_fdiv_v2f32_fast_math:1293; GFX10: ; %bb.0: ; %entry1294; GFX10-NEXT: s_clause 0x11295; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1296; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241297; GFX10-NEXT: v_mov_b32_e32 v3, 01298; GFX10-NEXT: s_waitcnt lgkmcnt(0)1299; GFX10-NEXT: v_rcp_f32_e32 v0, s31300; GFX10-NEXT: v_rcp_f32_e32 v2, s21301; GFX10-NEXT: v_mul_f32_e32 v1, s1, v01302; GFX10-NEXT: v_mul_f32_e32 v0, s0, v21303; GFX10-NEXT: global_store_dwordx2 v3, v[0:1], s[6:7]1304; GFX10-NEXT: s_endpgm1305;1306; GFX11-LABEL: s_fdiv_v2f32_fast_math:1307; GFX11: ; %bb.0: ; %entry1308; GFX11-NEXT: s_clause 0x11309; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c1310; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x241311; GFX11-NEXT: s_waitcnt lgkmcnt(0)1312; GFX11-NEXT: v_rcp_f32_e32 v0, s31313; GFX11-NEXT: v_rcp_f32_e32 v2, s21314; GFX11-NEXT: v_mov_b32_e32 v3, 01315; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1316; GFX11-NEXT: v_dual_mul_f32 v1, s1, v0 :: v_dual_mul_f32 v0, s0, v21317; GFX11-NEXT: global_store_b64 v3, v[0:1], s[4:5]1318; GFX11-NEXT: s_endpgm1319;1320; EG-LABEL: s_fdiv_v2f32_fast_math:1321; EG: ; %bb.0: ; %entry1322; EG-NEXT: ALU 5, @4, KC0[CB0:0-32], KC1[]1323; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11324; EG-NEXT: CF_END1325; EG-NEXT: PAD1326; EG-NEXT: ALU clause starting at 4:1327; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Z,1328; EG-NEXT: MUL_IEEE T0.Y, PS, KC0[3].X,1329; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Y,1330; EG-NEXT: MUL_IEEE T0.X, PS, KC0[2].W,1331; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1332; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1333entry:1334 %fdiv = fdiv fast <2 x float> %a, %b1335 store <2 x float> %fdiv, ptr addrspace(1) %out1336 ret void1337}1338 1339define amdgpu_kernel void @s_fdiv_v2f32_arcp_math(ptr addrspace(1) %out, <2 x float> %a, <2 x float> %b) #0 {1340; GFX67-LABEL: s_fdiv_v2f32_arcp_math:1341; GFX67: ; %bb.0: ; %entry1342; GFX67-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xb1343; GFX67-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x91344; GFX67-NEXT: s_mov_b32 s7, 0xf0001345; GFX67-NEXT: s_mov_b32 s6, -11346; GFX67-NEXT: s_waitcnt lgkmcnt(0)1347; GFX67-NEXT: v_rcp_f32_e32 v0, s31348; GFX67-NEXT: v_rcp_f32_e32 v2, s21349; GFX67-NEXT: v_mul_f32_e32 v1, s1, v01350; GFX67-NEXT: v_mul_f32_e32 v0, s0, v21351; GFX67-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 01352; GFX67-NEXT: s_endpgm1353;1354; GFX8-LABEL: s_fdiv_v2f32_arcp_math:1355; GFX8: ; %bb.0: ; %entry1356; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1357; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x241358; GFX8-NEXT: s_waitcnt lgkmcnt(0)1359; GFX8-NEXT: v_rcp_f32_e32 v0, s31360; GFX8-NEXT: v_rcp_f32_e32 v2, s21361; GFX8-NEXT: v_mul_f32_e32 v1, s1, v01362; GFX8-NEXT: v_mul_f32_e32 v0, s0, v21363; GFX8-NEXT: v_mov_b32_e32 v2, s41364; GFX8-NEXT: v_mov_b32_e32 v3, s51365; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]1366; GFX8-NEXT: s_endpgm1367;1368; GFX10-LABEL: s_fdiv_v2f32_arcp_math:1369; GFX10: ; %bb.0: ; %entry1370; GFX10-NEXT: s_clause 0x11371; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2c1372; GFX10-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x241373; GFX10-NEXT: v_mov_b32_e32 v3, 01374; GFX10-NEXT: s_waitcnt lgkmcnt(0)1375; GFX10-NEXT: v_rcp_f32_e32 v0, s31376; GFX10-NEXT: v_rcp_f32_e32 v2, s21377; GFX10-NEXT: v_mul_f32_e32 v1, s1, v01378; GFX10-NEXT: v_mul_f32_e32 v0, s0, v21379; GFX10-NEXT: global_store_dwordx2 v3, v[0:1], s[6:7]1380; GFX10-NEXT: s_endpgm1381;1382; GFX11-LABEL: s_fdiv_v2f32_arcp_math:1383; GFX11: ; %bb.0: ; %entry1384; GFX11-NEXT: s_clause 0x11385; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x2c1386; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x241387; GFX11-NEXT: s_waitcnt lgkmcnt(0)1388; GFX11-NEXT: v_rcp_f32_e32 v0, s31389; GFX11-NEXT: v_rcp_f32_e32 v2, s21390; GFX11-NEXT: v_mov_b32_e32 v3, 01391; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1392; GFX11-NEXT: v_dual_mul_f32 v1, s1, v0 :: v_dual_mul_f32 v0, s0, v21393; GFX11-NEXT: global_store_b64 v3, v[0:1], s[4:5]1394; GFX11-NEXT: s_endpgm1395;1396; EG-LABEL: s_fdiv_v2f32_arcp_math:1397; EG: ; %bb.0: ; %entry1398; EG-NEXT: ALU 5, @4, KC0[CB0:0-32], KC1[]1399; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 11400; EG-NEXT: CF_END1401; EG-NEXT: PAD1402; EG-NEXT: ALU clause starting at 4:1403; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Z,1404; EG-NEXT: MUL_IEEE T0.Y, PS, KC0[3].X,1405; EG-NEXT: RECIP_IEEE * T0.X, KC0[3].Y,1406; EG-NEXT: MUL_IEEE T0.X, PS, KC0[2].W,1407; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1408; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1409entry:1410 %fdiv = fdiv arcp ninf <2 x float> %a, %b1411 store <2 x float> %fdiv, ptr addrspace(1) %out1412 ret void1413}1414 1415define amdgpu_kernel void @s_fdiv_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {1416; GFX6-FASTFMA-LABEL: s_fdiv_v4f32:1417; GFX6-FASTFMA: ; %bb.0:1418; GFX6-FASTFMA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x91419; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)1420; GFX6-FASTFMA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01421; GFX6-FASTFMA-NEXT: s_mov_b32 s11, 0xf0001422; GFX6-FASTFMA-NEXT: s_mov_b32 s10, -11423; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)1424; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v1, s31425; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[12:13], s7, s7, v11426; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v21427; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s71428; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s3, v0, s31429; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31430; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.01431; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v31432; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v0, v31433; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v4, v01434; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v3, v41435; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v2, v4, v01436; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01437; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v3, v41438; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v3, v0, s7, v11439; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v1, s21440; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[12:13], s6, s6, v11441; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v21442; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s61443; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s2, v0, s21444; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31445; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.01446; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v4, v41447; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v0, v41448; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v01449; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v4, v51450; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v2, v5, v01451; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01452; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v4, v51453; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v2, v0, s6, v11454; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v1, s11455; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, s[2:3], s5, s5, v11456; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v5, v41457; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s51458; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s1, v0, s11459; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31460; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v4, v5, 1.01461; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v5, v51462; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v0, v51463; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v4, v6, v01464; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v5, v61465; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v4, v6, v01466; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01467; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v4, s01468; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v5, v61469; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, s[2:3], s4, s4, v41470; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v6, v51471; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v1, v0, s5, v11472; GFX6-FASTFMA-NEXT: v_mov_b32_e32 v0, s41473; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, vcc, s0, v0, s01474; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31475; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v5, v6, 1.01476; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v6, v61477; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v7, v0, v61478; GFX6-FASTFMA-NEXT: v_fma_f32 v8, -v5, v7, v01479; GFX6-FASTFMA-NEXT: v_fma_f32 v7, v8, v6, v71480; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v5, v7, v01481; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01482; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v6, v71483; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v0, s4, v41484; GFX6-FASTFMA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 01485; GFX6-FASTFMA-NEXT: s_endpgm1486;1487; GFX6-SLOWFMA-LABEL: s_fdiv_v4f32:1488; GFX6-SLOWFMA: ; %bb.0:1489; GFX6-SLOWFMA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x91490; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)1491; GFX6-SLOWFMA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01492; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)1493; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v0, s31494; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[10:11], s7, s7, v01495; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v2, s71496; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s3, v2, s31497; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v4, s21498; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v7, s11499; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v8, s01500; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v11501; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31502; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v3, 1.01503; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v5, v3, v31504; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v2, v31505; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v1, v5, v21506; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v3, v51507; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v5, v21508; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01509; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[10:11], s6, s6, v41510; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v51511; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v3, s61512; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v5, vcc, s2, v3, s21513; GFX6-SLOWFMA-NEXT: s_mov_b32 s11, 0xf0001514; GFX6-SLOWFMA-NEXT: s_mov_b32 s10, -11515; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v6, v21516; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v3, v1, s7, v01517; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31518; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, -v2, v6, 1.01519; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, v0, v6, v61520; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v1, v5, v01521; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v1, v51522; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, v6, v0, v11523; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v1, v51524; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01525; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v5, s[2:3], s5, s5, v71526; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v0, v2, v0, v11527; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v1, s51528; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, vcc, s1, v1, s11529; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v6, v51530; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v2, v0, s6, v41531; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31532; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, -v5, v6, 1.01533; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, v0, v6, v61534; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v1, v01535; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v5, v4, v11536; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v6, v0, v41537; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v5, v4, v11538; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01539; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v5, s[2:3], s4, s4, v81540; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v0, v1, v0, v41541; GFX6-SLOWFMA-NEXT: v_mov_b32_e32 v1, s41542; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, s0, v1, s01543; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v6, v51544; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v1, v0, s5, v71545; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31546; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, -v5, v6, 1.01547; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, v0, v6, v61548; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v01549; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v5, v6, v41550; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v0, v61551; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v5, v6, v41552; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01553; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v0, v4, v0, v61554; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v0, s4, v81555; GFX6-SLOWFMA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 01556; GFX6-SLOWFMA-NEXT: s_endpgm1557;1558; GFX7-LABEL: s_fdiv_v4f32:1559; GFX7: ; %bb.0:1560; GFX7-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x91561; GFX7-NEXT: s_waitcnt lgkmcnt(0)1562; GFX7-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01563; GFX7-NEXT: s_mov_b32 s11, 0xf0001564; GFX7-NEXT: s_mov_b32 s10, -11565; GFX7-NEXT: s_waitcnt lgkmcnt(0)1566; GFX7-NEXT: v_mov_b32_e32 v1, s31567; GFX7-NEXT: v_div_scale_f32 v2, s[12:13], s7, s7, v11568; GFX7-NEXT: v_rcp_f32_e32 v3, v21569; GFX7-NEXT: v_mov_b32_e32 v0, s71570; GFX7-NEXT: v_div_scale_f32 v0, vcc, s3, v0, s31571; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31572; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.01573; GFX7-NEXT: v_fma_f32 v3, v4, v3, v31574; GFX7-NEXT: v_mul_f32_e32 v4, v0, v31575; GFX7-NEXT: v_fma_f32 v5, -v2, v4, v01576; GFX7-NEXT: v_fma_f32 v4, v5, v3, v41577; GFX7-NEXT: v_fma_f32 v0, -v2, v4, v01578; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01579; GFX7-NEXT: v_div_fmas_f32 v0, v0, v3, v41580; GFX7-NEXT: v_div_fixup_f32 v3, v0, s7, v11581; GFX7-NEXT: v_mov_b32_e32 v1, s21582; GFX7-NEXT: v_div_scale_f32 v2, s[12:13], s6, s6, v11583; GFX7-NEXT: v_rcp_f32_e32 v4, v21584; GFX7-NEXT: v_mov_b32_e32 v0, s61585; GFX7-NEXT: v_div_scale_f32 v0, vcc, s2, v0, s21586; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31587; GFX7-NEXT: v_fma_f32 v5, -v2, v4, 1.01588; GFX7-NEXT: v_fma_f32 v4, v5, v4, v41589; GFX7-NEXT: v_mul_f32_e32 v5, v0, v41590; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v01591; GFX7-NEXT: v_fma_f32 v5, v6, v4, v51592; GFX7-NEXT: v_fma_f32 v0, -v2, v5, v01593; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01594; GFX7-NEXT: v_div_fmas_f32 v0, v0, v4, v51595; GFX7-NEXT: v_div_fixup_f32 v2, v0, s6, v11596; GFX7-NEXT: v_mov_b32_e32 v1, s11597; GFX7-NEXT: v_div_scale_f32 v4, s[2:3], s5, s5, v11598; GFX7-NEXT: v_rcp_f32_e32 v5, v41599; GFX7-NEXT: v_mov_b32_e32 v0, s51600; GFX7-NEXT: v_div_scale_f32 v0, vcc, s1, v0, s11601; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31602; GFX7-NEXT: v_fma_f32 v6, -v4, v5, 1.01603; GFX7-NEXT: v_fma_f32 v5, v6, v5, v51604; GFX7-NEXT: v_mul_f32_e32 v6, v0, v51605; GFX7-NEXT: v_fma_f32 v7, -v4, v6, v01606; GFX7-NEXT: v_fma_f32 v6, v7, v5, v61607; GFX7-NEXT: v_fma_f32 v0, -v4, v6, v01608; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01609; GFX7-NEXT: v_mov_b32_e32 v4, s01610; GFX7-NEXT: v_div_fmas_f32 v0, v0, v5, v61611; GFX7-NEXT: v_div_scale_f32 v5, s[2:3], s4, s4, v41612; GFX7-NEXT: v_rcp_f32_e32 v6, v51613; GFX7-NEXT: v_div_fixup_f32 v1, v0, s5, v11614; GFX7-NEXT: v_mov_b32_e32 v0, s41615; GFX7-NEXT: v_div_scale_f32 v0, vcc, s0, v0, s01616; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31617; GFX7-NEXT: v_fma_f32 v7, -v5, v6, 1.01618; GFX7-NEXT: v_fma_f32 v6, v7, v6, v61619; GFX7-NEXT: v_mul_f32_e32 v7, v0, v61620; GFX7-NEXT: v_fma_f32 v8, -v5, v7, v01621; GFX7-NEXT: v_fma_f32 v7, v8, v6, v71622; GFX7-NEXT: v_fma_f32 v0, -v5, v7, v01623; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01624; GFX7-NEXT: v_div_fmas_f32 v0, v0, v6, v71625; GFX7-NEXT: v_div_fixup_f32 v0, v0, s4, v41626; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 01627; GFX7-NEXT: s_endpgm1628;1629; GFX8-LABEL: s_fdiv_v4f32:1630; GFX8: ; %bb.0:1631; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241632; GFX8-NEXT: s_waitcnt lgkmcnt(0)1633; GFX8-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01634; GFX8-NEXT: s_waitcnt lgkmcnt(0)1635; GFX8-NEXT: v_mov_b32_e32 v0, s31636; GFX8-NEXT: v_div_scale_f32 v1, s[10:11], s7, s7, v01637; GFX8-NEXT: v_mov_b32_e32 v2, s71638; GFX8-NEXT: v_div_scale_f32 v2, vcc, s3, v2, s31639; GFX8-NEXT: v_mov_b32_e32 v4, s21640; GFX8-NEXT: v_mov_b32_e32 v7, s11641; GFX8-NEXT: v_mov_b32_e32 v8, s01642; GFX8-NEXT: v_rcp_f32_e32 v3, v11643; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31644; GFX8-NEXT: v_fma_f32 v5, -v1, v3, 1.01645; GFX8-NEXT: v_fma_f32 v3, v5, v3, v31646; GFX8-NEXT: v_mul_f32_e32 v5, v2, v31647; GFX8-NEXT: v_fma_f32 v6, -v1, v5, v21648; GFX8-NEXT: v_fma_f32 v5, v6, v3, v51649; GFX8-NEXT: v_fma_f32 v1, -v1, v5, v21650; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01651; GFX8-NEXT: v_div_scale_f32 v2, s[10:11], s6, s6, v41652; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v51653; GFX8-NEXT: v_mov_b32_e32 v3, s61654; GFX8-NEXT: v_div_scale_f32 v5, vcc, s2, v3, s21655; GFX8-NEXT: v_rcp_f32_e32 v6, v21656; GFX8-NEXT: v_div_fixup_f32 v3, v1, s7, v01657; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31658; GFX8-NEXT: v_fma_f32 v0, -v2, v6, 1.01659; GFX8-NEXT: v_fma_f32 v0, v0, v6, v61660; GFX8-NEXT: v_mul_f32_e32 v1, v5, v01661; GFX8-NEXT: v_fma_f32 v6, -v2, v1, v51662; GFX8-NEXT: v_fma_f32 v1, v6, v0, v11663; GFX8-NEXT: v_fma_f32 v2, -v2, v1, v51664; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01665; GFX8-NEXT: v_div_scale_f32 v5, s[2:3], s5, s5, v71666; GFX8-NEXT: v_div_fmas_f32 v0, v2, v0, v11667; GFX8-NEXT: v_mov_b32_e32 v1, s51668; GFX8-NEXT: v_div_scale_f32 v1, vcc, s1, v1, s11669; GFX8-NEXT: v_rcp_f32_e32 v6, v51670; GFX8-NEXT: v_div_fixup_f32 v2, v0, s6, v41671; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31672; GFX8-NEXT: v_fma_f32 v0, -v5, v6, 1.01673; GFX8-NEXT: v_fma_f32 v0, v0, v6, v61674; GFX8-NEXT: v_mul_f32_e32 v4, v1, v01675; GFX8-NEXT: v_fma_f32 v6, -v5, v4, v11676; GFX8-NEXT: v_fma_f32 v4, v6, v0, v41677; GFX8-NEXT: v_fma_f32 v1, -v5, v4, v11678; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01679; GFX8-NEXT: v_div_scale_f32 v5, s[2:3], s4, s4, v81680; GFX8-NEXT: v_div_fmas_f32 v0, v1, v0, v41681; GFX8-NEXT: v_mov_b32_e32 v1, s41682; GFX8-NEXT: v_div_scale_f32 v4, vcc, s0, v1, s01683; GFX8-NEXT: v_rcp_f32_e32 v6, v51684; GFX8-NEXT: v_div_fixup_f32 v1, v0, s5, v71685; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 31686; GFX8-NEXT: v_fma_f32 v0, -v5, v6, 1.01687; GFX8-NEXT: v_fma_f32 v0, v0, v6, v61688; GFX8-NEXT: v_mul_f32_e32 v6, v4, v01689; GFX8-NEXT: v_fma_f32 v7, -v5, v6, v41690; GFX8-NEXT: v_fma_f32 v6, v7, v0, v61691; GFX8-NEXT: v_fma_f32 v4, -v5, v6, v41692; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 01693; GFX8-NEXT: v_div_fmas_f32 v0, v4, v0, v61694; GFX8-NEXT: v_mov_b32_e32 v4, s81695; GFX8-NEXT: v_mov_b32_e32 v5, s91696; GFX8-NEXT: v_div_fixup_f32 v0, v0, s4, v81697; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]1698; GFX8-NEXT: s_endpgm1699;1700; GFX10-LABEL: s_fdiv_v4f32:1701; GFX10: ; %bb.0:1702; GFX10-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241703; GFX10-NEXT: s_waitcnt lgkmcnt(0)1704; GFX10-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01705; GFX10-NEXT: s_waitcnt lgkmcnt(0)1706; GFX10-NEXT: v_div_scale_f32 v0, s10, s7, s7, s31707; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, s3, s7, s31708; GFX10-NEXT: v_rcp_f32_e32 v1, v01709; GFX10-NEXT: s_denorm_mode 151710; GFX10-NEXT: v_fma_f32 v3, -v0, v1, 1.01711; GFX10-NEXT: v_fmac_f32_e32 v1, v3, v11712; GFX10-NEXT: v_mul_f32_e32 v3, v2, v11713; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v21714; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v11715; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v21716; GFX10-NEXT: s_denorm_mode 121717; GFX10-NEXT: v_div_scale_f32 v2, s10, s6, s6, s21718; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v31719; GFX10-NEXT: v_div_scale_f32 v1, vcc_lo, s2, s6, s21720; GFX10-NEXT: v_rcp_f32_e32 v4, v21721; GFX10-NEXT: v_div_fixup_f32 v3, v0, s7, s31722; GFX10-NEXT: s_denorm_mode 151723; GFX10-NEXT: v_fma_f32 v0, -v2, v4, 1.01724; GFX10-NEXT: v_fmac_f32_e32 v4, v0, v41725; GFX10-NEXT: v_mul_f32_e32 v0, v1, v41726; GFX10-NEXT: v_fma_f32 v5, -v2, v0, v11727; GFX10-NEXT: v_fmac_f32_e32 v0, v5, v41728; GFX10-NEXT: v_fma_f32 v1, -v2, v0, v11729; GFX10-NEXT: s_denorm_mode 121730; GFX10-NEXT: v_div_scale_f32 v5, s3, s5, s5, s11731; GFX10-NEXT: v_div_fmas_f32 v0, v1, v4, v01732; GFX10-NEXT: v_div_scale_f32 v1, vcc_lo, s1, s5, s11733; GFX10-NEXT: v_rcp_f32_e32 v6, v51734; GFX10-NEXT: v_div_fixup_f32 v2, v0, s6, s21735; GFX10-NEXT: s_denorm_mode 151736; GFX10-NEXT: v_fma_f32 v0, -v5, v6, 1.01737; GFX10-NEXT: v_fmac_f32_e32 v6, v0, v61738; GFX10-NEXT: v_mul_f32_e32 v0, v1, v61739; GFX10-NEXT: v_fma_f32 v4, -v5, v0, v11740; GFX10-NEXT: v_fmac_f32_e32 v0, v4, v61741; GFX10-NEXT: v_fma_f32 v1, -v5, v0, v11742; GFX10-NEXT: s_denorm_mode 121743; GFX10-NEXT: v_div_scale_f32 v4, s2, s4, s4, s01744; GFX10-NEXT: v_div_fmas_f32 v0, v1, v6, v01745; GFX10-NEXT: v_rcp_f32_e32 v5, v41746; GFX10-NEXT: v_div_fixup_f32 v1, v0, s5, s11747; GFX10-NEXT: v_div_scale_f32 v0, vcc_lo, s0, s4, s01748; GFX10-NEXT: s_denorm_mode 151749; GFX10-NEXT: v_fma_f32 v6, -v4, v5, 1.01750; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v51751; GFX10-NEXT: v_mul_f32_e32 v6, v0, v51752; GFX10-NEXT: v_fma_f32 v7, -v4, v6, v01753; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v51754; GFX10-NEXT: v_fma_f32 v0, -v4, v6, v01755; GFX10-NEXT: s_denorm_mode 121756; GFX10-NEXT: v_mov_b32_e32 v4, 01757; GFX10-NEXT: v_div_fmas_f32 v0, v0, v5, v61758; GFX10-NEXT: v_div_fixup_f32 v0, v0, s4, s01759; GFX10-NEXT: global_store_dwordx4 v4, v[0:3], s[8:9]1760; GFX10-NEXT: s_endpgm1761;1762; GFX11-LABEL: s_fdiv_v4f32:1763; GFX11: ; %bb.0:1764; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x241765; GFX11-NEXT: s_waitcnt lgkmcnt(0)1766; GFX11-NEXT: s_load_b256 s[0:7], s[10:11], 0x01767; GFX11-NEXT: s_waitcnt lgkmcnt(0)1768; GFX11-NEXT: v_div_scale_f32 v0, null, s7, s7, s31769; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, s3, s7, s31770; GFX11-NEXT: v_rcp_f32_e32 v1, v01771; GFX11-NEXT: s_denorm_mode 151772; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1773; GFX11-NEXT: v_fma_f32 v3, -v0, v1, 1.01774; GFX11-NEXT: v_fmac_f32_e32 v1, v3, v11775; GFX11-NEXT: v_mul_f32_e32 v3, v2, v11776; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v21777; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v11778; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v21779; GFX11-NEXT: s_denorm_mode 121780; GFX11-NEXT: v_div_scale_f32 v2, null, s6, s6, s21781; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v31782; GFX11-NEXT: v_div_scale_f32 v1, vcc_lo, s2, s6, s21783; GFX11-NEXT: v_rcp_f32_e32 v4, v21784; GFX11-NEXT: v_div_fixup_f32 v3, v0, s7, s31785; GFX11-NEXT: s_denorm_mode 151786; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1787; GFX11-NEXT: v_fma_f32 v0, -v2, v4, 1.01788; GFX11-NEXT: v_fmac_f32_e32 v4, v0, v41789; GFX11-NEXT: v_mul_f32_e32 v0, v1, v41790; GFX11-NEXT: v_fma_f32 v5, -v2, v0, v11791; GFX11-NEXT: v_fmac_f32_e32 v0, v5, v41792; GFX11-NEXT: v_fma_f32 v1, -v2, v0, v11793; GFX11-NEXT: s_denorm_mode 121794; GFX11-NEXT: v_div_scale_f32 v5, null, s5, s5, s11795; GFX11-NEXT: v_div_fmas_f32 v0, v1, v4, v01796; GFX11-NEXT: v_div_scale_f32 v1, vcc_lo, s1, s5, s11797; GFX11-NEXT: v_rcp_f32_e32 v6, v51798; GFX11-NEXT: v_div_fixup_f32 v2, v0, s6, s21799; GFX11-NEXT: s_denorm_mode 151800; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1801; GFX11-NEXT: v_fma_f32 v0, -v5, v6, 1.01802; GFX11-NEXT: v_fmac_f32_e32 v6, v0, v61803; GFX11-NEXT: v_mul_f32_e32 v0, v1, v61804; GFX11-NEXT: v_fma_f32 v4, -v5, v0, v11805; GFX11-NEXT: v_fmac_f32_e32 v0, v4, v61806; GFX11-NEXT: v_fma_f32 v1, -v5, v0, v11807; GFX11-NEXT: s_denorm_mode 121808; GFX11-NEXT: v_div_scale_f32 v4, null, s4, s4, s01809; GFX11-NEXT: v_div_fmas_f32 v0, v1, v6, v01810; GFX11-NEXT: v_rcp_f32_e32 v5, v41811; GFX11-NEXT: v_div_fixup_f32 v1, v0, s5, s11812; GFX11-NEXT: v_div_scale_f32 v0, vcc_lo, s0, s4, s01813; GFX11-NEXT: s_denorm_mode 151814; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1815; GFX11-NEXT: v_fma_f32 v6, -v4, v5, 1.01816; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v51817; GFX11-NEXT: v_mul_f32_e32 v6, v0, v51818; GFX11-NEXT: v_fma_f32 v7, -v4, v6, v01819; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v51820; GFX11-NEXT: v_fma_f32 v0, -v4, v6, v01821; GFX11-NEXT: s_denorm_mode 121822; GFX11-NEXT: v_mov_b32_e32 v4, 01823; GFX11-NEXT: v_div_fmas_f32 v0, v0, v5, v61824; GFX11-NEXT: v_div_fixup_f32 v0, v0, s4, s01825; GFX11-NEXT: global_store_b128 v4, v[0:3], s[8:9]1826; GFX11-NEXT: s_endpgm1827;1828; EG-LABEL: s_fdiv_v4f32:1829; EG: ; %bb.0:1830; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]1831; EG-NEXT: TEX 1 @61832; EG-NEXT: ALU 9, @11, KC0[CB0:0-32], KC1[]1833; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 11834; EG-NEXT: CF_END1835; EG-NEXT: PAD1836; EG-NEXT: Fetch clause starting at 6:1837; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #11838; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #11839; EG-NEXT: ALU clause starting at 10:1840; EG-NEXT: MOV * T0.X, KC0[2].Z,1841; EG-NEXT: ALU clause starting at 11:1842; EG-NEXT: RECIP_IEEE * T1.W, T1.W,1843; EG-NEXT: MUL_IEEE T0.W, T0.W, PS,1844; EG-NEXT: RECIP_IEEE * T1.Z, T1.Z,1845; EG-NEXT: MUL_IEEE T0.Z, T0.Z, PS,1846; EG-NEXT: RECIP_IEEE * T1.Y, T1.Y,1847; EG-NEXT: MUL_IEEE T0.Y, T0.Y, PS,1848; EG-NEXT: RECIP_IEEE * T1.X, T1.X,1849; EG-NEXT: MUL_IEEE T0.X, T0.X, PS,1850; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1851; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1852 %b_ptr = getelementptr <4 x float>, ptr addrspace(1) %in, i32 11853 %a = load <4 x float>, ptr addrspace(1) %in1854 %b = load <4 x float>, ptr addrspace(1) %b_ptr1855 %result = fdiv <4 x float> %a, %b1856 store <4 x float> %result, ptr addrspace(1) %out1857 ret void1858}1859 1860define amdgpu_kernel void @s_fdiv_v4f32_fast_math(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {1861; GFX67-LABEL: s_fdiv_v4f32_fast_math:1862; GFX67: ; %bb.0:1863; GFX67-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x91864; GFX67-NEXT: s_waitcnt lgkmcnt(0)1865; GFX67-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01866; GFX67-NEXT: s_mov_b32 s11, 0xf0001867; GFX67-NEXT: s_mov_b32 s10, -11868; GFX67-NEXT: s_waitcnt lgkmcnt(0)1869; GFX67-NEXT: v_rcp_f32_e32 v0, s71870; GFX67-NEXT: v_rcp_f32_e32 v1, s61871; GFX67-NEXT: v_rcp_f32_e32 v4, s51872; GFX67-NEXT: v_rcp_f32_e32 v5, s41873; GFX67-NEXT: v_mul_f32_e32 v3, s3, v01874; GFX67-NEXT: v_mul_f32_e32 v2, s2, v11875; GFX67-NEXT: v_mul_f32_e32 v1, s1, v41876; GFX67-NEXT: v_mul_f32_e32 v0, s0, v51877; GFX67-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 01878; GFX67-NEXT: s_endpgm1879;1880; GFX8-LABEL: s_fdiv_v4f32_fast_math:1881; GFX8: ; %bb.0:1882; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241883; GFX8-NEXT: s_waitcnt lgkmcnt(0)1884; GFX8-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01885; GFX8-NEXT: v_mov_b32_e32 v4, s81886; GFX8-NEXT: v_mov_b32_e32 v5, s91887; GFX8-NEXT: s_waitcnt lgkmcnt(0)1888; GFX8-NEXT: v_rcp_f32_e32 v0, s71889; GFX8-NEXT: v_rcp_f32_e32 v1, s61890; GFX8-NEXT: v_rcp_f32_e32 v6, s51891; GFX8-NEXT: v_rcp_f32_e32 v7, s41892; GFX8-NEXT: v_mul_f32_e32 v3, s3, v01893; GFX8-NEXT: v_mul_f32_e32 v2, s2, v11894; GFX8-NEXT: v_mul_f32_e32 v1, s1, v61895; GFX8-NEXT: v_mul_f32_e32 v0, s0, v71896; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]1897; GFX8-NEXT: s_endpgm1898;1899; GFX10-LABEL: s_fdiv_v4f32_fast_math:1900; GFX10: ; %bb.0:1901; GFX10-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241902; GFX10-NEXT: v_mov_b32_e32 v6, 01903; GFX10-NEXT: s_waitcnt lgkmcnt(0)1904; GFX10-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01905; GFX10-NEXT: s_waitcnt lgkmcnt(0)1906; GFX10-NEXT: v_rcp_f32_e32 v0, s71907; GFX10-NEXT: v_rcp_f32_e32 v1, s61908; GFX10-NEXT: v_rcp_f32_e32 v4, s51909; GFX10-NEXT: v_rcp_f32_e32 v5, s41910; GFX10-NEXT: v_mul_f32_e32 v3, s3, v01911; GFX10-NEXT: v_mul_f32_e32 v2, s2, v11912; GFX10-NEXT: v_mul_f32_e32 v1, s1, v41913; GFX10-NEXT: v_mul_f32_e32 v0, s0, v51914; GFX10-NEXT: global_store_dwordx4 v6, v[0:3], s[8:9]1915; GFX10-NEXT: s_endpgm1916;1917; GFX11-LABEL: s_fdiv_v4f32_fast_math:1918; GFX11: ; %bb.0:1919; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x241920; GFX11-NEXT: s_waitcnt lgkmcnt(0)1921; GFX11-NEXT: s_load_b256 s[0:7], s[10:11], 0x01922; GFX11-NEXT: s_waitcnt lgkmcnt(0)1923; GFX11-NEXT: v_rcp_f32_e32 v0, s71924; GFX11-NEXT: v_rcp_f32_e32 v1, s61925; GFX11-NEXT: v_rcp_f32_e32 v4, s51926; GFX11-NEXT: v_rcp_f32_e32 v5, s41927; GFX11-NEXT: v_dual_mov_b32 v6, 0 :: v_dual_mul_f32 v3, s3, v01928; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1929; GFX11-NEXT: v_dual_mul_f32 v2, s2, v1 :: v_dual_mul_f32 v1, s1, v41930; GFX11-NEXT: v_mul_f32_e32 v0, s0, v51931; GFX11-NEXT: global_store_b128 v6, v[0:3], s[8:9]1932; GFX11-NEXT: s_endpgm1933;1934; EG-LABEL: s_fdiv_v4f32_fast_math:1935; EG: ; %bb.0:1936; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]1937; EG-NEXT: TEX 1 @61938; EG-NEXT: ALU 9, @11, KC0[CB0:0-32], KC1[]1939; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 11940; EG-NEXT: CF_END1941; EG-NEXT: PAD1942; EG-NEXT: Fetch clause starting at 6:1943; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #11944; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #11945; EG-NEXT: ALU clause starting at 10:1946; EG-NEXT: MOV * T0.X, KC0[2].Z,1947; EG-NEXT: ALU clause starting at 11:1948; EG-NEXT: RECIP_IEEE * T1.W, T1.W,1949; EG-NEXT: MUL_IEEE T0.W, PS, T0.W,1950; EG-NEXT: RECIP_IEEE * T1.Z, T1.Z,1951; EG-NEXT: MUL_IEEE T0.Z, PS, T0.Z,1952; EG-NEXT: RECIP_IEEE * T1.Y, T1.Y,1953; EG-NEXT: MUL_IEEE T0.Y, PS, T0.Y,1954; EG-NEXT: RECIP_IEEE * T1.X, T1.X,1955; EG-NEXT: MUL_IEEE T0.X, PS, T0.X,1956; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,1957; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)1958 %b_ptr = getelementptr <4 x float>, ptr addrspace(1) %in, i32 11959 %a = load <4 x float>, ptr addrspace(1) %in1960 %b = load <4 x float>, ptr addrspace(1) %b_ptr1961 %result = fdiv fast <4 x float> %a, %b1962 store <4 x float> %result, ptr addrspace(1) %out1963 ret void1964}1965 1966define amdgpu_kernel void @s_fdiv_v4f32_arcp_math(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {1967; GFX67-LABEL: s_fdiv_v4f32_arcp_math:1968; GFX67: ; %bb.0:1969; GFX67-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x91970; GFX67-NEXT: s_waitcnt lgkmcnt(0)1971; GFX67-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01972; GFX67-NEXT: s_mov_b32 s11, 0xf0001973; GFX67-NEXT: s_mov_b32 s10, -11974; GFX67-NEXT: s_waitcnt lgkmcnt(0)1975; GFX67-NEXT: v_rcp_f32_e32 v0, s71976; GFX67-NEXT: v_rcp_f32_e32 v1, s61977; GFX67-NEXT: v_rcp_f32_e32 v4, s51978; GFX67-NEXT: v_rcp_f32_e32 v5, s41979; GFX67-NEXT: v_mul_f32_e32 v3, s3, v01980; GFX67-NEXT: v_mul_f32_e32 v2, s2, v11981; GFX67-NEXT: v_mul_f32_e32 v1, s1, v41982; GFX67-NEXT: v_mul_f32_e32 v0, s0, v51983; GFX67-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 01984; GFX67-NEXT: s_endpgm1985;1986; GFX8-LABEL: s_fdiv_v4f32_arcp_math:1987; GFX8: ; %bb.0:1988; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x241989; GFX8-NEXT: s_waitcnt lgkmcnt(0)1990; GFX8-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x01991; GFX8-NEXT: v_mov_b32_e32 v4, s81992; GFX8-NEXT: v_mov_b32_e32 v5, s91993; GFX8-NEXT: s_waitcnt lgkmcnt(0)1994; GFX8-NEXT: v_rcp_f32_e32 v0, s71995; GFX8-NEXT: v_rcp_f32_e32 v1, s61996; GFX8-NEXT: v_rcp_f32_e32 v6, s51997; GFX8-NEXT: v_rcp_f32_e32 v7, s41998; GFX8-NEXT: v_mul_f32_e32 v3, s3, v01999; GFX8-NEXT: v_mul_f32_e32 v2, s2, v12000; GFX8-NEXT: v_mul_f32_e32 v1, s1, v62001; GFX8-NEXT: v_mul_f32_e32 v0, s0, v72002; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]2003; GFX8-NEXT: s_endpgm2004;2005; GFX10-LABEL: s_fdiv_v4f32_arcp_math:2006; GFX10: ; %bb.0:2007; GFX10-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x242008; GFX10-NEXT: v_mov_b32_e32 v6, 02009; GFX10-NEXT: s_waitcnt lgkmcnt(0)2010; GFX10-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x02011; GFX10-NEXT: s_waitcnt lgkmcnt(0)2012; GFX10-NEXT: v_rcp_f32_e32 v0, s72013; GFX10-NEXT: v_rcp_f32_e32 v1, s62014; GFX10-NEXT: v_rcp_f32_e32 v4, s52015; GFX10-NEXT: v_rcp_f32_e32 v5, s42016; GFX10-NEXT: v_mul_f32_e32 v3, s3, v02017; GFX10-NEXT: v_mul_f32_e32 v2, s2, v12018; GFX10-NEXT: v_mul_f32_e32 v1, s1, v42019; GFX10-NEXT: v_mul_f32_e32 v0, s0, v52020; GFX10-NEXT: global_store_dwordx4 v6, v[0:3], s[8:9]2021; GFX10-NEXT: s_endpgm2022;2023; GFX11-LABEL: s_fdiv_v4f32_arcp_math:2024; GFX11: ; %bb.0:2025; GFX11-NEXT: s_load_b128 s[8:11], s[4:5], 0x242026; GFX11-NEXT: s_waitcnt lgkmcnt(0)2027; GFX11-NEXT: s_load_b256 s[0:7], s[10:11], 0x02028; GFX11-NEXT: s_waitcnt lgkmcnt(0)2029; GFX11-NEXT: v_rcp_f32_e32 v0, s72030; GFX11-NEXT: v_rcp_f32_e32 v1, s62031; GFX11-NEXT: v_rcp_f32_e32 v4, s52032; GFX11-NEXT: v_rcp_f32_e32 v5, s42033; GFX11-NEXT: v_dual_mov_b32 v6, 0 :: v_dual_mul_f32 v3, s3, v02034; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2035; GFX11-NEXT: v_dual_mul_f32 v2, s2, v1 :: v_dual_mul_f32 v1, s1, v42036; GFX11-NEXT: v_mul_f32_e32 v0, s0, v52037; GFX11-NEXT: global_store_b128 v6, v[0:3], s[8:9]2038; GFX11-NEXT: s_endpgm2039;2040; EG-LABEL: s_fdiv_v4f32_arcp_math:2041; EG: ; %bb.0:2042; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]2043; EG-NEXT: TEX 1 @62044; EG-NEXT: ALU 9, @11, KC0[CB0:0-32], KC1[]2045; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 12046; EG-NEXT: CF_END2047; EG-NEXT: PAD2048; EG-NEXT: Fetch clause starting at 6:2049; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #12050; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #12051; EG-NEXT: ALU clause starting at 10:2052; EG-NEXT: MOV * T0.X, KC0[2].Z,2053; EG-NEXT: ALU clause starting at 11:2054; EG-NEXT: RECIP_IEEE * T1.W, T1.W,2055; EG-NEXT: MUL_IEEE T0.W, PS, T0.W,2056; EG-NEXT: RECIP_IEEE * T1.Z, T1.Z,2057; EG-NEXT: MUL_IEEE T0.Z, PS, T0.Z,2058; EG-NEXT: RECIP_IEEE * T1.Y, T1.Y,2059; EG-NEXT: MUL_IEEE T0.Y, PS, T0.Y,2060; EG-NEXT: RECIP_IEEE * T1.X, T1.X,2061; EG-NEXT: MUL_IEEE T0.X, PS, T0.X,2062; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,2063; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2064 %b_ptr = getelementptr <4 x float>, ptr addrspace(1) %in, i32 12065 %a = load <4 x float>, ptr addrspace(1) %in2066 %b = load <4 x float>, ptr addrspace(1) %b_ptr2067 %result = fdiv arcp ninf <4 x float> %a, %b2068 store <4 x float> %result, ptr addrspace(1) %out2069 ret void2070}2071 2072define amdgpu_kernel void @s_fdiv_f32_correctly_rounded_divide_sqrt(ptr addrspace(1) %out, float %a) #0 {2073; GFX6-FASTFMA-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2074; GFX6-FASTFMA: ; %bb.0: ; %entry2075; GFX6-FASTFMA-NEXT: s_load_dword s6, s[4:5], 0xb2076; GFX6-FASTFMA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92077; GFX6-FASTFMA-NEXT: s_mov_b32 s3, 0xf0002078; GFX6-FASTFMA-NEXT: s_mov_b32 s2, -12079; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)2080; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, s[4:5], s6, s6, 1.02081; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v1, v02082; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, vcc, 1.0, s6, 1.02083; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32084; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v0, v1, 1.02085; GFX6-FASTFMA-NEXT: v_fma_f32 v1, v3, v1, v12086; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v3, v2, v12087; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v0, v3, v22088; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v1, v32089; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v0, v3, v22090; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02091; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v1, v32092; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v0, s6, 1.02093; GFX6-FASTFMA-NEXT: buffer_store_dword v0, off, s[0:3], 02094; GFX6-FASTFMA-NEXT: s_endpgm2095;2096; GFX6-SLOWFMA-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2097; GFX6-SLOWFMA: ; %bb.0: ; %entry2098; GFX6-SLOWFMA-NEXT: s_load_dword s6, s[4:5], 0xb2099; GFX6-SLOWFMA-NEXT: s_mov_b32 s3, 0xf0002100; GFX6-SLOWFMA-NEXT: s_mov_b32 s2, -12101; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)2102; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v0, s[0:1], s6, s6, 1.02103; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, vcc, 1.0, s6, 1.02104; GFX6-SLOWFMA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92105; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v2, v02106; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32107; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v0, v2, 1.02108; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, v3, v2, v22109; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v3, v1, v22110; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v0, v3, v12111; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v2, v32112; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, -v0, v3, v12113; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02114; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v0, v0, v2, v32115; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v0, s6, 1.02116; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)2117; GFX6-SLOWFMA-NEXT: buffer_store_dword v0, off, s[0:3], 02118; GFX6-SLOWFMA-NEXT: s_endpgm2119;2120; GFX7-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2121; GFX7: ; %bb.0: ; %entry2122; GFX7-NEXT: s_load_dword s6, s[4:5], 0xb2123; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92124; GFX7-NEXT: s_mov_b32 s3, 0xf0002125; GFX7-NEXT: s_mov_b32 s2, -12126; GFX7-NEXT: s_waitcnt lgkmcnt(0)2127; GFX7-NEXT: v_div_scale_f32 v0, s[4:5], s6, s6, 1.02128; GFX7-NEXT: v_rcp_f32_e32 v1, v02129; GFX7-NEXT: v_div_scale_f32 v2, vcc, 1.0, s6, 1.02130; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32131; GFX7-NEXT: v_fma_f32 v3, -v0, v1, 1.02132; GFX7-NEXT: v_fma_f32 v1, v3, v1, v12133; GFX7-NEXT: v_mul_f32_e32 v3, v2, v12134; GFX7-NEXT: v_fma_f32 v4, -v0, v3, v22135; GFX7-NEXT: v_fma_f32 v3, v4, v1, v32136; GFX7-NEXT: v_fma_f32 v0, -v0, v3, v22137; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02138; GFX7-NEXT: v_div_fmas_f32 v0, v0, v1, v32139; GFX7-NEXT: v_div_fixup_f32 v0, v0, s6, 1.02140; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 02141; GFX7-NEXT: s_endpgm2142;2143; GFX8-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2144; GFX8: ; %bb.0: ; %entry2145; GFX8-NEXT: s_load_dword s2, s[4:5], 0x2c2146; GFX8-NEXT: s_waitcnt lgkmcnt(0)2147; GFX8-NEXT: v_div_scale_f32 v0, s[0:1], s2, s2, 1.02148; GFX8-NEXT: v_div_scale_f32 v1, vcc, 1.0, s2, 1.02149; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242150; GFX8-NEXT: v_rcp_f32_e32 v2, v02151; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32152; GFX8-NEXT: v_fma_f32 v3, -v0, v2, 1.02153; GFX8-NEXT: v_fma_f32 v2, v3, v2, v22154; GFX8-NEXT: v_mul_f32_e32 v3, v1, v22155; GFX8-NEXT: v_fma_f32 v4, -v0, v3, v12156; GFX8-NEXT: v_fma_f32 v3, v4, v2, v32157; GFX8-NEXT: v_fma_f32 v0, -v0, v3, v12158; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02159; GFX8-NEXT: v_div_fmas_f32 v0, v0, v2, v32160; GFX8-NEXT: v_div_fixup_f32 v2, v0, s2, 1.02161; GFX8-NEXT: s_waitcnt lgkmcnt(0)2162; GFX8-NEXT: v_mov_b32_e32 v0, s02163; GFX8-NEXT: v_mov_b32_e32 v1, s12164; GFX8-NEXT: flat_store_dword v[0:1], v22165; GFX8-NEXT: s_endpgm2166;2167; GFX10-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2168; GFX10: ; %bb.0: ; %entry2169; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c2170; GFX10-NEXT: s_waitcnt lgkmcnt(0)2171; GFX10-NEXT: v_div_scale_f32 v0, s0, s2, s2, 1.02172; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, s2, 1.02173; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242174; GFX10-NEXT: v_rcp_f32_e32 v1, v02175; GFX10-NEXT: s_denorm_mode 152176; GFX10-NEXT: v_fma_f32 v3, -v0, v1, 1.02177; GFX10-NEXT: v_fmac_f32_e32 v1, v3, v12178; GFX10-NEXT: v_mul_f32_e32 v3, v2, v12179; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v22180; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v12181; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v22182; GFX10-NEXT: s_denorm_mode 122183; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v32184; GFX10-NEXT: v_mov_b32_e32 v1, 02185; GFX10-NEXT: v_div_fixup_f32 v0, v0, s2, 1.02186; GFX10-NEXT: s_waitcnt lgkmcnt(0)2187; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2188; GFX10-NEXT: s_endpgm2189;2190; GFX11-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2191; GFX11: ; %bb.0: ; %entry2192; GFX11-NEXT: s_clause 0x12193; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c2194; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x242195; GFX11-NEXT: s_waitcnt lgkmcnt(0)2196; GFX11-NEXT: v_div_scale_f32 v0, null, s2, s2, 1.02197; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, s2, 1.02198; GFX11-NEXT: v_rcp_f32_e32 v1, v02199; GFX11-NEXT: s_denorm_mode 152200; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2201; GFX11-NEXT: v_fma_f32 v3, -v0, v1, 1.02202; GFX11-NEXT: v_fmac_f32_e32 v1, v3, v12203; GFX11-NEXT: v_mul_f32_e32 v3, v2, v12204; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v22205; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v12206; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v22207; GFX11-NEXT: s_denorm_mode 122208; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v32209; GFX11-NEXT: v_mov_b32_e32 v1, 02210; GFX11-NEXT: v_div_fixup_f32 v0, v0, s2, 1.02211; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2212; GFX11-NEXT: s_endpgm2213;2214; EG-LABEL: s_fdiv_f32_correctly_rounded_divide_sqrt:2215; EG: ; %bb.0: ; %entry2216; EG-NEXT: ALU 2, @4, KC0[CB0:0-32], KC1[]2217; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.X, T0.X, 12218; EG-NEXT: CF_END2219; EG-NEXT: PAD2220; EG-NEXT: ALU clause starting at 4:2221; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,2222; EG-NEXT: RECIP_IEEE * T1.X, KC0[2].Z,2223; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2224entry:2225 %fdiv = fdiv float 1.000000e+00, %a2226 store float %fdiv, ptr addrspace(1) %out2227 ret void2228}2229 2230define amdgpu_kernel void @s_fdiv_f32_denorms_correctly_rounded_divide_sqrt(ptr addrspace(1) %out, float %a) #1 {2231; GFX6-FASTFMA-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2232; GFX6-FASTFMA: ; %bb.0: ; %entry2233; GFX6-FASTFMA-NEXT: s_load_dword s6, s[4:5], 0xb2234; GFX6-FASTFMA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92235; GFX6-FASTFMA-NEXT: s_mov_b32 s3, 0xf0002236; GFX6-FASTFMA-NEXT: s_mov_b32 s2, -12237; GFX6-FASTFMA-NEXT: s_waitcnt lgkmcnt(0)2238; GFX6-FASTFMA-NEXT: v_div_scale_f32 v0, s[4:5], s6, s6, 1.02239; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v1, v02240; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, vcc, 1.0, s6, 1.02241; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v0, v1, 1.02242; GFX6-FASTFMA-NEXT: v_fma_f32 v1, v3, v1, v12243; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v3, v2, v12244; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v0, v3, v22245; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v1, v32246; GFX6-FASTFMA-NEXT: v_fma_f32 v0, -v0, v3, v22247; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v0, v0, v1, v32248; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v0, s6, 1.02249; GFX6-FASTFMA-NEXT: buffer_store_dword v0, off, s[0:3], 02250; GFX6-FASTFMA-NEXT: s_endpgm2251;2252; GFX6-SLOWFMA-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2253; GFX6-SLOWFMA: ; %bb.0: ; %entry2254; GFX6-SLOWFMA-NEXT: s_load_dword s6, s[4:5], 0xb2255; GFX6-SLOWFMA-NEXT: s_mov_b32 s3, 0xf0002256; GFX6-SLOWFMA-NEXT: s_mov_b32 s2, -12257; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)2258; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v0, s[0:1], s6, s6, 1.02259; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, vcc, 1.0, s6, 1.02260; GFX6-SLOWFMA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92261; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v2, v02262; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v0, v2, 1.02263; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, v3, v2, v22264; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v3, v1, v22265; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v0, v3, v12266; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v2, v32267; GFX6-SLOWFMA-NEXT: v_fma_f32 v0, -v0, v3, v12268; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v0, v0, v2, v32269; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v0, s6, 1.02270; GFX6-SLOWFMA-NEXT: s_waitcnt lgkmcnt(0)2271; GFX6-SLOWFMA-NEXT: buffer_store_dword v0, off, s[0:3], 02272; GFX6-SLOWFMA-NEXT: s_endpgm2273;2274; GFX7-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2275; GFX7: ; %bb.0: ; %entry2276; GFX7-NEXT: s_load_dword s6, s[4:5], 0xb2277; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x92278; GFX7-NEXT: s_mov_b32 s3, 0xf0002279; GFX7-NEXT: s_mov_b32 s2, -12280; GFX7-NEXT: s_waitcnt lgkmcnt(0)2281; GFX7-NEXT: v_div_scale_f32 v0, s[4:5], s6, s6, 1.02282; GFX7-NEXT: v_rcp_f32_e32 v1, v02283; GFX7-NEXT: v_div_scale_f32 v2, vcc, 1.0, s6, 1.02284; GFX7-NEXT: v_fma_f32 v3, -v0, v1, 1.02285; GFX7-NEXT: v_fma_f32 v1, v3, v1, v12286; GFX7-NEXT: v_mul_f32_e32 v3, v2, v12287; GFX7-NEXT: v_fma_f32 v4, -v0, v3, v22288; GFX7-NEXT: v_fma_f32 v3, v4, v1, v32289; GFX7-NEXT: v_fma_f32 v0, -v0, v3, v22290; GFX7-NEXT: v_div_fmas_f32 v0, v0, v1, v32291; GFX7-NEXT: v_div_fixup_f32 v0, v0, s6, 1.02292; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 02293; GFX7-NEXT: s_endpgm2294;2295; GFX8-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2296; GFX8: ; %bb.0: ; %entry2297; GFX8-NEXT: s_load_dword s2, s[4:5], 0x2c2298; GFX8-NEXT: s_waitcnt lgkmcnt(0)2299; GFX8-NEXT: v_div_scale_f32 v0, s[0:1], s2, s2, 1.02300; GFX8-NEXT: v_div_scale_f32 v1, vcc, 1.0, s2, 1.02301; GFX8-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242302; GFX8-NEXT: v_rcp_f32_e32 v2, v02303; GFX8-NEXT: v_fma_f32 v3, -v0, v2, 1.02304; GFX8-NEXT: v_fma_f32 v2, v3, v2, v22305; GFX8-NEXT: v_mul_f32_e32 v3, v1, v22306; GFX8-NEXT: v_fma_f32 v4, -v0, v3, v12307; GFX8-NEXT: v_fma_f32 v3, v4, v2, v32308; GFX8-NEXT: v_fma_f32 v0, -v0, v3, v12309; GFX8-NEXT: v_div_fmas_f32 v0, v0, v2, v32310; GFX8-NEXT: v_div_fixup_f32 v2, v0, s2, 1.02311; GFX8-NEXT: s_waitcnt lgkmcnt(0)2312; GFX8-NEXT: v_mov_b32_e32 v0, s02313; GFX8-NEXT: v_mov_b32_e32 v1, s12314; GFX8-NEXT: flat_store_dword v[0:1], v22315; GFX8-NEXT: s_endpgm2316;2317; GFX10-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2318; GFX10: ; %bb.0: ; %entry2319; GFX10-NEXT: s_load_dword s2, s[4:5], 0x2c2320; GFX10-NEXT: s_waitcnt lgkmcnt(0)2321; GFX10-NEXT: v_div_scale_f32 v0, s0, s2, s2, 1.02322; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x242323; GFX10-NEXT: v_rcp_f32_e32 v1, v02324; GFX10-NEXT: v_fma_f32 v2, -v0, v1, 1.02325; GFX10-NEXT: v_fmac_f32_e32 v1, v2, v12326; GFX10-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, s2, 1.02327; GFX10-NEXT: v_mul_f32_e32 v3, v2, v12328; GFX10-NEXT: v_fma_f32 v4, -v0, v3, v22329; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v12330; GFX10-NEXT: v_fma_f32 v0, -v0, v3, v22331; GFX10-NEXT: v_div_fmas_f32 v0, v0, v1, v32332; GFX10-NEXT: v_mov_b32_e32 v1, 02333; GFX10-NEXT: v_div_fixup_f32 v0, v0, s2, 1.02334; GFX10-NEXT: s_waitcnt lgkmcnt(0)2335; GFX10-NEXT: global_store_dword v1, v0, s[0:1]2336; GFX10-NEXT: s_endpgm2337;2338; GFX11-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2339; GFX11: ; %bb.0: ; %entry2340; GFX11-NEXT: s_clause 0x12341; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c2342; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x242343; GFX11-NEXT: s_waitcnt lgkmcnt(0)2344; GFX11-NEXT: v_div_scale_f32 v0, null, s2, s2, 1.02345; GFX11-NEXT: v_rcp_f32_e32 v1, v02346; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2347; GFX11-NEXT: v_fma_f32 v2, -v0, v1, 1.02348; GFX11-NEXT: v_fmac_f32_e32 v1, v2, v12349; GFX11-NEXT: v_div_scale_f32 v2, vcc_lo, 1.0, s2, 1.02350; GFX11-NEXT: v_mul_f32_e32 v3, v2, v12351; GFX11-NEXT: v_fma_f32 v4, -v0, v3, v22352; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v12353; GFX11-NEXT: v_fma_f32 v0, -v0, v3, v22354; GFX11-NEXT: v_div_fmas_f32 v0, v0, v1, v32355; GFX11-NEXT: v_mov_b32_e32 v1, 02356; GFX11-NEXT: v_div_fixup_f32 v0, v0, s2, 1.02357; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]2358; GFX11-NEXT: s_endpgm2359;2360; EG-LABEL: s_fdiv_f32_denorms_correctly_rounded_divide_sqrt:2361; EG: ; %bb.0: ; %entry2362; EG-NEXT: ALU 2, @4, KC0[CB0:0-32], KC1[]2363; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.X, T0.X, 12364; EG-NEXT: CF_END2365; EG-NEXT: PAD2366; EG-NEXT: ALU clause starting at 4:2367; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,2368; EG-NEXT: RECIP_IEEE * T1.X, KC0[2].Z,2369; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)2370entry:2371 %fdiv = fdiv float 1.000000e+00, %a2372 store float %fdiv, ptr addrspace(1) %out2373 ret void2374}2375 2376define float @v_fdiv_f32_dynamic_denorm(float %a, float %b) #2 {2377; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic_denorm:2378; GFX6-FASTFMA: ; %bb.0:2379; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2380; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02381; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v22382; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02383; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2384; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32385; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.02386; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v32387; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v32388; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v42389; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v52390; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v42391; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42392; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v52393; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02394; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]2395;2396; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic_denorm:2397; GFX6-SLOWFMA: ; %bb.0:2398; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2399; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02400; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02401; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2402; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v22403; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32404; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.02405; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v42406; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v42407; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v32408; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v52409; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v32410; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42411; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v52412; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02413; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]2414;2415; GFX7-LABEL: v_fdiv_f32_dynamic_denorm:2416; GFX7: ; %bb.0:2417; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2418; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02419; GFX7-NEXT: v_rcp_f32_e32 v3, v22420; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02421; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2422; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32423; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.02424; GFX7-NEXT: v_fma_f32 v3, v5, v3, v32425; GFX7-NEXT: v_mul_f32_e32 v5, v4, v32426; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v42427; GFX7-NEXT: v_fma_f32 v5, v6, v3, v52428; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v42429; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42430; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v52431; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v02432; GFX7-NEXT: s_setpc_b64 s[30:31]2433;2434; GFX8-LABEL: v_fdiv_f32_dynamic_denorm:2435; GFX8: ; %bb.0:2436; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2437; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02438; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02439; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2440; GFX8-NEXT: v_rcp_f32_e32 v4, v22441; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32442; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.02443; GFX8-NEXT: v_fma_f32 v4, v5, v4, v42444; GFX8-NEXT: v_mul_f32_e32 v5, v3, v42445; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v32446; GFX8-NEXT: v_fma_f32 v5, v6, v4, v52447; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v32448; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42449; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v52450; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v02451; GFX8-NEXT: s_setpc_b64 s[30:31]2452;2453; GFX10-LABEL: v_fdiv_f32_dynamic_denorm:2454; GFX10: ; %bb.0:2455; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2456; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v02457; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02458; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2459; GFX10-NEXT: v_rcp_f32_e32 v3, v22460; GFX10-NEXT: s_denorm_mode 152461; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.02462; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v32463; GFX10-NEXT: v_mul_f32_e32 v5, v4, v32464; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v42465; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v32466; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v42467; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42468; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v52469; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v02470; GFX10-NEXT: s_setpc_b64 s[30:31]2471;2472; GFX11-LABEL: v_fdiv_f32_dynamic_denorm:2473; GFX11: ; %bb.0:2474; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2475; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v02476; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02477; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)2478; GFX11-NEXT: v_rcp_f32_e32 v3, v22479; GFX11-NEXT: s_denorm_mode 152480; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2481; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.02482; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v32483; GFX11-NEXT: v_mul_f32_e32 v5, v4, v32484; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v42485; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v32486; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v42487; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s02488; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v52489; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v02490; GFX11-NEXT: s_setpc_b64 s[30:31]2491;2492; EG-LABEL: v_fdiv_f32_dynamic_denorm:2493; EG: ; %bb.0:2494; EG-NEXT: CF_END2495; EG-NEXT: PAD2496 %fdiv = fdiv float %a, %b2497 ret float %fdiv2498}2499 2500define float @v_fdiv_f32_ieee(float %x, float %y) #1 {2501; GFX6-FASTFMA-LABEL: v_fdiv_f32_ieee:2502; GFX6-FASTFMA: ; %bb.0:2503; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2504; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02505; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v22506; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.02507; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v32508; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02509; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v32510; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v42511; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v52512; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v42513; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v52514; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02515; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]2516;2517; GFX6-SLOWFMA-LABEL: v_fdiv_f32_ieee:2518; GFX6-SLOWFMA: ; %bb.0:2519; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2520; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02521; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02522; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v22523; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.02524; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v42525; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v42526; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v32527; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v52528; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v32529; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v52530; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02531; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]2532;2533; GFX7-LABEL: v_fdiv_f32_ieee:2534; GFX7: ; %bb.0:2535; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2536; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02537; GFX7-NEXT: v_rcp_f32_e32 v3, v22538; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.02539; GFX7-NEXT: v_fma_f32 v3, v4, v3, v32540; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02541; GFX7-NEXT: v_mul_f32_e32 v5, v4, v32542; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v42543; GFX7-NEXT: v_fma_f32 v5, v6, v3, v52544; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v42545; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v52546; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v02547; GFX7-NEXT: s_setpc_b64 s[30:31]2548;2549; GFX8-LABEL: v_fdiv_f32_ieee:2550; GFX8: ; %bb.0:2551; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2552; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02553; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02554; GFX8-NEXT: v_rcp_f32_e32 v4, v22555; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.02556; GFX8-NEXT: v_fma_f32 v4, v5, v4, v42557; GFX8-NEXT: v_mul_f32_e32 v5, v3, v42558; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v32559; GFX8-NEXT: v_fma_f32 v5, v6, v4, v52560; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v32561; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v52562; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v02563; GFX8-NEXT: s_setpc_b64 s[30:31]2564;2565; GFX10-LABEL: v_fdiv_f32_ieee:2566; GFX10: ; %bb.0:2567; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2568; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v02569; GFX10-NEXT: v_rcp_f32_e32 v3, v22570; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.02571; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v32572; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02573; GFX10-NEXT: v_mul_f32_e32 v5, v4, v32574; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v42575; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v32576; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v42577; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v52578; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v02579; GFX10-NEXT: s_setpc_b64 s[30:31]2580;2581; GFX11-LABEL: v_fdiv_f32_ieee:2582; GFX11: ; %bb.0:2583; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2584; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v02585; GFX11-NEXT: v_rcp_f32_e32 v3, v22586; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2587; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.02588; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v32589; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02590; GFX11-NEXT: v_mul_f32_e32 v5, v4, v32591; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v42592; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v32593; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v42594; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v52595; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v02596; GFX11-NEXT: s_setpc_b64 s[30:31]2597;2598; EG-LABEL: v_fdiv_f32_ieee:2599; EG: ; %bb.0:2600; EG-NEXT: CF_END2601; EG-NEXT: PAD2602 %div = fdiv float %x, %y2603 ret float %div2604}2605 2606define float @v_fdiv_f32_ieee_25ulp(float %x, float %y) #1 {2607; GFX6-LABEL: v_fdiv_f32_ieee_25ulp:2608; GFX6: ; %bb.0:2609; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2610; GFX6-NEXT: s_mov_b32 s4, 0x7f8000002611; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v12612; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42613; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2614; GFX6-NEXT: v_rcp_f32_e32 v2, v22615; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v02616; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42617; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v12618; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc2619; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v02620; GFX6-NEXT: v_mul_f32_e32 v2, v3, v22621; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v12622; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v02623; GFX6-NEXT: s_setpc_b64 s[30:31]2624;2625; GFX7-LABEL: v_fdiv_f32_ieee_25ulp:2626; GFX7: ; %bb.0:2627; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2628; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v12629; GFX7-NEXT: v_rcp_f32_e32 v2, v22630; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v12631; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v02632; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v02633; GFX7-NEXT: v_mul_f32_e32 v0, v0, v22634; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v12635; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v12636; GFX7-NEXT: s_setpc_b64 s[30:31]2637;2638; GFX8-LABEL: v_fdiv_f32_ieee_25ulp:2639; GFX8: ; %bb.0:2640; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2641; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v12642; GFX8-NEXT: v_rcp_f32_e32 v2, v22643; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v12644; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v02645; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v02646; GFX8-NEXT: v_mul_f32_e32 v0, v0, v22647; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v12648; GFX8-NEXT: v_ldexp_f32 v0, v0, v12649; GFX8-NEXT: s_setpc_b64 s[30:31]2650;2651; GFX10-LABEL: v_fdiv_f32_ieee_25ulp:2652; GFX10: ; %bb.0:2653; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2654; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v12655; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v12656; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v02657; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v02658; GFX10-NEXT: v_rcp_f32_e32 v2, v22659; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v12660; GFX10-NEXT: v_mul_f32_e32 v2, v3, v22661; GFX10-NEXT: v_ldexp_f32 v0, v2, v02662; GFX10-NEXT: s_setpc_b64 s[30:31]2663;2664; GFX11-LABEL: v_fdiv_f32_ieee_25ulp:2665; GFX11: ; %bb.0:2666; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2667; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v12668; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v12669; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v02670; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v02671; GFX11-NEXT: v_rcp_f32_e32 v2, v22672; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v12673; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2674; GFX11-NEXT: v_mul_f32_e32 v2, v3, v22675; GFX11-NEXT: v_ldexp_f32 v0, v2, v02676; GFX11-NEXT: s_setpc_b64 s[30:31]2677;2678; EG-LABEL: v_fdiv_f32_ieee_25ulp:2679; EG: ; %bb.0:2680; EG-NEXT: CF_END2681; EG-NEXT: PAD2682 %div = fdiv float %x, %y, !fpmath !02683 ret float %div2684}2685 2686define float @v_fdiv_f32_dynamic(float %x, float %y) #2 {2687; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic:2688; GFX6-FASTFMA: ; %bb.0:2689; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2690; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02691; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v22692; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02693; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2694; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32695; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.02696; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v32697; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v32698; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v42699; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v52700; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v42701; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42702; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v52703; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02704; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]2705;2706; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic:2707; GFX6-SLOWFMA: ; %bb.0:2708; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2709; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02710; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02711; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2712; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v22713; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32714; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.02715; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v42716; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v42717; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v32718; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v52719; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v32720; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42721; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v52722; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02723; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]2724;2725; GFX7-LABEL: v_fdiv_f32_dynamic:2726; GFX7: ; %bb.0:2727; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2728; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02729; GFX7-NEXT: v_rcp_f32_e32 v3, v22730; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02731; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2732; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32733; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.02734; GFX7-NEXT: v_fma_f32 v3, v5, v3, v32735; GFX7-NEXT: v_mul_f32_e32 v5, v4, v32736; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v42737; GFX7-NEXT: v_fma_f32 v5, v6, v3, v52738; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v42739; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42740; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v52741; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v02742; GFX7-NEXT: s_setpc_b64 s[30:31]2743;2744; GFX8-LABEL: v_fdiv_f32_dynamic:2745; GFX8: ; %bb.0:2746; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2747; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02748; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02749; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2750; GFX8-NEXT: v_rcp_f32_e32 v4, v22751; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32752; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.02753; GFX8-NEXT: v_fma_f32 v4, v5, v4, v42754; GFX8-NEXT: v_mul_f32_e32 v5, v3, v42755; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v32756; GFX8-NEXT: v_fma_f32 v5, v6, v4, v52757; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v32758; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42759; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v52760; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v02761; GFX8-NEXT: s_setpc_b64 s[30:31]2762;2763; GFX10-LABEL: v_fdiv_f32_dynamic:2764; GFX10: ; %bb.0:2765; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2766; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v02767; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02768; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)2769; GFX10-NEXT: v_rcp_f32_e32 v3, v22770; GFX10-NEXT: s_denorm_mode 152771; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.02772; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v32773; GFX10-NEXT: v_mul_f32_e32 v5, v4, v32774; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v42775; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v32776; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v42777; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s42778; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v52779; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v02780; GFX10-NEXT: s_setpc_b64 s[30:31]2781;2782; GFX11-LABEL: v_fdiv_f32_dynamic:2783; GFX11: ; %bb.0:2784; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2785; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v02786; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02787; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)2788; GFX11-NEXT: v_rcp_f32_e32 v3, v22789; GFX11-NEXT: s_denorm_mode 152790; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2791; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.02792; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v32793; GFX11-NEXT: v_mul_f32_e32 v5, v4, v32794; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v42795; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v32796; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v42797; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s02798; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v52799; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v02800; GFX11-NEXT: s_setpc_b64 s[30:31]2801;2802; EG-LABEL: v_fdiv_f32_dynamic:2803; EG: ; %bb.0:2804; EG-NEXT: CF_END2805; EG-NEXT: PAD2806 %div = fdiv float %x, %y2807 ret float %div2808}2809 2810define float @v_fdiv_f32_dynamic_25ulp(float %x, float %y) #2 {2811; GFX6-LABEL: v_fdiv_f32_dynamic_25ulp:2812; GFX6: ; %bb.0:2813; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2814; GFX6-NEXT: s_mov_b32 s4, 0x7f8000002815; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v12816; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42817; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2818; GFX6-NEXT: v_rcp_f32_e32 v2, v22819; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v02820; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42821; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v12822; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc2823; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v02824; GFX6-NEXT: v_mul_f32_e32 v2, v3, v22825; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v12826; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v02827; GFX6-NEXT: s_setpc_b64 s[30:31]2828;2829; GFX7-LABEL: v_fdiv_f32_dynamic_25ulp:2830; GFX7: ; %bb.0:2831; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2832; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v12833; GFX7-NEXT: v_rcp_f32_e32 v2, v22834; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v12835; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v02836; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v02837; GFX7-NEXT: v_mul_f32_e32 v0, v0, v22838; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v12839; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v12840; GFX7-NEXT: s_setpc_b64 s[30:31]2841;2842; GFX8-LABEL: v_fdiv_f32_dynamic_25ulp:2843; GFX8: ; %bb.0:2844; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2845; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v12846; GFX8-NEXT: v_rcp_f32_e32 v2, v22847; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v12848; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v02849; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v02850; GFX8-NEXT: v_mul_f32_e32 v0, v0, v22851; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v12852; GFX8-NEXT: v_ldexp_f32 v0, v0, v12853; GFX8-NEXT: s_setpc_b64 s[30:31]2854;2855; GFX10-LABEL: v_fdiv_f32_dynamic_25ulp:2856; GFX10: ; %bb.0:2857; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2858; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v12859; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v12860; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v02861; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v02862; GFX10-NEXT: v_rcp_f32_e32 v2, v22863; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v12864; GFX10-NEXT: v_mul_f32_e32 v2, v3, v22865; GFX10-NEXT: v_ldexp_f32 v0, v2, v02866; GFX10-NEXT: s_setpc_b64 s[30:31]2867;2868; GFX11-LABEL: v_fdiv_f32_dynamic_25ulp:2869; GFX11: ; %bb.0:2870; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2871; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v12872; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v12873; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v02874; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v02875; GFX11-NEXT: v_rcp_f32_e32 v2, v22876; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v12877; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2878; GFX11-NEXT: v_mul_f32_e32 v2, v3, v22879; GFX11-NEXT: v_ldexp_f32 v0, v2, v02880; GFX11-NEXT: s_setpc_b64 s[30:31]2881;2882; EG-LABEL: v_fdiv_f32_dynamic_25ulp:2883; EG: ; %bb.0:2884; EG-NEXT: CF_END2885; EG-NEXT: PAD2886 %div = fdiv float %x, %y, !fpmath !02887 ret float %div2888}2889 2890define float @v_fdiv_f32_daz(float %x, float %y) #0 {2891; GFX6-FASTFMA-LABEL: v_fdiv_f32_daz:2892; GFX6-FASTFMA: ; %bb.0:2893; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2894; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02895; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v22896; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02897; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32898; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.02899; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v32900; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v32901; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v42902; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v52903; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v42904; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02905; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v52906; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02907; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]2908;2909; GFX6-SLOWFMA-LABEL: v_fdiv_f32_daz:2910; GFX6-SLOWFMA: ; %bb.0:2911; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2912; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02913; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02914; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v22915; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32916; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.02917; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v42918; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v42919; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v32920; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v52921; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v32922; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02923; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v52924; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v02925; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]2926;2927; GFX7-LABEL: v_fdiv_f32_daz:2928; GFX7: ; %bb.0:2929; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2930; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02931; GFX7-NEXT: v_rcp_f32_e32 v3, v22932; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v02933; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32934; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.02935; GFX7-NEXT: v_fma_f32 v3, v5, v3, v32936; GFX7-NEXT: v_mul_f32_e32 v5, v4, v32937; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v42938; GFX7-NEXT: v_fma_f32 v5, v6, v3, v52939; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v42940; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02941; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v52942; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v02943; GFX7-NEXT: s_setpc_b64 s[30:31]2944;2945; GFX8-LABEL: v_fdiv_f32_daz:2946; GFX8: ; %bb.0:2947; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2948; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v02949; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v02950; GFX8-NEXT: v_rcp_f32_e32 v4, v22951; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 32952; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.02953; GFX8-NEXT: v_fma_f32 v4, v5, v4, v42954; GFX8-NEXT: v_mul_f32_e32 v5, v3, v42955; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v32956; GFX8-NEXT: v_fma_f32 v5, v6, v4, v52957; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v32958; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 02959; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v52960; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v02961; GFX8-NEXT: s_setpc_b64 s[30:31]2962;2963; GFX10-LABEL: v_fdiv_f32_daz:2964; GFX10: ; %bb.0:2965; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2966; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v02967; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02968; GFX10-NEXT: v_rcp_f32_e32 v3, v22969; GFX10-NEXT: s_denorm_mode 152970; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.02971; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v32972; GFX10-NEXT: v_mul_f32_e32 v5, v4, v32973; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v42974; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v32975; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v42976; GFX10-NEXT: s_denorm_mode 122977; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v52978; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v02979; GFX10-NEXT: s_setpc_b64 s[30:31]2980;2981; GFX11-LABEL: v_fdiv_f32_daz:2982; GFX11: ; %bb.0:2983; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2984; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v02985; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v02986; GFX11-NEXT: v_rcp_f32_e32 v3, v22987; GFX11-NEXT: s_denorm_mode 152988; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)2989; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.02990; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v32991; GFX11-NEXT: v_mul_f32_e32 v5, v4, v32992; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v42993; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v32994; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v42995; GFX11-NEXT: s_denorm_mode 122996; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v52997; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v02998; GFX11-NEXT: s_setpc_b64 s[30:31]2999;3000; EG-LABEL: v_fdiv_f32_daz:3001; EG: ; %bb.0:3002; EG-NEXT: CF_END3003; EG-NEXT: PAD3004 %div = fdiv float %x, %y3005 ret float %div3006}3007 3008define float @v_fdiv_f32_daz_25ulp(float %x, float %y) #0 {3009; GFX678-LABEL: v_fdiv_f32_daz_25ulp:3010; GFX678: ; %bb.0:3011; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3012; GFX678-NEXT: s_mov_b32 s4, 0x6f8000003013; GFX678-NEXT: v_mov_b32_e32 v2, 0x2f8000003014; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s43015; GFX678-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc3016; GFX678-NEXT: v_mul_f32_e32 v1, v1, v23017; GFX678-NEXT: v_rcp_f32_e32 v1, v13018; GFX678-NEXT: v_mul_f32_e32 v0, v0, v13019; GFX678-NEXT: v_mul_f32_e32 v0, v2, v03020; GFX678-NEXT: s_setpc_b64 s[30:31]3021;3022; GFX10-LABEL: v_fdiv_f32_daz_25ulp:3023; GFX10: ; %bb.0:3024; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3025; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|3026; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s43027; GFX10-NEXT: v_mul_f32_e32 v1, v1, v23028; GFX10-NEXT: v_rcp_f32_e32 v1, v13029; GFX10-NEXT: v_mul_f32_e32 v0, v0, v13030; GFX10-NEXT: v_mul_f32_e32 v0, v2, v03031; GFX10-NEXT: s_setpc_b64 s[30:31]3032;3033; GFX11-LABEL: v_fdiv_f32_daz_25ulp:3034; GFX11: ; %bb.0:3035; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3036; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|3037; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s03038; GFX11-NEXT: v_mul_f32_e32 v1, v1, v23039; GFX11-NEXT: v_rcp_f32_e32 v1, v13040; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3041; GFX11-NEXT: v_mul_f32_e32 v0, v0, v13042; GFX11-NEXT: v_mul_f32_e32 v0, v2, v03043; GFX11-NEXT: s_setpc_b64 s[30:31]3044;3045; EG-LABEL: v_fdiv_f32_daz_25ulp:3046; EG: ; %bb.0:3047; EG-NEXT: CF_END3048; EG-NEXT: PAD3049 %div = fdiv float %x, %y, !fpmath !03050 ret float %div3051}3052 3053; If we emit an fmul, make sure it fuses into the user.3054define float @v_fdiv_f32_ieee_contractable_user(float %x, float %y, float %z) #1 {3055; GFX6-FASTFMA-LABEL: v_fdiv_f32_ieee_contractable_user:3056; GFX6-FASTFMA: ; %bb.0:3057; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3058; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03059; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v33060; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v3, v4, 1.03061; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v4, v43062; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v03063; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v5, v43064; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v3, v6, v53065; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v4, v63066; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v3, v6, v53067; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v3, v3, v4, v63068; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v03069; GFX6-FASTFMA-NEXT: v_add_f32_e32 v0, v0, v23070; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]3071;3072; GFX6-SLOWFMA-LABEL: v_fdiv_f32_ieee_contractable_user:3073; GFX6-SLOWFMA: ; %bb.0:3074; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3075; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03076; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03077; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v33078; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v3, v5, 1.03079; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v5, v53080; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v53081; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v3, v6, v43082; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v5, v63083; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v3, v6, v43084; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v3, v3, v5, v63085; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v03086; GFX6-SLOWFMA-NEXT: v_add_f32_e32 v0, v0, v23087; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]3088;3089; GFX7-LABEL: v_fdiv_f32_ieee_contractable_user:3090; GFX7: ; %bb.0:3091; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3092; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03093; GFX7-NEXT: v_rcp_f32_e32 v4, v33094; GFX7-NEXT: v_fma_f32 v5, -v3, v4, 1.03095; GFX7-NEXT: v_fma_f32 v4, v5, v4, v43096; GFX7-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v03097; GFX7-NEXT: v_mul_f32_e32 v6, v5, v43098; GFX7-NEXT: v_fma_f32 v7, -v3, v6, v53099; GFX7-NEXT: v_fma_f32 v6, v7, v4, v63100; GFX7-NEXT: v_fma_f32 v3, -v3, v6, v53101; GFX7-NEXT: v_div_fmas_f32 v3, v3, v4, v63102; GFX7-NEXT: v_div_fixup_f32 v0, v3, v1, v03103; GFX7-NEXT: v_add_f32_e32 v0, v0, v23104; GFX7-NEXT: s_setpc_b64 s[30:31]3105;3106; GFX8-LABEL: v_fdiv_f32_ieee_contractable_user:3107; GFX8: ; %bb.0:3108; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3109; GFX8-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03110; GFX8-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03111; GFX8-NEXT: v_rcp_f32_e32 v5, v33112; GFX8-NEXT: v_fma_f32 v6, -v3, v5, 1.03113; GFX8-NEXT: v_fma_f32 v5, v6, v5, v53114; GFX8-NEXT: v_mul_f32_e32 v6, v4, v53115; GFX8-NEXT: v_fma_f32 v7, -v3, v6, v43116; GFX8-NEXT: v_fma_f32 v6, v7, v5, v63117; GFX8-NEXT: v_fma_f32 v3, -v3, v6, v43118; GFX8-NEXT: v_div_fmas_f32 v3, v3, v5, v63119; GFX8-NEXT: v_div_fixup_f32 v0, v3, v1, v03120; GFX8-NEXT: v_add_f32_e32 v0, v0, v23121; GFX8-NEXT: s_setpc_b64 s[30:31]3122;3123; GFX10-LABEL: v_fdiv_f32_ieee_contractable_user:3124; GFX10: ; %bb.0:3125; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3126; GFX10-NEXT: v_div_scale_f32 v3, s4, v1, v1, v03127; GFX10-NEXT: v_rcp_f32_e32 v4, v33128; GFX10-NEXT: v_fma_f32 v5, -v3, v4, 1.03129; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v43130; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v03131; GFX10-NEXT: v_mul_f32_e32 v6, v5, v43132; GFX10-NEXT: v_fma_f32 v7, -v3, v6, v53133; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v43134; GFX10-NEXT: v_fma_f32 v3, -v3, v6, v53135; GFX10-NEXT: v_div_fmas_f32 v3, v3, v4, v63136; GFX10-NEXT: v_div_fixup_f32 v0, v3, v1, v03137; GFX10-NEXT: v_add_f32_e32 v0, v0, v23138; GFX10-NEXT: s_setpc_b64 s[30:31]3139;3140; GFX11-LABEL: v_fdiv_f32_ieee_contractable_user:3141; GFX11: ; %bb.0:3142; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3143; GFX11-NEXT: v_div_scale_f32 v3, null, v1, v1, v03144; GFX11-NEXT: v_rcp_f32_e32 v4, v33145; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3146; GFX11-NEXT: v_fma_f32 v5, -v3, v4, 1.03147; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v43148; GFX11-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v03149; GFX11-NEXT: v_mul_f32_e32 v6, v5, v43150; GFX11-NEXT: v_fma_f32 v7, -v3, v6, v53151; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v43152; GFX11-NEXT: v_fma_f32 v3, -v3, v6, v53153; GFX11-NEXT: v_div_fmas_f32 v3, v3, v4, v63154; GFX11-NEXT: v_div_fixup_f32 v0, v3, v1, v03155; GFX11-NEXT: v_add_f32_e32 v0, v0, v23156; GFX11-NEXT: s_setpc_b64 s[30:31]3157;3158; EG-LABEL: v_fdiv_f32_ieee_contractable_user:3159; EG: ; %bb.0:3160; EG-NEXT: CF_END3161; EG-NEXT: PAD3162 %div = fdiv contract float %x, %y3163 %add = fadd contract float %div, %z3164 ret float %add3165}3166 3167define float @v_fdiv_f32_ieee_25ulp_contractable_user(float %x, float %y, float %z) #1 {3168; GFX6-LABEL: v_fdiv_f32_ieee_25ulp_contractable_user:3169; GFX6: ; %bb.0:3170; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3171; GFX6-NEXT: s_mov_b32 s4, 0x7f8000003172; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v13173; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s43174; GFX6-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc3175; GFX6-NEXT: v_rcp_f32_e32 v3, v33176; GFX6-NEXT: v_frexp_mant_f32_e32 v4, v03177; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43178; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v13179; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc3180; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v03181; GFX6-NEXT: v_mul_f32_e32 v3, v4, v33182; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v13183; GFX6-NEXT: v_ldexp_f32_e32 v0, v3, v03184; GFX6-NEXT: v_add_f32_e32 v0, v0, v23185; GFX6-NEXT: s_setpc_b64 s[30:31]3186;3187; GFX7-LABEL: v_fdiv_f32_ieee_25ulp_contractable_user:3188; GFX7: ; %bb.0:3189; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3190; GFX7-NEXT: v_frexp_mant_f32_e32 v3, v13191; GFX7-NEXT: v_rcp_f32_e32 v3, v33192; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v13193; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v4, v03194; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v03195; GFX7-NEXT: v_mul_f32_e32 v0, v0, v33196; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v4, v13197; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v13198; GFX7-NEXT: v_add_f32_e32 v0, v0, v23199; GFX7-NEXT: s_setpc_b64 s[30:31]3200;3201; GFX8-LABEL: v_fdiv_f32_ieee_25ulp_contractable_user:3202; GFX8: ; %bb.0:3203; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3204; GFX8-NEXT: v_frexp_mant_f32_e32 v3, v13205; GFX8-NEXT: v_rcp_f32_e32 v3, v33206; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v13207; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v4, v03208; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v03209; GFX8-NEXT: v_mul_f32_e32 v0, v0, v33210; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v4, v13211; GFX8-NEXT: v_ldexp_f32 v0, v0, v13212; GFX8-NEXT: v_add_f32_e32 v0, v0, v23213; GFX8-NEXT: s_setpc_b64 s[30:31]3214;3215; GFX10-LABEL: v_fdiv_f32_ieee_25ulp_contractable_user:3216; GFX10: ; %bb.0:3217; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3218; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v13219; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v13220; GFX10-NEXT: v_frexp_mant_f32_e32 v4, v03221; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v03222; GFX10-NEXT: v_rcp_f32_e32 v3, v33223; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v13224; GFX10-NEXT: v_mul_f32_e32 v3, v4, v33225; GFX10-NEXT: v_ldexp_f32 v0, v3, v03226; GFX10-NEXT: v_add_f32_e32 v0, v0, v23227; GFX10-NEXT: s_setpc_b64 s[30:31]3228;3229; GFX11-LABEL: v_fdiv_f32_ieee_25ulp_contractable_user:3230; GFX11: ; %bb.0:3231; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3232; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v13233; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v13234; GFX11-NEXT: v_frexp_mant_f32_e32 v4, v03235; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v03236; GFX11-NEXT: v_rcp_f32_e32 v3, v33237; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v13238; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3239; GFX11-NEXT: v_mul_f32_e32 v3, v4, v33240; GFX11-NEXT: v_ldexp_f32 v0, v3, v03241; GFX11-NEXT: v_add_f32_e32 v0, v0, v23242; GFX11-NEXT: s_setpc_b64 s[30:31]3243;3244; EG-LABEL: v_fdiv_f32_ieee_25ulp_contractable_user:3245; EG: ; %bb.0:3246; EG-NEXT: CF_END3247; EG-NEXT: PAD3248 %div = fdiv contract float %x, %y, !fpmath !03249 %add = fadd contract float %div, %z3250 ret float %add3251}3252 3253define float @v_fdiv_f32_dynamic_contractable_user(float %x, float %y, float %z) #2 {3254; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic_contractable_user:3255; GFX6-FASTFMA: ; %bb.0:3256; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3257; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03258; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v33259; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v03260; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3261; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33262; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v3, v4, 1.03263; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v6, v4, v43264; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v5, v43265; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v3, v6, v53266; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v4, v63267; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v3, v6, v53268; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43269; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v3, v3, v4, v63270; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v03271; GFX6-FASTFMA-NEXT: v_add_f32_e32 v0, v0, v23272; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]3273;3274; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic_contractable_user:3275; GFX6-SLOWFMA: ; %bb.0:3276; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3277; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03278; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03279; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3280; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v33281; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33282; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v3, v5, 1.03283; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v5, v53284; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v53285; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v3, v6, v43286; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v5, v63287; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v3, v6, v43288; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43289; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v3, v3, v5, v63290; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v03291; GFX6-SLOWFMA-NEXT: v_add_f32_e32 v0, v0, v23292; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]3293;3294; GFX7-LABEL: v_fdiv_f32_dynamic_contractable_user:3295; GFX7: ; %bb.0:3296; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3297; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03298; GFX7-NEXT: v_rcp_f32_e32 v4, v33299; GFX7-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v03300; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3301; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33302; GFX7-NEXT: v_fma_f32 v6, -v3, v4, 1.03303; GFX7-NEXT: v_fma_f32 v4, v6, v4, v43304; GFX7-NEXT: v_mul_f32_e32 v6, v5, v43305; GFX7-NEXT: v_fma_f32 v7, -v3, v6, v53306; GFX7-NEXT: v_fma_f32 v6, v7, v4, v63307; GFX7-NEXT: v_fma_f32 v3, -v3, v6, v53308; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43309; GFX7-NEXT: v_div_fmas_f32 v3, v3, v4, v63310; GFX7-NEXT: v_div_fixup_f32 v0, v3, v1, v03311; GFX7-NEXT: v_add_f32_e32 v0, v0, v23312; GFX7-NEXT: s_setpc_b64 s[30:31]3313;3314; GFX8-LABEL: v_fdiv_f32_dynamic_contractable_user:3315; GFX8: ; %bb.0:3316; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3317; GFX8-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03318; GFX8-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03319; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3320; GFX8-NEXT: v_rcp_f32_e32 v5, v33321; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33322; GFX8-NEXT: v_fma_f32 v6, -v3, v5, 1.03323; GFX8-NEXT: v_fma_f32 v5, v6, v5, v53324; GFX8-NEXT: v_mul_f32_e32 v6, v4, v53325; GFX8-NEXT: v_fma_f32 v7, -v3, v6, v43326; GFX8-NEXT: v_fma_f32 v6, v7, v5, v63327; GFX8-NEXT: v_fma_f32 v3, -v3, v6, v43328; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43329; GFX8-NEXT: v_div_fmas_f32 v3, v3, v5, v63330; GFX8-NEXT: v_div_fixup_f32 v0, v3, v1, v03331; GFX8-NEXT: v_add_f32_e32 v0, v0, v23332; GFX8-NEXT: s_setpc_b64 s[30:31]3333;3334; GFX10-LABEL: v_fdiv_f32_dynamic_contractable_user:3335; GFX10: ; %bb.0:3336; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3337; GFX10-NEXT: v_div_scale_f32 v3, s4, v1, v1, v03338; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v03339; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3340; GFX10-NEXT: v_rcp_f32_e32 v4, v33341; GFX10-NEXT: s_denorm_mode 153342; GFX10-NEXT: v_fma_f32 v6, -v3, v4, 1.03343; GFX10-NEXT: v_fmac_f32_e32 v4, v6, v43344; GFX10-NEXT: v_mul_f32_e32 v6, v5, v43345; GFX10-NEXT: v_fma_f32 v7, -v3, v6, v53346; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v43347; GFX10-NEXT: v_fma_f32 v3, -v3, v6, v53348; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43349; GFX10-NEXT: v_div_fmas_f32 v3, v3, v4, v63350; GFX10-NEXT: v_div_fixup_f32 v0, v3, v1, v03351; GFX10-NEXT: v_add_f32_e32 v0, v0, v23352; GFX10-NEXT: s_setpc_b64 s[30:31]3353;3354; GFX11-LABEL: v_fdiv_f32_dynamic_contractable_user:3355; GFX11: ; %bb.0:3356; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3357; GFX11-NEXT: v_div_scale_f32 v3, null, v1, v1, v03358; GFX11-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v03359; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)3360; GFX11-NEXT: v_rcp_f32_e32 v4, v33361; GFX11-NEXT: s_denorm_mode 153362; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3363; GFX11-NEXT: v_fma_f32 v6, -v3, v4, 1.03364; GFX11-NEXT: v_fmac_f32_e32 v4, v6, v43365; GFX11-NEXT: v_mul_f32_e32 v6, v5, v43366; GFX11-NEXT: v_fma_f32 v7, -v3, v6, v53367; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v43368; GFX11-NEXT: v_fma_f32 v3, -v3, v6, v53369; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s03370; GFX11-NEXT: v_div_fmas_f32 v3, v3, v4, v63371; GFX11-NEXT: v_div_fixup_f32 v0, v3, v1, v03372; GFX11-NEXT: v_add_f32_e32 v0, v0, v23373; GFX11-NEXT: s_setpc_b64 s[30:31]3374;3375; EG-LABEL: v_fdiv_f32_dynamic_contractable_user:3376; EG: ; %bb.0:3377; EG-NEXT: CF_END3378; EG-NEXT: PAD3379 %div = fdiv contract float %x, %y3380 %add = fadd contract float %div, %z3381 ret float %add3382}3383 3384define float @v_fdiv_f32_dynamic_25ulp_contractable_user(float %x, float %y, float %z) #2 {3385; GFX6-LABEL: v_fdiv_f32_dynamic_25ulp_contractable_user:3386; GFX6: ; %bb.0:3387; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3388; GFX6-NEXT: s_mov_b32 s4, 0x7f8000003389; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v13390; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s43391; GFX6-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc3392; GFX6-NEXT: v_rcp_f32_e32 v3, v33393; GFX6-NEXT: v_frexp_mant_f32_e32 v4, v03394; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43395; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v13396; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc3397; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v03398; GFX6-NEXT: v_mul_f32_e32 v3, v4, v33399; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v13400; GFX6-NEXT: v_ldexp_f32_e32 v0, v3, v03401; GFX6-NEXT: v_add_f32_e32 v0, v0, v23402; GFX6-NEXT: s_setpc_b64 s[30:31]3403;3404; GFX7-LABEL: v_fdiv_f32_dynamic_25ulp_contractable_user:3405; GFX7: ; %bb.0:3406; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3407; GFX7-NEXT: v_frexp_mant_f32_e32 v3, v13408; GFX7-NEXT: v_rcp_f32_e32 v3, v33409; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v13410; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v4, v03411; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v03412; GFX7-NEXT: v_mul_f32_e32 v0, v0, v33413; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v4, v13414; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v13415; GFX7-NEXT: v_add_f32_e32 v0, v0, v23416; GFX7-NEXT: s_setpc_b64 s[30:31]3417;3418; GFX8-LABEL: v_fdiv_f32_dynamic_25ulp_contractable_user:3419; GFX8: ; %bb.0:3420; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3421; GFX8-NEXT: v_frexp_mant_f32_e32 v3, v13422; GFX8-NEXT: v_rcp_f32_e32 v3, v33423; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v13424; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v4, v03425; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v03426; GFX8-NEXT: v_mul_f32_e32 v0, v0, v33427; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v4, v13428; GFX8-NEXT: v_ldexp_f32 v0, v0, v13429; GFX8-NEXT: v_add_f32_e32 v0, v0, v23430; GFX8-NEXT: s_setpc_b64 s[30:31]3431;3432; GFX10-LABEL: v_fdiv_f32_dynamic_25ulp_contractable_user:3433; GFX10: ; %bb.0:3434; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3435; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v13436; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v13437; GFX10-NEXT: v_frexp_mant_f32_e32 v4, v03438; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v03439; GFX10-NEXT: v_rcp_f32_e32 v3, v33440; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v13441; GFX10-NEXT: v_mul_f32_e32 v3, v4, v33442; GFX10-NEXT: v_ldexp_f32 v0, v3, v03443; GFX10-NEXT: v_add_f32_e32 v0, v0, v23444; GFX10-NEXT: s_setpc_b64 s[30:31]3445;3446; GFX11-LABEL: v_fdiv_f32_dynamic_25ulp_contractable_user:3447; GFX11: ; %bb.0:3448; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3449; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v13450; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v13451; GFX11-NEXT: v_frexp_mant_f32_e32 v4, v03452; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v03453; GFX11-NEXT: v_rcp_f32_e32 v3, v33454; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v13455; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3456; GFX11-NEXT: v_mul_f32_e32 v3, v4, v33457; GFX11-NEXT: v_ldexp_f32 v0, v3, v03458; GFX11-NEXT: v_add_f32_e32 v0, v0, v23459; GFX11-NEXT: s_setpc_b64 s[30:31]3460;3461; EG-LABEL: v_fdiv_f32_dynamic_25ulp_contractable_user:3462; EG: ; %bb.0:3463; EG-NEXT: CF_END3464; EG-NEXT: PAD3465 %div = fdiv contract float %x, %y, !fpmath !03466 %add = fadd contract float %div, %z3467 ret float %add3468}3469 3470define float @v_fdiv_f32_daz_contractable_user(float %x, float %y, float %z) #0 {3471; GFX6-FASTFMA-LABEL: v_fdiv_f32_daz_contractable_user:3472; GFX6-FASTFMA: ; %bb.0:3473; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3474; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03475; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v33476; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v03477; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33478; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v3, v4, 1.03479; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v6, v4, v43480; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v5, v43481; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v3, v6, v53482; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v4, v63483; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v3, v6, v53484; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 03485; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v3, v3, v4, v63486; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v03487; GFX6-FASTFMA-NEXT: v_add_f32_e32 v0, v0, v23488; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]3489;3490; GFX6-SLOWFMA-LABEL: v_fdiv_f32_daz_contractable_user:3491; GFX6-SLOWFMA: ; %bb.0:3492; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3493; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03494; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03495; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v33496; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33497; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v3, v5, 1.03498; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v5, v53499; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v53500; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v3, v6, v43501; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v5, v63502; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v3, v6, v43503; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 03504; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v3, v3, v5, v63505; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v03506; GFX6-SLOWFMA-NEXT: v_add_f32_e32 v0, v0, v23507; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]3508;3509; GFX7-LABEL: v_fdiv_f32_daz_contractable_user:3510; GFX7: ; %bb.0:3511; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3512; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03513; GFX7-NEXT: v_rcp_f32_e32 v4, v33514; GFX7-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v03515; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33516; GFX7-NEXT: v_fma_f32 v6, -v3, v4, 1.03517; GFX7-NEXT: v_fma_f32 v4, v6, v4, v43518; GFX7-NEXT: v_mul_f32_e32 v6, v5, v43519; GFX7-NEXT: v_fma_f32 v7, -v3, v6, v53520; GFX7-NEXT: v_fma_f32 v6, v7, v4, v63521; GFX7-NEXT: v_fma_f32 v3, -v3, v6, v53522; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 03523; GFX7-NEXT: v_div_fmas_f32 v3, v3, v4, v63524; GFX7-NEXT: v_div_fixup_f32 v0, v3, v1, v03525; GFX7-NEXT: v_add_f32_e32 v0, v0, v23526; GFX7-NEXT: s_setpc_b64 s[30:31]3527;3528; GFX8-LABEL: v_fdiv_f32_daz_contractable_user:3529; GFX8: ; %bb.0:3530; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3531; GFX8-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v03532; GFX8-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03533; GFX8-NEXT: v_rcp_f32_e32 v5, v33534; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33535; GFX8-NEXT: v_fma_f32 v6, -v3, v5, 1.03536; GFX8-NEXT: v_fma_f32 v5, v6, v5, v53537; GFX8-NEXT: v_mul_f32_e32 v6, v4, v53538; GFX8-NEXT: v_fma_f32 v7, -v3, v6, v43539; GFX8-NEXT: v_fma_f32 v6, v7, v5, v63540; GFX8-NEXT: v_fma_f32 v3, -v3, v6, v43541; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 03542; GFX8-NEXT: v_div_fmas_f32 v3, v3, v5, v63543; GFX8-NEXT: v_div_fixup_f32 v0, v3, v1, v03544; GFX8-NEXT: v_add_f32_e32 v0, v0, v23545; GFX8-NEXT: s_setpc_b64 s[30:31]3546;3547; GFX10-LABEL: v_fdiv_f32_daz_contractable_user:3548; GFX10: ; %bb.0:3549; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3550; GFX10-NEXT: v_div_scale_f32 v3, s4, v1, v1, v03551; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v03552; GFX10-NEXT: v_rcp_f32_e32 v4, v33553; GFX10-NEXT: s_denorm_mode 153554; GFX10-NEXT: v_fma_f32 v6, -v3, v4, 1.03555; GFX10-NEXT: v_fmac_f32_e32 v4, v6, v43556; GFX10-NEXT: v_mul_f32_e32 v6, v5, v43557; GFX10-NEXT: v_fma_f32 v7, -v3, v6, v53558; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v43559; GFX10-NEXT: v_fma_f32 v3, -v3, v6, v53560; GFX10-NEXT: s_denorm_mode 123561; GFX10-NEXT: v_div_fmas_f32 v3, v3, v4, v63562; GFX10-NEXT: v_div_fixup_f32 v0, v3, v1, v03563; GFX10-NEXT: v_add_f32_e32 v0, v0, v23564; GFX10-NEXT: s_setpc_b64 s[30:31]3565;3566; GFX11-LABEL: v_fdiv_f32_daz_contractable_user:3567; GFX11: ; %bb.0:3568; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3569; GFX11-NEXT: v_div_scale_f32 v3, null, v1, v1, v03570; GFX11-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v03571; GFX11-NEXT: v_rcp_f32_e32 v4, v33572; GFX11-NEXT: s_denorm_mode 153573; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3574; GFX11-NEXT: v_fma_f32 v6, -v3, v4, 1.03575; GFX11-NEXT: v_fmac_f32_e32 v4, v6, v43576; GFX11-NEXT: v_mul_f32_e32 v6, v5, v43577; GFX11-NEXT: v_fma_f32 v7, -v3, v6, v53578; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v43579; GFX11-NEXT: v_fma_f32 v3, -v3, v6, v53580; GFX11-NEXT: s_denorm_mode 123581; GFX11-NEXT: v_div_fmas_f32 v3, v3, v4, v63582; GFX11-NEXT: v_div_fixup_f32 v0, v3, v1, v03583; GFX11-NEXT: v_add_f32_e32 v0, v0, v23584; GFX11-NEXT: s_setpc_b64 s[30:31]3585;3586; EG-LABEL: v_fdiv_f32_daz_contractable_user:3587; EG: ; %bb.0:3588; EG-NEXT: CF_END3589; EG-NEXT: PAD3590 %div = fdiv contract float %x, %y3591 %add = fadd contract float %div, %z3592 ret float %add3593}3594 3595define float @v_fdiv_f32_daz_25ulp_contractable_user(float %x, float %y, float %z) #0 {3596; GFX678-LABEL: v_fdiv_f32_daz_25ulp_contractable_user:3597; GFX678: ; %bb.0:3598; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3599; GFX678-NEXT: s_mov_b32 s4, 0x6f8000003600; GFX678-NEXT: v_mov_b32_e32 v3, 0x2f8000003601; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s43602; GFX678-NEXT: v_cndmask_b32_e32 v3, 1.0, v3, vcc3603; GFX678-NEXT: v_mul_f32_e32 v1, v1, v33604; GFX678-NEXT: v_rcp_f32_e32 v1, v13605; GFX678-NEXT: v_mul_f32_e32 v0, v0, v13606; GFX678-NEXT: v_mad_f32 v0, v3, v0, v23607; GFX678-NEXT: s_setpc_b64 s[30:31]3608;3609; GFX10-LABEL: v_fdiv_f32_daz_25ulp_contractable_user:3610; GFX10: ; %bb.0:3611; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3612; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|3613; GFX10-NEXT: v_cndmask_b32_e64 v3, 1.0, 0x2f800000, s43614; GFX10-NEXT: v_mul_f32_e32 v1, v1, v33615; GFX10-NEXT: v_rcp_f32_e32 v1, v13616; GFX10-NEXT: v_mul_f32_e32 v0, v0, v13617; GFX10-NEXT: v_mad_f32 v0, v3, v0, v23618; GFX10-NEXT: s_setpc_b64 s[30:31]3619;3620; GFX11-LABEL: v_fdiv_f32_daz_25ulp_contractable_user:3621; GFX11: ; %bb.0:3622; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3623; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|3624; GFX11-NEXT: v_cndmask_b32_e64 v3, 1.0, 0x2f800000, s03625; GFX11-NEXT: v_mul_f32_e32 v1, v1, v33626; GFX11-NEXT: v_rcp_f32_e32 v1, v13627; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3628; GFX11-NEXT: v_mul_f32_e32 v0, v0, v13629; GFX11-NEXT: v_fma_f32 v0, v3, v0, v23630; GFX11-NEXT: s_setpc_b64 s[30:31]3631;3632; EG-LABEL: v_fdiv_f32_daz_25ulp_contractable_user:3633; EG: ; %bb.0:3634; EG-NEXT: CF_END3635; EG-NEXT: PAD3636 %div = fdiv contract float %x, %y, !fpmath !03637 %add = fadd contract float %div, %z3638 ret float %add3639}3640 3641define float @v_fdiv_f32_ieee__nnan_ninf(float %x, float %y, float %z) #1 {3642; GFX6-FASTFMA-LABEL: v_fdiv_f32_ieee__nnan_ninf:3643; GFX6-FASTFMA: ; %bb.0:3644; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3645; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03646; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v23647; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.03648; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v33649; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03650; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v33651; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v43652; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v53653; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v43654; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v53655; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v03656; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]3657;3658; GFX6-SLOWFMA-LABEL: v_fdiv_f32_ieee__nnan_ninf:3659; GFX6-SLOWFMA: ; %bb.0:3660; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3661; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03662; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v03663; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v23664; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.03665; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v43666; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v43667; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v33668; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v53669; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v33670; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v53671; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v03672; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]3673;3674; GFX7-LABEL: v_fdiv_f32_ieee__nnan_ninf:3675; GFX7: ; %bb.0:3676; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3677; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03678; GFX7-NEXT: v_rcp_f32_e32 v3, v23679; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.03680; GFX7-NEXT: v_fma_f32 v3, v4, v3, v33681; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03682; GFX7-NEXT: v_mul_f32_e32 v5, v4, v33683; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v43684; GFX7-NEXT: v_fma_f32 v5, v6, v3, v53685; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v43686; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v53687; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v03688; GFX7-NEXT: s_setpc_b64 s[30:31]3689;3690; GFX8-LABEL: v_fdiv_f32_ieee__nnan_ninf:3691; GFX8: ; %bb.0:3692; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3693; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03694; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v03695; GFX8-NEXT: v_rcp_f32_e32 v4, v23696; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.03697; GFX8-NEXT: v_fma_f32 v4, v5, v4, v43698; GFX8-NEXT: v_mul_f32_e32 v5, v3, v43699; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v33700; GFX8-NEXT: v_fma_f32 v5, v6, v4, v53701; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v33702; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v53703; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v03704; GFX8-NEXT: s_setpc_b64 s[30:31]3705;3706; GFX10-LABEL: v_fdiv_f32_ieee__nnan_ninf:3707; GFX10: ; %bb.0:3708; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3709; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v03710; GFX10-NEXT: v_rcp_f32_e32 v3, v23711; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.03712; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v33713; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v03714; GFX10-NEXT: v_mul_f32_e32 v5, v4, v33715; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v43716; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v33717; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v43718; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v53719; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v03720; GFX10-NEXT: s_setpc_b64 s[30:31]3721;3722; GFX11-LABEL: v_fdiv_f32_ieee__nnan_ninf:3723; GFX11: ; %bb.0:3724; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3725; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v03726; GFX11-NEXT: v_rcp_f32_e32 v3, v23727; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3728; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.03729; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v33730; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v03731; GFX11-NEXT: v_mul_f32_e32 v5, v4, v33732; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v43733; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v33734; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v43735; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v53736; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v03737; GFX11-NEXT: s_setpc_b64 s[30:31]3738;3739; EG-LABEL: v_fdiv_f32_ieee__nnan_ninf:3740; EG: ; %bb.0:3741; EG-NEXT: CF_END3742; EG-NEXT: PAD3743 %div = fdiv nnan ninf float %x, %y3744 ret float %div3745}3746 3747define float @v_fdiv_f32_ieee_25ulp__nnan_ninf(float %x, float %y, float %z) #1 {3748; GFX6-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf:3749; GFX6: ; %bb.0:3750; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3751; GFX6-NEXT: s_mov_b32 s4, 0x7f8000003752; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v13753; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s43754; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc3755; GFX6-NEXT: v_rcp_f32_e32 v2, v23756; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v03757; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43758; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v13759; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc3760; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v03761; GFX6-NEXT: v_mul_f32_e32 v2, v3, v23762; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v13763; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v03764; GFX6-NEXT: s_setpc_b64 s[30:31]3765;3766; GFX7-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf:3767; GFX7: ; %bb.0:3768; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3769; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v13770; GFX7-NEXT: v_rcp_f32_e32 v2, v23771; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v13772; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v03773; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v03774; GFX7-NEXT: v_mul_f32_e32 v0, v0, v23775; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v13776; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v13777; GFX7-NEXT: s_setpc_b64 s[30:31]3778;3779; GFX8-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf:3780; GFX8: ; %bb.0:3781; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3782; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v13783; GFX8-NEXT: v_rcp_f32_e32 v2, v23784; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v13785; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v03786; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v03787; GFX8-NEXT: v_mul_f32_e32 v0, v0, v23788; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v13789; GFX8-NEXT: v_ldexp_f32 v0, v0, v13790; GFX8-NEXT: s_setpc_b64 s[30:31]3791;3792; GFX10-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf:3793; GFX10: ; %bb.0:3794; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3795; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v13796; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v13797; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v03798; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v03799; GFX10-NEXT: v_rcp_f32_e32 v2, v23800; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v13801; GFX10-NEXT: v_mul_f32_e32 v2, v3, v23802; GFX10-NEXT: v_ldexp_f32 v0, v2, v03803; GFX10-NEXT: s_setpc_b64 s[30:31]3804;3805; GFX11-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf:3806; GFX11: ; %bb.0:3807; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3808; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v13809; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v13810; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v03811; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v03812; GFX11-NEXT: v_rcp_f32_e32 v2, v23813; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v13814; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3815; GFX11-NEXT: v_mul_f32_e32 v2, v3, v23816; GFX11-NEXT: v_ldexp_f32 v0, v2, v03817; GFX11-NEXT: s_setpc_b64 s[30:31]3818;3819; EG-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf:3820; EG: ; %bb.0:3821; EG-NEXT: CF_END3822; EG-NEXT: PAD3823 %div = fdiv nnan ninf float %x, %y, !fpmath !03824 ret float %div3825}3826 3827define float @v_fdiv_f32_dynamic__nnan_ninf(float %x, float %y, float %z) #2 {3828; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3829; GFX6-FASTFMA: ; %bb.0:3830; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3831; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03832; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v23833; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03834; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3835; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33836; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.03837; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v33838; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v33839; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v43840; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v53841; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v43842; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43843; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v53844; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v03845; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]3846;3847; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3848; GFX6-SLOWFMA: ; %bb.0:3849; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3850; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03851; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v03852; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3853; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v23854; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33855; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.03856; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v43857; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v43858; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v33859; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v53860; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v33861; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43862; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v53863; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v03864; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]3865;3866; GFX7-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3867; GFX7: ; %bb.0:3868; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3869; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03870; GFX7-NEXT: v_rcp_f32_e32 v3, v23871; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v03872; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3873; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33874; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.03875; GFX7-NEXT: v_fma_f32 v3, v5, v3, v33876; GFX7-NEXT: v_mul_f32_e32 v5, v4, v33877; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v43878; GFX7-NEXT: v_fma_f32 v5, v6, v3, v53879; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v43880; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43881; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v53882; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v03883; GFX7-NEXT: s_setpc_b64 s[30:31]3884;3885; GFX8-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3886; GFX8: ; %bb.0:3887; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3888; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v03889; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v03890; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3891; GFX8-NEXT: v_rcp_f32_e32 v4, v23892; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 33893; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.03894; GFX8-NEXT: v_fma_f32 v4, v5, v4, v43895; GFX8-NEXT: v_mul_f32_e32 v5, v3, v43896; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v33897; GFX8-NEXT: v_fma_f32 v5, v6, v4, v53898; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v33899; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43900; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v53901; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v03902; GFX8-NEXT: s_setpc_b64 s[30:31]3903;3904; GFX10-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3905; GFX10: ; %bb.0:3906; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3907; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v03908; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v03909; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)3910; GFX10-NEXT: v_rcp_f32_e32 v3, v23911; GFX10-NEXT: s_denorm_mode 153912; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.03913; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v33914; GFX10-NEXT: v_mul_f32_e32 v5, v4, v33915; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v43916; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v33917; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v43918; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s43919; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v53920; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v03921; GFX10-NEXT: s_setpc_b64 s[30:31]3922;3923; GFX11-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3924; GFX11: ; %bb.0:3925; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3926; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v03927; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v03928; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)3929; GFX11-NEXT: v_rcp_f32_e32 v3, v23930; GFX11-NEXT: s_denorm_mode 153931; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)3932; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.03933; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v33934; GFX11-NEXT: v_mul_f32_e32 v5, v4, v33935; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v43936; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v33937; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v43938; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s03939; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v53940; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v03941; GFX11-NEXT: s_setpc_b64 s[30:31]3942;3943; EG-LABEL: v_fdiv_f32_dynamic__nnan_ninf:3944; EG: ; %bb.0:3945; EG-NEXT: CF_END3946; EG-NEXT: PAD3947 %div = fdiv nnan ninf float %x, %y3948 ret float %div3949}3950 3951define float @v_fdiv_f32_dynamic_25ulp__nnan_ninf(float %x, float %y, float %z) #2 {3952; GFX6-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf:3953; GFX6: ; %bb.0:3954; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3955; GFX6-NEXT: s_mov_b32 s4, 0x7f8000003956; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v13957; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s43958; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc3959; GFX6-NEXT: v_rcp_f32_e32 v2, v23960; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v03961; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43962; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v13963; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc3964; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v03965; GFX6-NEXT: v_mul_f32_e32 v2, v3, v23966; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v13967; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v03968; GFX6-NEXT: s_setpc_b64 s[30:31]3969;3970; GFX7-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf:3971; GFX7: ; %bb.0:3972; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3973; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v13974; GFX7-NEXT: v_rcp_f32_e32 v2, v23975; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v13976; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v03977; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v03978; GFX7-NEXT: v_mul_f32_e32 v0, v0, v23979; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v13980; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v13981; GFX7-NEXT: s_setpc_b64 s[30:31]3982;3983; GFX8-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf:3984; GFX8: ; %bb.0:3985; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3986; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v13987; GFX8-NEXT: v_rcp_f32_e32 v2, v23988; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v13989; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v03990; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v03991; GFX8-NEXT: v_mul_f32_e32 v0, v0, v23992; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v13993; GFX8-NEXT: v_ldexp_f32 v0, v0, v13994; GFX8-NEXT: s_setpc_b64 s[30:31]3995;3996; GFX10-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf:3997; GFX10: ; %bb.0:3998; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3999; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v14000; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v14001; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v04002; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v04003; GFX10-NEXT: v_rcp_f32_e32 v2, v24004; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v14005; GFX10-NEXT: v_mul_f32_e32 v2, v3, v24006; GFX10-NEXT: v_ldexp_f32 v0, v2, v04007; GFX10-NEXT: s_setpc_b64 s[30:31]4008;4009; GFX11-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf:4010; GFX11: ; %bb.0:4011; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4012; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v14013; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v14014; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v04015; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v04016; GFX11-NEXT: v_rcp_f32_e32 v2, v24017; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v14018; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4019; GFX11-NEXT: v_mul_f32_e32 v2, v3, v24020; GFX11-NEXT: v_ldexp_f32 v0, v2, v04021; GFX11-NEXT: s_setpc_b64 s[30:31]4022;4023; EG-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf:4024; EG: ; %bb.0:4025; EG-NEXT: CF_END4026; EG-NEXT: PAD4027 %div = fdiv nnan ninf float %x, %y, !fpmath !04028 ret float %div4029}4030 4031define float @v_fdiv_f32_daz__nnan_ninf(float %x, float %y, float %z) #0 {4032; GFX6-FASTFMA-LABEL: v_fdiv_f32_daz__nnan_ninf:4033; GFX6-FASTFMA: ; %bb.0:4034; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4035; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v04036; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v24037; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04038; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34039; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.04040; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v34041; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v34042; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v44043; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v54044; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v44045; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04046; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v54047; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v04048; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]4049;4050; GFX6-SLOWFMA-LABEL: v_fdiv_f32_daz__nnan_ninf:4051; GFX6-SLOWFMA: ; %bb.0:4052; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4053; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v04054; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v04055; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v24056; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34057; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.04058; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v44059; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v44060; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v34061; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v54062; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v34063; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04064; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v54065; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v04066; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]4067;4068; GFX7-LABEL: v_fdiv_f32_daz__nnan_ninf:4069; GFX7: ; %bb.0:4070; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4071; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v04072; GFX7-NEXT: v_rcp_f32_e32 v3, v24073; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04074; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34075; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.04076; GFX7-NEXT: v_fma_f32 v3, v5, v3, v34077; GFX7-NEXT: v_mul_f32_e32 v5, v4, v34078; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v44079; GFX7-NEXT: v_fma_f32 v5, v6, v3, v54080; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v44081; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04082; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v54083; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v04084; GFX7-NEXT: s_setpc_b64 s[30:31]4085;4086; GFX8-LABEL: v_fdiv_f32_daz__nnan_ninf:4087; GFX8: ; %bb.0:4088; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4089; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v04090; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v04091; GFX8-NEXT: v_rcp_f32_e32 v4, v24092; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34093; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.04094; GFX8-NEXT: v_fma_f32 v4, v5, v4, v44095; GFX8-NEXT: v_mul_f32_e32 v5, v3, v44096; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v34097; GFX8-NEXT: v_fma_f32 v5, v6, v4, v54098; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v34099; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04100; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v54101; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v04102; GFX8-NEXT: s_setpc_b64 s[30:31]4103;4104; GFX10-LABEL: v_fdiv_f32_daz__nnan_ninf:4105; GFX10: ; %bb.0:4106; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4107; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v04108; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v04109; GFX10-NEXT: v_rcp_f32_e32 v3, v24110; GFX10-NEXT: s_denorm_mode 154111; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.04112; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v34113; GFX10-NEXT: v_mul_f32_e32 v5, v4, v34114; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v44115; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v34116; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v44117; GFX10-NEXT: s_denorm_mode 124118; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v54119; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v04120; GFX10-NEXT: s_setpc_b64 s[30:31]4121;4122; GFX11-LABEL: v_fdiv_f32_daz__nnan_ninf:4123; GFX11: ; %bb.0:4124; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4125; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v04126; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v04127; GFX11-NEXT: v_rcp_f32_e32 v3, v24128; GFX11-NEXT: s_denorm_mode 154129; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4130; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.04131; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v34132; GFX11-NEXT: v_mul_f32_e32 v5, v4, v34133; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v44134; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v34135; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v44136; GFX11-NEXT: s_denorm_mode 124137; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v54138; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v04139; GFX11-NEXT: s_setpc_b64 s[30:31]4140;4141; EG-LABEL: v_fdiv_f32_daz__nnan_ninf:4142; EG: ; %bb.0:4143; EG-NEXT: CF_END4144; EG-NEXT: PAD4145 %div = fdiv nnan ninf float %x, %y4146 ret float %div4147}4148 4149define float @v_fdiv_f32_daz_25ulp__nnan_ninf(float %x, float %y, float %z) #0 {4150; GFX678-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf:4151; GFX678: ; %bb.0:4152; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4153; GFX678-NEXT: s_mov_b32 s4, 0x6f8000004154; GFX678-NEXT: v_mov_b32_e32 v2, 0x2f8000004155; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s44156; GFX678-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc4157; GFX678-NEXT: v_mul_f32_e32 v1, v1, v24158; GFX678-NEXT: v_rcp_f32_e32 v1, v14159; GFX678-NEXT: v_mul_f32_e32 v0, v0, v14160; GFX678-NEXT: v_mul_f32_e32 v0, v2, v04161; GFX678-NEXT: s_setpc_b64 s[30:31]4162;4163; GFX10-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf:4164; GFX10: ; %bb.0:4165; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4166; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|4167; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s44168; GFX10-NEXT: v_mul_f32_e32 v1, v1, v24169; GFX10-NEXT: v_rcp_f32_e32 v1, v14170; GFX10-NEXT: v_mul_f32_e32 v0, v0, v14171; GFX10-NEXT: v_mul_f32_e32 v0, v2, v04172; GFX10-NEXT: s_setpc_b64 s[30:31]4173;4174; GFX11-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf:4175; GFX11: ; %bb.0:4176; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4177; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|4178; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s04179; GFX11-NEXT: v_mul_f32_e32 v1, v1, v24180; GFX11-NEXT: v_rcp_f32_e32 v1, v14181; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4182; GFX11-NEXT: v_mul_f32_e32 v0, v0, v14183; GFX11-NEXT: v_mul_f32_e32 v0, v2, v04184; GFX11-NEXT: s_setpc_b64 s[30:31]4185;4186; EG-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf:4187; EG: ; %bb.0:4188; EG-NEXT: CF_END4189; EG-NEXT: PAD4190 %div = fdiv nnan ninf float %x, %y, !fpmath !04191 ret float %div4192}4193 4194define float @v_fdiv_f32_ieee__nnan_ninf_contractable_user(float %x, float %y, float %z) #1 {4195; GFX6-FASTFMA-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4196; GFX6-FASTFMA: ; %bb.0:4197; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4198; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04199; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v34200; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v3, v4, 1.04201; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v4, v44202; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v04203; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v5, v44204; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v3, v6, v54205; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v4, v64206; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v3, v6, v54207; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v3, v3, v4, v64208; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v04209; GFX6-FASTFMA-NEXT: v_add_f32_e32 v0, v0, v24210; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]4211;4212; GFX6-SLOWFMA-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4213; GFX6-SLOWFMA: ; %bb.0:4214; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4215; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04216; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04217; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v34218; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v3, v5, 1.04219; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v5, v54220; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v54221; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v3, v6, v44222; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v5, v64223; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v3, v6, v44224; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v3, v3, v5, v64225; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v04226; GFX6-SLOWFMA-NEXT: v_add_f32_e32 v0, v0, v24227; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]4228;4229; GFX7-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4230; GFX7: ; %bb.0:4231; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4232; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04233; GFX7-NEXT: v_rcp_f32_e32 v4, v34234; GFX7-NEXT: v_fma_f32 v5, -v3, v4, 1.04235; GFX7-NEXT: v_fma_f32 v4, v5, v4, v44236; GFX7-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v04237; GFX7-NEXT: v_mul_f32_e32 v6, v5, v44238; GFX7-NEXT: v_fma_f32 v7, -v3, v6, v54239; GFX7-NEXT: v_fma_f32 v6, v7, v4, v64240; GFX7-NEXT: v_fma_f32 v3, -v3, v6, v54241; GFX7-NEXT: v_div_fmas_f32 v3, v3, v4, v64242; GFX7-NEXT: v_div_fixup_f32 v0, v3, v1, v04243; GFX7-NEXT: v_add_f32_e32 v0, v0, v24244; GFX7-NEXT: s_setpc_b64 s[30:31]4245;4246; GFX8-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4247; GFX8: ; %bb.0:4248; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4249; GFX8-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04250; GFX8-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04251; GFX8-NEXT: v_rcp_f32_e32 v5, v34252; GFX8-NEXT: v_fma_f32 v6, -v3, v5, 1.04253; GFX8-NEXT: v_fma_f32 v5, v6, v5, v54254; GFX8-NEXT: v_mul_f32_e32 v6, v4, v54255; GFX8-NEXT: v_fma_f32 v7, -v3, v6, v44256; GFX8-NEXT: v_fma_f32 v6, v7, v5, v64257; GFX8-NEXT: v_fma_f32 v3, -v3, v6, v44258; GFX8-NEXT: v_div_fmas_f32 v3, v3, v5, v64259; GFX8-NEXT: v_div_fixup_f32 v0, v3, v1, v04260; GFX8-NEXT: v_add_f32_e32 v0, v0, v24261; GFX8-NEXT: s_setpc_b64 s[30:31]4262;4263; GFX10-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4264; GFX10: ; %bb.0:4265; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4266; GFX10-NEXT: v_div_scale_f32 v3, s4, v1, v1, v04267; GFX10-NEXT: v_rcp_f32_e32 v4, v34268; GFX10-NEXT: v_fma_f32 v5, -v3, v4, 1.04269; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v44270; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v04271; GFX10-NEXT: v_mul_f32_e32 v6, v5, v44272; GFX10-NEXT: v_fma_f32 v7, -v3, v6, v54273; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v44274; GFX10-NEXT: v_fma_f32 v3, -v3, v6, v54275; GFX10-NEXT: v_div_fmas_f32 v3, v3, v4, v64276; GFX10-NEXT: v_div_fixup_f32 v0, v3, v1, v04277; GFX10-NEXT: v_add_f32_e32 v0, v0, v24278; GFX10-NEXT: s_setpc_b64 s[30:31]4279;4280; GFX11-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4281; GFX11: ; %bb.0:4282; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4283; GFX11-NEXT: v_div_scale_f32 v3, null, v1, v1, v04284; GFX11-NEXT: v_rcp_f32_e32 v4, v34285; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4286; GFX11-NEXT: v_fma_f32 v5, -v3, v4, 1.04287; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v44288; GFX11-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v04289; GFX11-NEXT: v_mul_f32_e32 v6, v5, v44290; GFX11-NEXT: v_fma_f32 v7, -v3, v6, v54291; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v44292; GFX11-NEXT: v_fma_f32 v3, -v3, v6, v54293; GFX11-NEXT: v_div_fmas_f32 v3, v3, v4, v64294; GFX11-NEXT: v_div_fixup_f32 v0, v3, v1, v04295; GFX11-NEXT: v_add_f32_e32 v0, v0, v24296; GFX11-NEXT: s_setpc_b64 s[30:31]4297;4298; EG-LABEL: v_fdiv_f32_ieee__nnan_ninf_contractable_user:4299; EG: ; %bb.0:4300; EG-NEXT: CF_END4301; EG-NEXT: PAD4302 %div = fdiv nnan ninf contract float %x, %y4303 %add = fadd contract float %div, %z4304 ret float %add4305}4306 4307define float @v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user(float %x, float %y, float %z) #1 {4308; GFX6-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user:4309; GFX6: ; %bb.0:4310; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4311; GFX6-NEXT: s_mov_b32 s4, 0x7f8000004312; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v14313; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s44314; GFX6-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc4315; GFX6-NEXT: v_rcp_f32_e32 v3, v34316; GFX6-NEXT: v_frexp_mant_f32_e32 v4, v04317; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s44318; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v14319; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc4320; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v04321; GFX6-NEXT: v_mul_f32_e32 v3, v4, v34322; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v14323; GFX6-NEXT: v_ldexp_f32_e32 v0, v3, v04324; GFX6-NEXT: v_add_f32_e32 v0, v0, v24325; GFX6-NEXT: s_setpc_b64 s[30:31]4326;4327; GFX7-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user:4328; GFX7: ; %bb.0:4329; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4330; GFX7-NEXT: v_frexp_mant_f32_e32 v3, v14331; GFX7-NEXT: v_rcp_f32_e32 v3, v34332; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v14333; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v4, v04334; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v04335; GFX7-NEXT: v_mul_f32_e32 v0, v0, v34336; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v4, v14337; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v14338; GFX7-NEXT: v_add_f32_e32 v0, v0, v24339; GFX7-NEXT: s_setpc_b64 s[30:31]4340;4341; GFX8-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user:4342; GFX8: ; %bb.0:4343; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4344; GFX8-NEXT: v_frexp_mant_f32_e32 v3, v14345; GFX8-NEXT: v_rcp_f32_e32 v3, v34346; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v14347; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v4, v04348; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v04349; GFX8-NEXT: v_mul_f32_e32 v0, v0, v34350; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v4, v14351; GFX8-NEXT: v_ldexp_f32 v0, v0, v14352; GFX8-NEXT: v_add_f32_e32 v0, v0, v24353; GFX8-NEXT: s_setpc_b64 s[30:31]4354;4355; GFX10-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user:4356; GFX10: ; %bb.0:4357; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4358; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v14359; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v14360; GFX10-NEXT: v_frexp_mant_f32_e32 v4, v04361; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v04362; GFX10-NEXT: v_rcp_f32_e32 v3, v34363; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v14364; GFX10-NEXT: v_mul_f32_e32 v3, v4, v34365; GFX10-NEXT: v_ldexp_f32 v0, v3, v04366; GFX10-NEXT: v_add_f32_e32 v0, v0, v24367; GFX10-NEXT: s_setpc_b64 s[30:31]4368;4369; GFX11-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user:4370; GFX11: ; %bb.0:4371; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4372; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v14373; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v14374; GFX11-NEXT: v_frexp_mant_f32_e32 v4, v04375; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v04376; GFX11-NEXT: v_rcp_f32_e32 v3, v34377; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v14378; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4379; GFX11-NEXT: v_mul_f32_e32 v3, v4, v34380; GFX11-NEXT: v_ldexp_f32 v0, v3, v04381; GFX11-NEXT: v_add_f32_e32 v0, v0, v24382; GFX11-NEXT: s_setpc_b64 s[30:31]4383;4384; EG-LABEL: v_fdiv_f32_ieee_25ulp__nnan_ninf_contractable_user:4385; EG: ; %bb.0:4386; EG-NEXT: CF_END4387; EG-NEXT: PAD4388 %div = fdiv nnan ninf contract float %x, %y, !fpmath !04389 %add = fadd contract float %div, %z4390 ret float %add4391}4392 4393define float @v_fdiv_f32_dynamic__nnan_ninf_contractable_user(float %x, float %y, float %z) #2 {4394; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4395; GFX6-FASTFMA: ; %bb.0:4396; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4397; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04398; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v34399; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v04400; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4401; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34402; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v3, v4, 1.04403; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v6, v4, v44404; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v5, v44405; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v3, v6, v54406; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v4, v64407; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v3, v6, v54408; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s44409; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v3, v3, v4, v64410; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v04411; GFX6-FASTFMA-NEXT: v_add_f32_e32 v0, v0, v24412; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]4413;4414; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4415; GFX6-SLOWFMA: ; %bb.0:4416; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4417; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04418; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04419; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4420; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v34421; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34422; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v3, v5, 1.04423; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v5, v54424; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v54425; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v3, v6, v44426; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v5, v64427; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v3, v6, v44428; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s44429; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v3, v3, v5, v64430; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v04431; GFX6-SLOWFMA-NEXT: v_add_f32_e32 v0, v0, v24432; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]4433;4434; GFX7-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4435; GFX7: ; %bb.0:4436; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4437; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04438; GFX7-NEXT: v_rcp_f32_e32 v4, v34439; GFX7-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v04440; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4441; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34442; GFX7-NEXT: v_fma_f32 v6, -v3, v4, 1.04443; GFX7-NEXT: v_fma_f32 v4, v6, v4, v44444; GFX7-NEXT: v_mul_f32_e32 v6, v5, v44445; GFX7-NEXT: v_fma_f32 v7, -v3, v6, v54446; GFX7-NEXT: v_fma_f32 v6, v7, v4, v64447; GFX7-NEXT: v_fma_f32 v3, -v3, v6, v54448; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s44449; GFX7-NEXT: v_div_fmas_f32 v3, v3, v4, v64450; GFX7-NEXT: v_div_fixup_f32 v0, v3, v1, v04451; GFX7-NEXT: v_add_f32_e32 v0, v0, v24452; GFX7-NEXT: s_setpc_b64 s[30:31]4453;4454; GFX8-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4455; GFX8: ; %bb.0:4456; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4457; GFX8-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04458; GFX8-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04459; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4460; GFX8-NEXT: v_rcp_f32_e32 v5, v34461; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34462; GFX8-NEXT: v_fma_f32 v6, -v3, v5, 1.04463; GFX8-NEXT: v_fma_f32 v5, v6, v5, v54464; GFX8-NEXT: v_mul_f32_e32 v6, v4, v54465; GFX8-NEXT: v_fma_f32 v7, -v3, v6, v44466; GFX8-NEXT: v_fma_f32 v6, v7, v5, v64467; GFX8-NEXT: v_fma_f32 v3, -v3, v6, v44468; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s44469; GFX8-NEXT: v_div_fmas_f32 v3, v3, v5, v64470; GFX8-NEXT: v_div_fixup_f32 v0, v3, v1, v04471; GFX8-NEXT: v_add_f32_e32 v0, v0, v24472; GFX8-NEXT: s_setpc_b64 s[30:31]4473;4474; GFX10-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4475; GFX10: ; %bb.0:4476; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4477; GFX10-NEXT: v_div_scale_f32 v3, s4, v1, v1, v04478; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v04479; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4480; GFX10-NEXT: v_rcp_f32_e32 v4, v34481; GFX10-NEXT: s_denorm_mode 154482; GFX10-NEXT: v_fma_f32 v6, -v3, v4, 1.04483; GFX10-NEXT: v_fmac_f32_e32 v4, v6, v44484; GFX10-NEXT: v_mul_f32_e32 v6, v5, v44485; GFX10-NEXT: v_fma_f32 v7, -v3, v6, v54486; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v44487; GFX10-NEXT: v_fma_f32 v3, -v3, v6, v54488; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s44489; GFX10-NEXT: v_div_fmas_f32 v3, v3, v4, v64490; GFX10-NEXT: v_div_fixup_f32 v0, v3, v1, v04491; GFX10-NEXT: v_add_f32_e32 v0, v0, v24492; GFX10-NEXT: s_setpc_b64 s[30:31]4493;4494; GFX11-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4495; GFX11: ; %bb.0:4496; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4497; GFX11-NEXT: v_div_scale_f32 v3, null, v1, v1, v04498; GFX11-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v04499; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)4500; GFX11-NEXT: v_rcp_f32_e32 v4, v34501; GFX11-NEXT: s_denorm_mode 154502; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4503; GFX11-NEXT: v_fma_f32 v6, -v3, v4, 1.04504; GFX11-NEXT: v_fmac_f32_e32 v4, v6, v44505; GFX11-NEXT: v_mul_f32_e32 v6, v5, v44506; GFX11-NEXT: v_fma_f32 v7, -v3, v6, v54507; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v44508; GFX11-NEXT: v_fma_f32 v3, -v3, v6, v54509; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s04510; GFX11-NEXT: v_div_fmas_f32 v3, v3, v4, v64511; GFX11-NEXT: v_div_fixup_f32 v0, v3, v1, v04512; GFX11-NEXT: v_add_f32_e32 v0, v0, v24513; GFX11-NEXT: s_setpc_b64 s[30:31]4514;4515; EG-LABEL: v_fdiv_f32_dynamic__nnan_ninf_contractable_user:4516; EG: ; %bb.0:4517; EG-NEXT: CF_END4518; EG-NEXT: PAD4519 %div = fdiv nnan ninf contract float %x, %y4520 %add = fadd contract float %div, %z4521 ret float %add4522}4523 4524define float @v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user(float %x, float %y, float %z) #2 {4525; GFX6-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user:4526; GFX6: ; %bb.0:4527; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4528; GFX6-NEXT: s_mov_b32 s4, 0x7f8000004529; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v14530; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s44531; GFX6-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc4532; GFX6-NEXT: v_rcp_f32_e32 v3, v34533; GFX6-NEXT: v_frexp_mant_f32_e32 v4, v04534; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s44535; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v14536; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc4537; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v04538; GFX6-NEXT: v_mul_f32_e32 v3, v4, v34539; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v14540; GFX6-NEXT: v_ldexp_f32_e32 v0, v3, v04541; GFX6-NEXT: v_add_f32_e32 v0, v0, v24542; GFX6-NEXT: s_setpc_b64 s[30:31]4543;4544; GFX7-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user:4545; GFX7: ; %bb.0:4546; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4547; GFX7-NEXT: v_frexp_mant_f32_e32 v3, v14548; GFX7-NEXT: v_rcp_f32_e32 v3, v34549; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v14550; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v4, v04551; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v04552; GFX7-NEXT: v_mul_f32_e32 v0, v0, v34553; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v4, v14554; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v14555; GFX7-NEXT: v_add_f32_e32 v0, v0, v24556; GFX7-NEXT: s_setpc_b64 s[30:31]4557;4558; GFX8-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user:4559; GFX8: ; %bb.0:4560; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4561; GFX8-NEXT: v_frexp_mant_f32_e32 v3, v14562; GFX8-NEXT: v_rcp_f32_e32 v3, v34563; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v14564; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v4, v04565; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v04566; GFX8-NEXT: v_mul_f32_e32 v0, v0, v34567; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v4, v14568; GFX8-NEXT: v_ldexp_f32 v0, v0, v14569; GFX8-NEXT: v_add_f32_e32 v0, v0, v24570; GFX8-NEXT: s_setpc_b64 s[30:31]4571;4572; GFX10-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user:4573; GFX10: ; %bb.0:4574; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4575; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v14576; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v14577; GFX10-NEXT: v_frexp_mant_f32_e32 v4, v04578; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v04579; GFX10-NEXT: v_rcp_f32_e32 v3, v34580; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v14581; GFX10-NEXT: v_mul_f32_e32 v3, v4, v34582; GFX10-NEXT: v_ldexp_f32 v0, v3, v04583; GFX10-NEXT: v_add_f32_e32 v0, v0, v24584; GFX10-NEXT: s_setpc_b64 s[30:31]4585;4586; GFX11-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user:4587; GFX11: ; %bb.0:4588; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4589; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v14590; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v14591; GFX11-NEXT: v_frexp_mant_f32_e32 v4, v04592; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v04593; GFX11-NEXT: v_rcp_f32_e32 v3, v34594; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v14595; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4596; GFX11-NEXT: v_mul_f32_e32 v3, v4, v34597; GFX11-NEXT: v_ldexp_f32 v0, v3, v04598; GFX11-NEXT: v_add_f32_e32 v0, v0, v24599; GFX11-NEXT: s_setpc_b64 s[30:31]4600;4601; EG-LABEL: v_fdiv_f32_dynamic_25ulp__nnan_ninf_contractable_user:4602; EG: ; %bb.0:4603; EG-NEXT: CF_END4604; EG-NEXT: PAD4605 %div = fdiv nnan ninf contract float %x, %y, !fpmath !04606 %add = fadd contract float %div, %z4607 ret float %add4608}4609 4610define float @v_fdiv_f32_daz__nnan_ninf_contractable_user(float %x, float %y, float %z) #0 {4611; GFX6-FASTFMA-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4612; GFX6-FASTFMA: ; %bb.0:4613; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4614; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04615; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v4, v34616; GFX6-FASTFMA-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v04617; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34618; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v3, v4, 1.04619; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v6, v4, v44620; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v6, v5, v44621; GFX6-FASTFMA-NEXT: v_fma_f32 v7, -v3, v6, v54622; GFX6-FASTFMA-NEXT: v_fma_f32 v6, v7, v4, v64623; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v3, v6, v54624; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04625; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v3, v3, v4, v64626; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v04627; GFX6-FASTFMA-NEXT: v_add_f32_e32 v0, v0, v24628; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]4629;4630; GFX6-SLOWFMA-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4631; GFX6-SLOWFMA: ; %bb.0:4632; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4633; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04634; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04635; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v5, v34636; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34637; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v3, v5, 1.04638; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v5, v54639; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v6, v4, v54640; GFX6-SLOWFMA-NEXT: v_fma_f32 v7, -v3, v6, v44641; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, v7, v5, v64642; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, -v3, v6, v44643; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04644; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v3, v3, v5, v64645; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v3, v1, v04646; GFX6-SLOWFMA-NEXT: v_add_f32_e32 v0, v0, v24647; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]4648;4649; GFX7-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4650; GFX7: ; %bb.0:4651; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4652; GFX7-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04653; GFX7-NEXT: v_rcp_f32_e32 v4, v34654; GFX7-NEXT: v_div_scale_f32 v5, vcc, v0, v1, v04655; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34656; GFX7-NEXT: v_fma_f32 v6, -v3, v4, 1.04657; GFX7-NEXT: v_fma_f32 v4, v6, v4, v44658; GFX7-NEXT: v_mul_f32_e32 v6, v5, v44659; GFX7-NEXT: v_fma_f32 v7, -v3, v6, v54660; GFX7-NEXT: v_fma_f32 v6, v7, v4, v64661; GFX7-NEXT: v_fma_f32 v3, -v3, v6, v54662; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04663; GFX7-NEXT: v_div_fmas_f32 v3, v3, v4, v64664; GFX7-NEXT: v_div_fixup_f32 v0, v3, v1, v04665; GFX7-NEXT: v_add_f32_e32 v0, v0, v24666; GFX7-NEXT: s_setpc_b64 s[30:31]4667;4668; GFX8-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4669; GFX8: ; %bb.0:4670; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4671; GFX8-NEXT: v_div_scale_f32 v3, s[4:5], v1, v1, v04672; GFX8-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v04673; GFX8-NEXT: v_rcp_f32_e32 v5, v34674; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34675; GFX8-NEXT: v_fma_f32 v6, -v3, v5, 1.04676; GFX8-NEXT: v_fma_f32 v5, v6, v5, v54677; GFX8-NEXT: v_mul_f32_e32 v6, v4, v54678; GFX8-NEXT: v_fma_f32 v7, -v3, v6, v44679; GFX8-NEXT: v_fma_f32 v6, v7, v5, v64680; GFX8-NEXT: v_fma_f32 v3, -v3, v6, v44681; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 04682; GFX8-NEXT: v_div_fmas_f32 v3, v3, v5, v64683; GFX8-NEXT: v_div_fixup_f32 v0, v3, v1, v04684; GFX8-NEXT: v_add_f32_e32 v0, v0, v24685; GFX8-NEXT: s_setpc_b64 s[30:31]4686;4687; GFX10-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4688; GFX10: ; %bb.0:4689; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4690; GFX10-NEXT: v_div_scale_f32 v3, s4, v1, v1, v04691; GFX10-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v04692; GFX10-NEXT: v_rcp_f32_e32 v4, v34693; GFX10-NEXT: s_denorm_mode 154694; GFX10-NEXT: v_fma_f32 v6, -v3, v4, 1.04695; GFX10-NEXT: v_fmac_f32_e32 v4, v6, v44696; GFX10-NEXT: v_mul_f32_e32 v6, v5, v44697; GFX10-NEXT: v_fma_f32 v7, -v3, v6, v54698; GFX10-NEXT: v_fmac_f32_e32 v6, v7, v44699; GFX10-NEXT: v_fma_f32 v3, -v3, v6, v54700; GFX10-NEXT: s_denorm_mode 124701; GFX10-NEXT: v_div_fmas_f32 v3, v3, v4, v64702; GFX10-NEXT: v_div_fixup_f32 v0, v3, v1, v04703; GFX10-NEXT: v_add_f32_e32 v0, v0, v24704; GFX10-NEXT: s_setpc_b64 s[30:31]4705;4706; GFX11-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4707; GFX11: ; %bb.0:4708; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4709; GFX11-NEXT: v_div_scale_f32 v3, null, v1, v1, v04710; GFX11-NEXT: v_div_scale_f32 v5, vcc_lo, v0, v1, v04711; GFX11-NEXT: v_rcp_f32_e32 v4, v34712; GFX11-NEXT: s_denorm_mode 154713; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4714; GFX11-NEXT: v_fma_f32 v6, -v3, v4, 1.04715; GFX11-NEXT: v_fmac_f32_e32 v4, v6, v44716; GFX11-NEXT: v_mul_f32_e32 v6, v5, v44717; GFX11-NEXT: v_fma_f32 v7, -v3, v6, v54718; GFX11-NEXT: v_fmac_f32_e32 v6, v7, v44719; GFX11-NEXT: v_fma_f32 v3, -v3, v6, v54720; GFX11-NEXT: s_denorm_mode 124721; GFX11-NEXT: v_div_fmas_f32 v3, v3, v4, v64722; GFX11-NEXT: v_div_fixup_f32 v0, v3, v1, v04723; GFX11-NEXT: v_add_f32_e32 v0, v0, v24724; GFX11-NEXT: s_setpc_b64 s[30:31]4725;4726; EG-LABEL: v_fdiv_f32_daz__nnan_ninf_contractable_user:4727; EG: ; %bb.0:4728; EG-NEXT: CF_END4729; EG-NEXT: PAD4730 %div = fdiv nnan ninf contract float %x, %y4731 %add = fadd contract float %div, %z4732 ret float %add4733}4734 4735define float @v_fdiv_f32_daz_25ulp__nnan_ninf_contractable_user(float %x, float %y, float %z) #0 {4736; GFX678-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf_contractable_user:4737; GFX678: ; %bb.0:4738; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4739; GFX678-NEXT: s_mov_b32 s4, 0x6f8000004740; GFX678-NEXT: v_mov_b32_e32 v3, 0x2f8000004741; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s44742; GFX678-NEXT: v_cndmask_b32_e32 v3, 1.0, v3, vcc4743; GFX678-NEXT: v_mul_f32_e32 v1, v1, v34744; GFX678-NEXT: v_rcp_f32_e32 v1, v14745; GFX678-NEXT: v_mul_f32_e32 v0, v0, v14746; GFX678-NEXT: v_mad_f32 v0, v3, v0, v24747; GFX678-NEXT: s_setpc_b64 s[30:31]4748;4749; GFX10-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf_contractable_user:4750; GFX10: ; %bb.0:4751; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4752; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|4753; GFX10-NEXT: v_cndmask_b32_e64 v3, 1.0, 0x2f800000, s44754; GFX10-NEXT: v_mul_f32_e32 v1, v1, v34755; GFX10-NEXT: v_rcp_f32_e32 v1, v14756; GFX10-NEXT: v_mul_f32_e32 v0, v0, v14757; GFX10-NEXT: v_mad_f32 v0, v3, v0, v24758; GFX10-NEXT: s_setpc_b64 s[30:31]4759;4760; GFX11-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf_contractable_user:4761; GFX11: ; %bb.0:4762; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4763; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|4764; GFX11-NEXT: v_cndmask_b32_e64 v3, 1.0, 0x2f800000, s04765; GFX11-NEXT: v_mul_f32_e32 v1, v1, v34766; GFX11-NEXT: v_rcp_f32_e32 v1, v14767; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4768; GFX11-NEXT: v_mul_f32_e32 v0, v0, v14769; GFX11-NEXT: v_fma_f32 v0, v3, v0, v24770; GFX11-NEXT: s_setpc_b64 s[30:31]4771;4772; EG-LABEL: v_fdiv_f32_daz_25ulp__nnan_ninf_contractable_user:4773; EG: ; %bb.0:4774; EG-NEXT: CF_END4775; EG-NEXT: PAD4776 %div = fdiv nnan ninf contract float %x, %y, !fpmath !04777 %add = fadd contract float %div, %z4778 ret float %add4779}4780 4781define float @v_fdiv_neglhs_f32_ieee(float %x, float %y) #1 {4782; GFX6-FASTFMA-LABEL: v_fdiv_neglhs_f32_ieee:4783; GFX6-FASTFMA: ; %bb.0:4784; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4785; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v04786; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v24787; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.04788; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v34789; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, -v0, v1, -v04790; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v34791; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v44792; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v54793; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v44794; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v54795; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, -v04796; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]4797;4798; GFX6-SLOWFMA-LABEL: v_fdiv_neglhs_f32_ieee:4799; GFX6-SLOWFMA: ; %bb.0:4800; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4801; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v04802; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, -v0, v1, -v04803; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v24804; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.04805; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v44806; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v44807; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v34808; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v54809; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v34810; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v54811; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, -v04812; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]4813;4814; GFX7-LABEL: v_fdiv_neglhs_f32_ieee:4815; GFX7: ; %bb.0:4816; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4817; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v04818; GFX7-NEXT: v_rcp_f32_e32 v3, v24819; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.04820; GFX7-NEXT: v_fma_f32 v3, v4, v3, v34821; GFX7-NEXT: v_div_scale_f32 v4, vcc, -v0, v1, -v04822; GFX7-NEXT: v_mul_f32_e32 v5, v4, v34823; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v44824; GFX7-NEXT: v_fma_f32 v5, v6, v3, v54825; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v44826; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v54827; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, -v04828; GFX7-NEXT: s_setpc_b64 s[30:31]4829;4830; GFX8-LABEL: v_fdiv_neglhs_f32_ieee:4831; GFX8: ; %bb.0:4832; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4833; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v04834; GFX8-NEXT: v_div_scale_f32 v3, vcc, -v0, v1, -v04835; GFX8-NEXT: v_rcp_f32_e32 v4, v24836; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.04837; GFX8-NEXT: v_fma_f32 v4, v5, v4, v44838; GFX8-NEXT: v_mul_f32_e32 v5, v3, v44839; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v34840; GFX8-NEXT: v_fma_f32 v5, v6, v4, v54841; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v34842; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v54843; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, -v04844; GFX8-NEXT: s_setpc_b64 s[30:31]4845;4846; GFX10-LABEL: v_fdiv_neglhs_f32_ieee:4847; GFX10: ; %bb.0:4848; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4849; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, -v04850; GFX10-NEXT: v_rcp_f32_e32 v3, v24851; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.04852; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v34853; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, -v0, v1, -v04854; GFX10-NEXT: v_mul_f32_e32 v5, v4, v34855; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v44856; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v34857; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v44858; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v54859; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, -v04860; GFX10-NEXT: s_setpc_b64 s[30:31]4861;4862; GFX11-LABEL: v_fdiv_neglhs_f32_ieee:4863; GFX11: ; %bb.0:4864; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4865; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, -v04866; GFX11-NEXT: v_rcp_f32_e32 v3, v24867; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4868; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.04869; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v34870; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, -v0, v1, -v04871; GFX11-NEXT: v_mul_f32_e32 v5, v4, v34872; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v44873; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v34874; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v44875; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v54876; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, -v04877; GFX11-NEXT: s_setpc_b64 s[30:31]4878;4879; EG-LABEL: v_fdiv_neglhs_f32_ieee:4880; EG: ; %bb.0:4881; EG-NEXT: CF_END4882; EG-NEXT: PAD4883 %neg.x = fneg float %x4884 %div = fdiv float %neg.x, %y4885 ret float %div4886}4887 4888define float @v_fdiv_neglhs_f32_ieee_25ulp(float %x, float %y) #1 {4889; GFX6-LABEL: v_fdiv_neglhs_f32_ieee_25ulp:4890; GFX6: ; %bb.0:4891; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4892; GFX6-NEXT: s_mov_b32 s4, 0x7f8000004893; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v14894; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s44895; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc4896; GFX6-NEXT: v_rcp_f32_e32 v2, v24897; GFX6-NEXT: v_frexp_mant_f32_e64 v3, -v04898; GFX6-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s44899; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v14900; GFX6-NEXT: v_cndmask_b32_e64 v3, -v0, v3, s[4:5]4901; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v04902; GFX6-NEXT: v_mul_f32_e32 v2, v3, v24903; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v14904; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v04905; GFX6-NEXT: s_setpc_b64 s[30:31]4906;4907; GFX7-LABEL: v_fdiv_neglhs_f32_ieee_25ulp:4908; GFX7: ; %bb.0:4909; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4910; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v14911; GFX7-NEXT: v_rcp_f32_e32 v2, v24912; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v14913; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v04914; GFX7-NEXT: v_frexp_mant_f32_e64 v0, -v04915; GFX7-NEXT: v_mul_f32_e32 v0, v0, v24916; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v14917; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v14918; GFX7-NEXT: s_setpc_b64 s[30:31]4919;4920; GFX8-LABEL: v_fdiv_neglhs_f32_ieee_25ulp:4921; GFX8: ; %bb.0:4922; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4923; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v14924; GFX8-NEXT: v_rcp_f32_e32 v2, v24925; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v14926; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v04927; GFX8-NEXT: v_frexp_mant_f32_e64 v0, -v04928; GFX8-NEXT: v_mul_f32_e32 v0, v0, v24929; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v14930; GFX8-NEXT: v_ldexp_f32 v0, v0, v14931; GFX8-NEXT: s_setpc_b64 s[30:31]4932;4933; GFX10-LABEL: v_fdiv_neglhs_f32_ieee_25ulp:4934; GFX10: ; %bb.0:4935; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4936; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v14937; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v14938; GFX10-NEXT: v_frexp_mant_f32_e64 v3, -v04939; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v04940; GFX10-NEXT: v_rcp_f32_e32 v2, v24941; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v14942; GFX10-NEXT: v_mul_f32_e32 v2, v3, v24943; GFX10-NEXT: v_ldexp_f32 v0, v2, v04944; GFX10-NEXT: s_setpc_b64 s[30:31]4945;4946; GFX11-LABEL: v_fdiv_neglhs_f32_ieee_25ulp:4947; GFX11: ; %bb.0:4948; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4949; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v14950; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v14951; GFX11-NEXT: v_frexp_mant_f32_e64 v3, -v04952; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v04953; GFX11-NEXT: v_rcp_f32_e32 v2, v24954; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v14955; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)4956; GFX11-NEXT: v_mul_f32_e32 v2, v3, v24957; GFX11-NEXT: v_ldexp_f32 v0, v2, v04958; GFX11-NEXT: s_setpc_b64 s[30:31]4959;4960; EG-LABEL: v_fdiv_neglhs_f32_ieee_25ulp:4961; EG: ; %bb.0:4962; EG-NEXT: CF_END4963; EG-NEXT: PAD4964 %neg.x = fneg float %x4965 %div = fdiv float %neg.x, %y, !fpmath !04966 ret float %div4967}4968 4969define float @v_fdiv_neglhs_f32_dynamic(float %x, float %y) #2 {4970; GFX6-FASTFMA-LABEL: v_fdiv_neglhs_f32_dynamic:4971; GFX6-FASTFMA: ; %bb.0:4972; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4973; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v04974; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v24975; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, -v0, v1, -v04976; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4977; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34978; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.04979; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v34980; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v34981; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v44982; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v54983; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v44984; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s44985; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v54986; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, -v04987; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]4988;4989; GFX6-SLOWFMA-LABEL: v_fdiv_neglhs_f32_dynamic:4990; GFX6-SLOWFMA: ; %bb.0:4991; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4992; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v04993; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, -v0, v1, -v04994; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)4995; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v24996; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 34997; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.04998; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v44999; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v45000; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v35001; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v55002; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v35003; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45004; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v55005; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, -v05006; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]5007;5008; GFX7-LABEL: v_fdiv_neglhs_f32_dynamic:5009; GFX7: ; %bb.0:5010; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5011; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v05012; GFX7-NEXT: v_rcp_f32_e32 v3, v25013; GFX7-NEXT: v_div_scale_f32 v4, vcc, -v0, v1, -v05014; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5015; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35016; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.05017; GFX7-NEXT: v_fma_f32 v3, v5, v3, v35018; GFX7-NEXT: v_mul_f32_e32 v5, v4, v35019; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v45020; GFX7-NEXT: v_fma_f32 v5, v6, v3, v55021; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v45022; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45023; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v55024; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, -v05025; GFX7-NEXT: s_setpc_b64 s[30:31]5026;5027; GFX8-LABEL: v_fdiv_neglhs_f32_dynamic:5028; GFX8: ; %bb.0:5029; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5030; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v05031; GFX8-NEXT: v_div_scale_f32 v3, vcc, -v0, v1, -v05032; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5033; GFX8-NEXT: v_rcp_f32_e32 v4, v25034; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35035; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.05036; GFX8-NEXT: v_fma_f32 v4, v5, v4, v45037; GFX8-NEXT: v_mul_f32_e32 v5, v3, v45038; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v35039; GFX8-NEXT: v_fma_f32 v5, v6, v4, v55040; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v35041; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45042; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v55043; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, -v05044; GFX8-NEXT: s_setpc_b64 s[30:31]5045;5046; GFX10-LABEL: v_fdiv_neglhs_f32_dynamic:5047; GFX10: ; %bb.0:5048; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5049; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, -v05050; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, -v0, v1, -v05051; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5052; GFX10-NEXT: v_rcp_f32_e32 v3, v25053; GFX10-NEXT: s_denorm_mode 155054; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.05055; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v35056; GFX10-NEXT: v_mul_f32_e32 v5, v4, v35057; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v45058; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v35059; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v45060; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45061; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v55062; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, -v05063; GFX10-NEXT: s_setpc_b64 s[30:31]5064;5065; GFX11-LABEL: v_fdiv_neglhs_f32_dynamic:5066; GFX11: ; %bb.0:5067; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5068; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, -v05069; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, -v0, v1, -v05070; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)5071; GFX11-NEXT: v_rcp_f32_e32 v3, v25072; GFX11-NEXT: s_denorm_mode 155073; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5074; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.05075; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v35076; GFX11-NEXT: v_mul_f32_e32 v5, v4, v35077; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v45078; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v35079; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v45080; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s05081; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v55082; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, -v05083; GFX11-NEXT: s_setpc_b64 s[30:31]5084;5085; EG-LABEL: v_fdiv_neglhs_f32_dynamic:5086; EG: ; %bb.0:5087; EG-NEXT: CF_END5088; EG-NEXT: PAD5089 %neg.x = fneg float %x5090 %div = fdiv float %neg.x, %y5091 ret float %div5092}5093 5094define float @v_fdiv_neglhs_f32_dynamic_25ulp(float %x, float %y) #2 {5095; GFX6-LABEL: v_fdiv_neglhs_f32_dynamic_25ulp:5096; GFX6: ; %bb.0:5097; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5098; GFX6-NEXT: s_mov_b32 s4, 0x7f8000005099; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v15100; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s45101; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc5102; GFX6-NEXT: v_rcp_f32_e32 v2, v25103; GFX6-NEXT: v_frexp_mant_f32_e64 v3, -v05104; GFX6-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s45105; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v15106; GFX6-NEXT: v_cndmask_b32_e64 v3, -v0, v3, s[4:5]5107; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v05108; GFX6-NEXT: v_mul_f32_e32 v2, v3, v25109; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v15110; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v05111; GFX6-NEXT: s_setpc_b64 s[30:31]5112;5113; GFX7-LABEL: v_fdiv_neglhs_f32_dynamic_25ulp:5114; GFX7: ; %bb.0:5115; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5116; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v15117; GFX7-NEXT: v_rcp_f32_e32 v2, v25118; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v15119; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v05120; GFX7-NEXT: v_frexp_mant_f32_e64 v0, -v05121; GFX7-NEXT: v_mul_f32_e32 v0, v0, v25122; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v15123; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v15124; GFX7-NEXT: s_setpc_b64 s[30:31]5125;5126; GFX8-LABEL: v_fdiv_neglhs_f32_dynamic_25ulp:5127; GFX8: ; %bb.0:5128; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5129; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v15130; GFX8-NEXT: v_rcp_f32_e32 v2, v25131; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v15132; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v05133; GFX8-NEXT: v_frexp_mant_f32_e64 v0, -v05134; GFX8-NEXT: v_mul_f32_e32 v0, v0, v25135; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v15136; GFX8-NEXT: v_ldexp_f32 v0, v0, v15137; GFX8-NEXT: s_setpc_b64 s[30:31]5138;5139; GFX10-LABEL: v_fdiv_neglhs_f32_dynamic_25ulp:5140; GFX10: ; %bb.0:5141; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5142; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v15143; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v15144; GFX10-NEXT: v_frexp_mant_f32_e64 v3, -v05145; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v05146; GFX10-NEXT: v_rcp_f32_e32 v2, v25147; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v15148; GFX10-NEXT: v_mul_f32_e32 v2, v3, v25149; GFX10-NEXT: v_ldexp_f32 v0, v2, v05150; GFX10-NEXT: s_setpc_b64 s[30:31]5151;5152; GFX11-LABEL: v_fdiv_neglhs_f32_dynamic_25ulp:5153; GFX11: ; %bb.0:5154; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5155; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v15156; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v15157; GFX11-NEXT: v_frexp_mant_f32_e64 v3, -v05158; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v05159; GFX11-NEXT: v_rcp_f32_e32 v2, v25160; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v15161; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5162; GFX11-NEXT: v_mul_f32_e32 v2, v3, v25163; GFX11-NEXT: v_ldexp_f32 v0, v2, v05164; GFX11-NEXT: s_setpc_b64 s[30:31]5165;5166; EG-LABEL: v_fdiv_neglhs_f32_dynamic_25ulp:5167; EG: ; %bb.0:5168; EG-NEXT: CF_END5169; EG-NEXT: PAD5170 %neg.x = fneg float %x5171 %div = fdiv float %neg.x, %y, !fpmath !05172 ret float %div5173}5174 5175define float @v_fdiv_neglhs_f32_daz(float %x, float %y) #0 {5176; GFX6-FASTFMA-LABEL: v_fdiv_neglhs_f32_daz:5177; GFX6-FASTFMA: ; %bb.0:5178; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5179; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v05180; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v25181; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, -v0, v1, -v05182; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35183; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.05184; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v35185; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v35186; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v45187; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v55188; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v45189; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05190; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v55191; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, -v05192; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]5193;5194; GFX6-SLOWFMA-LABEL: v_fdiv_neglhs_f32_daz:5195; GFX6-SLOWFMA: ; %bb.0:5196; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5197; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v05198; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, -v0, v1, -v05199; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v25200; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35201; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.05202; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v45203; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v45204; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v35205; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v55206; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v35207; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05208; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v55209; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, -v05210; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]5211;5212; GFX7-LABEL: v_fdiv_neglhs_f32_daz:5213; GFX7: ; %bb.0:5214; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5215; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v05216; GFX7-NEXT: v_rcp_f32_e32 v3, v25217; GFX7-NEXT: v_div_scale_f32 v4, vcc, -v0, v1, -v05218; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35219; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.05220; GFX7-NEXT: v_fma_f32 v3, v5, v3, v35221; GFX7-NEXT: v_mul_f32_e32 v5, v4, v35222; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v45223; GFX7-NEXT: v_fma_f32 v5, v6, v3, v55224; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v45225; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05226; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v55227; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, -v05228; GFX7-NEXT: s_setpc_b64 s[30:31]5229;5230; GFX8-LABEL: v_fdiv_neglhs_f32_daz:5231; GFX8: ; %bb.0:5232; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5233; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, -v05234; GFX8-NEXT: v_div_scale_f32 v3, vcc, -v0, v1, -v05235; GFX8-NEXT: v_rcp_f32_e32 v4, v25236; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35237; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.05238; GFX8-NEXT: v_fma_f32 v4, v5, v4, v45239; GFX8-NEXT: v_mul_f32_e32 v5, v3, v45240; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v35241; GFX8-NEXT: v_fma_f32 v5, v6, v4, v55242; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v35243; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05244; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v55245; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, -v05246; GFX8-NEXT: s_setpc_b64 s[30:31]5247;5248; GFX10-LABEL: v_fdiv_neglhs_f32_daz:5249; GFX10: ; %bb.0:5250; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5251; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, -v05252; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, -v0, v1, -v05253; GFX10-NEXT: v_rcp_f32_e32 v3, v25254; GFX10-NEXT: s_denorm_mode 155255; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.05256; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v35257; GFX10-NEXT: v_mul_f32_e32 v5, v4, v35258; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v45259; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v35260; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v45261; GFX10-NEXT: s_denorm_mode 125262; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v55263; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, -v05264; GFX10-NEXT: s_setpc_b64 s[30:31]5265;5266; GFX11-LABEL: v_fdiv_neglhs_f32_daz:5267; GFX11: ; %bb.0:5268; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5269; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, -v05270; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, -v0, v1, -v05271; GFX11-NEXT: v_rcp_f32_e32 v3, v25272; GFX11-NEXT: s_denorm_mode 155273; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5274; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.05275; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v35276; GFX11-NEXT: v_mul_f32_e32 v5, v4, v35277; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v45278; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v35279; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v45280; GFX11-NEXT: s_denorm_mode 125281; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v55282; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, -v05283; GFX11-NEXT: s_setpc_b64 s[30:31]5284;5285; EG-LABEL: v_fdiv_neglhs_f32_daz:5286; EG: ; %bb.0:5287; EG-NEXT: CF_END5288; EG-NEXT: PAD5289 %neg.x = fneg float %x5290 %div = fdiv float %neg.x, %y5291 ret float %div5292}5293 5294define float @v_fdiv_neglhs_f32_daz_25ulp(float %x, float %y) #0 {5295; GFX678-LABEL: v_fdiv_neglhs_f32_daz_25ulp:5296; GFX678: ; %bb.0:5297; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5298; GFX678-NEXT: s_mov_b32 s4, 0x6f8000005299; GFX678-NEXT: v_mov_b32_e32 v2, 0x2f8000005300; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s45301; GFX678-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc5302; GFX678-NEXT: v_mul_f32_e32 v1, v1, v25303; GFX678-NEXT: v_rcp_f32_e32 v1, v15304; GFX678-NEXT: v_mul_f32_e64 v0, -v0, v15305; GFX678-NEXT: v_mul_f32_e32 v0, v2, v05306; GFX678-NEXT: s_setpc_b64 s[30:31]5307;5308; GFX10-LABEL: v_fdiv_neglhs_f32_daz_25ulp:5309; GFX10: ; %bb.0:5310; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5311; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|5312; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s45313; GFX10-NEXT: v_mul_f32_e32 v1, v1, v25314; GFX10-NEXT: v_rcp_f32_e32 v1, v15315; GFX10-NEXT: v_mul_f32_e64 v0, -v0, v15316; GFX10-NEXT: v_mul_f32_e32 v0, v2, v05317; GFX10-NEXT: s_setpc_b64 s[30:31]5318;5319; GFX11-LABEL: v_fdiv_neglhs_f32_daz_25ulp:5320; GFX11: ; %bb.0:5321; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5322; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|5323; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s05324; GFX11-NEXT: v_mul_f32_e32 v1, v1, v25325; GFX11-NEXT: v_rcp_f32_e32 v1, v15326; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5327; GFX11-NEXT: v_mul_f32_e64 v0, -v0, v15328; GFX11-NEXT: v_mul_f32_e32 v0, v2, v05329; GFX11-NEXT: s_setpc_b64 s[30:31]5330;5331; EG-LABEL: v_fdiv_neglhs_f32_daz_25ulp:5332; EG: ; %bb.0:5333; EG-NEXT: CF_END5334; EG-NEXT: PAD5335 %neg.x = fneg float %x5336 %div = fdiv float %neg.x, %y, !fpmath !05337 ret float %div5338}5339 5340define float @v_fdiv_negrhs_f32_ieee(float %x, float %y) #1 {5341; GFX6-FASTFMA-LABEL: v_fdiv_negrhs_f32_ieee:5342; GFX6-FASTFMA: ; %bb.0:5343; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5344; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05345; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v25346; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.05347; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v35348; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, -v1, v05349; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v35350; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v45351; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v55352; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v45353; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v55354; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, -v1, v05355; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]5356;5357; GFX6-SLOWFMA-LABEL: v_fdiv_negrhs_f32_ieee:5358; GFX6-SLOWFMA: ; %bb.0:5359; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5360; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05361; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, -v1, v05362; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v25363; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.05364; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v45365; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v45366; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v35367; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v55368; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v35369; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v55370; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, -v1, v05371; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]5372;5373; GFX7-LABEL: v_fdiv_negrhs_f32_ieee:5374; GFX7: ; %bb.0:5375; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5376; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05377; GFX7-NEXT: v_rcp_f32_e32 v3, v25378; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.05379; GFX7-NEXT: v_fma_f32 v3, v4, v3, v35380; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, -v1, v05381; GFX7-NEXT: v_mul_f32_e32 v5, v4, v35382; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v45383; GFX7-NEXT: v_fma_f32 v5, v6, v3, v55384; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v45385; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v55386; GFX7-NEXT: v_div_fixup_f32 v0, v2, -v1, v05387; GFX7-NEXT: s_setpc_b64 s[30:31]5388;5389; GFX8-LABEL: v_fdiv_negrhs_f32_ieee:5390; GFX8: ; %bb.0:5391; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5392; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05393; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, -v1, v05394; GFX8-NEXT: v_rcp_f32_e32 v4, v25395; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.05396; GFX8-NEXT: v_fma_f32 v4, v5, v4, v45397; GFX8-NEXT: v_mul_f32_e32 v5, v3, v45398; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v35399; GFX8-NEXT: v_fma_f32 v5, v6, v4, v55400; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v35401; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v55402; GFX8-NEXT: v_div_fixup_f32 v0, v2, -v1, v05403; GFX8-NEXT: s_setpc_b64 s[30:31]5404;5405; GFX10-LABEL: v_fdiv_negrhs_f32_ieee:5406; GFX10: ; %bb.0:5407; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5408; GFX10-NEXT: v_div_scale_f32 v2, s4, -v1, -v1, v05409; GFX10-NEXT: v_rcp_f32_e32 v3, v25410; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.05411; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v35412; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, -v1, v05413; GFX10-NEXT: v_mul_f32_e32 v5, v4, v35414; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v45415; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v35416; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v45417; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v55418; GFX10-NEXT: v_div_fixup_f32 v0, v2, -v1, v05419; GFX10-NEXT: s_setpc_b64 s[30:31]5420;5421; GFX11-LABEL: v_fdiv_negrhs_f32_ieee:5422; GFX11: ; %bb.0:5423; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5424; GFX11-NEXT: v_div_scale_f32 v2, null, -v1, -v1, v05425; GFX11-NEXT: v_rcp_f32_e32 v3, v25426; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5427; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.05428; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v35429; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, -v1, v05430; GFX11-NEXT: v_mul_f32_e32 v5, v4, v35431; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v45432; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v35433; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v45434; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v55435; GFX11-NEXT: v_div_fixup_f32 v0, v2, -v1, v05436; GFX11-NEXT: s_setpc_b64 s[30:31]5437;5438; EG-LABEL: v_fdiv_negrhs_f32_ieee:5439; EG: ; %bb.0:5440; EG-NEXT: CF_END5441; EG-NEXT: PAD5442 %neg.y = fneg float %y5443 %div = fdiv float %x, %neg.y5444 ret float %div5445}5446 5447define float @v_fdiv_negrhs_f32_ieee_25ulp(float %x, float %y) #1 {5448; GFX6-LABEL: v_fdiv_negrhs_f32_ieee_25ulp:5449; GFX6: ; %bb.0:5450; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5451; GFX6-NEXT: s_mov_b32 s6, 0x7f8000005452; GFX6-NEXT: v_frexp_mant_f32_e64 v2, -v15453; GFX6-NEXT: v_cmp_lt_f32_e64 s[4:5], |v1|, s65454; GFX6-NEXT: v_cndmask_b32_e64 v2, -v1, v2, s[4:5]5455; GFX6-NEXT: v_rcp_f32_e32 v2, v25456; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v05457; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65458; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v15459; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc5460; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v05461; GFX6-NEXT: v_mul_f32_e32 v2, v3, v25462; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v15463; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v05464; GFX6-NEXT: s_setpc_b64 s[30:31]5465;5466; GFX7-LABEL: v_fdiv_negrhs_f32_ieee_25ulp:5467; GFX7: ; %bb.0:5468; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5469; GFX7-NEXT: v_frexp_mant_f32_e64 v2, -v15470; GFX7-NEXT: v_rcp_f32_e32 v2, v25471; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v15472; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v05473; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v05474; GFX7-NEXT: v_mul_f32_e32 v0, v0, v25475; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v15476; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v15477; GFX7-NEXT: s_setpc_b64 s[30:31]5478;5479; GFX8-LABEL: v_fdiv_negrhs_f32_ieee_25ulp:5480; GFX8: ; %bb.0:5481; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5482; GFX8-NEXT: v_frexp_mant_f32_e64 v2, -v15483; GFX8-NEXT: v_rcp_f32_e32 v2, v25484; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v15485; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v05486; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v05487; GFX8-NEXT: v_mul_f32_e32 v0, v0, v25488; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v15489; GFX8-NEXT: v_ldexp_f32 v0, v0, v15490; GFX8-NEXT: s_setpc_b64 s[30:31]5491;5492; GFX10-LABEL: v_fdiv_negrhs_f32_ieee_25ulp:5493; GFX10: ; %bb.0:5494; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5495; GFX10-NEXT: v_frexp_mant_f32_e64 v2, -v15496; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v15497; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v05498; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v05499; GFX10-NEXT: v_rcp_f32_e32 v2, v25500; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v15501; GFX10-NEXT: v_mul_f32_e32 v2, v3, v25502; GFX10-NEXT: v_ldexp_f32 v0, v2, v05503; GFX10-NEXT: s_setpc_b64 s[30:31]5504;5505; GFX11-LABEL: v_fdiv_negrhs_f32_ieee_25ulp:5506; GFX11: ; %bb.0:5507; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5508; GFX11-NEXT: v_frexp_mant_f32_e64 v2, -v15509; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v15510; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v05511; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v05512; GFX11-NEXT: v_rcp_f32_e32 v2, v25513; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v15514; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5515; GFX11-NEXT: v_mul_f32_e32 v2, v3, v25516; GFX11-NEXT: v_ldexp_f32 v0, v2, v05517; GFX11-NEXT: s_setpc_b64 s[30:31]5518;5519; EG-LABEL: v_fdiv_negrhs_f32_ieee_25ulp:5520; EG: ; %bb.0:5521; EG-NEXT: CF_END5522; EG-NEXT: PAD5523 %neg.y = fneg float %y5524 %div = fdiv float %x, %neg.y, !fpmath !05525 ret float %div5526}5527 5528define float @v_fdiv_negrhs_f32_dynamic(float %x, float %y) #2 {5529; GFX6-FASTFMA-LABEL: v_fdiv_negrhs_f32_dynamic:5530; GFX6-FASTFMA: ; %bb.0:5531; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5532; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05533; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v25534; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, -v1, v05535; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5536; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35537; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.05538; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v35539; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v35540; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v45541; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v55542; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v45543; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45544; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v55545; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, -v1, v05546; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]5547;5548; GFX6-SLOWFMA-LABEL: v_fdiv_negrhs_f32_dynamic:5549; GFX6-SLOWFMA: ; %bb.0:5550; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5551; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05552; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, -v1, v05553; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5554; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v25555; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35556; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.05557; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v45558; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v45559; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v35560; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v55561; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v35562; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45563; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v55564; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, -v1, v05565; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]5566;5567; GFX7-LABEL: v_fdiv_negrhs_f32_dynamic:5568; GFX7: ; %bb.0:5569; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5570; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05571; GFX7-NEXT: v_rcp_f32_e32 v3, v25572; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, -v1, v05573; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5574; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35575; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.05576; GFX7-NEXT: v_fma_f32 v3, v5, v3, v35577; GFX7-NEXT: v_mul_f32_e32 v5, v4, v35578; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v45579; GFX7-NEXT: v_fma_f32 v5, v6, v3, v55580; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v45581; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45582; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v55583; GFX7-NEXT: v_div_fixup_f32 v0, v2, -v1, v05584; GFX7-NEXT: s_setpc_b64 s[30:31]5585;5586; GFX8-LABEL: v_fdiv_negrhs_f32_dynamic:5587; GFX8: ; %bb.0:5588; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5589; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05590; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, -v1, v05591; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5592; GFX8-NEXT: v_rcp_f32_e32 v4, v25593; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35594; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.05595; GFX8-NEXT: v_fma_f32 v4, v5, v4, v45596; GFX8-NEXT: v_mul_f32_e32 v5, v3, v45597; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v35598; GFX8-NEXT: v_fma_f32 v5, v6, v4, v55599; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v35600; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45601; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v55602; GFX8-NEXT: v_div_fixup_f32 v0, v2, -v1, v05603; GFX8-NEXT: s_setpc_b64 s[30:31]5604;5605; GFX10-LABEL: v_fdiv_negrhs_f32_dynamic:5606; GFX10: ; %bb.0:5607; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5608; GFX10-NEXT: v_div_scale_f32 v2, s4, -v1, -v1, v05609; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, -v1, v05610; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)5611; GFX10-NEXT: v_rcp_f32_e32 v3, v25612; GFX10-NEXT: s_denorm_mode 155613; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.05614; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v35615; GFX10-NEXT: v_mul_f32_e32 v5, v4, v35616; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v45617; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v35618; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v45619; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s45620; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v55621; GFX10-NEXT: v_div_fixup_f32 v0, v2, -v1, v05622; GFX10-NEXT: s_setpc_b64 s[30:31]5623;5624; GFX11-LABEL: v_fdiv_negrhs_f32_dynamic:5625; GFX11: ; %bb.0:5626; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5627; GFX11-NEXT: v_div_scale_f32 v2, null, -v1, -v1, v05628; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, -v1, v05629; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)5630; GFX11-NEXT: v_rcp_f32_e32 v3, v25631; GFX11-NEXT: s_denorm_mode 155632; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5633; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.05634; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v35635; GFX11-NEXT: v_mul_f32_e32 v5, v4, v35636; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v45637; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v35638; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v45639; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s05640; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v55641; GFX11-NEXT: v_div_fixup_f32 v0, v2, -v1, v05642; GFX11-NEXT: s_setpc_b64 s[30:31]5643;5644; EG-LABEL: v_fdiv_negrhs_f32_dynamic:5645; EG: ; %bb.0:5646; EG-NEXT: CF_END5647; EG-NEXT: PAD5648 %neg.y = fneg float %y5649 %div = fdiv float %x, %neg.y5650 ret float %div5651}5652 5653define float @v_fdiv_negrhs_f32_dynamic_25ulp(float %x, float %y) #2 {5654; GFX6-LABEL: v_fdiv_negrhs_f32_dynamic_25ulp:5655; GFX6: ; %bb.0:5656; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5657; GFX6-NEXT: s_mov_b32 s6, 0x7f8000005658; GFX6-NEXT: v_frexp_mant_f32_e64 v2, -v15659; GFX6-NEXT: v_cmp_lt_f32_e64 s[4:5], |v1|, s65660; GFX6-NEXT: v_cndmask_b32_e64 v2, -v1, v2, s[4:5]5661; GFX6-NEXT: v_rcp_f32_e32 v2, v25662; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v05663; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s65664; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v15665; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc5666; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v05667; GFX6-NEXT: v_mul_f32_e32 v2, v3, v25668; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v15669; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v05670; GFX6-NEXT: s_setpc_b64 s[30:31]5671;5672; GFX7-LABEL: v_fdiv_negrhs_f32_dynamic_25ulp:5673; GFX7: ; %bb.0:5674; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5675; GFX7-NEXT: v_frexp_mant_f32_e64 v2, -v15676; GFX7-NEXT: v_rcp_f32_e32 v2, v25677; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v15678; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v05679; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v05680; GFX7-NEXT: v_mul_f32_e32 v0, v0, v25681; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v15682; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v15683; GFX7-NEXT: s_setpc_b64 s[30:31]5684;5685; GFX8-LABEL: v_fdiv_negrhs_f32_dynamic_25ulp:5686; GFX8: ; %bb.0:5687; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5688; GFX8-NEXT: v_frexp_mant_f32_e64 v2, -v15689; GFX8-NEXT: v_rcp_f32_e32 v2, v25690; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v15691; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v05692; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v05693; GFX8-NEXT: v_mul_f32_e32 v0, v0, v25694; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v15695; GFX8-NEXT: v_ldexp_f32 v0, v0, v15696; GFX8-NEXT: s_setpc_b64 s[30:31]5697;5698; GFX10-LABEL: v_fdiv_negrhs_f32_dynamic_25ulp:5699; GFX10: ; %bb.0:5700; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5701; GFX10-NEXT: v_frexp_mant_f32_e64 v2, -v15702; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v15703; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v05704; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v05705; GFX10-NEXT: v_rcp_f32_e32 v2, v25706; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v15707; GFX10-NEXT: v_mul_f32_e32 v2, v3, v25708; GFX10-NEXT: v_ldexp_f32 v0, v2, v05709; GFX10-NEXT: s_setpc_b64 s[30:31]5710;5711; GFX11-LABEL: v_fdiv_negrhs_f32_dynamic_25ulp:5712; GFX11: ; %bb.0:5713; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5714; GFX11-NEXT: v_frexp_mant_f32_e64 v2, -v15715; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v15716; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v05717; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v05718; GFX11-NEXT: v_rcp_f32_e32 v2, v25719; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v15720; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5721; GFX11-NEXT: v_mul_f32_e32 v2, v3, v25722; GFX11-NEXT: v_ldexp_f32 v0, v2, v05723; GFX11-NEXT: s_setpc_b64 s[30:31]5724;5725; EG-LABEL: v_fdiv_negrhs_f32_dynamic_25ulp:5726; EG: ; %bb.0:5727; EG-NEXT: CF_END5728; EG-NEXT: PAD5729 %neg.y = fneg float %y5730 %div = fdiv float %x, %neg.y, !fpmath !05731 ret float %div5732}5733 5734define float @v_fdiv_negrhs_f32_daz(float %x, float %y) #0 {5735; GFX6-FASTFMA-LABEL: v_fdiv_negrhs_f32_daz:5736; GFX6-FASTFMA: ; %bb.0:5737; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5738; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05739; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v25740; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, -v1, v05741; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35742; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.05743; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v35744; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v35745; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v45746; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v55747; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v45748; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05749; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v55750; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, -v1, v05751; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]5752;5753; GFX6-SLOWFMA-LABEL: v_fdiv_negrhs_f32_daz:5754; GFX6-SLOWFMA: ; %bb.0:5755; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5756; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05757; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, -v1, v05758; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v25759; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35760; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.05761; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v45762; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v45763; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v35764; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v55765; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v35766; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05767; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v55768; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, -v1, v05769; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]5770;5771; GFX7-LABEL: v_fdiv_negrhs_f32_daz:5772; GFX7: ; %bb.0:5773; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5774; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05775; GFX7-NEXT: v_rcp_f32_e32 v3, v25776; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, -v1, v05777; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35778; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.05779; GFX7-NEXT: v_fma_f32 v3, v5, v3, v35780; GFX7-NEXT: v_mul_f32_e32 v5, v4, v35781; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v45782; GFX7-NEXT: v_fma_f32 v5, v6, v3, v55783; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v45784; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05785; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v55786; GFX7-NEXT: v_div_fixup_f32 v0, v2, -v1, v05787; GFX7-NEXT: s_setpc_b64 s[30:31]5788;5789; GFX8-LABEL: v_fdiv_negrhs_f32_daz:5790; GFX8: ; %bb.0:5791; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5792; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], -v1, -v1, v05793; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, -v1, v05794; GFX8-NEXT: v_rcp_f32_e32 v4, v25795; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 35796; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.05797; GFX8-NEXT: v_fma_f32 v4, v5, v4, v45798; GFX8-NEXT: v_mul_f32_e32 v5, v3, v45799; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v35800; GFX8-NEXT: v_fma_f32 v5, v6, v4, v55801; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v35802; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 05803; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v55804; GFX8-NEXT: v_div_fixup_f32 v0, v2, -v1, v05805; GFX8-NEXT: s_setpc_b64 s[30:31]5806;5807; GFX10-LABEL: v_fdiv_negrhs_f32_daz:5808; GFX10: ; %bb.0:5809; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5810; GFX10-NEXT: v_div_scale_f32 v2, s4, -v1, -v1, v05811; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, -v1, v05812; GFX10-NEXT: v_rcp_f32_e32 v3, v25813; GFX10-NEXT: s_denorm_mode 155814; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.05815; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v35816; GFX10-NEXT: v_mul_f32_e32 v5, v4, v35817; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v45818; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v35819; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v45820; GFX10-NEXT: s_denorm_mode 125821; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v55822; GFX10-NEXT: v_div_fixup_f32 v0, v2, -v1, v05823; GFX10-NEXT: s_setpc_b64 s[30:31]5824;5825; GFX11-LABEL: v_fdiv_negrhs_f32_daz:5826; GFX11: ; %bb.0:5827; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5828; GFX11-NEXT: v_div_scale_f32 v2, null, -v1, -v1, v05829; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, -v1, v05830; GFX11-NEXT: v_rcp_f32_e32 v3, v25831; GFX11-NEXT: s_denorm_mode 155832; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5833; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.05834; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v35835; GFX11-NEXT: v_mul_f32_e32 v5, v4, v35836; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v45837; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v35838; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v45839; GFX11-NEXT: s_denorm_mode 125840; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v55841; GFX11-NEXT: v_div_fixup_f32 v0, v2, -v1, v05842; GFX11-NEXT: s_setpc_b64 s[30:31]5843;5844; EG-LABEL: v_fdiv_negrhs_f32_daz:5845; EG: ; %bb.0:5846; EG-NEXT: CF_END5847; EG-NEXT: PAD5848 %neg.y = fneg float %y5849 %div = fdiv float %x, %neg.y5850 ret float %div5851}5852 5853define float @v_fdiv_negrhs_f32_daz_25ulp(float %x, float %y) #0 {5854; GFX678-LABEL: v_fdiv_negrhs_f32_daz_25ulp:5855; GFX678: ; %bb.0:5856; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5857; GFX678-NEXT: s_mov_b32 s4, 0x6f8000005858; GFX678-NEXT: v_mov_b32_e32 v2, 0x2f8000005859; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s45860; GFX678-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc5861; GFX678-NEXT: v_mul_f32_e64 v1, -v1, v25862; GFX678-NEXT: v_rcp_f32_e32 v1, v15863; GFX678-NEXT: v_mul_f32_e32 v0, v0, v15864; GFX678-NEXT: v_mul_f32_e32 v0, v2, v05865; GFX678-NEXT: s_setpc_b64 s[30:31]5866;5867; GFX10-LABEL: v_fdiv_negrhs_f32_daz_25ulp:5868; GFX10: ; %bb.0:5869; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5870; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|5871; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s45872; GFX10-NEXT: v_mul_f32_e64 v1, -v1, v25873; GFX10-NEXT: v_rcp_f32_e32 v1, v15874; GFX10-NEXT: v_mul_f32_e32 v0, v0, v15875; GFX10-NEXT: v_mul_f32_e32 v0, v2, v05876; GFX10-NEXT: s_setpc_b64 s[30:31]5877;5878; GFX11-LABEL: v_fdiv_negrhs_f32_daz_25ulp:5879; GFX11: ; %bb.0:5880; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5881; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|5882; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s05883; GFX11-NEXT: v_mul_f32_e64 v1, -v1, v25884; GFX11-NEXT: v_rcp_f32_e32 v1, v15885; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5886; GFX11-NEXT: v_mul_f32_e32 v0, v0, v15887; GFX11-NEXT: v_mul_f32_e32 v0, v2, v05888; GFX11-NEXT: s_setpc_b64 s[30:31]5889;5890; EG-LABEL: v_fdiv_negrhs_f32_daz_25ulp:5891; EG: ; %bb.0:5892; EG-NEXT: CF_END5893; EG-NEXT: PAD5894 %neg.y = fneg float %y5895 %div = fdiv float %x, %neg.y, !fpmath !05896 ret float %div5897}5898 5899define float @v_fdiv_f32_constrhs0_ieee(float %x) #1 {5900; GFX6-FASTFMA-LABEL: v_fdiv_f32_constrhs0_ieee:5901; GFX6-FASTFMA: ; %bb.0:5902; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5903; GFX6-FASTFMA-NEXT: s_mov_b32 s6, 0x4640e4005904; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v05905; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v15906; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v1, v2, 1.05907; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v3, v2, v25908; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, v0, s6, v05909; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v25910; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v35911; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v45912; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v35913; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v45914; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, s6, v05915; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]5916;5917; GFX6-SLOWFMA-LABEL: v_fdiv_f32_constrhs0_ieee:5918; GFX6-SLOWFMA: ; %bb.0:5919; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5920; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, 0x4640e4005921; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v05922; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, v0, s6, v05923; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v15924; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.05925; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v35926; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v35927; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v25928; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v45929; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v25930; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v45931; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, s6, v05932; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]5933;5934; GFX7-LABEL: v_fdiv_f32_constrhs0_ieee:5935; GFX7: ; %bb.0:5936; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5937; GFX7-NEXT: s_mov_b32 s6, 0x4640e4005938; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v05939; GFX7-NEXT: v_rcp_f32_e32 v2, v15940; GFX7-NEXT: v_fma_f32 v3, -v1, v2, 1.05941; GFX7-NEXT: v_fma_f32 v2, v3, v2, v25942; GFX7-NEXT: v_div_scale_f32 v3, vcc, v0, s6, v05943; GFX7-NEXT: v_mul_f32_e32 v4, v3, v25944; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v35945; GFX7-NEXT: v_fma_f32 v4, v5, v2, v45946; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v35947; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v45948; GFX7-NEXT: v_div_fixup_f32 v0, v1, s6, v05949; GFX7-NEXT: s_setpc_b64 s[30:31]5950;5951; GFX8-LABEL: v_fdiv_f32_constrhs0_ieee:5952; GFX8: ; %bb.0:5953; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5954; GFX8-NEXT: s_mov_b32 s6, 0x4640e4005955; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v05956; GFX8-NEXT: v_div_scale_f32 v2, vcc, v0, s6, v05957; GFX8-NEXT: v_rcp_f32_e32 v3, v15958; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.05959; GFX8-NEXT: v_fma_f32 v3, v4, v3, v35960; GFX8-NEXT: v_mul_f32_e32 v4, v2, v35961; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v25962; GFX8-NEXT: v_fma_f32 v4, v5, v3, v45963; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v25964; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v45965; GFX8-NEXT: v_div_fixup_f32 v0, v1, s6, v05966; GFX8-NEXT: s_setpc_b64 s[30:31]5967;5968; GFX10-LABEL: v_fdiv_f32_constrhs0_ieee:5969; GFX10: ; %bb.0:5970; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5971; GFX10-NEXT: v_div_scale_f32 v1, s4, 0x4640e400, 0x4640e400, v05972; GFX10-NEXT: v_rcp_f32_e32 v2, v15973; GFX10-NEXT: v_fma_f32 v3, -v1, v2, 1.05974; GFX10-NEXT: v_fmac_f32_e32 v2, v3, v25975; GFX10-NEXT: v_div_scale_f32 v3, vcc_lo, v0, 0x4640e400, v05976; GFX10-NEXT: v_mul_f32_e32 v4, v3, v25977; GFX10-NEXT: v_fma_f32 v5, -v1, v4, v35978; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v25979; GFX10-NEXT: v_fma_f32 v1, -v1, v4, v35980; GFX10-NEXT: v_div_fmas_f32 v1, v1, v2, v45981; GFX10-NEXT: v_div_fixup_f32 v0, v1, 0x4640e400, v05982; GFX10-NEXT: s_setpc_b64 s[30:31]5983;5984; GFX11-LABEL: v_fdiv_f32_constrhs0_ieee:5985; GFX11: ; %bb.0:5986; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5987; GFX11-NEXT: v_div_scale_f32 v1, null, 0x4640e400, 0x4640e400, v05988; GFX11-NEXT: v_rcp_f32_e32 v2, v15989; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)5990; GFX11-NEXT: v_fma_f32 v3, -v1, v2, 1.05991; GFX11-NEXT: v_fmac_f32_e32 v2, v3, v25992; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, v0, 0x4640e400, v05993; GFX11-NEXT: v_mul_f32_e32 v4, v3, v25994; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v35995; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v25996; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v35997; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v45998; GFX11-NEXT: v_div_fixup_f32 v0, v1, 0x4640e400, v05999; GFX11-NEXT: s_setpc_b64 s[30:31]6000;6001; EG-LABEL: v_fdiv_f32_constrhs0_ieee:6002; EG: ; %bb.0:6003; EG-NEXT: CF_END6004; EG-NEXT: PAD6005 %div = fdiv float %x, 12345.06006 ret float %div6007}6008 6009define float @v_fdiv_f32_constrhs0_ieee_25ulp(float %x) #1 {6010; GFX6-LABEL: v_fdiv_f32_constrhs0_ieee_25ulp:6011; GFX6: ; %bb.0:6012; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6013; GFX6-NEXT: s_mov_b32 s4, 0x7f8000006014; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v06015; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s46016; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, 0x4640e4006017; GFX6-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc6018; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v06019; GFX6-NEXT: v_mul_f32_e32 v2, 0x3fa9e0f0, v26020; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v16021; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v06022; GFX6-NEXT: s_setpc_b64 s[30:31]6023;6024; GFX7-LABEL: v_fdiv_f32_constrhs0_ieee_25ulp:6025; GFX7: ; %bb.0:6026; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6027; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v06028; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v06029; GFX7-NEXT: v_mul_f32_e32 v0, 0x3fa9e0f0, v06030; GFX7-NEXT: v_add_i32_e32 v1, vcc, -14, v16031; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v16032; GFX7-NEXT: s_setpc_b64 s[30:31]6033;6034; GFX8-LABEL: v_fdiv_f32_constrhs0_ieee_25ulp:6035; GFX8: ; %bb.0:6036; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6037; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v06038; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v06039; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fa9e0f0, v06040; GFX8-NEXT: v_add_u32_e32 v1, vcc, -14, v16041; GFX8-NEXT: v_ldexp_f32 v0, v0, v16042; GFX8-NEXT: s_setpc_b64 s[30:31]6043;6044; GFX10-LABEL: v_fdiv_f32_constrhs0_ieee_25ulp:6045; GFX10: ; %bb.0:6046; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6047; GFX10-NEXT: v_frexp_mant_f32_e32 v1, v06048; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v06049; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fa9e0f0, v16050; GFX10-NEXT: v_add_nc_u32_e32 v0, -14, v06051; GFX10-NEXT: v_ldexp_f32 v0, v1, v06052; GFX10-NEXT: s_setpc_b64 s[30:31]6053;6054; GFX11-LABEL: v_fdiv_f32_constrhs0_ieee_25ulp:6055; GFX11: ; %bb.0:6056; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6057; GFX11-NEXT: v_frexp_mant_f32_e32 v1, v06058; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v06059; GFX11-NEXT: v_dual_mul_f32 v1, 0x3fa9e0f0, v1 :: v_dual_add_nc_u32 v0, -14, v06060; GFX11-NEXT: v_ldexp_f32 v0, v1, v06061; GFX11-NEXT: s_setpc_b64 s[30:31]6062;6063; EG-LABEL: v_fdiv_f32_constrhs0_ieee_25ulp:6064; EG: ; %bb.0:6065; EG-NEXT: CF_END6066; EG-NEXT: PAD6067 %div = fdiv float %x, 12345.0, !fpmath !06068 ret float %div6069}6070 6071define float @v_fdiv_f32_constrhs0_dynamic(float %x) #2 {6072; GFX6-FASTFMA-LABEL: v_fdiv_f32_constrhs0_dynamic:6073; GFX6-FASTFMA: ; %bb.0:6074; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6075; GFX6-FASTFMA-NEXT: s_mov_b32 s6, 0x4640e4006076; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06077; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v16078; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, v0, s6, v06079; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6080; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36081; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v1, v2, 1.06082; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v4, v2, v26083; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v26084; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v36085; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v46086; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v36087; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46088; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v46089; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, s6, v06090; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]6091;6092; GFX6-SLOWFMA-LABEL: v_fdiv_f32_constrhs0_dynamic:6093; GFX6-SLOWFMA: ; %bb.0:6094; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6095; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, 0x4640e4006096; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06097; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, v0, s6, v06098; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6099; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v16100; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36101; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.06102; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v36103; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v36104; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v26105; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v46106; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v26107; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46108; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v46109; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, s6, v06110; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]6111;6112; GFX7-LABEL: v_fdiv_f32_constrhs0_dynamic:6113; GFX7: ; %bb.0:6114; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6115; GFX7-NEXT: s_mov_b32 s6, 0x4640e4006116; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06117; GFX7-NEXT: v_rcp_f32_e32 v2, v16118; GFX7-NEXT: v_div_scale_f32 v3, vcc, v0, s6, v06119; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6120; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36121; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.06122; GFX7-NEXT: v_fma_f32 v2, v4, v2, v26123; GFX7-NEXT: v_mul_f32_e32 v4, v3, v26124; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v36125; GFX7-NEXT: v_fma_f32 v4, v5, v2, v46126; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v36127; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46128; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v46129; GFX7-NEXT: v_div_fixup_f32 v0, v1, s6, v06130; GFX7-NEXT: s_setpc_b64 s[30:31]6131;6132; GFX8-LABEL: v_fdiv_f32_constrhs0_dynamic:6133; GFX8: ; %bb.0:6134; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6135; GFX8-NEXT: s_mov_b32 s6, 0x4640e4006136; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06137; GFX8-NEXT: v_div_scale_f32 v2, vcc, v0, s6, v06138; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6139; GFX8-NEXT: v_rcp_f32_e32 v3, v16140; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36141; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.06142; GFX8-NEXT: v_fma_f32 v3, v4, v3, v36143; GFX8-NEXT: v_mul_f32_e32 v4, v2, v36144; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v26145; GFX8-NEXT: v_fma_f32 v4, v5, v3, v46146; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v26147; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46148; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v46149; GFX8-NEXT: v_div_fixup_f32 v0, v1, s6, v06150; GFX8-NEXT: s_setpc_b64 s[30:31]6151;6152; GFX10-LABEL: v_fdiv_f32_constrhs0_dynamic:6153; GFX10: ; %bb.0:6154; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6155; GFX10-NEXT: v_div_scale_f32 v1, s4, 0x4640e400, 0x4640e400, v06156; GFX10-NEXT: v_div_scale_f32 v3, vcc_lo, v0, 0x4640e400, v06157; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6158; GFX10-NEXT: v_rcp_f32_e32 v2, v16159; GFX10-NEXT: s_denorm_mode 156160; GFX10-NEXT: v_fma_f32 v4, -v1, v2, 1.06161; GFX10-NEXT: v_fmac_f32_e32 v2, v4, v26162; GFX10-NEXT: v_mul_f32_e32 v4, v3, v26163; GFX10-NEXT: v_fma_f32 v5, -v1, v4, v36164; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v26165; GFX10-NEXT: v_fma_f32 v1, -v1, v4, v36166; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46167; GFX10-NEXT: v_div_fmas_f32 v1, v1, v2, v46168; GFX10-NEXT: v_div_fixup_f32 v0, v1, 0x4640e400, v06169; GFX10-NEXT: s_setpc_b64 s[30:31]6170;6171; GFX11-LABEL: v_fdiv_f32_constrhs0_dynamic:6172; GFX11: ; %bb.0:6173; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6174; GFX11-NEXT: v_div_scale_f32 v1, null, 0x4640e400, 0x4640e400, v06175; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, v0, 0x4640e400, v06176; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)6177; GFX11-NEXT: v_rcp_f32_e32 v2, v16178; GFX11-NEXT: s_denorm_mode 156179; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6180; GFX11-NEXT: v_fma_f32 v4, -v1, v2, 1.06181; GFX11-NEXT: v_fmac_f32_e32 v2, v4, v26182; GFX11-NEXT: v_mul_f32_e32 v4, v3, v26183; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v36184; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v26185; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v36186; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s06187; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v46188; GFX11-NEXT: v_div_fixup_f32 v0, v1, 0x4640e400, v06189; GFX11-NEXT: s_setpc_b64 s[30:31]6190;6191; EG-LABEL: v_fdiv_f32_constrhs0_dynamic:6192; EG: ; %bb.0:6193; EG-NEXT: CF_END6194; EG-NEXT: PAD6195 %div = fdiv float %x, 12345.06196 ret float %div6197}6198 6199define float @v_fdiv_f32_constrhs0_dynamic_25ulp(float %x) #2 {6200; GFX6-LABEL: v_fdiv_f32_constrhs0_dynamic_25ulp:6201; GFX6: ; %bb.0:6202; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6203; GFX6-NEXT: s_mov_b32 s4, 0x7f8000006204; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v06205; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s46206; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, 0x4640e4006207; GFX6-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc6208; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v06209; GFX6-NEXT: v_mul_f32_e32 v2, 0x3fa9e0f0, v26210; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v16211; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v06212; GFX6-NEXT: s_setpc_b64 s[30:31]6213;6214; GFX7-LABEL: v_fdiv_f32_constrhs0_dynamic_25ulp:6215; GFX7: ; %bb.0:6216; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6217; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v06218; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v06219; GFX7-NEXT: v_mul_f32_e32 v0, 0x3fa9e0f0, v06220; GFX7-NEXT: v_add_i32_e32 v1, vcc, -14, v16221; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v16222; GFX7-NEXT: s_setpc_b64 s[30:31]6223;6224; GFX8-LABEL: v_fdiv_f32_constrhs0_dynamic_25ulp:6225; GFX8: ; %bb.0:6226; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6227; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v06228; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v06229; GFX8-NEXT: v_mul_f32_e32 v0, 0x3fa9e0f0, v06230; GFX8-NEXT: v_add_u32_e32 v1, vcc, -14, v16231; GFX8-NEXT: v_ldexp_f32 v0, v0, v16232; GFX8-NEXT: s_setpc_b64 s[30:31]6233;6234; GFX10-LABEL: v_fdiv_f32_constrhs0_dynamic_25ulp:6235; GFX10: ; %bb.0:6236; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6237; GFX10-NEXT: v_frexp_mant_f32_e32 v1, v06238; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v06239; GFX10-NEXT: v_mul_f32_e32 v1, 0x3fa9e0f0, v16240; GFX10-NEXT: v_add_nc_u32_e32 v0, -14, v06241; GFX10-NEXT: v_ldexp_f32 v0, v1, v06242; GFX10-NEXT: s_setpc_b64 s[30:31]6243;6244; GFX11-LABEL: v_fdiv_f32_constrhs0_dynamic_25ulp:6245; GFX11: ; %bb.0:6246; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6247; GFX11-NEXT: v_frexp_mant_f32_e32 v1, v06248; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v06249; GFX11-NEXT: v_dual_mul_f32 v1, 0x3fa9e0f0, v1 :: v_dual_add_nc_u32 v0, -14, v06250; GFX11-NEXT: v_ldexp_f32 v0, v1, v06251; GFX11-NEXT: s_setpc_b64 s[30:31]6252;6253; EG-LABEL: v_fdiv_f32_constrhs0_dynamic_25ulp:6254; EG: ; %bb.0:6255; EG-NEXT: CF_END6256; EG-NEXT: PAD6257 %div = fdiv float %x, 12345.0, !fpmath !06258 ret float %div6259}6260 6261define float @v_fdiv_f32_constrhs0_daz(float %x) #0 {6262; GFX6-FASTFMA-LABEL: v_fdiv_f32_constrhs0_daz:6263; GFX6-FASTFMA: ; %bb.0:6264; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6265; GFX6-FASTFMA-NEXT: s_mov_b32 s6, 0x4640e4006266; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06267; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v16268; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, v0, s6, v06269; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36270; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v1, v2, 1.06271; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v4, v2, v26272; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v26273; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v36274; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v46275; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v36276; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06277; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v46278; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, s6, v06279; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]6280;6281; GFX6-SLOWFMA-LABEL: v_fdiv_f32_constrhs0_daz:6282; GFX6-SLOWFMA: ; %bb.0:6283; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6284; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, 0x4640e4006285; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06286; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, v0, s6, v06287; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v16288; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36289; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.06290; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v36291; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v36292; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v26293; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v46294; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v26295; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06296; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v46297; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, s6, v06298; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]6299;6300; GFX7-LABEL: v_fdiv_f32_constrhs0_daz:6301; GFX7: ; %bb.0:6302; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6303; GFX7-NEXT: s_mov_b32 s6, 0x4640e4006304; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06305; GFX7-NEXT: v_rcp_f32_e32 v2, v16306; GFX7-NEXT: v_div_scale_f32 v3, vcc, v0, s6, v06307; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36308; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.06309; GFX7-NEXT: v_fma_f32 v2, v4, v2, v26310; GFX7-NEXT: v_mul_f32_e32 v4, v3, v26311; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v36312; GFX7-NEXT: v_fma_f32 v4, v5, v2, v46313; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v36314; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06315; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v46316; GFX7-NEXT: v_div_fixup_f32 v0, v1, s6, v06317; GFX7-NEXT: s_setpc_b64 s[30:31]6318;6319; GFX8-LABEL: v_fdiv_f32_constrhs0_daz:6320; GFX8: ; %bb.0:6321; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6322; GFX8-NEXT: s_mov_b32 s6, 0x4640e4006323; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], s6, s6, v06324; GFX8-NEXT: v_div_scale_f32 v2, vcc, v0, s6, v06325; GFX8-NEXT: v_rcp_f32_e32 v3, v16326; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36327; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.06328; GFX8-NEXT: v_fma_f32 v3, v4, v3, v36329; GFX8-NEXT: v_mul_f32_e32 v4, v2, v36330; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v26331; GFX8-NEXT: v_fma_f32 v4, v5, v3, v46332; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v26333; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06334; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v46335; GFX8-NEXT: v_div_fixup_f32 v0, v1, s6, v06336; GFX8-NEXT: s_setpc_b64 s[30:31]6337;6338; GFX10-LABEL: v_fdiv_f32_constrhs0_daz:6339; GFX10: ; %bb.0:6340; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6341; GFX10-NEXT: v_div_scale_f32 v1, s4, 0x4640e400, 0x4640e400, v06342; GFX10-NEXT: v_div_scale_f32 v3, vcc_lo, v0, 0x4640e400, v06343; GFX10-NEXT: v_rcp_f32_e32 v2, v16344; GFX10-NEXT: s_denorm_mode 156345; GFX10-NEXT: v_fma_f32 v4, -v1, v2, 1.06346; GFX10-NEXT: v_fmac_f32_e32 v2, v4, v26347; GFX10-NEXT: v_mul_f32_e32 v4, v3, v26348; GFX10-NEXT: v_fma_f32 v5, -v1, v4, v36349; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v26350; GFX10-NEXT: v_fma_f32 v1, -v1, v4, v36351; GFX10-NEXT: s_denorm_mode 126352; GFX10-NEXT: v_div_fmas_f32 v1, v1, v2, v46353; GFX10-NEXT: v_div_fixup_f32 v0, v1, 0x4640e400, v06354; GFX10-NEXT: s_setpc_b64 s[30:31]6355;6356; GFX11-LABEL: v_fdiv_f32_constrhs0_daz:6357; GFX11: ; %bb.0:6358; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6359; GFX11-NEXT: v_div_scale_f32 v1, null, 0x4640e400, 0x4640e400, v06360; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, v0, 0x4640e400, v06361; GFX11-NEXT: v_rcp_f32_e32 v2, v16362; GFX11-NEXT: s_denorm_mode 156363; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6364; GFX11-NEXT: v_fma_f32 v4, -v1, v2, 1.06365; GFX11-NEXT: v_fmac_f32_e32 v2, v4, v26366; GFX11-NEXT: v_mul_f32_e32 v4, v3, v26367; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v36368; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v26369; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v36370; GFX11-NEXT: s_denorm_mode 126371; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v46372; GFX11-NEXT: v_div_fixup_f32 v0, v1, 0x4640e400, v06373; GFX11-NEXT: s_setpc_b64 s[30:31]6374;6375; EG-LABEL: v_fdiv_f32_constrhs0_daz:6376; EG: ; %bb.0:6377; EG-NEXT: CF_END6378; EG-NEXT: PAD6379 %div = fdiv float %x, 12345.06380 ret float %div6381}6382 6383define float @v_fdiv_f32_constrhs0_daz_25ulp(float %x) #0 {6384; GCN-LABEL: v_fdiv_f32_constrhs0_daz_25ulp:6385; GCN: ; %bb.0:6386; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6387; GCN-NEXT: v_mul_f32_e32 v0, 0x38a9e0f0, v06388; GCN-NEXT: s_setpc_b64 s[30:31]6389;6390; EG-LABEL: v_fdiv_f32_constrhs0_daz_25ulp:6391; EG: ; %bb.0:6392; EG-NEXT: CF_END6393; EG-NEXT: PAD6394 %div = fdiv float %x, 12345.0, !fpmath !06395 ret float %div6396}6397 6398define float @v_fdiv_f32_constlhs0_ieee(float %x) #1 {6399; GFX6-FASTFMA-LABEL: v_fdiv_f32_constlhs0_ieee:6400; GFX6-FASTFMA: ; %bb.0:6401; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6402; GFX6-FASTFMA-NEXT: s_mov_b32 s6, 0x4640e4006403; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66404; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v16405; GFX6-FASTFMA-NEXT: v_fma_f32 v3, -v1, v2, 1.06406; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v3, v2, v26407; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, s6, v0, s66408; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v26409; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v36410; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v46411; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v36412; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v46413; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, v0, s66414; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]6415;6416; GFX6-SLOWFMA-LABEL: v_fdiv_f32_constlhs0_ieee:6417; GFX6-SLOWFMA: ; %bb.0:6418; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6419; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, 0x4640e4006420; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66421; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s6, v0, s66422; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v16423; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.06424; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v36425; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v36426; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v26427; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v46428; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v26429; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v46430; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, v0, s66431; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]6432;6433; GFX7-LABEL: v_fdiv_f32_constlhs0_ieee:6434; GFX7: ; %bb.0:6435; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6436; GFX7-NEXT: s_mov_b32 s6, 0x4640e4006437; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66438; GFX7-NEXT: v_rcp_f32_e32 v2, v16439; GFX7-NEXT: v_fma_f32 v3, -v1, v2, 1.06440; GFX7-NEXT: v_fma_f32 v2, v3, v2, v26441; GFX7-NEXT: v_div_scale_f32 v3, vcc, s6, v0, s66442; GFX7-NEXT: v_mul_f32_e32 v4, v3, v26443; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v36444; GFX7-NEXT: v_fma_f32 v4, v5, v2, v46445; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v36446; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v46447; GFX7-NEXT: v_div_fixup_f32 v0, v1, v0, s66448; GFX7-NEXT: s_setpc_b64 s[30:31]6449;6450; GFX8-LABEL: v_fdiv_f32_constlhs0_ieee:6451; GFX8: ; %bb.0:6452; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6453; GFX8-NEXT: s_mov_b32 s6, 0x4640e4006454; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66455; GFX8-NEXT: v_div_scale_f32 v2, vcc, s6, v0, s66456; GFX8-NEXT: v_rcp_f32_e32 v3, v16457; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.06458; GFX8-NEXT: v_fma_f32 v3, v4, v3, v36459; GFX8-NEXT: v_mul_f32_e32 v4, v2, v36460; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v26461; GFX8-NEXT: v_fma_f32 v4, v5, v3, v46462; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v26463; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v46464; GFX8-NEXT: v_div_fixup_f32 v0, v1, v0, s66465; GFX8-NEXT: s_setpc_b64 s[30:31]6466;6467; GFX10-LABEL: v_fdiv_f32_constlhs0_ieee:6468; GFX10: ; %bb.0:6469; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6470; GFX10-NEXT: v_div_scale_f32 v1, s4, v0, v0, 0x4640e4006471; GFX10-NEXT: v_rcp_f32_e32 v2, v16472; GFX10-NEXT: v_fma_f32 v3, -v1, v2, 1.06473; GFX10-NEXT: v_fmac_f32_e32 v2, v3, v26474; GFX10-NEXT: v_div_scale_f32 v3, vcc_lo, 0x4640e400, v0, 0x4640e4006475; GFX10-NEXT: v_mul_f32_e32 v4, v3, v26476; GFX10-NEXT: v_fma_f32 v5, -v1, v4, v36477; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v26478; GFX10-NEXT: v_fma_f32 v1, -v1, v4, v36479; GFX10-NEXT: v_div_fmas_f32 v1, v1, v2, v46480; GFX10-NEXT: v_div_fixup_f32 v0, v1, v0, 0x4640e4006481; GFX10-NEXT: s_setpc_b64 s[30:31]6482;6483; GFX11-LABEL: v_fdiv_f32_constlhs0_ieee:6484; GFX11: ; %bb.0:6485; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6486; GFX11-NEXT: v_div_scale_f32 v1, null, v0, v0, 0x4640e4006487; GFX11-NEXT: v_rcp_f32_e32 v2, v16488; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6489; GFX11-NEXT: v_fma_f32 v3, -v1, v2, 1.06490; GFX11-NEXT: v_fmac_f32_e32 v2, v3, v26491; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, 0x4640e400, v0, 0x4640e4006492; GFX11-NEXT: v_mul_f32_e32 v4, v3, v26493; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v36494; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v26495; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v36496; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v46497; GFX11-NEXT: v_div_fixup_f32 v0, v1, v0, 0x4640e4006498; GFX11-NEXT: s_setpc_b64 s[30:31]6499;6500; EG-LABEL: v_fdiv_f32_constlhs0_ieee:6501; EG: ; %bb.0:6502; EG-NEXT: CF_END6503; EG-NEXT: PAD6504 %div = fdiv float 12345.0, %x6505 ret float %div6506}6507 6508define float @v_fdiv_f32_constlhs0_ieee_25ulp(float %x) #1 {6509; GFX6-LABEL: v_fdiv_f32_constlhs0_ieee_25ulp:6510; GFX6: ; %bb.0:6511; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6512; GFX6-NEXT: s_mov_b32 s4, 0x7f8000006513; GFX6-NEXT: v_frexp_mant_f32_e32 v1, v06514; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s46515; GFX6-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc6516; GFX6-NEXT: v_rcp_f32_e32 v1, v16517; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v06518; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v2, 0x4640e4006519; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v2, v06520; GFX6-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16521; GFX6-NEXT: v_ldexp_f32_e32 v0, v1, v06522; GFX6-NEXT: s_setpc_b64 s[30:31]6523;6524; GFX7-LABEL: v_fdiv_f32_constlhs0_ieee_25ulp:6525; GFX7: ; %bb.0:6526; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6527; GFX7-NEXT: v_frexp_mant_f32_e32 v1, v06528; GFX7-NEXT: v_rcp_f32_e32 v1, v16529; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v0, v06530; GFX7-NEXT: v_sub_i32_e32 v0, vcc, 14, v06531; GFX7-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16532; GFX7-NEXT: v_ldexp_f32_e32 v0, v1, v06533; GFX7-NEXT: s_setpc_b64 s[30:31]6534;6535; GFX8-LABEL: v_fdiv_f32_constlhs0_ieee_25ulp:6536; GFX8: ; %bb.0:6537; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6538; GFX8-NEXT: v_frexp_mant_f32_e32 v1, v06539; GFX8-NEXT: v_rcp_f32_e32 v1, v16540; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v0, v06541; GFX8-NEXT: v_sub_u32_e32 v0, vcc, 14, v06542; GFX8-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16543; GFX8-NEXT: v_ldexp_f32 v0, v1, v06544; GFX8-NEXT: s_setpc_b64 s[30:31]6545;6546; GFX10-LABEL: v_fdiv_f32_constlhs0_ieee_25ulp:6547; GFX10: ; %bb.0:6548; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6549; GFX10-NEXT: v_frexp_mant_f32_e32 v1, v06550; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v06551; GFX10-NEXT: v_rcp_f32_e32 v1, v16552; GFX10-NEXT: v_sub_nc_u32_e32 v0, 14, v06553; GFX10-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16554; GFX10-NEXT: v_ldexp_f32 v0, v1, v06555; GFX10-NEXT: s_setpc_b64 s[30:31]6556;6557; GFX11-LABEL: v_fdiv_f32_constlhs0_ieee_25ulp:6558; GFX11: ; %bb.0:6559; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6560; GFX11-NEXT: v_frexp_mant_f32_e32 v1, v06561; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v06562; GFX11-NEXT: v_rcp_f32_e32 v1, v16563; GFX11-NEXT: v_sub_nc_u32_e32 v0, 14, v06564; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6565; GFX11-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16566; GFX11-NEXT: v_ldexp_f32 v0, v1, v06567; GFX11-NEXT: s_setpc_b64 s[30:31]6568;6569; EG-LABEL: v_fdiv_f32_constlhs0_ieee_25ulp:6570; EG: ; %bb.0:6571; EG-NEXT: CF_END6572; EG-NEXT: PAD6573 %div = fdiv float 12345.0, %x, !fpmath !06574 ret float %div6575}6576 6577define float @v_fdiv_f32_constlhs0_dynamic(float %x) #2 {6578; GFX6-FASTFMA-LABEL: v_fdiv_f32_constlhs0_dynamic:6579; GFX6-FASTFMA: ; %bb.0:6580; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6581; GFX6-FASTFMA-NEXT: s_mov_b32 s6, 0x4640e4006582; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66583; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v16584; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, s6, v0, s66585; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6586; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36587; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v1, v2, 1.06588; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v4, v2, v26589; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v26590; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v36591; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v46592; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v36593; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46594; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v46595; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, v0, s66596; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]6597;6598; GFX6-SLOWFMA-LABEL: v_fdiv_f32_constlhs0_dynamic:6599; GFX6-SLOWFMA: ; %bb.0:6600; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6601; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, 0x4640e4006602; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66603; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s6, v0, s66604; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6605; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v16606; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36607; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.06608; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v36609; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v36610; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v26611; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v46612; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v26613; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46614; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v46615; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, v0, s66616; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]6617;6618; GFX7-LABEL: v_fdiv_f32_constlhs0_dynamic:6619; GFX7: ; %bb.0:6620; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6621; GFX7-NEXT: s_mov_b32 s6, 0x4640e4006622; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66623; GFX7-NEXT: v_rcp_f32_e32 v2, v16624; GFX7-NEXT: v_div_scale_f32 v3, vcc, s6, v0, s66625; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6626; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36627; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.06628; GFX7-NEXT: v_fma_f32 v2, v4, v2, v26629; GFX7-NEXT: v_mul_f32_e32 v4, v3, v26630; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v36631; GFX7-NEXT: v_fma_f32 v4, v5, v2, v46632; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v36633; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46634; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v46635; GFX7-NEXT: v_div_fixup_f32 v0, v1, v0, s66636; GFX7-NEXT: s_setpc_b64 s[30:31]6637;6638; GFX8-LABEL: v_fdiv_f32_constlhs0_dynamic:6639; GFX8: ; %bb.0:6640; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6641; GFX8-NEXT: s_mov_b32 s6, 0x4640e4006642; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66643; GFX8-NEXT: v_div_scale_f32 v2, vcc, s6, v0, s66644; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6645; GFX8-NEXT: v_rcp_f32_e32 v3, v16646; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36647; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.06648; GFX8-NEXT: v_fma_f32 v3, v4, v3, v36649; GFX8-NEXT: v_mul_f32_e32 v4, v2, v36650; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v26651; GFX8-NEXT: v_fma_f32 v4, v5, v3, v46652; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v26653; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46654; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v46655; GFX8-NEXT: v_div_fixup_f32 v0, v1, v0, s66656; GFX8-NEXT: s_setpc_b64 s[30:31]6657;6658; GFX10-LABEL: v_fdiv_f32_constlhs0_dynamic:6659; GFX10: ; %bb.0:6660; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6661; GFX10-NEXT: v_div_scale_f32 v1, s4, v0, v0, 0x4640e4006662; GFX10-NEXT: v_div_scale_f32 v3, vcc_lo, 0x4640e400, v0, 0x4640e4006663; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)6664; GFX10-NEXT: v_rcp_f32_e32 v2, v16665; GFX10-NEXT: s_denorm_mode 156666; GFX10-NEXT: v_fma_f32 v4, -v1, v2, 1.06667; GFX10-NEXT: v_fmac_f32_e32 v2, v4, v26668; GFX10-NEXT: v_mul_f32_e32 v4, v3, v26669; GFX10-NEXT: v_fma_f32 v5, -v1, v4, v36670; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v26671; GFX10-NEXT: v_fma_f32 v1, -v1, v4, v36672; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s46673; GFX10-NEXT: v_div_fmas_f32 v1, v1, v2, v46674; GFX10-NEXT: v_div_fixup_f32 v0, v1, v0, 0x4640e4006675; GFX10-NEXT: s_setpc_b64 s[30:31]6676;6677; GFX11-LABEL: v_fdiv_f32_constlhs0_dynamic:6678; GFX11: ; %bb.0:6679; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6680; GFX11-NEXT: v_div_scale_f32 v1, null, v0, v0, 0x4640e4006681; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, 0x4640e400, v0, 0x4640e4006682; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)6683; GFX11-NEXT: v_rcp_f32_e32 v2, v16684; GFX11-NEXT: s_denorm_mode 156685; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6686; GFX11-NEXT: v_fma_f32 v4, -v1, v2, 1.06687; GFX11-NEXT: v_fmac_f32_e32 v2, v4, v26688; GFX11-NEXT: v_mul_f32_e32 v4, v3, v26689; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v36690; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v26691; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v36692; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s06693; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v46694; GFX11-NEXT: v_div_fixup_f32 v0, v1, v0, 0x4640e4006695; GFX11-NEXT: s_setpc_b64 s[30:31]6696;6697; EG-LABEL: v_fdiv_f32_constlhs0_dynamic:6698; EG: ; %bb.0:6699; EG-NEXT: CF_END6700; EG-NEXT: PAD6701 %div = fdiv float 12345.0, %x6702 ret float %div6703}6704 6705define float @v_fdiv_f32_constlhs0_dynamic_25ulp(float %x) #2 {6706; GFX6-LABEL: v_fdiv_f32_constlhs0_dynamic_25ulp:6707; GFX6: ; %bb.0:6708; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6709; GFX6-NEXT: s_mov_b32 s4, 0x7f8000006710; GFX6-NEXT: v_frexp_mant_f32_e32 v1, v06711; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s46712; GFX6-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc6713; GFX6-NEXT: v_rcp_f32_e32 v1, v16714; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v06715; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v2, 0x4640e4006716; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v2, v06717; GFX6-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16718; GFX6-NEXT: v_ldexp_f32_e32 v0, v1, v06719; GFX6-NEXT: s_setpc_b64 s[30:31]6720;6721; GFX7-LABEL: v_fdiv_f32_constlhs0_dynamic_25ulp:6722; GFX7: ; %bb.0:6723; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6724; GFX7-NEXT: v_frexp_mant_f32_e32 v1, v06725; GFX7-NEXT: v_rcp_f32_e32 v1, v16726; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v0, v06727; GFX7-NEXT: v_sub_i32_e32 v0, vcc, 14, v06728; GFX7-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16729; GFX7-NEXT: v_ldexp_f32_e32 v0, v1, v06730; GFX7-NEXT: s_setpc_b64 s[30:31]6731;6732; GFX8-LABEL: v_fdiv_f32_constlhs0_dynamic_25ulp:6733; GFX8: ; %bb.0:6734; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6735; GFX8-NEXT: v_frexp_mant_f32_e32 v1, v06736; GFX8-NEXT: v_rcp_f32_e32 v1, v16737; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v0, v06738; GFX8-NEXT: v_sub_u32_e32 v0, vcc, 14, v06739; GFX8-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16740; GFX8-NEXT: v_ldexp_f32 v0, v1, v06741; GFX8-NEXT: s_setpc_b64 s[30:31]6742;6743; GFX10-LABEL: v_fdiv_f32_constlhs0_dynamic_25ulp:6744; GFX10: ; %bb.0:6745; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6746; GFX10-NEXT: v_frexp_mant_f32_e32 v1, v06747; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v06748; GFX10-NEXT: v_rcp_f32_e32 v1, v16749; GFX10-NEXT: v_sub_nc_u32_e32 v0, 14, v06750; GFX10-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16751; GFX10-NEXT: v_ldexp_f32 v0, v1, v06752; GFX10-NEXT: s_setpc_b64 s[30:31]6753;6754; GFX11-LABEL: v_fdiv_f32_constlhs0_dynamic_25ulp:6755; GFX11: ; %bb.0:6756; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6757; GFX11-NEXT: v_frexp_mant_f32_e32 v1, v06758; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v06759; GFX11-NEXT: v_rcp_f32_e32 v1, v16760; GFX11-NEXT: v_sub_nc_u32_e32 v0, 14, v06761; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6762; GFX11-NEXT: v_mul_f32_e32 v1, 0x3f40e400, v16763; GFX11-NEXT: v_ldexp_f32 v0, v1, v06764; GFX11-NEXT: s_setpc_b64 s[30:31]6765;6766; EG-LABEL: v_fdiv_f32_constlhs0_dynamic_25ulp:6767; EG: ; %bb.0:6768; EG-NEXT: CF_END6769; EG-NEXT: PAD6770 %div = fdiv float 12345.0, %x, !fpmath !06771 ret float %div6772}6773 6774define float @v_fdiv_f32_constlhs0_daz(float %x) #0 {6775; GFX6-FASTFMA-LABEL: v_fdiv_f32_constlhs0_daz:6776; GFX6-FASTFMA: ; %bb.0:6777; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6778; GFX6-FASTFMA-NEXT: s_mov_b32 s6, 0x4640e4006779; GFX6-FASTFMA-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66780; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v2, v16781; GFX6-FASTFMA-NEXT: v_div_scale_f32 v3, vcc, s6, v0, s66782; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36783; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v1, v2, 1.06784; GFX6-FASTFMA-NEXT: v_fma_f32 v2, v4, v2, v26785; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v4, v3, v26786; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v1, v4, v36787; GFX6-FASTFMA-NEXT: v_fma_f32 v4, v5, v2, v46788; GFX6-FASTFMA-NEXT: v_fma_f32 v1, -v1, v4, v36789; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06790; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v1, v1, v2, v46791; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v1, v0, s66792; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]6793;6794; GFX6-SLOWFMA-LABEL: v_fdiv_f32_constlhs0_daz:6795; GFX6-SLOWFMA: ; %bb.0:6796; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6797; GFX6-SLOWFMA-NEXT: s_mov_b32 s6, 0x4640e4006798; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66799; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, vcc, s6, v0, s66800; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v3, v16801; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36802; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, -v1, v3, 1.06803; GFX6-SLOWFMA-NEXT: v_fma_f32 v3, v4, v3, v36804; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v4, v2, v36805; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v1, v4, v26806; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v3, v46807; GFX6-SLOWFMA-NEXT: v_fma_f32 v1, -v1, v4, v26808; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06809; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v1, v1, v3, v46810; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v1, v0, s66811; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]6812;6813; GFX7-LABEL: v_fdiv_f32_constlhs0_daz:6814; GFX7: ; %bb.0:6815; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6816; GFX7-NEXT: s_mov_b32 s6, 0x4640e4006817; GFX7-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66818; GFX7-NEXT: v_rcp_f32_e32 v2, v16819; GFX7-NEXT: v_div_scale_f32 v3, vcc, s6, v0, s66820; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36821; GFX7-NEXT: v_fma_f32 v4, -v1, v2, 1.06822; GFX7-NEXT: v_fma_f32 v2, v4, v2, v26823; GFX7-NEXT: v_mul_f32_e32 v4, v3, v26824; GFX7-NEXT: v_fma_f32 v5, -v1, v4, v36825; GFX7-NEXT: v_fma_f32 v4, v5, v2, v46826; GFX7-NEXT: v_fma_f32 v1, -v1, v4, v36827; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06828; GFX7-NEXT: v_div_fmas_f32 v1, v1, v2, v46829; GFX7-NEXT: v_div_fixup_f32 v0, v1, v0, s66830; GFX7-NEXT: s_setpc_b64 s[30:31]6831;6832; GFX8-LABEL: v_fdiv_f32_constlhs0_daz:6833; GFX8: ; %bb.0:6834; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6835; GFX8-NEXT: s_mov_b32 s6, 0x4640e4006836; GFX8-NEXT: v_div_scale_f32 v1, s[4:5], v0, v0, s66837; GFX8-NEXT: v_div_scale_f32 v2, vcc, s6, v0, s66838; GFX8-NEXT: v_rcp_f32_e32 v3, v16839; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 36840; GFX8-NEXT: v_fma_f32 v4, -v1, v3, 1.06841; GFX8-NEXT: v_fma_f32 v3, v4, v3, v36842; GFX8-NEXT: v_mul_f32_e32 v4, v2, v36843; GFX8-NEXT: v_fma_f32 v5, -v1, v4, v26844; GFX8-NEXT: v_fma_f32 v4, v5, v3, v46845; GFX8-NEXT: v_fma_f32 v1, -v1, v4, v26846; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 06847; GFX8-NEXT: v_div_fmas_f32 v1, v1, v3, v46848; GFX8-NEXT: v_div_fixup_f32 v0, v1, v0, s66849; GFX8-NEXT: s_setpc_b64 s[30:31]6850;6851; GFX10-LABEL: v_fdiv_f32_constlhs0_daz:6852; GFX10: ; %bb.0:6853; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6854; GFX10-NEXT: v_div_scale_f32 v1, s4, v0, v0, 0x4640e4006855; GFX10-NEXT: v_div_scale_f32 v3, vcc_lo, 0x4640e400, v0, 0x4640e4006856; GFX10-NEXT: v_rcp_f32_e32 v2, v16857; GFX10-NEXT: s_denorm_mode 156858; GFX10-NEXT: v_fma_f32 v4, -v1, v2, 1.06859; GFX10-NEXT: v_fmac_f32_e32 v2, v4, v26860; GFX10-NEXT: v_mul_f32_e32 v4, v3, v26861; GFX10-NEXT: v_fma_f32 v5, -v1, v4, v36862; GFX10-NEXT: v_fmac_f32_e32 v4, v5, v26863; GFX10-NEXT: v_fma_f32 v1, -v1, v4, v36864; GFX10-NEXT: s_denorm_mode 126865; GFX10-NEXT: v_div_fmas_f32 v1, v1, v2, v46866; GFX10-NEXT: v_div_fixup_f32 v0, v1, v0, 0x4640e4006867; GFX10-NEXT: s_setpc_b64 s[30:31]6868;6869; GFX11-LABEL: v_fdiv_f32_constlhs0_daz:6870; GFX11: ; %bb.0:6871; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6872; GFX11-NEXT: v_div_scale_f32 v1, null, v0, v0, 0x4640e4006873; GFX11-NEXT: v_div_scale_f32 v3, vcc_lo, 0x4640e400, v0, 0x4640e4006874; GFX11-NEXT: v_rcp_f32_e32 v2, v16875; GFX11-NEXT: s_denorm_mode 156876; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6877; GFX11-NEXT: v_fma_f32 v4, -v1, v2, 1.06878; GFX11-NEXT: v_fmac_f32_e32 v2, v4, v26879; GFX11-NEXT: v_mul_f32_e32 v4, v3, v26880; GFX11-NEXT: v_fma_f32 v5, -v1, v4, v36881; GFX11-NEXT: v_fmac_f32_e32 v4, v5, v26882; GFX11-NEXT: v_fma_f32 v1, -v1, v4, v36883; GFX11-NEXT: s_denorm_mode 126884; GFX11-NEXT: v_div_fmas_f32 v1, v1, v2, v46885; GFX11-NEXT: v_div_fixup_f32 v0, v1, v0, 0x4640e4006886; GFX11-NEXT: s_setpc_b64 s[30:31]6887;6888; EG-LABEL: v_fdiv_f32_constlhs0_daz:6889; EG: ; %bb.0:6890; EG-NEXT: CF_END6891; EG-NEXT: PAD6892 %div = fdiv float 12345.0, %x6893 ret float %div6894}6895 6896define float @v_fdiv_f32_constlhs0_daz_25ulp(float %x) #0 {6897; GFX678-LABEL: v_fdiv_f32_constlhs0_daz_25ulp:6898; GFX678: ; %bb.0:6899; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6900; GFX678-NEXT: s_mov_b32 s4, 0x6f8000006901; GFX678-NEXT: v_mov_b32_e32 v1, 0x2f8000006902; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s46903; GFX678-NEXT: v_cndmask_b32_e32 v1, 1.0, v1, vcc6904; GFX678-NEXT: v_mul_f32_e32 v0, v0, v16905; GFX678-NEXT: v_rcp_f32_e32 v0, v06906; GFX678-NEXT: v_mul_f32_e32 v0, 0x4640e400, v06907; GFX678-NEXT: v_mul_f32_e32 v0, v1, v06908; GFX678-NEXT: s_setpc_b64 s[30:31]6909;6910; GFX10-LABEL: v_fdiv_f32_constlhs0_daz_25ulp:6911; GFX10: ; %bb.0:6912; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6913; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v0|6914; GFX10-NEXT: v_cndmask_b32_e64 v1, 1.0, 0x2f800000, s46915; GFX10-NEXT: v_mul_f32_e32 v0, v0, v16916; GFX10-NEXT: v_rcp_f32_e32 v0, v06917; GFX10-NEXT: v_mul_f32_e32 v0, 0x4640e400, v06918; GFX10-NEXT: v_mul_f32_e32 v0, v1, v06919; GFX10-NEXT: s_setpc_b64 s[30:31]6920;6921; GFX11-LABEL: v_fdiv_f32_constlhs0_daz_25ulp:6922; GFX11: ; %bb.0:6923; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6924; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v0|6925; GFX11-NEXT: v_cndmask_b32_e64 v1, 1.0, 0x2f800000, s06926; GFX11-NEXT: v_mul_f32_e32 v0, v0, v16927; GFX11-NEXT: v_rcp_f32_e32 v0, v06928; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)6929; GFX11-NEXT: v_mul_f32_e32 v0, 0x4640e400, v06930; GFX11-NEXT: v_mul_f32_e32 v0, v1, v06931; GFX11-NEXT: s_setpc_b64 s[30:31]6932;6933; EG-LABEL: v_fdiv_f32_constlhs0_daz_25ulp:6934; EG: ; %bb.0:6935; EG-NEXT: CF_END6936; EG-NEXT: PAD6937 %div = fdiv float 12345.0, %x, !fpmath !06938 ret float %div6939}6940 6941define float @v_fdiv_f32_ieee_nodenorm_x(float nofpclass(sub) %x, float %y) #1 {6942; GFX6-FASTFMA-LABEL: v_fdiv_f32_ieee_nodenorm_x:6943; GFX6-FASTFMA: ; %bb.0:6944; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6945; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v06946; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v26947; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.06948; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v36949; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v06950; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v36951; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v46952; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v56953; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v46954; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v56955; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v06956; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]6957;6958; GFX6-SLOWFMA-LABEL: v_fdiv_f32_ieee_nodenorm_x:6959; GFX6-SLOWFMA: ; %bb.0:6960; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6961; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v06962; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v06963; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v26964; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.06965; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v46966; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v46967; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v36968; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v56969; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v36970; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v56971; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v06972; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]6973;6974; GFX7-LABEL: v_fdiv_f32_ieee_nodenorm_x:6975; GFX7: ; %bb.0:6976; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6977; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v06978; GFX7-NEXT: v_rcp_f32_e32 v3, v26979; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.06980; GFX7-NEXT: v_fma_f32 v3, v4, v3, v36981; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v06982; GFX7-NEXT: v_mul_f32_e32 v5, v4, v36983; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v46984; GFX7-NEXT: v_fma_f32 v5, v6, v3, v56985; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v46986; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v56987; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v06988; GFX7-NEXT: s_setpc_b64 s[30:31]6989;6990; GFX8-LABEL: v_fdiv_f32_ieee_nodenorm_x:6991; GFX8: ; %bb.0:6992; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6993; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v06994; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v06995; GFX8-NEXT: v_rcp_f32_e32 v4, v26996; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.06997; GFX8-NEXT: v_fma_f32 v4, v5, v4, v46998; GFX8-NEXT: v_mul_f32_e32 v5, v3, v46999; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v37000; GFX8-NEXT: v_fma_f32 v5, v6, v4, v57001; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v37002; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v57003; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v07004; GFX8-NEXT: s_setpc_b64 s[30:31]7005;7006; GFX10-LABEL: v_fdiv_f32_ieee_nodenorm_x:7007; GFX10: ; %bb.0:7008; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7009; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v07010; GFX10-NEXT: v_rcp_f32_e32 v3, v27011; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.07012; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v37013; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07014; GFX10-NEXT: v_mul_f32_e32 v5, v4, v37015; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v47016; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v37017; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v47018; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v57019; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v07020; GFX10-NEXT: s_setpc_b64 s[30:31]7021;7022; GFX11-LABEL: v_fdiv_f32_ieee_nodenorm_x:7023; GFX11: ; %bb.0:7024; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7025; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v07026; GFX11-NEXT: v_rcp_f32_e32 v3, v27027; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7028; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.07029; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v37030; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07031; GFX11-NEXT: v_mul_f32_e32 v5, v4, v37032; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v47033; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v37034; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v47035; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v57036; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v07037; GFX11-NEXT: s_setpc_b64 s[30:31]7038;7039; EG-LABEL: v_fdiv_f32_ieee_nodenorm_x:7040; EG: ; %bb.0:7041; EG-NEXT: CF_END7042; EG-NEXT: PAD7043 %div = fdiv float %x, %y7044 ret float %div7045}7046 7047define float @v_fdiv_f32_ieee_25ulp_nodenorm_x(float nofpclass(sub) %x, float %y) #1 {7048; GFX6-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_x:7049; GFX6: ; %bb.0:7050; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7051; GFX6-NEXT: s_mov_b32 s4, 0x7f8000007052; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v17053; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s47054; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc7055; GFX6-NEXT: v_rcp_f32_e32 v2, v27056; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v07057; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s47058; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v17059; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc7060; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v07061; GFX6-NEXT: v_mul_f32_e32 v2, v3, v27062; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v17063; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v07064; GFX6-NEXT: s_setpc_b64 s[30:31]7065;7066; GFX7-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_x:7067; GFX7: ; %bb.0:7068; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7069; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v17070; GFX7-NEXT: v_rcp_f32_e32 v2, v27071; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v17072; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v07073; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v07074; GFX7-NEXT: v_mul_f32_e32 v0, v0, v27075; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v17076; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v17077; GFX7-NEXT: s_setpc_b64 s[30:31]7078;7079; GFX8-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_x:7080; GFX8: ; %bb.0:7081; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7082; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v17083; GFX8-NEXT: v_rcp_f32_e32 v2, v27084; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v17085; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v07086; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v07087; GFX8-NEXT: v_mul_f32_e32 v0, v0, v27088; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v17089; GFX8-NEXT: v_ldexp_f32 v0, v0, v17090; GFX8-NEXT: s_setpc_b64 s[30:31]7091;7092; GFX10-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_x:7093; GFX10: ; %bb.0:7094; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7095; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v17096; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v17097; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v07098; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v07099; GFX10-NEXT: v_rcp_f32_e32 v2, v27100; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v17101; GFX10-NEXT: v_mul_f32_e32 v2, v3, v27102; GFX10-NEXT: v_ldexp_f32 v0, v2, v07103; GFX10-NEXT: s_setpc_b64 s[30:31]7104;7105; GFX11-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_x:7106; GFX11: ; %bb.0:7107; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7108; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v17109; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v17110; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v07111; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v07112; GFX11-NEXT: v_rcp_f32_e32 v2, v27113; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v17114; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7115; GFX11-NEXT: v_mul_f32_e32 v2, v3, v27116; GFX11-NEXT: v_ldexp_f32 v0, v2, v07117; GFX11-NEXT: s_setpc_b64 s[30:31]7118;7119; EG-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_x:7120; EG: ; %bb.0:7121; EG-NEXT: CF_END7122; EG-NEXT: PAD7123 %div = fdiv float %x, %y, !fpmath !07124 ret float %div7125}7126 7127define float @v_fdiv_f32_dynamic_nodenorm_x(float nofpclass(sub) %x, float %y) #2 {7128; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7129; GFX6-FASTFMA: ; %bb.0:7130; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7131; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07132; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v27133; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07134; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7135; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37136; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.07137; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v37138; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v37139; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v47140; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v57141; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v47142; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47143; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v57144; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07145; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]7146;7147; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7148; GFX6-SLOWFMA: ; %bb.0:7149; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7150; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07151; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07152; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7153; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v27154; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37155; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.07156; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v47157; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v47158; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v37159; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v57160; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v37161; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47162; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v57163; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07164; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]7165;7166; GFX7-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7167; GFX7: ; %bb.0:7168; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7169; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07170; GFX7-NEXT: v_rcp_f32_e32 v3, v27171; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07172; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7173; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37174; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.07175; GFX7-NEXT: v_fma_f32 v3, v5, v3, v37176; GFX7-NEXT: v_mul_f32_e32 v5, v4, v37177; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v47178; GFX7-NEXT: v_fma_f32 v5, v6, v3, v57179; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v47180; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47181; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v57182; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v07183; GFX7-NEXT: s_setpc_b64 s[30:31]7184;7185; GFX8-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7186; GFX8: ; %bb.0:7187; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7188; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07189; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07190; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7191; GFX8-NEXT: v_rcp_f32_e32 v4, v27192; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37193; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.07194; GFX8-NEXT: v_fma_f32 v4, v5, v4, v47195; GFX8-NEXT: v_mul_f32_e32 v5, v3, v47196; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v37197; GFX8-NEXT: v_fma_f32 v5, v6, v4, v57198; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v37199; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47200; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v57201; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v07202; GFX8-NEXT: s_setpc_b64 s[30:31]7203;7204; GFX10-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7205; GFX10: ; %bb.0:7206; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7207; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v07208; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07209; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7210; GFX10-NEXT: v_rcp_f32_e32 v3, v27211; GFX10-NEXT: s_denorm_mode 157212; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.07213; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v37214; GFX10-NEXT: v_mul_f32_e32 v5, v4, v37215; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v47216; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v37217; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v47218; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47219; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v57220; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v07221; GFX10-NEXT: s_setpc_b64 s[30:31]7222;7223; GFX11-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7224; GFX11: ; %bb.0:7225; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7226; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v07227; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07228; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)7229; GFX11-NEXT: v_rcp_f32_e32 v3, v27230; GFX11-NEXT: s_denorm_mode 157231; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7232; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.07233; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v37234; GFX11-NEXT: v_mul_f32_e32 v5, v4, v37235; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v47236; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v37237; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v47238; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s07239; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v57240; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v07241; GFX11-NEXT: s_setpc_b64 s[30:31]7242;7243; EG-LABEL: v_fdiv_f32_dynamic_nodenorm_x:7244; EG: ; %bb.0:7245; EG-NEXT: CF_END7246; EG-NEXT: PAD7247 %div = fdiv float %x, %y7248 ret float %div7249}7250 7251define float @v_fdiv_f32_dynamic_25ulp_nodenorm_x(float nofpclass(sub) %x, float %y) #2 {7252; GFX6-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_x:7253; GFX6: ; %bb.0:7254; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7255; GFX6-NEXT: s_mov_b32 s4, 0x7f8000007256; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v17257; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s47258; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc7259; GFX6-NEXT: v_rcp_f32_e32 v2, v27260; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v07261; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s47262; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v17263; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc7264; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v07265; GFX6-NEXT: v_mul_f32_e32 v2, v3, v27266; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v17267; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v07268; GFX6-NEXT: s_setpc_b64 s[30:31]7269;7270; GFX7-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_x:7271; GFX7: ; %bb.0:7272; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7273; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v17274; GFX7-NEXT: v_rcp_f32_e32 v2, v27275; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v17276; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v07277; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v07278; GFX7-NEXT: v_mul_f32_e32 v0, v0, v27279; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v17280; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v17281; GFX7-NEXT: s_setpc_b64 s[30:31]7282;7283; GFX8-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_x:7284; GFX8: ; %bb.0:7285; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7286; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v17287; GFX8-NEXT: v_rcp_f32_e32 v2, v27288; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v17289; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v07290; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v07291; GFX8-NEXT: v_mul_f32_e32 v0, v0, v27292; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v17293; GFX8-NEXT: v_ldexp_f32 v0, v0, v17294; GFX8-NEXT: s_setpc_b64 s[30:31]7295;7296; GFX10-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_x:7297; GFX10: ; %bb.0:7298; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7299; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v17300; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v17301; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v07302; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v07303; GFX10-NEXT: v_rcp_f32_e32 v2, v27304; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v17305; GFX10-NEXT: v_mul_f32_e32 v2, v3, v27306; GFX10-NEXT: v_ldexp_f32 v0, v2, v07307; GFX10-NEXT: s_setpc_b64 s[30:31]7308;7309; GFX11-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_x:7310; GFX11: ; %bb.0:7311; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7312; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v17313; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v17314; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v07315; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v07316; GFX11-NEXT: v_rcp_f32_e32 v2, v27317; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v17318; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7319; GFX11-NEXT: v_mul_f32_e32 v2, v3, v27320; GFX11-NEXT: v_ldexp_f32 v0, v2, v07321; GFX11-NEXT: s_setpc_b64 s[30:31]7322;7323; EG-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_x:7324; EG: ; %bb.0:7325; EG-NEXT: CF_END7326; EG-NEXT: PAD7327 %div = fdiv float %x, %y, !fpmath !07328 ret float %div7329}7330 7331define float @v_fdiv_f32_daz_nodenorm_x(float nofpclass(sub) %x, float %y) #0 {7332; GFX6-FASTFMA-LABEL: v_fdiv_f32_daz_nodenorm_x:7333; GFX6-FASTFMA: ; %bb.0:7334; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7335; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07336; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v27337; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07338; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37339; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.07340; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v37341; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v37342; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v47343; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v57344; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v47345; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07346; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v57347; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07348; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]7349;7350; GFX6-SLOWFMA-LABEL: v_fdiv_f32_daz_nodenorm_x:7351; GFX6-SLOWFMA: ; %bb.0:7352; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7353; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07354; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07355; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v27356; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37357; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.07358; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v47359; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v47360; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v37361; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v57362; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v37363; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07364; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v57365; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07366; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]7367;7368; GFX7-LABEL: v_fdiv_f32_daz_nodenorm_x:7369; GFX7: ; %bb.0:7370; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7371; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07372; GFX7-NEXT: v_rcp_f32_e32 v3, v27373; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07374; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37375; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.07376; GFX7-NEXT: v_fma_f32 v3, v5, v3, v37377; GFX7-NEXT: v_mul_f32_e32 v5, v4, v37378; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v47379; GFX7-NEXT: v_fma_f32 v5, v6, v3, v57380; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v47381; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07382; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v57383; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v07384; GFX7-NEXT: s_setpc_b64 s[30:31]7385;7386; GFX8-LABEL: v_fdiv_f32_daz_nodenorm_x:7387; GFX8: ; %bb.0:7388; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7389; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07390; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07391; GFX8-NEXT: v_rcp_f32_e32 v4, v27392; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37393; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.07394; GFX8-NEXT: v_fma_f32 v4, v5, v4, v47395; GFX8-NEXT: v_mul_f32_e32 v5, v3, v47396; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v37397; GFX8-NEXT: v_fma_f32 v5, v6, v4, v57398; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v37399; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07400; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v57401; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v07402; GFX8-NEXT: s_setpc_b64 s[30:31]7403;7404; GFX10-LABEL: v_fdiv_f32_daz_nodenorm_x:7405; GFX10: ; %bb.0:7406; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7407; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v07408; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07409; GFX10-NEXT: v_rcp_f32_e32 v3, v27410; GFX10-NEXT: s_denorm_mode 157411; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.07412; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v37413; GFX10-NEXT: v_mul_f32_e32 v5, v4, v37414; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v47415; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v37416; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v47417; GFX10-NEXT: s_denorm_mode 127418; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v57419; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v07420; GFX10-NEXT: s_setpc_b64 s[30:31]7421;7422; GFX11-LABEL: v_fdiv_f32_daz_nodenorm_x:7423; GFX11: ; %bb.0:7424; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7425; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v07426; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07427; GFX11-NEXT: v_rcp_f32_e32 v3, v27428; GFX11-NEXT: s_denorm_mode 157429; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7430; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.07431; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v37432; GFX11-NEXT: v_mul_f32_e32 v5, v4, v37433; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v47434; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v37435; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v47436; GFX11-NEXT: s_denorm_mode 127437; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v57438; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v07439; GFX11-NEXT: s_setpc_b64 s[30:31]7440;7441; EG-LABEL: v_fdiv_f32_daz_nodenorm_x:7442; EG: ; %bb.0:7443; EG-NEXT: CF_END7444; EG-NEXT: PAD7445 %div = fdiv float %x, %y7446 ret float %div7447}7448 7449define float @v_fdiv_f32_daz_25ulp_nodenorm_x(float nofpclass(sub) %x, float %y) #0 {7450; GFX678-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_x:7451; GFX678: ; %bb.0:7452; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7453; GFX678-NEXT: s_mov_b32 s4, 0x6f8000007454; GFX678-NEXT: v_mov_b32_e32 v2, 0x2f8000007455; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s47456; GFX678-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc7457; GFX678-NEXT: v_mul_f32_e32 v1, v1, v27458; GFX678-NEXT: v_rcp_f32_e32 v1, v17459; GFX678-NEXT: v_mul_f32_e32 v0, v0, v17460; GFX678-NEXT: v_mul_f32_e32 v0, v2, v07461; GFX678-NEXT: s_setpc_b64 s[30:31]7462;7463; GFX10-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_x:7464; GFX10: ; %bb.0:7465; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7466; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|7467; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s47468; GFX10-NEXT: v_mul_f32_e32 v1, v1, v27469; GFX10-NEXT: v_rcp_f32_e32 v1, v17470; GFX10-NEXT: v_mul_f32_e32 v0, v0, v17471; GFX10-NEXT: v_mul_f32_e32 v0, v2, v07472; GFX10-NEXT: s_setpc_b64 s[30:31]7473;7474; GFX11-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_x:7475; GFX11: ; %bb.0:7476; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7477; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|7478; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s07479; GFX11-NEXT: v_mul_f32_e32 v1, v1, v27480; GFX11-NEXT: v_rcp_f32_e32 v1, v17481; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7482; GFX11-NEXT: v_mul_f32_e32 v0, v0, v17483; GFX11-NEXT: v_mul_f32_e32 v0, v2, v07484; GFX11-NEXT: s_setpc_b64 s[30:31]7485;7486; EG-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_x:7487; EG: ; %bb.0:7488; EG-NEXT: CF_END7489; EG-NEXT: PAD7490 %div = fdiv float %x, %y, !fpmath !07491 ret float %div7492}7493 7494define float @v_fdiv_f32_ieee_nodenorm_y(float %x, float nofpclass(sub) %y) #1 {7495; GFX6-FASTFMA-LABEL: v_fdiv_f32_ieee_nodenorm_y:7496; GFX6-FASTFMA: ; %bb.0:7497; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7498; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07499; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v27500; GFX6-FASTFMA-NEXT: v_fma_f32 v4, -v2, v3, 1.07501; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v4, v3, v37502; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07503; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v37504; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v47505; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v57506; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v47507; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v57508; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07509; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]7510;7511; GFX6-SLOWFMA-LABEL: v_fdiv_f32_ieee_nodenorm_y:7512; GFX6-SLOWFMA: ; %bb.0:7513; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7514; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07515; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07516; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v27517; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.07518; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v47519; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v47520; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v37521; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v57522; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v37523; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v57524; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07525; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]7526;7527; GFX7-LABEL: v_fdiv_f32_ieee_nodenorm_y:7528; GFX7: ; %bb.0:7529; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7530; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07531; GFX7-NEXT: v_rcp_f32_e32 v3, v27532; GFX7-NEXT: v_fma_f32 v4, -v2, v3, 1.07533; GFX7-NEXT: v_fma_f32 v3, v4, v3, v37534; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07535; GFX7-NEXT: v_mul_f32_e32 v5, v4, v37536; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v47537; GFX7-NEXT: v_fma_f32 v5, v6, v3, v57538; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v47539; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v57540; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v07541; GFX7-NEXT: s_setpc_b64 s[30:31]7542;7543; GFX8-LABEL: v_fdiv_f32_ieee_nodenorm_y:7544; GFX8: ; %bb.0:7545; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7546; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07547; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07548; GFX8-NEXT: v_rcp_f32_e32 v4, v27549; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.07550; GFX8-NEXT: v_fma_f32 v4, v5, v4, v47551; GFX8-NEXT: v_mul_f32_e32 v5, v3, v47552; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v37553; GFX8-NEXT: v_fma_f32 v5, v6, v4, v57554; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v37555; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v57556; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v07557; GFX8-NEXT: s_setpc_b64 s[30:31]7558;7559; GFX10-LABEL: v_fdiv_f32_ieee_nodenorm_y:7560; GFX10: ; %bb.0:7561; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7562; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v07563; GFX10-NEXT: v_rcp_f32_e32 v3, v27564; GFX10-NEXT: v_fma_f32 v4, -v2, v3, 1.07565; GFX10-NEXT: v_fmac_f32_e32 v3, v4, v37566; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07567; GFX10-NEXT: v_mul_f32_e32 v5, v4, v37568; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v47569; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v37570; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v47571; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v57572; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v07573; GFX10-NEXT: s_setpc_b64 s[30:31]7574;7575; GFX11-LABEL: v_fdiv_f32_ieee_nodenorm_y:7576; GFX11: ; %bb.0:7577; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7578; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v07579; GFX11-NEXT: v_rcp_f32_e32 v3, v27580; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7581; GFX11-NEXT: v_fma_f32 v4, -v2, v3, 1.07582; GFX11-NEXT: v_fmac_f32_e32 v3, v4, v37583; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07584; GFX11-NEXT: v_mul_f32_e32 v5, v4, v37585; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v47586; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v37587; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v47588; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v57589; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v07590; GFX11-NEXT: s_setpc_b64 s[30:31]7591;7592; EG-LABEL: v_fdiv_f32_ieee_nodenorm_y:7593; EG: ; %bb.0:7594; EG-NEXT: CF_END7595; EG-NEXT: PAD7596 %div = fdiv float %x, %y7597 ret float %div7598}7599 7600define float @v_fdiv_f32_ieee_25ulp_nodenorm_y(float %x, float nofpclass(sub) %y) #1 {7601; GFX6-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_y:7602; GFX6: ; %bb.0:7603; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7604; GFX6-NEXT: s_mov_b32 s4, 0x7f8000007605; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v17606; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s47607; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc7608; GFX6-NEXT: v_rcp_f32_e32 v2, v27609; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v07610; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s47611; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v17612; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc7613; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v07614; GFX6-NEXT: v_mul_f32_e32 v2, v3, v27615; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v17616; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v07617; GFX6-NEXT: s_setpc_b64 s[30:31]7618;7619; GFX7-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_y:7620; GFX7: ; %bb.0:7621; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7622; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v17623; GFX7-NEXT: v_rcp_f32_e32 v2, v27624; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v17625; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v07626; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v07627; GFX7-NEXT: v_mul_f32_e32 v0, v0, v27628; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v17629; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v17630; GFX7-NEXT: s_setpc_b64 s[30:31]7631;7632; GFX8-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_y:7633; GFX8: ; %bb.0:7634; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7635; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v17636; GFX8-NEXT: v_rcp_f32_e32 v2, v27637; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v17638; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v07639; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v07640; GFX8-NEXT: v_mul_f32_e32 v0, v0, v27641; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v17642; GFX8-NEXT: v_ldexp_f32 v0, v0, v17643; GFX8-NEXT: s_setpc_b64 s[30:31]7644;7645; GFX10-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_y:7646; GFX10: ; %bb.0:7647; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7648; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v17649; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v17650; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v07651; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v07652; GFX10-NEXT: v_rcp_f32_e32 v2, v27653; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v17654; GFX10-NEXT: v_mul_f32_e32 v2, v3, v27655; GFX10-NEXT: v_ldexp_f32 v0, v2, v07656; GFX10-NEXT: s_setpc_b64 s[30:31]7657;7658; GFX11-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_y:7659; GFX11: ; %bb.0:7660; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7661; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v17662; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v17663; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v07664; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v07665; GFX11-NEXT: v_rcp_f32_e32 v2, v27666; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v17667; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7668; GFX11-NEXT: v_mul_f32_e32 v2, v3, v27669; GFX11-NEXT: v_ldexp_f32 v0, v2, v07670; GFX11-NEXT: s_setpc_b64 s[30:31]7671;7672; EG-LABEL: v_fdiv_f32_ieee_25ulp_nodenorm_y:7673; EG: ; %bb.0:7674; EG-NEXT: CF_END7675; EG-NEXT: PAD7676 %div = fdiv float %x, %y, !fpmath !07677 ret float %div7678}7679 7680define float @v_fdiv_f32_dynamic_nodenorm_y(float %x, float nofpclass(sub) %y) #2 {7681; GFX6-FASTFMA-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7682; GFX6-FASTFMA: ; %bb.0:7683; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7684; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07685; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v27686; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07687; GFX6-FASTFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7688; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37689; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.07690; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v37691; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v37692; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v47693; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v57694; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v47695; GFX6-FASTFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47696; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v57697; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07698; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]7699;7700; GFX6-SLOWFMA-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7701; GFX6-SLOWFMA: ; %bb.0:7702; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7703; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07704; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07705; GFX6-SLOWFMA-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7706; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v27707; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37708; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.07709; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v47710; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v47711; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v37712; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v57713; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v37714; GFX6-SLOWFMA-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47715; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v57716; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07717; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]7718;7719; GFX7-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7720; GFX7: ; %bb.0:7721; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7722; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07723; GFX7-NEXT: v_rcp_f32_e32 v3, v27724; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07725; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7726; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37727; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.07728; GFX7-NEXT: v_fma_f32 v3, v5, v3, v37729; GFX7-NEXT: v_mul_f32_e32 v5, v4, v37730; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v47731; GFX7-NEXT: v_fma_f32 v5, v6, v3, v57732; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v47733; GFX7-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47734; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v57735; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v07736; GFX7-NEXT: s_setpc_b64 s[30:31]7737;7738; GFX8-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7739; GFX8: ; %bb.0:7740; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7741; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07742; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07743; GFX8-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7744; GFX8-NEXT: v_rcp_f32_e32 v4, v27745; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37746; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.07747; GFX8-NEXT: v_fma_f32 v4, v5, v4, v47748; GFX8-NEXT: v_mul_f32_e32 v5, v3, v47749; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v37750; GFX8-NEXT: v_fma_f32 v5, v6, v4, v57751; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v37752; GFX8-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47753; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v57754; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v07755; GFX8-NEXT: s_setpc_b64 s[30:31]7756;7757; GFX10-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7758; GFX10: ; %bb.0:7759; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7760; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v07761; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07762; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 4, 2)7763; GFX10-NEXT: v_rcp_f32_e32 v3, v27764; GFX10-NEXT: s_denorm_mode 157765; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.07766; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v37767; GFX10-NEXT: v_mul_f32_e32 v5, v4, v37768; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v47769; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v37770; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v47771; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s47772; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v57773; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v07774; GFX10-NEXT: s_setpc_b64 s[30:31]7775;7776; GFX11-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7777; GFX11: ; %bb.0:7778; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7779; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v07780; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07781; GFX11-NEXT: s_getreg_b32 s0, hwreg(HW_REG_MODE, 4, 2)7782; GFX11-NEXT: v_rcp_f32_e32 v3, v27783; GFX11-NEXT: s_denorm_mode 157784; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7785; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.07786; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v37787; GFX11-NEXT: v_mul_f32_e32 v5, v4, v37788; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v47789; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v37790; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v47791; GFX11-NEXT: s_setreg_b32 hwreg(HW_REG_MODE, 4, 2), s07792; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v57793; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v07794; GFX11-NEXT: s_setpc_b64 s[30:31]7795;7796; EG-LABEL: v_fdiv_f32_dynamic_nodenorm_y:7797; EG: ; %bb.0:7798; EG-NEXT: CF_END7799; EG-NEXT: PAD7800 %div = fdiv float %x, %y7801 ret float %div7802}7803 7804define float @v_fdiv_f32_dynamic_25ulp_nodenorm_y(float %x, float nofpclass(sub) %y) #2 {7805; GFX6-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_y:7806; GFX6: ; %bb.0:7807; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7808; GFX6-NEXT: s_mov_b32 s4, 0x7f8000007809; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v17810; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s47811; GFX6-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc7812; GFX6-NEXT: v_rcp_f32_e32 v2, v27813; GFX6-NEXT: v_frexp_mant_f32_e32 v3, v07814; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s47815; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v1, v17816; GFX6-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc7817; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v0, v07818; GFX6-NEXT: v_mul_f32_e32 v2, v3, v27819; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v17820; GFX6-NEXT: v_ldexp_f32_e32 v0, v2, v07821; GFX6-NEXT: s_setpc_b64 s[30:31]7822;7823; GFX7-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_y:7824; GFX7: ; %bb.0:7825; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7826; GFX7-NEXT: v_frexp_mant_f32_e32 v2, v17827; GFX7-NEXT: v_rcp_f32_e32 v2, v27828; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v1, v17829; GFX7-NEXT: v_frexp_exp_i32_f32_e32 v3, v07830; GFX7-NEXT: v_frexp_mant_f32_e32 v0, v07831; GFX7-NEXT: v_mul_f32_e32 v0, v0, v27832; GFX7-NEXT: v_sub_i32_e32 v1, vcc, v3, v17833; GFX7-NEXT: v_ldexp_f32_e32 v0, v0, v17834; GFX7-NEXT: s_setpc_b64 s[30:31]7835;7836; GFX8-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_y:7837; GFX8: ; %bb.0:7838; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7839; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v17840; GFX8-NEXT: v_rcp_f32_e32 v2, v27841; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v17842; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v3, v07843; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v07844; GFX8-NEXT: v_mul_f32_e32 v0, v0, v27845; GFX8-NEXT: v_sub_u32_e32 v1, vcc, v3, v17846; GFX8-NEXT: v_ldexp_f32 v0, v0, v17847; GFX8-NEXT: s_setpc_b64 s[30:31]7848;7849; GFX10-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_y:7850; GFX10: ; %bb.0:7851; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7852; GFX10-NEXT: v_frexp_mant_f32_e32 v2, v17853; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v1, v17854; GFX10-NEXT: v_frexp_mant_f32_e32 v3, v07855; GFX10-NEXT: v_frexp_exp_i32_f32_e32 v0, v07856; GFX10-NEXT: v_rcp_f32_e32 v2, v27857; GFX10-NEXT: v_sub_nc_u32_e32 v0, v0, v17858; GFX10-NEXT: v_mul_f32_e32 v2, v3, v27859; GFX10-NEXT: v_ldexp_f32 v0, v2, v07860; GFX10-NEXT: s_setpc_b64 s[30:31]7861;7862; GFX11-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_y:7863; GFX11: ; %bb.0:7864; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7865; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v17866; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v17867; GFX11-NEXT: v_frexp_mant_f32_e32 v3, v07868; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v07869; GFX11-NEXT: v_rcp_f32_e32 v2, v27870; GFX11-NEXT: v_sub_nc_u32_e32 v0, v0, v17871; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7872; GFX11-NEXT: v_mul_f32_e32 v2, v3, v27873; GFX11-NEXT: v_ldexp_f32 v0, v2, v07874; GFX11-NEXT: s_setpc_b64 s[30:31]7875;7876; EG-LABEL: v_fdiv_f32_dynamic_25ulp_nodenorm_y:7877; EG: ; %bb.0:7878; EG-NEXT: CF_END7879; EG-NEXT: PAD7880 %div = fdiv float %x, %y, !fpmath !07881 ret float %div7882}7883 7884define float @v_fdiv_f32_daz_nodenorm_y(float %x, float nofpclass(sub) %y) #0 {7885; GFX6-FASTFMA-LABEL: v_fdiv_f32_daz_nodenorm_y:7886; GFX6-FASTFMA: ; %bb.0:7887; GFX6-FASTFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7888; GFX6-FASTFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07889; GFX6-FASTFMA-NEXT: v_rcp_f32_e32 v3, v27890; GFX6-FASTFMA-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07891; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37892; GFX6-FASTFMA-NEXT: v_fma_f32 v5, -v2, v3, 1.07893; GFX6-FASTFMA-NEXT: v_fma_f32 v3, v5, v3, v37894; GFX6-FASTFMA-NEXT: v_mul_f32_e32 v5, v4, v37895; GFX6-FASTFMA-NEXT: v_fma_f32 v6, -v2, v5, v47896; GFX6-FASTFMA-NEXT: v_fma_f32 v5, v6, v3, v57897; GFX6-FASTFMA-NEXT: v_fma_f32 v2, -v2, v5, v47898; GFX6-FASTFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07899; GFX6-FASTFMA-NEXT: v_div_fmas_f32 v2, v2, v3, v57900; GFX6-FASTFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07901; GFX6-FASTFMA-NEXT: s_setpc_b64 s[30:31]7902;7903; GFX6-SLOWFMA-LABEL: v_fdiv_f32_daz_nodenorm_y:7904; GFX6-SLOWFMA: ; %bb.0:7905; GFX6-SLOWFMA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7906; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07907; GFX6-SLOWFMA-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07908; GFX6-SLOWFMA-NEXT: v_rcp_f32_e32 v4, v27909; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37910; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, -v2, v4, 1.07911; GFX6-SLOWFMA-NEXT: v_fma_f32 v4, v5, v4, v47912; GFX6-SLOWFMA-NEXT: v_mul_f32_e32 v5, v3, v47913; GFX6-SLOWFMA-NEXT: v_fma_f32 v6, -v2, v5, v37914; GFX6-SLOWFMA-NEXT: v_fma_f32 v5, v6, v4, v57915; GFX6-SLOWFMA-NEXT: v_fma_f32 v2, -v2, v5, v37916; GFX6-SLOWFMA-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07917; GFX6-SLOWFMA-NEXT: v_div_fmas_f32 v2, v2, v4, v57918; GFX6-SLOWFMA-NEXT: v_div_fixup_f32 v0, v2, v1, v07919; GFX6-SLOWFMA-NEXT: s_setpc_b64 s[30:31]7920;7921; GFX7-LABEL: v_fdiv_f32_daz_nodenorm_y:7922; GFX7: ; %bb.0:7923; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7924; GFX7-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07925; GFX7-NEXT: v_rcp_f32_e32 v3, v27926; GFX7-NEXT: v_div_scale_f32 v4, vcc, v0, v1, v07927; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37928; GFX7-NEXT: v_fma_f32 v5, -v2, v3, 1.07929; GFX7-NEXT: v_fma_f32 v3, v5, v3, v37930; GFX7-NEXT: v_mul_f32_e32 v5, v4, v37931; GFX7-NEXT: v_fma_f32 v6, -v2, v5, v47932; GFX7-NEXT: v_fma_f32 v5, v6, v3, v57933; GFX7-NEXT: v_fma_f32 v2, -v2, v5, v47934; GFX7-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07935; GFX7-NEXT: v_div_fmas_f32 v2, v2, v3, v57936; GFX7-NEXT: v_div_fixup_f32 v0, v2, v1, v07937; GFX7-NEXT: s_setpc_b64 s[30:31]7938;7939; GFX8-LABEL: v_fdiv_f32_daz_nodenorm_y:7940; GFX8: ; %bb.0:7941; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7942; GFX8-NEXT: v_div_scale_f32 v2, s[4:5], v1, v1, v07943; GFX8-NEXT: v_div_scale_f32 v3, vcc, v0, v1, v07944; GFX8-NEXT: v_rcp_f32_e32 v4, v27945; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 37946; GFX8-NEXT: v_fma_f32 v5, -v2, v4, 1.07947; GFX8-NEXT: v_fma_f32 v4, v5, v4, v47948; GFX8-NEXT: v_mul_f32_e32 v5, v3, v47949; GFX8-NEXT: v_fma_f32 v6, -v2, v5, v37950; GFX8-NEXT: v_fma_f32 v5, v6, v4, v57951; GFX8-NEXT: v_fma_f32 v2, -v2, v5, v37952; GFX8-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 07953; GFX8-NEXT: v_div_fmas_f32 v2, v2, v4, v57954; GFX8-NEXT: v_div_fixup_f32 v0, v2, v1, v07955; GFX8-NEXT: s_setpc_b64 s[30:31]7956;7957; GFX10-LABEL: v_fdiv_f32_daz_nodenorm_y:7958; GFX10: ; %bb.0:7959; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7960; GFX10-NEXT: v_div_scale_f32 v2, s4, v1, v1, v07961; GFX10-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07962; GFX10-NEXT: v_rcp_f32_e32 v3, v27963; GFX10-NEXT: s_denorm_mode 157964; GFX10-NEXT: v_fma_f32 v5, -v2, v3, 1.07965; GFX10-NEXT: v_fmac_f32_e32 v3, v5, v37966; GFX10-NEXT: v_mul_f32_e32 v5, v4, v37967; GFX10-NEXT: v_fma_f32 v6, -v2, v5, v47968; GFX10-NEXT: v_fmac_f32_e32 v5, v6, v37969; GFX10-NEXT: v_fma_f32 v2, -v2, v5, v47970; GFX10-NEXT: s_denorm_mode 127971; GFX10-NEXT: v_div_fmas_f32 v2, v2, v3, v57972; GFX10-NEXT: v_div_fixup_f32 v0, v2, v1, v07973; GFX10-NEXT: s_setpc_b64 s[30:31]7974;7975; GFX11-LABEL: v_fdiv_f32_daz_nodenorm_y:7976; GFX11: ; %bb.0:7977; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7978; GFX11-NEXT: v_div_scale_f32 v2, null, v1, v1, v07979; GFX11-NEXT: v_div_scale_f32 v4, vcc_lo, v0, v1, v07980; GFX11-NEXT: v_rcp_f32_e32 v3, v27981; GFX11-NEXT: s_denorm_mode 157982; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)7983; GFX11-NEXT: v_fma_f32 v5, -v2, v3, 1.07984; GFX11-NEXT: v_fmac_f32_e32 v3, v5, v37985; GFX11-NEXT: v_mul_f32_e32 v5, v4, v37986; GFX11-NEXT: v_fma_f32 v6, -v2, v5, v47987; GFX11-NEXT: v_fmac_f32_e32 v5, v6, v37988; GFX11-NEXT: v_fma_f32 v2, -v2, v5, v47989; GFX11-NEXT: s_denorm_mode 127990; GFX11-NEXT: v_div_fmas_f32 v2, v2, v3, v57991; GFX11-NEXT: v_div_fixup_f32 v0, v2, v1, v07992; GFX11-NEXT: s_setpc_b64 s[30:31]7993;7994; EG-LABEL: v_fdiv_f32_daz_nodenorm_y:7995; EG: ; %bb.0:7996; EG-NEXT: CF_END7997; EG-NEXT: PAD7998 %div = fdiv float %x, %y7999 ret float %div8000}8001 8002define float @v_fdiv_f32_daz_25ulp_nodenorm_y(float %x, float nofpclass(sub) %y) #0 {8003; GFX678-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_y:8004; GFX678: ; %bb.0:8005; GFX678-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8006; GFX678-NEXT: s_mov_b32 s4, 0x6f8000008007; GFX678-NEXT: v_mov_b32_e32 v2, 0x2f8000008008; GFX678-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s48009; GFX678-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc8010; GFX678-NEXT: v_mul_f32_e32 v1, v1, v28011; GFX678-NEXT: v_rcp_f32_e32 v1, v18012; GFX678-NEXT: v_mul_f32_e32 v0, v0, v18013; GFX678-NEXT: v_mul_f32_e32 v0, v2, v08014; GFX678-NEXT: s_setpc_b64 s[30:31]8015;8016; GFX10-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_y:8017; GFX10: ; %bb.0:8018; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8019; GFX10-NEXT: v_cmp_lt_f32_e64 s4, 0x6f800000, |v1|8020; GFX10-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s48021; GFX10-NEXT: v_mul_f32_e32 v1, v1, v28022; GFX10-NEXT: v_rcp_f32_e32 v1, v18023; GFX10-NEXT: v_mul_f32_e32 v0, v0, v18024; GFX10-NEXT: v_mul_f32_e32 v0, v2, v08025; GFX10-NEXT: s_setpc_b64 s[30:31]8026;8027; GFX11-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_y:8028; GFX11: ; %bb.0:8029; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8030; GFX11-NEXT: v_cmp_lt_f32_e64 s0, 0x6f800000, |v1|8031; GFX11-NEXT: v_cndmask_b32_e64 v2, 1.0, 0x2f800000, s08032; GFX11-NEXT: v_mul_f32_e32 v1, v1, v28033; GFX11-NEXT: v_rcp_f32_e32 v1, v18034; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)8035; GFX11-NEXT: v_mul_f32_e32 v0, v0, v18036; GFX11-NEXT: v_mul_f32_e32 v0, v2, v08037; GFX11-NEXT: s_setpc_b64 s[30:31]8038;8039; EG-LABEL: v_fdiv_f32_daz_25ulp_nodenorm_y:8040; EG: ; %bb.0:8041; EG-NEXT: CF_END8042; EG-NEXT: PAD8043 %div = fdiv float %x, %y, !fpmath !08044 ret float %div8045}8046 8047attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }8048attributes #1 = { "denormal-fp-math-f32"="ieee,ieee" }8049attributes #2 = { "denormal-fp-math-f32"="dynamic,dynamic" }8050 8051!0 = !{float 2.500000e+00}8052