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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 < %s | FileCheck -check-prefix=GCN %s3 4; The custom CSR spills inserted during the frame lowering was earlier using SP as the frame base.5; The offsets allocated for the CS objects go wrong when any local stack object has a higher6; alignment requirement than the default stack alignment for AMDGPU (either 4 or 16). The offsets7; in such cases should be from the newly aligned FP. Even to adjust the offset from the SP value8; at function entry, the FP-SP can't be statically determined with dynamic stack realignment. To9; fix the problem, use FP as the frame base in the spills whenever the function has FP.10 11define void @test_stack_realign(<8 x i32> %val, i32 %idx) #0 {12; GCN-LABEL: test_stack_realign:13; GCN: ; %bb.0:14; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)15; GCN-NEXT: s_mov_b32 s16, s3316; GCN-NEXT: s_add_i32 s33, s32, 0xfc017; GCN-NEXT: s_and_b32 s33, s33, 0xfffff00018; GCN-NEXT: s_or_saveexec_b64 s[18:19], -119; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:96 ; 4-byte Folded Spill20; GCN-NEXT: s_mov_b64 exec, s[18:19]21; GCN-NEXT: v_writelane_b32 v42, s16, 222; GCN-NEXT: v_writelane_b32 v42, s34, 323; GCN-NEXT: s_mov_b32 s34, s3224; GCN-NEXT: s_addk_i32 s32, 0x300025; GCN-NEXT: s_getpc_b64 s[16:17]26; GCN-NEXT: s_add_u32 s16, s16, extern_func@gotpcrel32@lo+427; GCN-NEXT: s_addc_u32 s17, s17, extern_func@gotpcrel32@hi+1228; GCN-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x029; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill30; GCN-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill31; GCN-NEXT: v_writelane_b32 v42, s30, 032; GCN-NEXT: buffer_store_dword v7, off, s[0:3], s33 offset:9233; GCN-NEXT: s_waitcnt vmcnt(0)34; GCN-NEXT: buffer_store_dword v6, off, s[0:3], s33 offset:8835; GCN-NEXT: s_waitcnt vmcnt(0)36; GCN-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:8437; GCN-NEXT: s_waitcnt vmcnt(0)38; GCN-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:8039; GCN-NEXT: s_waitcnt vmcnt(0)40; GCN-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:7641; GCN-NEXT: s_waitcnt vmcnt(0)42; GCN-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:7243; GCN-NEXT: s_waitcnt vmcnt(0)44; GCN-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:6845; GCN-NEXT: s_waitcnt vmcnt(0)46; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:6447; GCN-NEXT: s_waitcnt vmcnt(0)48; GCN-NEXT: v_mov_b32_e32 v0, v849; GCN-NEXT: v_writelane_b32 v42, s31, 150; GCN-NEXT: ;;#ASMSTART51; GCN-NEXT: ;;#ASMEND52; GCN-NEXT: ;;#ASMSTART53; GCN-NEXT: ;;#ASMEND54; GCN-NEXT: s_waitcnt lgkmcnt(0)55; GCN-NEXT: s_swappc_b64 s[30:31], s[16:17]56; GCN-NEXT: buffer_load_dword v41, off, s[0:3], s33 ; 4-byte Folded Reload57; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload58; GCN-NEXT: v_readlane_b32 s31, v42, 159; GCN-NEXT: v_readlane_b32 s30, v42, 060; GCN-NEXT: s_mov_b32 s32, s3461; GCN-NEXT: v_readlane_b32 s4, v42, 262; GCN-NEXT: v_readlane_b32 s34, v42, 363; GCN-NEXT: s_or_saveexec_b64 s[6:7], -164; GCN-NEXT: buffer_load_dword v42, off, s[0:3], s33 offset:96 ; 4-byte Folded Reload65; GCN-NEXT: s_mov_b64 exec, s[6:7]66; GCN-NEXT: s_mov_b32 s33, s467; GCN-NEXT: s_waitcnt vmcnt(0)68; GCN-NEXT: s_setpc_b64 s[30:31]69 %alloca.val = alloca <8 x i32>, align 64, addrspace(5)70 store volatile <8 x i32> %val, ptr addrspace(5) %alloca.val, align 6471 call void asm sideeffect "", "~{v40}" ()72 call void asm sideeffect "", "~{v41}" ()73 call void @extern_func(i32 %idx)74 ret void75}76 77declare void @extern_func(i32) #078 79attributes #0 = { noinline nounwind }80