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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass=si-fix-sgpr-copies -verify-machineinstrs -o - %s | FileCheck --check-prefixes=GCN %s3 4---5name: cmp_f166body: |7 bb.0.entry:8 ; GCN-LABEL: name: cmp_f169 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF10 ; GCN-NEXT: [[DEF1:%[0-9]+]]:sreg_32 = IMPLICIT_DEF11 ; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[DEF]], 0, 0, 0, implicit $mode, implicit $exec12 ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF13 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_U16_t16_e64_]], %subreg.lo16, [[DEF2]], %subreg.hi1614 ; GCN-NEXT: [[V_CMP_LT_F16_t16_e64_:%[0-9]+]]:sreg_32_xm0_xexec = nofpexcept V_CMP_LT_F16_t16_e64 0, killed [[REG_SEQUENCE]].lo16, 0, [[DEF1]], 0, 0, implicit $mode, implicit $exec15 ; GCN-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, killed [[V_CMP_LT_F16_t16_e64_]], implicit $exec16 %0:vgpr_16 = IMPLICIT_DEF17 %1:sreg_32 = IMPLICIT_DEF18 %2:vgpr_16 = V_CVT_F16_U16_t16_e64 0, %0:vgpr_16, 0, 0, 0, implicit $mode, implicit $exec19 %3:sreg_32 = COPY %2:vgpr_1620 nofpexcept S_CMP_LT_F16 killed %3:sreg_32, %1:sreg_32, implicit-def $scc, implicit $mode21 %4:sreg_32_xm0_xexec = COPY $scc22 %5:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, -1, killed %4, implicit $exec23...24 25---26name: cvt_hi_f32_f1627body: |28 bb.0:29 ; GCN-LABEL: name: cvt_hi_f32_f1630 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF31 ; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[DEF]], 0, 0, 0, implicit $mode, implicit $exec32 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF33 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_U16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi1634 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]]35 ; GCN-NEXT: [[V_CVT_F32_F16_t16_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_F16_t16_e64 0, [[COPY]].hi16, 0, 0, 0, implicit $mode, implicit $exec36 %0:vgpr_16 = IMPLICIT_DEF37 %1:vgpr_16 = V_CVT_F16_U16_t16_e64 0, %0:vgpr_16, 0, 0, 0, implicit $mode, implicit $exec38 %2:sreg_32 = COPY %1:vgpr_1639 %3:sreg_32 = S_CVT_HI_F32_F16 %2:sreg_32, implicit $mode40...41 42---43name: s_or_b3244body: |45 bb.0:46 ; GCN-LABEL: name: s_or_b3247 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF48 ; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[DEF]], 0, 0, 0, implicit $mode, implicit $exec49 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF50 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_U16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi1651 ; GCN-NEXT: [[V_OR_B32_e64_:%[0-9]+]]:vgpr_32 = V_OR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE]], implicit $exec52 ; GCN-NEXT: [[V_CVT_F16_U16_t16_e64_1:%[0-9]+]]:vgpr_16 = V_CVT_F16_U16_t16_e64 0, [[V_OR_B32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec53 %0:vgpr_16 = IMPLICIT_DEF54 %1:vgpr_16 = V_CVT_F16_U16_t16_e64 0, %0:vgpr_16, 0, 0, 0, implicit $mode, implicit $exec55 %2:sreg_32 = COPY %1:vgpr_1656 %3:sreg_32 = S_OR_B32 %2:sreg_32, %2:sreg_32, implicit-def $scc57 %4:vgpr_16 = V_CVT_F16_U16_t16_e64 0, %3:sreg_32, 0, 0, 0, implicit $mode, implicit $exec58...59 60---61name: salu16_usedby_salu3262body: |63 bb.0:64 ; GCN-LABEL: name: salu16_usedby_salu3265 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF66 ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec67 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF68 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi1669 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[DEF]], implicit $exec70 %0:vgpr_32 = IMPLICIT_DEF71 %1:sreg_32 = COPY %0:vgpr_3272 %2:sreg_32 = S_TRUNC_F16 %1:sreg_32, implicit $mode73 %3:sreg_32 = S_XOR_B32 %2:sreg_32, %1:sreg_32, implicit-def $scc74...75 76---77name: salu16_usedby_valu3278body: |79 bb.0:80 ; GCN-LABEL: name: salu16_usedby_valu3281 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF82 ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec83 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF84 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_TRUNC_F16_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi1685 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[DEF]], implicit-def $scc, implicit $exec86 %0:vgpr_32 = IMPLICIT_DEF87 %1:sreg_32 = COPY %0:vgpr_3288 %2:sreg_32 = S_TRUNC_F16 %1:sreg_32, implicit $mode89 %3:vgpr_32 = V_XOR_B32_e64 %2:sreg_32, %1:sreg_32, implicit-def $scc, implicit $exec90...91 92---93name: salu32_usedby_salu1694body: |95 bb.0:96 ; GCN-LABEL: name: salu32_usedby_salu1697 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF98 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[DEF]], [[DEF]], implicit $exec99 ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[V_XOR_B32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec100 %0:vgpr_32 = IMPLICIT_DEF101 %1:sreg_32 = COPY %0:vgpr_32102 %2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc103 %3:sreg_32 = S_TRUNC_F16 %2:sreg_32, implicit $mode104...105 106---107name: salu32_usedby_valu16108body: |109 bb.0:110 ; GCN-LABEL: name: salu32_usedby_valu16111 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF112 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[DEF]], [[DEF]], implicit $exec113 ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[V_XOR_B32_e64_]].lo16, 0, 0, 0, implicit $mode, implicit $exec114 %0:vgpr_32 = IMPLICIT_DEF115 %1:sreg_32 = COPY %0:vgpr_32116 %2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc117 %3:vgpr_16 = V_TRUNC_F16_t16_e64 0, %2:sreg_32, 0, 0, 0, implicit $mode, implicit $exec118...119 120---121name: copy_vgpr16_sreg32_usedby_salu16122body: |123 bb.0:124 ; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_salu16125 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF126 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF127 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16128 ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec129 %0:vgpr_16 = IMPLICIT_DEF130 %1:sreg_32 = COPY %0:vgpr_16131 %2:sreg_32 = S_TRUNC_F16 %1:sreg_32, implicit $mode132...133 134---135name: copy_vgpr16_sreg32_usedby_salu32136body: |137 bb.0:138 ; GCN-LABEL: name: copy_vgpr16_sreg32_usedby_salu32139 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF140 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF141 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16142 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE]], [[REG_SEQUENCE]], implicit $exec143 %0:vgpr_16 = IMPLICIT_DEF144 %1:sreg_32 = COPY %0:vgpr_16145 %2:sreg_32 = S_XOR_B32 %1:sreg_32, %1:sreg_32, implicit-def $scc146...147 148---149name: copy_vgpr32_sreg32_usedby_valu16150body: |151 bb.0:152 ; GCN-LABEL: name: copy_vgpr32_sreg32_usedby_valu16153 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF154 ; GCN-NEXT: [[V_TRUNC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_TRUNC_F16_t16_e64 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec155 %0:vgpr_32 = IMPLICIT_DEF156 %1:sreg_32 = COPY %0:vgpr_32157 %2:vgpr_16 = V_TRUNC_F16_t16_e64 0, %1:sreg_32, 0, 0, 0, implicit $mode, implicit $exec158...159 160---161name: S_FMAC_F16162body: |163 bb.0:164 ; GCN-LABEL: name: S_FMAC_F16165 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF166 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF167 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16168 ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF169 ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF2]], %subreg.hi16170 ; GCN-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_FMAC_F16_t16_e64 0, [[REG_SEQUENCE1]].lo16, 0, [[REG_SEQUENCE1]].lo16, 0, [[REG_SEQUENCE]].lo16, 0, 0, 0, implicit $mode, implicit $exec171 %0:vgpr_16 = IMPLICIT_DEF172 %1:sgpr_lo16 = COPY %0:vgpr_16173 %2:sreg_32 = COPY %0:vgpr_16174 %3:sreg_32 = COPY %1:sgpr_lo16175 %4:sreg_32 = S_FMAC_F16 %3:sreg_32, %3:sreg_32, %2:sreg_32, implicit $mode176...177 178---179name: legalize_with_multi_user180body: |181 bb.0:182 ; GCN-LABEL: name: legalize_with_multi_user183 ; GCN: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF184 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF185 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[DEF]], %subreg.lo16, [[DEF1]], %subreg.hi16186 ; GCN-NEXT: [[V_ADD_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ADD_F16_t16_e64 0, [[REG_SEQUENCE]].lo16, 0, 1, 0, 0, 0, implicit $mode, implicit $exec187 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32768188 ; GCN-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF189 ; GCN-NEXT: [[DEF3:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF190 ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ADD_F16_t16_e64_]], %subreg.lo16, [[DEF3]], %subreg.hi16191 ; GCN-NEXT: [[V_PK_FMA_F16_:%[0-9]+]]:vgpr_32 = V_PK_FMA_F16 11, [[S_MOV_B32_]], 0, [[REG_SEQUENCE1]], 8, [[DEF2]], 0, 0, 0, 0, 0, implicit $mode, implicit $exec192 ; GCN-NEXT: [[DEF4:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF193 ; GCN-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ADD_F16_t16_e64_]], %subreg.lo16, [[DEF4]], %subreg.hi16194 ; GCN-NEXT: [[V_XOR_B32_e64_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e64 [[REG_SEQUENCE2]], [[S_MOV_B32_]], implicit $exec195 %0:vgpr_16 = IMPLICIT_DEF196 %1:sreg_32 = COPY %0:vgpr_16197 %2:sreg_32 = S_ADD_F16 %1:sreg_32, 1, implicit $mode198 %3:sreg_32 = S_MOV_B32 32768199 %4:vgpr_32 = IMPLICIT_DEF200 %5:vgpr_32 = V_PK_FMA_F16 11, %3:sreg_32, 0, %2:sreg_32, 8, %4:vgpr_32, 0, 0, 0, 0, 0, implicit $mode, implicit $exec201 %6:sreg_32 = S_XOR_B32 %2:sreg_32, %3:sreg_32, implicit-def dead $scc202...203 204---205name: vgpr16_to_spgr32206body: |207 ; GCN-LABEL: name: vgpr16_to_spgr32208 ; GCN: bb.0.entry:209 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)210 ; GCN-NEXT: {{ $}}211 ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF212 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[DEF]]213 ; GCN-NEXT: [[DS_READ2_B32_gfx9_:%[0-9]+]]:vreg_64 = DS_READ2_B32_gfx9 killed [[COPY]], 0, 1, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) poison` + 8, align 4, addrspace 3)214 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[DS_READ2_B32_gfx9_]].sub0215 ; GCN-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, killed [[COPY1]], 0, 0, 0, implicit $mode, implicit $exec216 ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535217 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF218 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_F32_t16_e64_]], %subreg.lo16, [[DEF1]], %subreg.hi16219 ; GCN-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[REG_SEQUENCE]], implicit $exec220 ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 killed [[S_MOV_B32_]], killed [[V_READFIRSTLANE_B32_]], implicit-def dead $scc221 ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 5222 ; GCN-NEXT: [[S_MUL_I32_:%[0-9]+]]:sreg_32 = S_MUL_I32 killed [[S_AND_B32_]], killed [[S_MOV_B32_1]]223 ; GCN-NEXT: [[S_MOV_B32_2:%[0-9]+]]:sreg_32 = S_MOV_B32 2224 ; GCN-NEXT: S_CMP_LG_U32 killed [[S_MUL_I32_]], killed [[S_MOV_B32_2]], implicit-def $scc225 ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc226 ; GCN-NEXT: S_BRANCH %bb.1227 ; GCN-NEXT: {{ $}}228 ; GCN-NEXT: bb.1:229 ; GCN-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 1230 ; GCN-NEXT: [[S_MOV_B32_4:%[0-9]+]]:sreg_32 = S_MOV_B32 killed [[S_MOV_B32_3]]231 ; GCN-NEXT: $sgpr0 = COPY [[S_MOV_B32_4]]232 ; GCN-NEXT: SI_RETURN_TO_EPILOG $sgpr0233 ; GCN-NEXT: {{ $}}234 ; GCN-NEXT: bb.2:235 ; GCN-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sreg_32 = S_MOV_B32 2236 ; GCN-NEXT: [[S_MOV_B32_6:%[0-9]+]]:sreg_32 = S_MOV_B32 killed [[S_MOV_B32_5]]237 ; GCN-NEXT: $sgpr0 = COPY [[S_MOV_B32_6]]238 ; GCN-NEXT: SI_RETURN_TO_EPILOG $sgpr0239 bb.0.entry:240 successors: %bb.1(0x40000000), %bb.2(0x40000000); %bb.1(50.00%), %bb.2(50.00%)241 242 %5:sreg_32 = IMPLICIT_DEF243 %6:vgpr_32 = COPY %5:sreg_32244 %4:vreg_64 = DS_READ2_B32_gfx9 killed %6:vgpr_32, 0, 1, 0, implicit $exec :: (load (s64) from `ptr addrspace(3) poison` + 8, align 4, addrspace 3)245 %7:sgpr_32 = COPY %4.sub0:vreg_64246 %8:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, killed %7:sgpr_32, 0, 0, 0, implicit $mode, implicit $exec247 %9:sreg_32 = S_MOV_B32 65535248 %11:sreg_32 = COPY %8:vgpr_16249 %10:sreg_32 = S_AND_B32 killed %9:sreg_32, killed %11:sreg_32, implicit-def dead $scc250 %12:sreg_32 = S_MOV_B32 5251 %13:sreg_32 = S_MUL_I32 killed %10:sreg_32, killed %12:sreg_32252 %14:sreg_32 = S_MOV_B32 2253 S_CMP_LG_U32 killed %13:sreg_32, killed %14:sreg_32, implicit-def $scc254 S_CBRANCH_SCC1 %bb.2, implicit $scc255 S_BRANCH %bb.1256 bb.1:257 %17:sreg_32 = S_MOV_B32 1258 %18:sreg_32 = S_MOV_B32 killed %17:sreg_32259 $sgpr0 = COPY %18:sreg_32260 SI_RETURN_TO_EPILOG $sgpr0261 bb.2:262 %15:sreg_32 = S_MOV_B32 2263 %16:sreg_32 = S_MOV_B32 killed %15:sreg_32264 $sgpr0 = COPY %16:sreg_32265 SI_RETURN_TO_EPILOG $sgpr0266...267 268---269name: s_pack_ll_b32_b16270body: |271 bb.0:272 ; GCN-LABEL: name: s_pack_ll_b32_b16273 ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF274 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF275 ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 [[DEF]], implicit $exec276 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_MOV_B32_e32_]].lo16, %subreg.lo16, [[DEF1]].lo16, %subreg.hi16277 %0:sreg_32 = IMPLICIT_DEF278 %1:vgpr_32 = IMPLICIT_DEF279 %2:sreg_32 = COPY %1:vgpr_32280 %3:sreg_32 = S_PACK_LL_B32_B16 %0:sreg_32, %2:sreg_32, implicit-def dead $scc281...282 283---284name: s_pack_lh_b32_b16285body: |286 bb.0:287 ; GCN-LABEL: name: s_pack_lh_b32_b16288 ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF289 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF290 ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 [[DEF]], implicit $exec291 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_MOV_B32_e32_]].lo16, %subreg.lo16, [[DEF1]].hi16, %subreg.hi16292 %0:sreg_32 = IMPLICIT_DEF293 %1:vgpr_32 = IMPLICIT_DEF294 %2:sreg_32 = COPY %1:vgpr_32295 %3:sreg_32 = S_PACK_LH_B32_B16 %0:sreg_32, %2:sreg_32, implicit-def dead $scc296...297 298---299name: s_pack_hl_b32_b16300body: |301 bb.0:302 ; GCN-LABEL: name: s_pack_hl_b32_b16303 ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF304 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF305 ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 [[DEF]], implicit $exec306 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_MOV_B32_e32_]].hi16, %subreg.lo16, [[DEF1]].lo16, %subreg.hi16307 %0:sreg_32 = IMPLICIT_DEF308 %1:vgpr_32 = IMPLICIT_DEF309 %2:sreg_32 = COPY %1:vgpr_32310 %3:sreg_32 = S_PACK_HL_B32_B16 %0:sreg_32, %2:sreg_32, implicit-def dead $scc311...312 313---314name: s_pack_hh_b32_b16315body: |316 bb.0:317 ; GCN-LABEL: name: s_pack_hh_b32_b16318 ; GCN: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF319 ; GCN-NEXT: [[DEF1:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF320 ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 [[DEF]], implicit $exec321 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_MOV_B32_e32_]].hi16, %subreg.lo16, [[DEF1]].hi16, %subreg.hi16322 %0:sreg_32 = IMPLICIT_DEF323 %1:vgpr_32 = IMPLICIT_DEF324 %2:sreg_32 = COPY %1:vgpr_32325 %3:sreg_32 = S_PACK_HH_B32_B16 %0:sreg_32, %2:sreg_32, implicit-def dead $scc326...327 328---329name: s_pack_ll_b32_b16_use_SALU16330body: |331 bb.0:332 ; GCN-LABEL: name: s_pack_ll_b32_b16_use_SALU16333 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF334 ; GCN-NEXT: [[V_FMAC_F16_t16_e64_:%[0-9]+]]:vgpr_16 = V_FMAC_F16_t16_e64 0, [[DEF]].lo16, 0, [[DEF]].lo16, 0, [[DEF]].lo16, 0, 0, 0, implicit $mode, implicit $exec335 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_FMAC_F16_t16_e64_]], %subreg.lo16, [[DEF]].lo16, %subreg.hi16336 %0:vgpr_32 = IMPLICIT_DEF337 %1:sreg_32 = COPY %0:vgpr_32338 %2:sreg_32 = S_FMAC_F16 %1:sreg_32, %1:sreg_32, %1:sreg_32, implicit $mode339 %3:sreg_32 = S_PACK_LL_B32_B16 %2:sreg_32, %1:sreg_32, implicit-def dead $scc340...341 342---343name: s_pack_ll_b32_b16_use_imm344body: |345 bb.0:346 ; GCN-LABEL: name: s_pack_ll_b32_b16_use_imm347 ; GCN: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF348 ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec349 ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_MOV_B32_e32_]].lo16, %subreg.lo16, [[DEF]].lo16, %subreg.hi16350 %0:vgpr_32 = IMPLICIT_DEF351 %1:sreg_32 = COPY %0:vgpr_32352 %2:sreg_32 = S_PACK_LL_B32_B16 1, %1:sreg_32, implicit-def dead $scc353...354