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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s5 6define void @flat_inst_offset(ptr nocapture %p) {7; GFX9-LABEL: flat_inst_offset:8; GFX9: ; %bb.0:9; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)10; GFX9-NEXT: flat_load_dword v2, v[0:1] offset:411; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)12; GFX9-NEXT: v_add_u32_e32 v2, 1, v213; GFX9-NEXT: flat_store_dword v[0:1], v2 offset:414; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)15; GFX9-NEXT: s_setpc_b64 s[30:31]16;17; GFX10-LABEL: flat_inst_offset:18; GFX10: ; %bb.0:19; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)20; GFX10-NEXT: v_add_co_u32 v0, vcc_lo, v0, 421; GFX10-NEXT: v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo22; GFX10-NEXT: flat_load_dword v2, v[0:1]23; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)24; GFX10-NEXT: v_add_nc_u32_e32 v2, 1, v225; GFX10-NEXT: flat_store_dword v[0:1], v226; GFX10-NEXT: s_waitcnt lgkmcnt(0)27; GFX10-NEXT: s_setpc_b64 s[30:31]28;29; GFX11-LABEL: flat_inst_offset:30; GFX11: ; %bb.0:31; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)32; GFX11-NEXT: flat_load_b32 v2, v[0:1] offset:433; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)34; GFX11-NEXT: v_add_nc_u32_e32 v2, 1, v235; GFX11-NEXT: flat_store_b32 v[0:1], v2 offset:436; GFX11-NEXT: s_waitcnt lgkmcnt(0)37; GFX11-NEXT: s_setpc_b64 s[30:31]38 %gep = getelementptr inbounds i32, ptr %p, i64 139 %load = load i32, ptr %gep, align 440 %inc = add nsw i32 %load, 141 store i32 %inc, ptr %gep, align 442 ret void43}44 45define void @global_inst_offset(ptr addrspace(1) nocapture %p) {46; GFX9-LABEL: global_inst_offset:47; GFX9: ; %bb.0:48; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)49; GFX9-NEXT: global_load_dword v2, v[0:1], off offset:450; GFX9-NEXT: s_waitcnt vmcnt(0)51; GFX9-NEXT: v_add_u32_e32 v2, 1, v252; GFX9-NEXT: global_store_dword v[0:1], v2, off offset:453; GFX9-NEXT: s_waitcnt vmcnt(0)54; GFX9-NEXT: s_setpc_b64 s[30:31]55;56; GFX10-LABEL: global_inst_offset:57; GFX10: ; %bb.0:58; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)59; GFX10-NEXT: global_load_dword v2, v[0:1], off offset:460; GFX10-NEXT: s_waitcnt vmcnt(0)61; GFX10-NEXT: v_add_nc_u32_e32 v2, 1, v262; GFX10-NEXT: global_store_dword v[0:1], v2, off offset:463; GFX10-NEXT: s_setpc_b64 s[30:31]64;65; GFX11-LABEL: global_inst_offset:66; GFX11: ; %bb.0:67; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)68; GFX11-NEXT: global_load_b32 v2, v[0:1], off offset:469; GFX11-NEXT: s_waitcnt vmcnt(0)70; GFX11-NEXT: v_add_nc_u32_e32 v2, 1, v271; GFX11-NEXT: global_store_b32 v[0:1], v2, off offset:472; GFX11-NEXT: s_setpc_b64 s[30:31]73 %gep = getelementptr inbounds i32, ptr addrspace(1) %p, i64 174 %load = load i32, ptr addrspace(1) %gep, align 475 %inc = add nsw i32 %load, 176 store i32 %inc, ptr addrspace(1) %gep, align 477 ret void78}79 80define amdgpu_kernel void @load_i16_lo(ptr %arg, ptr %out) {81; GFX9-LABEL: load_i16_lo:82; GFX9: ; %bb.0:83; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2484; GFX9-NEXT: v_mov_b32_e32 v2, 085; GFX9-NEXT: s_waitcnt lgkmcnt(0)86; GFX9-NEXT: v_mov_b32_e32 v0, s087; GFX9-NEXT: v_mov_b32_e32 v1, s188; GFX9-NEXT: flat_load_short_d16 v2, v[0:1] offset:889; GFX9-NEXT: v_mov_b32_e32 v0, s290; GFX9-NEXT: v_mov_b32_e32 v1, s391; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)92; GFX9-NEXT: v_pk_add_u16 v2, v2, v293; GFX9-NEXT: flat_store_dword v[0:1], v294; GFX9-NEXT: s_endpgm95;96; GFX10-LABEL: load_i16_lo:97; GFX10: ; %bb.0:98; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2499; GFX10-NEXT: v_mov_b32_e32 v2, 0100; GFX10-NEXT: s_waitcnt lgkmcnt(0)101; GFX10-NEXT: s_add_u32 s0, s0, 8102; GFX10-NEXT: s_addc_u32 s1, s1, 0103; GFX10-NEXT: v_mov_b32_e32 v0, s0104; GFX10-NEXT: v_mov_b32_e32 v1, s1105; GFX10-NEXT: flat_load_short_d16 v2, v[0:1]106; GFX10-NEXT: v_mov_b32_e32 v0, s2107; GFX10-NEXT: v_mov_b32_e32 v1, s3108; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)109; GFX10-NEXT: v_pk_add_u16 v2, v2, v2110; GFX10-NEXT: flat_store_dword v[0:1], v2111; GFX10-NEXT: s_endpgm112;113; GFX11-LABEL: load_i16_lo:114; GFX11: ; %bb.0:115; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24116; GFX11-NEXT: v_mov_b32_e32 v2, 0117; GFX11-NEXT: s_waitcnt lgkmcnt(0)118; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1119; GFX11-NEXT: flat_load_d16_b16 v2, v[0:1] offset:8120; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3121; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)122; GFX11-NEXT: v_pk_add_u16 v2, v2, v2123; GFX11-NEXT: flat_store_b32 v[0:1], v2124; GFX11-NEXT: s_endpgm125 %gep = getelementptr inbounds i16, ptr %arg, i32 4126 %ld = load i16, ptr %gep, align 2127 %vec = insertelement <2 x i16> <i16 poison, i16 0>, i16 %ld, i32 0128 %v = add <2 x i16> %vec, %vec129 store <2 x i16> %v, ptr %out, align 4130 ret void131}132 133define amdgpu_kernel void @load_i16_hi(ptr %arg, ptr %out) {134; GFX9-LABEL: load_i16_hi:135; GFX9: ; %bb.0:136; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24137; GFX9-NEXT: v_mov_b32_e32 v2, 0138; GFX9-NEXT: s_waitcnt lgkmcnt(0)139; GFX9-NEXT: v_mov_b32_e32 v0, s0140; GFX9-NEXT: v_mov_b32_e32 v1, s1141; GFX9-NEXT: flat_load_short_d16_hi v2, v[0:1] offset:8142; GFX9-NEXT: v_mov_b32_e32 v0, s2143; GFX9-NEXT: v_mov_b32_e32 v1, s3144; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)145; GFX9-NEXT: v_pk_add_u16 v2, v2, v2146; GFX9-NEXT: flat_store_dword v[0:1], v2147; GFX9-NEXT: s_endpgm148;149; GFX10-LABEL: load_i16_hi:150; GFX10: ; %bb.0:151; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24152; GFX10-NEXT: v_mov_b32_e32 v2, 0153; GFX10-NEXT: s_waitcnt lgkmcnt(0)154; GFX10-NEXT: s_add_u32 s0, s0, 8155; GFX10-NEXT: s_addc_u32 s1, s1, 0156; GFX10-NEXT: v_mov_b32_e32 v0, s0157; GFX10-NEXT: v_mov_b32_e32 v1, s1158; GFX10-NEXT: flat_load_short_d16_hi v2, v[0:1]159; GFX10-NEXT: v_mov_b32_e32 v0, s2160; GFX10-NEXT: v_mov_b32_e32 v1, s3161; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)162; GFX10-NEXT: v_pk_add_u16 v2, v2, v2163; GFX10-NEXT: flat_store_dword v[0:1], v2164; GFX10-NEXT: s_endpgm165;166; GFX11-LABEL: load_i16_hi:167; GFX11: ; %bb.0:168; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24169; GFX11-NEXT: v_mov_b16_e32 v2.l, 0170; GFX11-NEXT: s_waitcnt lgkmcnt(0)171; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1172; GFX11-NEXT: flat_load_d16_hi_b16 v2, v[0:1] offset:8173; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3174; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)175; GFX11-NEXT: v_pk_add_u16 v2, v2, v2176; GFX11-NEXT: flat_store_b32 v[0:1], v2177; GFX11-NEXT: s_endpgm178 %gep = getelementptr inbounds i16, ptr %arg, i32 4179 %ld = load i16, ptr %gep, align 2180 %vec = insertelement <2 x i16> <i16 0, i16 poison>, i16 %ld, i32 1181 %v = add <2 x i16> %vec, %vec182 store <2 x i16> %v, ptr %out, align 4183 ret void184}185 186define amdgpu_kernel void @load_half_lo(ptr %arg, ptr %out) {187; GFX9-LABEL: load_half_lo:188; GFX9: ; %bb.0:189; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24190; GFX9-NEXT: v_mov_b32_e32 v2, 0191; GFX9-NEXT: s_waitcnt lgkmcnt(0)192; GFX9-NEXT: v_mov_b32_e32 v0, s0193; GFX9-NEXT: v_mov_b32_e32 v1, s1194; GFX9-NEXT: flat_load_short_d16 v2, v[0:1] offset:8195; GFX9-NEXT: v_mov_b32_e32 v0, s2196; GFX9-NEXT: v_mov_b32_e32 v1, s3197; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)198; GFX9-NEXT: v_pk_add_f16 v2, v2, v2199; GFX9-NEXT: flat_store_dword v[0:1], v2200; GFX9-NEXT: s_endpgm201;202; GFX10-LABEL: load_half_lo:203; GFX10: ; %bb.0:204; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24205; GFX10-NEXT: v_mov_b32_e32 v2, 0206; GFX10-NEXT: s_waitcnt lgkmcnt(0)207; GFX10-NEXT: s_add_u32 s0, s0, 8208; GFX10-NEXT: s_addc_u32 s1, s1, 0209; GFX10-NEXT: v_mov_b32_e32 v0, s0210; GFX10-NEXT: v_mov_b32_e32 v1, s1211; GFX10-NEXT: flat_load_short_d16 v2, v[0:1]212; GFX10-NEXT: v_mov_b32_e32 v0, s2213; GFX10-NEXT: v_mov_b32_e32 v1, s3214; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)215; GFX10-NEXT: v_pk_add_f16 v2, v2, v2216; GFX10-NEXT: flat_store_dword v[0:1], v2217; GFX10-NEXT: s_endpgm218;219; GFX11-LABEL: load_half_lo:220; GFX11: ; %bb.0:221; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24222; GFX11-NEXT: v_mov_b32_e32 v2, 0223; GFX11-NEXT: s_waitcnt lgkmcnt(0)224; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1225; GFX11-NEXT: flat_load_d16_b16 v2, v[0:1] offset:8226; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3227; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)228; GFX11-NEXT: v_pk_add_f16 v2, v2, v2229; GFX11-NEXT: flat_store_b32 v[0:1], v2230; GFX11-NEXT: s_endpgm231 %gep = getelementptr inbounds half, ptr %arg, i32 4232 %ld = load half, ptr %gep, align 2233 %vec = insertelement <2 x half> <half poison, half 0xH0000>, half %ld, i32 0234 %v = fadd <2 x half> %vec, %vec235 store <2 x half> %v, ptr %out, align 4236 ret void237}238 239define amdgpu_kernel void @load_half_hi(ptr %arg, ptr %out) {240; GFX9-LABEL: load_half_hi:241; GFX9: ; %bb.0:242; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24243; GFX9-NEXT: v_mov_b32_e32 v2, 0244; GFX9-NEXT: s_waitcnt lgkmcnt(0)245; GFX9-NEXT: v_mov_b32_e32 v0, s0246; GFX9-NEXT: v_mov_b32_e32 v1, s1247; GFX9-NEXT: flat_load_short_d16_hi v2, v[0:1] offset:8248; GFX9-NEXT: v_mov_b32_e32 v0, s2249; GFX9-NEXT: v_mov_b32_e32 v1, s3250; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)251; GFX9-NEXT: v_pk_add_f16 v2, v2, v2252; GFX9-NEXT: flat_store_dword v[0:1], v2253; GFX9-NEXT: s_endpgm254;255; GFX10-LABEL: load_half_hi:256; GFX10: ; %bb.0:257; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24258; GFX10-NEXT: v_mov_b32_e32 v2, 0259; GFX10-NEXT: s_waitcnt lgkmcnt(0)260; GFX10-NEXT: s_add_u32 s0, s0, 8261; GFX10-NEXT: s_addc_u32 s1, s1, 0262; GFX10-NEXT: v_mov_b32_e32 v0, s0263; GFX10-NEXT: v_mov_b32_e32 v1, s1264; GFX10-NEXT: flat_load_short_d16_hi v2, v[0:1]265; GFX10-NEXT: v_mov_b32_e32 v0, s2266; GFX10-NEXT: v_mov_b32_e32 v1, s3267; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)268; GFX10-NEXT: v_pk_add_f16 v2, v2, v2269; GFX10-NEXT: flat_store_dword v[0:1], v2270; GFX10-NEXT: s_endpgm271;272; GFX11-LABEL: load_half_hi:273; GFX11: ; %bb.0:274; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24275; GFX11-NEXT: v_mov_b16_e32 v2.l, 0276; GFX11-NEXT: s_waitcnt lgkmcnt(0)277; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1278; GFX11-NEXT: flat_load_d16_hi_b16 v2, v[0:1] offset:8279; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3280; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)281; GFX11-NEXT: v_pk_add_f16 v2, v2, v2282; GFX11-NEXT: flat_store_b32 v[0:1], v2283; GFX11-NEXT: s_endpgm284 %gep = getelementptr inbounds half, ptr %arg, i32 4285 %ld = load half, ptr %gep, align 2286 %vec = insertelement <2 x half> <half 0xH0000, half poison>, half %ld, i32 1287 %v = fadd <2 x half> %vec, %vec288 store <2 x half> %v, ptr %out, align 4289 ret void290}291 292define amdgpu_kernel void @load_float_lo(ptr %arg, ptr %out) {293; GFX9-LABEL: load_float_lo:294; GFX9: ; %bb.0:295; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24296; GFX9-NEXT: s_waitcnt lgkmcnt(0)297; GFX9-NEXT: v_mov_b32_e32 v0, s0298; GFX9-NEXT: v_mov_b32_e32 v1, s1299; GFX9-NEXT: flat_load_dword v2, v[0:1] offset:16300; GFX9-NEXT: v_mov_b32_e32 v0, s2301; GFX9-NEXT: v_mov_b32_e32 v1, s3302; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)303; GFX9-NEXT: v_add_f32_e32 v2, v2, v2304; GFX9-NEXT: flat_store_dword v[0:1], v2305; GFX9-NEXT: s_endpgm306;307; GFX10-LABEL: load_float_lo:308; GFX10: ; %bb.0:309; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24310; GFX10-NEXT: s_waitcnt lgkmcnt(0)311; GFX10-NEXT: s_add_u32 s0, s0, 16312; GFX10-NEXT: s_addc_u32 s1, s1, 0313; GFX10-NEXT: v_mov_b32_e32 v0, s0314; GFX10-NEXT: v_mov_b32_e32 v1, s1315; GFX10-NEXT: flat_load_dword v2, v[0:1]316; GFX10-NEXT: v_mov_b32_e32 v0, s2317; GFX10-NEXT: v_mov_b32_e32 v1, s3318; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)319; GFX10-NEXT: v_add_f32_e32 v2, v2, v2320; GFX10-NEXT: flat_store_dword v[0:1], v2321; GFX10-NEXT: s_endpgm322;323; GFX11-LABEL: load_float_lo:324; GFX11: ; %bb.0:325; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24326; GFX11-NEXT: s_waitcnt lgkmcnt(0)327; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1328; GFX11-NEXT: flat_load_b32 v2, v[0:1] offset:16329; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3330; GFX11-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)331; GFX11-NEXT: v_add_f32_e32 v2, v2, v2332; GFX11-NEXT: flat_store_b32 v[0:1], v2333; GFX11-NEXT: s_endpgm334 %gep = getelementptr inbounds float, ptr %arg, i32 4335 %ld = load float, ptr %gep, align 4336 %v = fadd float %ld, %ld337 store float %v, ptr %out, align 4338 ret void339}340