5686 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -mattr=-promote-alloca -mattr=+enable-flat-scratch < %s | FileCheck --check-prefix=GFX9 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -mattr=-promote-alloca -mattr=+enable-flat-scratch < %s | FileCheck --check-prefix=GFX10 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-promote-alloca -mattr=+enable-flat-scratch,+real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-TRUE16 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-promote-alloca -mattr=+enable-flat-scratch,-real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-FAKE16 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=-promote-alloca -mattr=+enable-flat-scratch,+real-true16 < %s | FileCheck --check-prefixes=GFX12,GFX12-TRUE16 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=-promote-alloca -mattr=+enable-flat-scratch,-real-true16 < %s | FileCheck --check-prefixes=GFX12,GFX12-FAKE16 %s8; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx900 -mattr=-promote-alloca -mattr=+enable-flat-scratch < %s | FileCheck --check-prefix=GFX9-PAL %s9; RUN: llc -mtriple=amdgcn -mcpu=gfx942 -mattr=-promote-alloca < %s | FileCheck -check-prefixes=GFX942 %s10; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1010 -mattr=-promote-alloca -mattr=+enable-flat-scratch < %s | FileCheck --check-prefixes=GFX10-PAL,GFX1010-PAL %s11; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1030 -mattr=-promote-alloca -mattr=+enable-flat-scratch < %s | FileCheck --check-prefixes=GFX10-PAL,GFX1030-PAL %s12; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -mattr=-promote-alloca -mattr=+enable-flat-scratch,+real-true16 < %s | FileCheck --check-prefixes=GFX11-PAL,GFX11-PAL-TRUE16 %s13; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -mattr=-promote-alloca -mattr=+enable-flat-scratch,-real-true16 < %s | FileCheck --check-prefixes=GFX11-PAL,GFX11-PAL-FAKE16 %s14; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -mattr=-promote-alloca -mattr=+enable-flat-scratch,+real-true16 < %s | FileCheck --check-prefixes=GFX12-PAL,GFX12-PAL-TRUE16 %s15; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1200 -mattr=-promote-alloca -mattr=+enable-flat-scratch,-real-true16 < %s | FileCheck --check-prefixes=GFX12-PAL,GFX12-PAL-FAKE16 %s16 17define amdgpu_kernel void @zero_init_kernel() {18; GFX9-LABEL: zero_init_kernel:19; GFX9: ; %bb.0:20; GFX9-NEXT: s_mov_b32 s0, 021; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s1322; GFX9-NEXT: s_mov_b32 s1, s023; GFX9-NEXT: s_mov_b32 s2, s024; GFX9-NEXT: s_mov_b32 s3, s025; GFX9-NEXT: v_mov_b32_e32 v0, s026; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 027; GFX9-NEXT: v_mov_b32_e32 v1, s128; GFX9-NEXT: v_mov_b32_e32 v2, s229; GFX9-NEXT: v_mov_b32_e32 v3, s330; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:4831; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:3232; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:1633; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s034; GFX9-NEXT: s_endpgm35;36; GFX10-LABEL: zero_init_kernel:37; GFX10: ; %bb.0:38; GFX10-NEXT: s_add_u32 s8, s8, s1339; GFX10-NEXT: s_addc_u32 s9, s9, 040; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s841; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s942; GFX10-NEXT: s_mov_b32 s0, 043; GFX10-NEXT: s_mov_b32 s1, s044; GFX10-NEXT: s_mov_b32 s2, s045; GFX10-NEXT: s_mov_b32 s3, s046; GFX10-NEXT: v_mov_b32_e32 v0, s047; GFX10-NEXT: v_mov_b32_e32 v1, s148; GFX10-NEXT: v_mov_b32_e32 v2, s249; GFX10-NEXT: v_mov_b32_e32 v3, s350; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:4851; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:3252; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:1653; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off54; GFX10-NEXT: s_endpgm55;56; GFX11-LABEL: zero_init_kernel:57; GFX11: ; %bb.0:58; GFX11-NEXT: s_mov_b32 s0, 059; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)60; GFX11-NEXT: s_mov_b32 s1, s061; GFX11-NEXT: s_mov_b32 s2, s062; GFX11-NEXT: s_mov_b32 s3, s063; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s164; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s365; GFX11-NEXT: s_clause 0x366; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:4867; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:3268; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:1669; GFX11-NEXT: scratch_store_b128 off, v[0:3], off70; GFX11-NEXT: s_endpgm71;72; GFX12-LABEL: zero_init_kernel:73; GFX12: ; %bb.0:74; GFX12-NEXT: s_mov_b32 s0, 075; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)76; GFX12-NEXT: s_mov_b32 s1, s077; GFX12-NEXT: s_mov_b32 s2, s078; GFX12-NEXT: s_mov_b32 s3, s079; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s180; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s381; GFX12-NEXT: s_clause 0x382; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:4883; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:3284; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:1685; GFX12-NEXT: scratch_store_b128 off, v[0:3], off86; GFX12-NEXT: s_endpgm87;88; GFX9-PAL-LABEL: zero_init_kernel:89; GFX9-PAL: ; %bb.0:90; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]91; GFX9-PAL-NEXT: s_mov_b32 s12, s092; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x093; GFX9-PAL-NEXT: s_mov_b32 s0, 094; GFX9-PAL-NEXT: s_mov_b32 s1, s095; GFX9-PAL-NEXT: s_mov_b32 s2, s096; GFX9-PAL-NEXT: s_mov_b32 s3, s097; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)98; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff99; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s11100; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s0101; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 0102; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s1103; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s2104; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s3105; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:48106; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:32107; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:16108; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0109; GFX9-PAL-NEXT: s_endpgm110;111; GFX942-LABEL: zero_init_kernel:112; GFX942: ; %bb.0:113; GFX942-NEXT: s_mov_b32 s0, 0114; GFX942-NEXT: s_mov_b32 s1, s0115; GFX942-NEXT: s_mov_b32 s2, s0116; GFX942-NEXT: s_mov_b32 s3, s0117; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]118; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]119; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:48120; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:32121; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:16122; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off123; GFX942-NEXT: s_endpgm124;125; GFX1010-PAL-LABEL: zero_init_kernel:126; GFX1010-PAL: ; %bb.0:127; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]128; GFX1010-PAL-NEXT: s_mov_b32 s12, s0129; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x0130; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)131; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff132; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s11133; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 0134; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s12135; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s13136; GFX1010-PAL-NEXT: s_mov_b32 s0, 0137; GFX1010-PAL-NEXT: s_mov_b32 s1, s0138; GFX1010-PAL-NEXT: s_mov_b32 s2, s0139; GFX1010-PAL-NEXT: s_mov_b32 s3, s0140; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, s0141; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, s1142; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, s2143; GFX1010-PAL-NEXT: v_mov_b32_e32 v3, s3144; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:48145; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:32146; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:16147; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0148; GFX1010-PAL-NEXT: s_endpgm149;150; GFX1030-PAL-LABEL: zero_init_kernel:151; GFX1030-PAL: ; %bb.0:152; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]153; GFX1030-PAL-NEXT: s_mov_b32 s12, s0154; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x0155; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)156; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff157; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s11158; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 0159; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s12160; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s13161; GFX1030-PAL-NEXT: s_mov_b32 s0, 0162; GFX1030-PAL-NEXT: s_mov_b32 s1, s0163; GFX1030-PAL-NEXT: s_mov_b32 s2, s0164; GFX1030-PAL-NEXT: s_mov_b32 s3, s0165; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, s0166; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, s1167; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, s2168; GFX1030-PAL-NEXT: v_mov_b32_e32 v3, s3169; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:48170; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:32171; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:16172; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off173; GFX1030-PAL-NEXT: s_endpgm174;175; GFX11-PAL-LABEL: zero_init_kernel:176; GFX11-PAL: ; %bb.0:177; GFX11-PAL-NEXT: s_mov_b32 s0, 0178; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)179; GFX11-PAL-NEXT: s_mov_b32 s1, s0180; GFX11-PAL-NEXT: s_mov_b32 s2, s0181; GFX11-PAL-NEXT: s_mov_b32 s3, s0182; GFX11-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1183; GFX11-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3184; GFX11-PAL-NEXT: s_clause 0x3185; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:48186; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:32187; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:16188; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off189; GFX11-PAL-NEXT: s_endpgm190;191; GFX12-PAL-LABEL: zero_init_kernel:192; GFX12-PAL: ; %bb.0:193; GFX12-PAL-NEXT: s_mov_b32 s0, 0194; GFX12-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)195; GFX12-PAL-NEXT: s_mov_b32 s1, s0196; GFX12-PAL-NEXT: s_mov_b32 s2, s0197; GFX12-PAL-NEXT: s_mov_b32 s3, s0198; GFX12-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1199; GFX12-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3200; GFX12-PAL-NEXT: s_clause 0x3201; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:48202; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:32203; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:16204; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off205; GFX12-PAL-NEXT: s_endpgm206 %alloca = alloca [32 x i16], align 2, addrspace(5)207 call void @llvm.memset.p5.i64(ptr addrspace(5) align 2 dereferenceable(64) %alloca, i8 0, i64 64, i1 false)208 ret void209}210 211define void @zero_init_foo() {212; GFX9-LABEL: zero_init_foo:213; GFX9: ; %bb.0:214; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)215; GFX9-NEXT: s_mov_b32 s0, 0216; GFX9-NEXT: s_mov_b32 s1, s0217; GFX9-NEXT: s_mov_b32 s2, s0218; GFX9-NEXT: s_mov_b32 s3, s0219; GFX9-NEXT: v_mov_b32_e32 v0, s0220; GFX9-NEXT: v_mov_b32_e32 v1, s1221; GFX9-NEXT: v_mov_b32_e32 v2, s2222; GFX9-NEXT: v_mov_b32_e32 v3, s3223; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:48224; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:32225; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:16226; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32227; GFX9-NEXT: s_waitcnt vmcnt(0)228; GFX9-NEXT: s_setpc_b64 s[30:31]229;230; GFX10-LABEL: zero_init_foo:231; GFX10: ; %bb.0:232; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)233; GFX10-NEXT: s_mov_b32 s0, 0234; GFX10-NEXT: s_mov_b32 s1, s0235; GFX10-NEXT: s_mov_b32 s2, s0236; GFX10-NEXT: s_mov_b32 s3, s0237; GFX10-NEXT: v_mov_b32_e32 v0, s0238; GFX10-NEXT: v_mov_b32_e32 v1, s1239; GFX10-NEXT: v_mov_b32_e32 v2, s2240; GFX10-NEXT: v_mov_b32_e32 v3, s3241; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:48242; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:32243; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:16244; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32245; GFX10-NEXT: s_setpc_b64 s[30:31]246;247; GFX11-LABEL: zero_init_foo:248; GFX11: ; %bb.0:249; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)250; GFX11-NEXT: s_mov_b32 s0, 0251; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)252; GFX11-NEXT: s_mov_b32 s1, s0253; GFX11-NEXT: s_mov_b32 s2, s0254; GFX11-NEXT: s_mov_b32 s3, s0255; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1256; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3257; GFX11-NEXT: s_clause 0x3258; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:48259; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:32260; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:16261; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32262; GFX11-NEXT: s_setpc_b64 s[30:31]263;264; GFX12-LABEL: zero_init_foo:265; GFX12: ; %bb.0:266; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0267; GFX12-NEXT: s_wait_expcnt 0x0268; GFX12-NEXT: s_wait_samplecnt 0x0269; GFX12-NEXT: s_wait_bvhcnt 0x0270; GFX12-NEXT: s_wait_kmcnt 0x0271; GFX12-NEXT: s_mov_b32 s0, 0272; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)273; GFX12-NEXT: s_mov_b32 s1, s0274; GFX12-NEXT: s_mov_b32 s2, s0275; GFX12-NEXT: s_mov_b32 s3, s0276; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)277; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1278; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3279; GFX12-NEXT: s_clause 0x3280; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:48281; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:32282; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:16283; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32284; GFX12-NEXT: s_setpc_b64 s[30:31]285;286; GFX9-PAL-LABEL: zero_init_foo:287; GFX9-PAL: ; %bb.0:288; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)289; GFX9-PAL-NEXT: s_mov_b32 s0, 0290; GFX9-PAL-NEXT: s_mov_b32 s1, s0291; GFX9-PAL-NEXT: s_mov_b32 s2, s0292; GFX9-PAL-NEXT: s_mov_b32 s3, s0293; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s0294; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s1295; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s2296; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s3297; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:48298; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:32299; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:16300; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32301; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)302; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]303;304; GFX942-LABEL: zero_init_foo:305; GFX942: ; %bb.0:306; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)307; GFX942-NEXT: s_mov_b32 s0, 0308; GFX942-NEXT: s_mov_b32 s1, s0309; GFX942-NEXT: s_mov_b32 s2, s0310; GFX942-NEXT: s_mov_b32 s3, s0311; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]312; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]313; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:48314; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:32315; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:16316; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32317; GFX942-NEXT: s_waitcnt vmcnt(0)318; GFX942-NEXT: s_setpc_b64 s[30:31]319;320; GFX10-PAL-LABEL: zero_init_foo:321; GFX10-PAL: ; %bb.0:322; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)323; GFX10-PAL-NEXT: s_mov_b32 s0, 0324; GFX10-PAL-NEXT: s_mov_b32 s1, s0325; GFX10-PAL-NEXT: s_mov_b32 s2, s0326; GFX10-PAL-NEXT: s_mov_b32 s3, s0327; GFX10-PAL-NEXT: v_mov_b32_e32 v0, s0328; GFX10-PAL-NEXT: v_mov_b32_e32 v1, s1329; GFX10-PAL-NEXT: v_mov_b32_e32 v2, s2330; GFX10-PAL-NEXT: v_mov_b32_e32 v3, s3331; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:48332; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:32333; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:16334; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32335; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]336;337; GFX11-PAL-LABEL: zero_init_foo:338; GFX11-PAL: ; %bb.0:339; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)340; GFX11-PAL-NEXT: s_mov_b32 s0, 0341; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)342; GFX11-PAL-NEXT: s_mov_b32 s1, s0343; GFX11-PAL-NEXT: s_mov_b32 s2, s0344; GFX11-PAL-NEXT: s_mov_b32 s3, s0345; GFX11-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1346; GFX11-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3347; GFX11-PAL-NEXT: s_clause 0x3348; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:48349; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:32350; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:16351; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32352; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]353;354; GFX12-PAL-LABEL: zero_init_foo:355; GFX12-PAL: ; %bb.0:356; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x0357; GFX12-PAL-NEXT: s_wait_expcnt 0x0358; GFX12-PAL-NEXT: s_wait_samplecnt 0x0359; GFX12-PAL-NEXT: s_wait_bvhcnt 0x0360; GFX12-PAL-NEXT: s_wait_kmcnt 0x0361; GFX12-PAL-NEXT: s_mov_b32 s0, 0362; GFX12-PAL-NEXT: s_wait_alu depctr_sa_sdst(0)363; GFX12-PAL-NEXT: s_mov_b32 s1, s0364; GFX12-PAL-NEXT: s_mov_b32 s2, s0365; GFX12-PAL-NEXT: s_mov_b32 s3, s0366; GFX12-PAL-NEXT: s_wait_alu depctr_sa_sdst(0)367; GFX12-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1368; GFX12-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3369; GFX12-PAL-NEXT: s_clause 0x3370; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:48371; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:32372; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:16373; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32374; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]375 %alloca = alloca [32 x i16], align 2, addrspace(5)376 call void @llvm.memset.p5.i64(ptr addrspace(5) align 2 dereferenceable(64) %alloca, i8 0, i64 64, i1 false)377 ret void378}379 380define amdgpu_kernel void @store_load_sindex_kernel(i32 %idx) {381; GFX9-LABEL: store_load_sindex_kernel:382; GFX9: ; %bb.0: ; %bb383; GFX9-NEXT: s_load_dword s0, s[4:5], 0x24384; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s13385; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 0386; GFX9-NEXT: v_mov_b32_e32 v0, 15387; GFX9-NEXT: s_waitcnt lgkmcnt(0)388; GFX9-NEXT: s_lshl_b32 s1, s0, 2389; GFX9-NEXT: s_and_b32 s0, s0, 15390; GFX9-NEXT: s_lshl_b32 s0, s0, 2391; GFX9-NEXT: scratch_store_dword off, v0, s1392; GFX9-NEXT: s_waitcnt vmcnt(0)393; GFX9-NEXT: scratch_load_dword v0, off, s0 glc394; GFX9-NEXT: s_waitcnt vmcnt(0)395; GFX9-NEXT: s_endpgm396;397; GFX10-LABEL: store_load_sindex_kernel:398; GFX10: ; %bb.0: ; %bb399; GFX10-NEXT: s_add_u32 s8, s8, s13400; GFX10-NEXT: s_addc_u32 s9, s9, 0401; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8402; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9403; GFX10-NEXT: s_load_dword s0, s[4:5], 0x24404; GFX10-NEXT: v_mov_b32_e32 v0, 15405; GFX10-NEXT: s_waitcnt lgkmcnt(0)406; GFX10-NEXT: s_and_b32 s1, s0, 15407; GFX10-NEXT: s_lshl_b32 s0, s0, 2408; GFX10-NEXT: s_lshl_b32 s1, s1, 2409; GFX10-NEXT: scratch_store_dword off, v0, s0410; GFX10-NEXT: s_waitcnt_vscnt null, 0x0411; GFX10-NEXT: scratch_load_dword v0, off, s1 glc dlc412; GFX10-NEXT: s_waitcnt vmcnt(0)413; GFX10-NEXT: s_endpgm414;415; GFX11-LABEL: store_load_sindex_kernel:416; GFX11: ; %bb.0: ; %bb417; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24418; GFX11-NEXT: v_mov_b32_e32 v0, 15419; GFX11-NEXT: s_waitcnt lgkmcnt(0)420; GFX11-NEXT: s_and_b32 s1, s0, 15421; GFX11-NEXT: s_lshl_b32 s0, s0, 2422; GFX11-NEXT: s_lshl_b32 s1, s1, 2423; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc424; GFX11-NEXT: s_waitcnt_vscnt null, 0x0425; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc426; GFX11-NEXT: s_waitcnt vmcnt(0)427; GFX11-NEXT: s_endpgm428;429; GFX12-LABEL: store_load_sindex_kernel:430; GFX12: ; %bb.0: ; %bb431; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x24432; GFX12-NEXT: v_mov_b32_e32 v0, 15433; GFX12-NEXT: s_wait_kmcnt 0x0434; GFX12-NEXT: s_and_b32 s1, s0, 15435; GFX12-NEXT: s_lshl_b32 s0, s0, 2436; GFX12-NEXT: s_lshl_b32 s1, s1, 2437; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS438; GFX12-NEXT: s_wait_storecnt 0x0439; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS440; GFX12-NEXT: s_wait_loadcnt 0x0441; GFX12-NEXT: s_endpgm442;443; GFX9-PAL-LABEL: store_load_sindex_kernel:444; GFX9-PAL: ; %bb.0: ; %bb445; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]446; GFX9-PAL-NEXT: s_mov_b32 s12, s0447; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x0448; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 15449; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x0450; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)451; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff452; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s11453; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 0454; GFX9-PAL-NEXT: s_lshl_b32 s1, s0, 2455; GFX9-PAL-NEXT: s_and_b32 s0, s0, 15456; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 2457; GFX9-PAL-NEXT: scratch_store_dword off, v0, s1458; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)459; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc460; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)461; GFX9-PAL-NEXT: s_endpgm462;463; GFX942-LABEL: store_load_sindex_kernel:464; GFX942: ; %bb.0: ; %bb465; GFX942-NEXT: s_load_dword s0, s[4:5], 0x24466; GFX942-NEXT: v_mov_b32_e32 v0, 15467; GFX942-NEXT: s_waitcnt lgkmcnt(0)468; GFX942-NEXT: s_lshl_b32 s1, s0, 2469; GFX942-NEXT: s_and_b32 s0, s0, 15470; GFX942-NEXT: s_lshl_b32 s0, s0, 2471; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc1472; GFX942-NEXT: s_waitcnt vmcnt(0)473; GFX942-NEXT: scratch_load_dword v0, off, s0 sc0 sc1474; GFX942-NEXT: s_waitcnt vmcnt(0)475; GFX942-NEXT: s_endpgm476;477; GFX10-PAL-LABEL: store_load_sindex_kernel:478; GFX10-PAL: ; %bb.0: ; %bb479; GFX10-PAL-NEXT: s_getpc_b64 s[12:13]480; GFX10-PAL-NEXT: s_mov_b32 s12, s0481; GFX10-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x0482; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)483; GFX10-PAL-NEXT: s_and_b32 s13, s13, 0xffff484; GFX10-PAL-NEXT: s_add_u32 s12, s12, s11485; GFX10-PAL-NEXT: s_addc_u32 s13, s13, 0486; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s12487; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s13488; GFX10-PAL-NEXT: s_load_dword s0, s[4:5], 0x0489; GFX10-PAL-NEXT: v_mov_b32_e32 v0, 15490; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)491; GFX10-PAL-NEXT: s_and_b32 s1, s0, 15492; GFX10-PAL-NEXT: s_lshl_b32 s0, s0, 2493; GFX10-PAL-NEXT: s_lshl_b32 s1, s1, 2494; GFX10-PAL-NEXT: scratch_store_dword off, v0, s0495; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x0496; GFX10-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc497; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)498; GFX10-PAL-NEXT: s_endpgm499;500; GFX11-PAL-LABEL: store_load_sindex_kernel:501; GFX11-PAL: ; %bb.0: ; %bb502; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x0503; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 15504; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)505; GFX11-PAL-NEXT: s_and_b32 s1, s0, 15506; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 2507; GFX11-PAL-NEXT: s_lshl_b32 s1, s1, 2508; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s0 dlc509; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x0510; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s1 glc dlc511; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)512; GFX11-PAL-NEXT: s_endpgm513;514; GFX12-PAL-LABEL: store_load_sindex_kernel:515; GFX12-PAL: ; %bb.0: ; %bb516; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x0517; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 15518; GFX12-PAL-NEXT: s_wait_kmcnt 0x0519; GFX12-PAL-NEXT: s_and_b32 s1, s0, 15520; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 2521; GFX12-PAL-NEXT: s_lshl_b32 s1, s1, 2522; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS523; GFX12-PAL-NEXT: s_wait_storecnt 0x0524; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS525; GFX12-PAL-NEXT: s_wait_loadcnt 0x0526; GFX12-PAL-NEXT: s_endpgm527bb:528 %i = alloca [32 x float], align 4, addrspace(5)529 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx530 store volatile i32 15, ptr addrspace(5) %i7, align 4531 %i9 = and i32 %idx, 15532 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i9533 %i12 = load volatile i32, ptr addrspace(5) %i10, align 4534 ret void535}536 537define amdgpu_ps void @store_load_sindex_foo(i32 inreg %idx) {538; GFX9-LABEL: store_load_sindex_foo:539; GFX9: ; %bb.0: ; %bb540; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s3541; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 0542; GFX9-NEXT: s_lshl_b32 s0, s2, 2543; GFX9-NEXT: v_mov_b32_e32 v0, 15544; GFX9-NEXT: scratch_store_dword off, v0, s0545; GFX9-NEXT: s_waitcnt vmcnt(0)546; GFX9-NEXT: s_and_b32 s0, s2, 15547; GFX9-NEXT: s_lshl_b32 s0, s0, 2548; GFX9-NEXT: scratch_load_dword v0, off, s0 glc549; GFX9-NEXT: s_waitcnt vmcnt(0)550; GFX9-NEXT: s_endpgm551;552; GFX10-LABEL: store_load_sindex_foo:553; GFX10: ; %bb.0: ; %bb554; GFX10-NEXT: s_add_u32 s0, s0, s3555; GFX10-NEXT: s_addc_u32 s1, s1, 0556; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s0557; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s1558; GFX10-NEXT: v_mov_b32_e32 v0, 15559; GFX10-NEXT: s_and_b32 s0, s2, 15560; GFX10-NEXT: s_lshl_b32 s1, s2, 2561; GFX10-NEXT: s_lshl_b32 s0, s0, 2562; GFX10-NEXT: scratch_store_dword off, v0, s1563; GFX10-NEXT: s_waitcnt_vscnt null, 0x0564; GFX10-NEXT: scratch_load_dword v0, off, s0 glc dlc565; GFX10-NEXT: s_waitcnt vmcnt(0)566; GFX10-NEXT: s_endpgm567;568; GFX11-LABEL: store_load_sindex_foo:569; GFX11: ; %bb.0: ; %bb570; GFX11-NEXT: v_mov_b32_e32 v0, 15571; GFX11-NEXT: s_and_b32 s1, s0, 15572; GFX11-NEXT: s_lshl_b32 s0, s0, 2573; GFX11-NEXT: s_lshl_b32 s1, s1, 2574; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc575; GFX11-NEXT: s_waitcnt_vscnt null, 0x0576; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc577; GFX11-NEXT: s_waitcnt vmcnt(0)578; GFX11-NEXT: s_endpgm579;580; GFX12-LABEL: store_load_sindex_foo:581; GFX12: ; %bb.0: ; %bb582; GFX12-NEXT: v_mov_b32_e32 v0, 15583; GFX12-NEXT: s_and_b32 s1, s0, 15584; GFX12-NEXT: s_lshl_b32 s0, s0, 2585; GFX12-NEXT: s_lshl_b32 s1, s1, 2586; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS587; GFX12-NEXT: s_wait_storecnt 0x0588; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS589; GFX12-NEXT: s_wait_loadcnt 0x0590; GFX12-NEXT: s_endpgm591;592; GFX9-PAL-LABEL: store_load_sindex_foo:593; GFX9-PAL: ; %bb.0: ; %bb594; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]595; GFX9-PAL-NEXT: s_mov_b32 s2, s0596; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0597; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 15598; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)599; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff600; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s1601; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 0602; GFX9-PAL-NEXT: s_lshl_b32 s1, s0, 2603; GFX9-PAL-NEXT: s_and_b32 s0, s0, 15604; GFX9-PAL-NEXT: scratch_store_dword off, v0, s1605; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)606; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 2607; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc608; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)609; GFX9-PAL-NEXT: s_endpgm610;611; GFX942-LABEL: store_load_sindex_foo:612; GFX942: ; %bb.0: ; %bb613; GFX942-NEXT: s_lshl_b32 s1, s0, 2614; GFX942-NEXT: v_mov_b32_e32 v0, 15615; GFX942-NEXT: s_and_b32 s0, s0, 15616; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc1617; GFX942-NEXT: s_waitcnt vmcnt(0)618; GFX942-NEXT: s_lshl_b32 s0, s0, 2619; GFX942-NEXT: scratch_load_dword v0, off, s0 sc0 sc1620; GFX942-NEXT: s_waitcnt vmcnt(0)621; GFX942-NEXT: s_endpgm622;623; GFX10-PAL-LABEL: store_load_sindex_foo:624; GFX10-PAL: ; %bb.0: ; %bb625; GFX10-PAL-NEXT: s_getpc_b64 s[2:3]626; GFX10-PAL-NEXT: s_mov_b32 s2, s0627; GFX10-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0628; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)629; GFX10-PAL-NEXT: s_and_b32 s3, s3, 0xffff630; GFX10-PAL-NEXT: s_add_u32 s2, s2, s1631; GFX10-PAL-NEXT: s_addc_u32 s3, s3, 0632; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s2633; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s3634; GFX10-PAL-NEXT: v_mov_b32_e32 v0, 15635; GFX10-PAL-NEXT: s_and_b32 s1, s0, 15636; GFX10-PAL-NEXT: s_lshl_b32 s0, s0, 2637; GFX10-PAL-NEXT: s_lshl_b32 s1, s1, 2638; GFX10-PAL-NEXT: scratch_store_dword off, v0, s0639; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x0640; GFX10-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc641; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)642; GFX10-PAL-NEXT: s_endpgm643;644; GFX11-PAL-LABEL: store_load_sindex_foo:645; GFX11-PAL: ; %bb.0: ; %bb646; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 15647; GFX11-PAL-NEXT: s_and_b32 s1, s0, 15648; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 2649; GFX11-PAL-NEXT: s_lshl_b32 s1, s1, 2650; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s0 dlc651; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x0652; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s1 glc dlc653; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)654; GFX11-PAL-NEXT: s_endpgm655;656; GFX12-PAL-LABEL: store_load_sindex_foo:657; GFX12-PAL: ; %bb.0: ; %bb658; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 15659; GFX12-PAL-NEXT: s_and_b32 s1, s0, 15660; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 2661; GFX12-PAL-NEXT: s_lshl_b32 s1, s1, 2662; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS663; GFX12-PAL-NEXT: s_wait_storecnt 0x0664; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS665; GFX12-PAL-NEXT: s_wait_loadcnt 0x0666; GFX12-PAL-NEXT: s_endpgm667bb:668 %i = alloca [32 x float], align 4, addrspace(5)669 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx670 store volatile i32 15, ptr addrspace(5) %i7, align 4671 %i9 = and i32 %idx, 15672 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i9673 %i12 = load volatile i32, ptr addrspace(5) %i10, align 4674 ret void675}676 677define amdgpu_kernel void @store_load_vindex_kernel(i32 %n) {678; GFX9-LABEL: store_load_vindex_kernel:679; GFX9: ; %bb.0: ; %bb680; GFX9-NEXT: s_load_dword s0, s[4:5], 0x24681; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s13682; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 0683; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0684; GFX9-NEXT: v_mov_b32_e32 v1, 15685; GFX9-NEXT: s_waitcnt lgkmcnt(0)686; GFX9-NEXT: s_lshl_b32 s0, s0, 7687; GFX9-NEXT: v_add_u32_e32 v2, s0, v0688; GFX9-NEXT: scratch_store_dword v2, v1, off689; GFX9-NEXT: s_waitcnt vmcnt(0)690; GFX9-NEXT: v_sub_u32_e32 v0, s0, v0691; GFX9-NEXT: scratch_load_dword v0, v0, off offset:124 glc692; GFX9-NEXT: s_waitcnt vmcnt(0)693; GFX9-NEXT: s_endpgm694;695; GFX10-LABEL: store_load_vindex_kernel:696; GFX10: ; %bb.0: ; %bb697; GFX10-NEXT: s_add_u32 s8, s8, s13698; GFX10-NEXT: s_addc_u32 s9, s9, 0699; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s8700; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s9701; GFX10-NEXT: s_load_dword s0, s[4:5], 0x24702; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0703; GFX10-NEXT: v_mov_b32_e32 v2, 15704; GFX10-NEXT: s_waitcnt lgkmcnt(0)705; GFX10-NEXT: s_lshl_b32 s0, s0, 7706; GFX10-NEXT: v_add_nc_u32_e32 v1, s0, v0707; GFX10-NEXT: v_sub_nc_u32_e32 v0, s0, v0708; GFX10-NEXT: scratch_store_dword v1, v2, off709; GFX10-NEXT: s_waitcnt_vscnt null, 0x0710; GFX10-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc711; GFX10-NEXT: s_waitcnt vmcnt(0)712; GFX10-NEXT: s_endpgm713;714; GFX11-LABEL: store_load_vindex_kernel:715; GFX11: ; %bb.0: ; %bb716; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x24717; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0718; GFX11-NEXT: v_mov_b32_e32 v2, 15719; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)720; GFX11-NEXT: v_and_b32_e32 v0, 0xffc, v0721; GFX11-NEXT: s_waitcnt lgkmcnt(0)722; GFX11-NEXT: s_lshl_b32 s0, s0, 7723; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)724; GFX11-NEXT: v_add_nc_u32_e32 v1, s0, v0725; GFX11-NEXT: v_sub_nc_u32_e32 v0, s0, v0726; GFX11-NEXT: scratch_store_b32 v1, v2, off dlc727; GFX11-NEXT: s_waitcnt_vscnt null, 0x0728; GFX11-NEXT: scratch_load_b32 v0, v0, off offset:124 glc dlc729; GFX11-NEXT: s_waitcnt vmcnt(0)730; GFX11-NEXT: s_endpgm731;732; GFX12-LABEL: store_load_vindex_kernel:733; GFX12: ; %bb.0: ; %bb734; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x24735; GFX12-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v0736; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)737; GFX12-NEXT: v_and_b32_e32 v0, 0xffc, v0738; GFX12-NEXT: s_wait_kmcnt 0x0739; GFX12-NEXT: s_lshl_b32 s0, s0, 7740; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)741; GFX12-NEXT: v_sub_nc_u32_e32 v2, s0, v0742; GFX12-NEXT: scratch_store_b32 v0, v1, s0 scope:SCOPE_SYS743; GFX12-NEXT: s_wait_storecnt 0x0744; GFX12-NEXT: scratch_load_b32 v0, v2, off offset:124 scope:SCOPE_SYS745; GFX12-NEXT: s_wait_loadcnt 0x0746; GFX12-NEXT: s_endpgm747;748; GFX9-PAL-LABEL: store_load_vindex_kernel:749; GFX9-PAL: ; %bb.0: ; %bb750; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]751; GFX9-PAL-NEXT: s_mov_b32 s12, s0752; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x0753; GFX9-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0754; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x0755; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 15756; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)757; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff758; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s11759; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 0760; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 7761; GFX9-PAL-NEXT: v_add_u32_e32 v2, s0, v0762; GFX9-PAL-NEXT: scratch_store_dword v2, v1, off763; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)764; GFX9-PAL-NEXT: v_sub_u32_e32 v0, s0, v0765; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc766; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)767; GFX9-PAL-NEXT: s_endpgm768;769; GFX942-LABEL: store_load_vindex_kernel:770; GFX942: ; %bb.0: ; %bb771; GFX942-NEXT: s_load_dword s0, s[4:5], 0x24772; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v0773; GFX942-NEXT: v_and_b32_e32 v0, 0xffc, v0774; GFX942-NEXT: v_mov_b32_e32 v1, 15775; GFX942-NEXT: s_waitcnt lgkmcnt(0)776; GFX942-NEXT: s_lshl_b32 s0, s0, 7777; GFX942-NEXT: v_add_u32_e32 v2, s0, v0778; GFX942-NEXT: scratch_store_dword v2, v1, off sc0 sc1779; GFX942-NEXT: s_waitcnt vmcnt(0)780; GFX942-NEXT: v_sub_u32_e32 v0, s0, v0781; GFX942-NEXT: scratch_load_dword v0, v0, off offset:124 sc0 sc1782; GFX942-NEXT: s_waitcnt vmcnt(0)783; GFX942-NEXT: s_endpgm784;785; GFX10-PAL-LABEL: store_load_vindex_kernel:786; GFX10-PAL: ; %bb.0: ; %bb787; GFX10-PAL-NEXT: s_getpc_b64 s[12:13]788; GFX10-PAL-NEXT: s_mov_b32 s12, s0789; GFX10-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x0790; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)791; GFX10-PAL-NEXT: s_and_b32 s13, s13, 0xffff792; GFX10-PAL-NEXT: s_add_u32 s12, s12, s11793; GFX10-PAL-NEXT: s_addc_u32 s13, s13, 0794; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s12795; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s13796; GFX10-PAL-NEXT: s_load_dword s0, s[4:5], 0x0797; GFX10-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0798; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 15799; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)800; GFX10-PAL-NEXT: s_lshl_b32 s0, s0, 7801; GFX10-PAL-NEXT: v_add_nc_u32_e32 v1, s0, v0802; GFX10-PAL-NEXT: v_sub_nc_u32_e32 v0, s0, v0803; GFX10-PAL-NEXT: scratch_store_dword v1, v2, off804; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x0805; GFX10-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc806; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)807; GFX10-PAL-NEXT: s_endpgm808;809; GFX11-PAL-LABEL: store_load_vindex_kernel:810; GFX11-PAL: ; %bb.0: ; %bb811; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x0812; GFX11-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0813; GFX11-PAL-NEXT: v_mov_b32_e32 v2, 15814; GFX11-PAL-NEXT: s_delay_alu instid0(VALU_DEP_2)815; GFX11-PAL-NEXT: v_and_b32_e32 v0, 0xffc, v0816; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)817; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 7818; GFX11-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)819; GFX11-PAL-NEXT: v_add_nc_u32_e32 v1, s0, v0820; GFX11-PAL-NEXT: v_sub_nc_u32_e32 v0, s0, v0821; GFX11-PAL-NEXT: scratch_store_b32 v1, v2, off dlc822; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x0823; GFX11-PAL-NEXT: scratch_load_b32 v0, v0, off offset:124 glc dlc824; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)825; GFX11-PAL-NEXT: s_endpgm826;827; GFX12-PAL-LABEL: store_load_vindex_kernel:828; GFX12-PAL: ; %bb.0: ; %bb829; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x0830; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v0831; GFX12-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1)832; GFX12-PAL-NEXT: v_and_b32_e32 v0, 0xffc, v0833; GFX12-PAL-NEXT: s_wait_kmcnt 0x0834; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 7835; GFX12-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)836; GFX12-PAL-NEXT: v_sub_nc_u32_e32 v2, s0, v0837; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, s0 scope:SCOPE_SYS838; GFX12-PAL-NEXT: s_wait_storecnt 0x0839; GFX12-PAL-NEXT: scratch_load_b32 v0, v2, off offset:124 scope:SCOPE_SYS840; GFX12-PAL-NEXT: s_wait_loadcnt 0x0841; GFX12-PAL-NEXT: s_endpgm842bb:843 %i.alloca = alloca [2 x [32 x float]], align 4, addrspace(5)844 %i = getelementptr inbounds [2 x [32 x float]], ptr addrspace (5) %i.alloca, i32 0, i32 %n845 %i2 = tail call i32 @llvm.amdgcn.workitem.id.x()846 %i3 = zext i32 %i2 to i64847 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i2848 store volatile i32 15, ptr addrspace(5) %i7, align 4849 %i9 = sub nsw i32 0, %i2850 %i9.1 = getelementptr [32 x float], ptr addrspace(5) %i, i32 0, i32 %i9851 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i9.1, i32 0, i32 31852 %i12 = load volatile i32, ptr addrspace(5) %i10, align 4853 ret void854}855 856define void @store_load_vindex_foo(i32 %idx) {857; GFX9-LABEL: store_load_vindex_foo:858; GFX9: ; %bb.0: ; %bb859; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)860; GFX9-NEXT: s_mov_b32 s0, s32861; GFX9-NEXT: v_lshl_add_u32 v1, v0, 2, s0862; GFX9-NEXT: v_mov_b32_e32 v2, 15863; GFX9-NEXT: v_and_b32_e32 v0, 15, v0864; GFX9-NEXT: scratch_store_dword v1, v2, off865; GFX9-NEXT: s_waitcnt vmcnt(0)866; GFX9-NEXT: v_lshl_add_u32 v0, v0, 2, s0867; GFX9-NEXT: scratch_load_dword v0, v0, off glc868; GFX9-NEXT: s_waitcnt vmcnt(0)869; GFX9-NEXT: s_setpc_b64 s[30:31]870;871; GFX10-LABEL: store_load_vindex_foo:872; GFX10: ; %bb.0: ; %bb873; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)874; GFX10-NEXT: v_and_b32_e32 v1, 15, v0875; GFX10-NEXT: v_lshl_add_u32 v0, v0, 2, s32876; GFX10-NEXT: v_mov_b32_e32 v2, 15877; GFX10-NEXT: v_lshl_add_u32 v1, v1, 2, s32878; GFX10-NEXT: scratch_store_dword v0, v2, off879; GFX10-NEXT: s_waitcnt_vscnt null, 0x0880; GFX10-NEXT: scratch_load_dword v0, v1, off glc dlc881; GFX10-NEXT: s_waitcnt vmcnt(0)882; GFX10-NEXT: s_setpc_b64 s[30:31]883;884; GFX11-LABEL: store_load_vindex_foo:885; GFX11: ; %bb.0: ; %bb886; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)887; GFX11-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v0888; GFX11-NEXT: v_lshl_add_u32 v0, v0, 2, s32889; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)890; GFX11-NEXT: v_lshlrev_b32_e32 v1, 2, v1891; GFX11-NEXT: scratch_store_b32 v0, v2, off dlc892; GFX11-NEXT: s_waitcnt_vscnt null, 0x0893; GFX11-NEXT: scratch_load_b32 v0, v1, s32 glc dlc894; GFX11-NEXT: s_waitcnt vmcnt(0)895; GFX11-NEXT: s_setpc_b64 s[30:31]896;897; GFX12-LABEL: store_load_vindex_foo:898; GFX12: ; %bb.0: ; %bb899; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0900; GFX12-NEXT: s_wait_expcnt 0x0901; GFX12-NEXT: s_wait_samplecnt 0x0902; GFX12-NEXT: s_wait_bvhcnt 0x0903; GFX12-NEXT: s_wait_kmcnt 0x0904; GFX12-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v0905; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v0906; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)907; GFX12-NEXT: v_lshlrev_b32_e32 v1, 2, v1908; GFX12-NEXT: s_wait_storecnt 0x0909; GFX12-NEXT: scratch_store_b32 v0, v2, s32 scope:SCOPE_SYS910; GFX12-NEXT: s_wait_storecnt 0x0911; GFX12-NEXT: scratch_load_b32 v0, v1, s32 scope:SCOPE_SYS912; GFX12-NEXT: s_wait_loadcnt 0x0913; GFX12-NEXT: s_setpc_b64 s[30:31]914;915; GFX9-PAL-LABEL: store_load_vindex_foo:916; GFX9-PAL: ; %bb.0: ; %bb917; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)918; GFX9-PAL-NEXT: s_mov_b32 s0, s32919; GFX9-PAL-NEXT: v_lshl_add_u32 v1, v0, 2, s0920; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 15921; GFX9-PAL-NEXT: v_and_b32_e32 v0, 15, v0922; GFX9-PAL-NEXT: scratch_store_dword v1, v2, off923; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)924; GFX9-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s0925; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off glc926; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)927; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]928;929; GFX942-LABEL: store_load_vindex_foo:930; GFX942: ; %bb.0: ; %bb931; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)932; GFX942-NEXT: s_mov_b32 s0, s32933; GFX942-NEXT: v_lshl_add_u32 v1, v0, 2, s0934; GFX942-NEXT: v_mov_b32_e32 v2, 15935; GFX942-NEXT: v_and_b32_e32 v0, 15, v0936; GFX942-NEXT: scratch_store_dword v1, v2, off sc0 sc1937; GFX942-NEXT: s_waitcnt vmcnt(0)938; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v0939; GFX942-NEXT: scratch_load_dword v0, v0, s32 sc0 sc1940; GFX942-NEXT: s_waitcnt vmcnt(0)941; GFX942-NEXT: s_setpc_b64 s[30:31]942;943; GFX10-PAL-LABEL: store_load_vindex_foo:944; GFX10-PAL: ; %bb.0: ; %bb945; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)946; GFX10-PAL-NEXT: v_and_b32_e32 v1, 15, v0947; GFX10-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s32948; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 15949; GFX10-PAL-NEXT: v_lshl_add_u32 v1, v1, 2, s32950; GFX10-PAL-NEXT: scratch_store_dword v0, v2, off951; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x0952; GFX10-PAL-NEXT: scratch_load_dword v0, v1, off glc dlc953; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)954; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]955;956; GFX11-PAL-LABEL: store_load_vindex_foo:957; GFX11-PAL: ; %bb.0: ; %bb958; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)959; GFX11-PAL-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v0960; GFX11-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s32961; GFX11-PAL-NEXT: s_delay_alu instid0(VALU_DEP_2)962; GFX11-PAL-NEXT: v_lshlrev_b32_e32 v1, 2, v1963; GFX11-PAL-NEXT: scratch_store_b32 v0, v2, off dlc964; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x0965; GFX11-PAL-NEXT: scratch_load_b32 v0, v1, s32 glc dlc966; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)967; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]968;969; GFX12-PAL-LABEL: store_load_vindex_foo:970; GFX12-PAL: ; %bb.0: ; %bb971; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x0972; GFX12-PAL-NEXT: s_wait_expcnt 0x0973; GFX12-PAL-NEXT: s_wait_samplecnt 0x0974; GFX12-PAL-NEXT: s_wait_bvhcnt 0x0975; GFX12-PAL-NEXT: s_wait_kmcnt 0x0976; GFX12-PAL-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v0977; GFX12-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v0978; GFX12-PAL-NEXT: s_delay_alu instid0(VALU_DEP_2)979; GFX12-PAL-NEXT: v_lshlrev_b32_e32 v1, 2, v1980; GFX12-PAL-NEXT: s_wait_storecnt 0x0981; GFX12-PAL-NEXT: scratch_store_b32 v0, v2, s32 scope:SCOPE_SYS982; GFX12-PAL-NEXT: s_wait_storecnt 0x0983; GFX12-PAL-NEXT: scratch_load_b32 v0, v1, s32 scope:SCOPE_SYS984; GFX12-PAL-NEXT: s_wait_loadcnt 0x0985; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]986bb:987 %i = alloca [32 x float], align 4, addrspace(5)988 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx989 store volatile i32 15, ptr addrspace(5) %i7, align 4990 %i9 = and i32 %idx, 15991 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i9992 %i12 = load volatile i32, ptr addrspace(5) %i10, align 4993 ret void994}995 996define void @private_ptr_foo(ptr addrspace(5) nocapture %arg) {997; GFX9-LABEL: private_ptr_foo:998; GFX9: ; %bb.0:999; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1000; GFX9-NEXT: v_mov_b32_e32 v1, 0x412000001001; GFX9-NEXT: scratch_store_dword v0, v1, off offset:41002; GFX9-NEXT: s_waitcnt vmcnt(0)1003; GFX9-NEXT: s_setpc_b64 s[30:31]1004;1005; GFX10-LABEL: private_ptr_foo:1006; GFX10: ; %bb.0:1007; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1008; GFX10-NEXT: v_mov_b32_e32 v1, 0x412000001009; GFX10-NEXT: scratch_store_dword v0, v1, off offset:41010; GFX10-NEXT: s_setpc_b64 s[30:31]1011;1012; GFX11-LABEL: private_ptr_foo:1013; GFX11: ; %bb.0:1014; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1015; GFX11-NEXT: v_mov_b32_e32 v1, 0x412000001016; GFX11-NEXT: scratch_store_b32 v0, v1, off offset:41017; GFX11-NEXT: s_setpc_b64 s[30:31]1018;1019; GFX12-LABEL: private_ptr_foo:1020; GFX12: ; %bb.0:1021; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01022; GFX12-NEXT: s_wait_expcnt 0x01023; GFX12-NEXT: s_wait_samplecnt 0x01024; GFX12-NEXT: s_wait_bvhcnt 0x01025; GFX12-NEXT: s_wait_kmcnt 0x01026; GFX12-NEXT: v_mov_b32_e32 v1, 0x412000001027; GFX12-NEXT: scratch_store_b32 v0, v1, off offset:41028; GFX12-NEXT: s_setpc_b64 s[30:31]1029;1030; GFX9-PAL-LABEL: private_ptr_foo:1031; GFX9-PAL: ; %bb.0:1032; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1033; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 0x412000001034; GFX9-PAL-NEXT: scratch_store_dword v0, v1, off offset:41035; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1036; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]1037;1038; GFX942-LABEL: private_ptr_foo:1039; GFX942: ; %bb.0:1040; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1041; GFX942-NEXT: v_mov_b32_e32 v1, 0x412000001042; GFX942-NEXT: scratch_store_dword v0, v1, off offset:41043; GFX942-NEXT: s_waitcnt vmcnt(0)1044; GFX942-NEXT: s_setpc_b64 s[30:31]1045;1046; GFX10-PAL-LABEL: private_ptr_foo:1047; GFX10-PAL: ; %bb.0:1048; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1049; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 0x412000001050; GFX10-PAL-NEXT: scratch_store_dword v0, v1, off offset:41051; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]1052;1053; GFX11-PAL-LABEL: private_ptr_foo:1054; GFX11-PAL: ; %bb.0:1055; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1056; GFX11-PAL-NEXT: v_mov_b32_e32 v1, 0x412000001057; GFX11-PAL-NEXT: scratch_store_b32 v0, v1, off offset:41058; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]1059;1060; GFX12-PAL-LABEL: private_ptr_foo:1061; GFX12-PAL: ; %bb.0:1062; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x01063; GFX12-PAL-NEXT: s_wait_expcnt 0x01064; GFX12-PAL-NEXT: s_wait_samplecnt 0x01065; GFX12-PAL-NEXT: s_wait_bvhcnt 0x01066; GFX12-PAL-NEXT: s_wait_kmcnt 0x01067; GFX12-PAL-NEXT: v_mov_b32_e32 v1, 0x412000001068; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, off offset:41069; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]1070 %gep = getelementptr inbounds float, ptr addrspace(5) %arg, i32 11071 store float 1.000000e+01, ptr addrspace(5) %gep, align 41072 ret void1073}1074 1075define amdgpu_kernel void @zero_init_small_offset_kernel() {1076; GFX9-LABEL: zero_init_small_offset_kernel:1077; GFX9: ; %bb.0:1078; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s131079; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 01080; GFX9-NEXT: s_mov_b32 s0, 01081; GFX9-NEXT: scratch_load_dword v0, off, s0 glc1082; GFX9-NEXT: s_waitcnt vmcnt(0)1083; GFX9-NEXT: s_mov_b32 s1, s01084; GFX9-NEXT: s_mov_b32 s2, s01085; GFX9-NEXT: s_mov_b32 s3, s01086; GFX9-NEXT: v_mov_b32_e32 v0, s01087; GFX9-NEXT: v_mov_b32_e32 v1, s11088; GFX9-NEXT: v_mov_b32_e32 v2, s21089; GFX9-NEXT: v_mov_b32_e32 v3, s31090; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2561091; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2721092; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2881093; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:3041094; GFX9-NEXT: s_endpgm1095;1096; GFX10-LABEL: zero_init_small_offset_kernel:1097; GFX10: ; %bb.0:1098; GFX10-NEXT: s_add_u32 s8, s8, s131099; GFX10-NEXT: s_addc_u32 s9, s9, 01100; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s81101; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s91102; GFX10-NEXT: scratch_load_dword v0, off, off glc dlc1103; GFX10-NEXT: s_waitcnt vmcnt(0)1104; GFX10-NEXT: s_mov_b32 s0, 01105; GFX10-NEXT: s_mov_b32 s1, s01106; GFX10-NEXT: s_mov_b32 s2, s01107; GFX10-NEXT: s_mov_b32 s3, s01108; GFX10-NEXT: v_mov_b32_e32 v0, s01109; GFX10-NEXT: v_mov_b32_e32 v1, s11110; GFX10-NEXT: v_mov_b32_e32 v2, s21111; GFX10-NEXT: v_mov_b32_e32 v3, s31112; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2561113; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2721114; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2881115; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:3041116; GFX10-NEXT: s_endpgm1117;1118; GFX11-LABEL: zero_init_small_offset_kernel:1119; GFX11: ; %bb.0:1120; GFX11-NEXT: scratch_load_b32 v0, off, off glc dlc1121; GFX11-NEXT: s_waitcnt vmcnt(0)1122; GFX11-NEXT: s_mov_b32 s0, 01123; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1124; GFX11-NEXT: s_mov_b32 s1, s01125; GFX11-NEXT: s_mov_b32 s2, s01126; GFX11-NEXT: s_mov_b32 s3, s01127; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11128; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31129; GFX11-NEXT: s_clause 0x31130; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:2561131; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:2721132; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:2881133; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:3041134; GFX11-NEXT: s_endpgm1135;1136; GFX12-LABEL: zero_init_small_offset_kernel:1137; GFX12: ; %bb.0:1138; GFX12-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS1139; GFX12-NEXT: s_wait_loadcnt 0x01140; GFX12-NEXT: s_mov_b32 s0, 01141; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1142; GFX12-NEXT: s_mov_b32 s1, s01143; GFX12-NEXT: s_mov_b32 s2, s01144; GFX12-NEXT: s_mov_b32 s3, s01145; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11146; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31147; GFX12-NEXT: s_clause 0x31148; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:2561149; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:2721150; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:2881151; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:3041152; GFX12-NEXT: s_endpgm1153;1154; GFX9-PAL-LABEL: zero_init_small_offset_kernel:1155; GFX9-PAL: ; %bb.0:1156; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]1157; GFX9-PAL-NEXT: s_mov_b32 s12, s01158; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01159; GFX9-PAL-NEXT: s_mov_b32 s0, 01160; GFX9-PAL-NEXT: s_mov_b32 s1, s01161; GFX9-PAL-NEXT: s_mov_b32 s2, s01162; GFX9-PAL-NEXT: s_mov_b32 s3, s01163; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)1164; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff1165; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s111166; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 01167; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc1168; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1169; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s01170; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s11171; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s21172; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s31173; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2561174; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2721175; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2881176; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:3041177; GFX9-PAL-NEXT: s_endpgm1178;1179; GFX942-LABEL: zero_init_small_offset_kernel:1180; GFX942: ; %bb.0:1181; GFX942-NEXT: scratch_load_dword v0, off, off sc0 sc11182; GFX942-NEXT: s_waitcnt vmcnt(0)1183; GFX942-NEXT: s_mov_b32 s0, 01184; GFX942-NEXT: s_mov_b32 s1, s01185; GFX942-NEXT: s_mov_b32 s2, s01186; GFX942-NEXT: s_mov_b32 s3, s01187; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]1188; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1189; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2561190; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2721191; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2881192; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:3041193; GFX942-NEXT: s_endpgm1194;1195; GFX1010-PAL-LABEL: zero_init_small_offset_kernel:1196; GFX1010-PAL: ; %bb.0:1197; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]1198; GFX1010-PAL-NEXT: s_mov_b32 s12, s01199; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01200; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)1201; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff1202; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s111203; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 01204; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s121205; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s131206; GFX1010-PAL-NEXT: s_mov_b32 s0, 01207; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s0 glc dlc1208; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)1209; GFX1010-PAL-NEXT: s_mov_b32 s1, s01210; GFX1010-PAL-NEXT: s_mov_b32 s2, s01211; GFX1010-PAL-NEXT: s_mov_b32 s3, s01212; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, s01213; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, s11214; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, s21215; GFX1010-PAL-NEXT: v_mov_b32_e32 v3, s31216; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2561217; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2721218; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:2881219; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:3041220; GFX1010-PAL-NEXT: s_endpgm1221;1222; GFX1030-PAL-LABEL: zero_init_small_offset_kernel:1223; GFX1030-PAL: ; %bb.0:1224; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]1225; GFX1030-PAL-NEXT: s_mov_b32 s12, s01226; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01227; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)1228; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff1229; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s111230; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 01231; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s121232; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s131233; GFX1030-PAL-NEXT: scratch_load_dword v0, off, off glc dlc1234; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)1235; GFX1030-PAL-NEXT: s_mov_b32 s0, 01236; GFX1030-PAL-NEXT: s_mov_b32 s1, s01237; GFX1030-PAL-NEXT: s_mov_b32 s2, s01238; GFX1030-PAL-NEXT: s_mov_b32 s3, s01239; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, s01240; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, s11241; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, s21242; GFX1030-PAL-NEXT: v_mov_b32_e32 v3, s31243; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2561244; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2721245; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:2881246; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:3041247; GFX1030-PAL-NEXT: s_endpgm1248;1249; GFX11-PAL-LABEL: zero_init_small_offset_kernel:1250; GFX11-PAL: ; %bb.0:1251; GFX11-PAL-NEXT: scratch_load_b32 v0, off, off glc dlc1252; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)1253; GFX11-PAL-NEXT: s_mov_b32 s0, 01254; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1255; GFX11-PAL-NEXT: s_mov_b32 s1, s01256; GFX11-PAL-NEXT: s_mov_b32 s2, s01257; GFX11-PAL-NEXT: s_mov_b32 s3, s01258; GFX11-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11259; GFX11-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31260; GFX11-PAL-NEXT: s_clause 0x31261; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:2561262; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:2721263; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:2881264; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:3041265; GFX11-PAL-NEXT: s_endpgm1266;1267; GFX12-PAL-LABEL: zero_init_small_offset_kernel:1268; GFX12-PAL: ; %bb.0:1269; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS1270; GFX12-PAL-NEXT: s_wait_loadcnt 0x01271; GFX12-PAL-NEXT: s_mov_b32 s0, 01272; GFX12-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1273; GFX12-PAL-NEXT: s_mov_b32 s1, s01274; GFX12-PAL-NEXT: s_mov_b32 s2, s01275; GFX12-PAL-NEXT: s_mov_b32 s3, s01276; GFX12-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11277; GFX12-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31278; GFX12-PAL-NEXT: s_clause 0x31279; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:2561280; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:2721281; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:2881282; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:3041283; GFX12-PAL-NEXT: s_endpgm1284 %padding = alloca [64 x i32], align 4, addrspace(5)1285 %alloca = alloca [32 x i16], align 2, addrspace(5)1286 %pad_gep = getelementptr inbounds [64 x i32], ptr addrspace(5) %padding, i32 0, i32 01287 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 41288 call void @llvm.memset.p5.i64(ptr addrspace(5) align 2 dereferenceable(64) %alloca, i8 0, i64 64, i1 false)1289 ret void1290}1291 1292define void @zero_init_small_offset_foo() {1293; GFX9-LABEL: zero_init_small_offset_foo:1294; GFX9: ; %bb.0:1295; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1296; GFX9-NEXT: scratch_load_dword v0, off, s32 glc1297; GFX9-NEXT: s_waitcnt vmcnt(0)1298; GFX9-NEXT: s_mov_b32 s0, 01299; GFX9-NEXT: s_mov_b32 s1, s01300; GFX9-NEXT: s_mov_b32 s2, s01301; GFX9-NEXT: s_mov_b32 s3, s01302; GFX9-NEXT: v_mov_b32_e32 v0, s01303; GFX9-NEXT: v_mov_b32_e32 v1, s11304; GFX9-NEXT: v_mov_b32_e32 v2, s21305; GFX9-NEXT: v_mov_b32_e32 v3, s31306; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2561307; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2721308; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2881309; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:3041310; GFX9-NEXT: s_waitcnt vmcnt(0)1311; GFX9-NEXT: s_setpc_b64 s[30:31]1312;1313; GFX10-LABEL: zero_init_small_offset_foo:1314; GFX10: ; %bb.0:1315; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1316; GFX10-NEXT: scratch_load_dword v0, off, s32 glc dlc1317; GFX10-NEXT: s_waitcnt vmcnt(0)1318; GFX10-NEXT: s_mov_b32 s0, 01319; GFX10-NEXT: s_mov_b32 s1, s01320; GFX10-NEXT: s_mov_b32 s2, s01321; GFX10-NEXT: s_mov_b32 s3, s01322; GFX10-NEXT: v_mov_b32_e32 v0, s01323; GFX10-NEXT: v_mov_b32_e32 v1, s11324; GFX10-NEXT: v_mov_b32_e32 v2, s21325; GFX10-NEXT: v_mov_b32_e32 v3, s31326; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2561327; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2721328; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2881329; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:3041330; GFX10-NEXT: s_setpc_b64 s[30:31]1331;1332; GFX11-LABEL: zero_init_small_offset_foo:1333; GFX11: ; %bb.0:1334; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1335; GFX11-NEXT: scratch_load_b32 v0, off, s32 glc dlc1336; GFX11-NEXT: s_waitcnt vmcnt(0)1337; GFX11-NEXT: s_mov_b32 s0, 01338; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1339; GFX11-NEXT: s_mov_b32 s1, s01340; GFX11-NEXT: s_mov_b32 s2, s01341; GFX11-NEXT: s_mov_b32 s3, s01342; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11343; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31344; GFX11-NEXT: s_clause 0x31345; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2561346; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2721347; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2881348; GFX11-NEXT: scratch_store_b128 off, v[0:3], s32 offset:3041349; GFX11-NEXT: s_setpc_b64 s[30:31]1350;1351; GFX12-LABEL: zero_init_small_offset_foo:1352; GFX12: ; %bb.0:1353; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01354; GFX12-NEXT: s_wait_expcnt 0x01355; GFX12-NEXT: s_wait_samplecnt 0x01356; GFX12-NEXT: s_wait_bvhcnt 0x01357; GFX12-NEXT: s_wait_kmcnt 0x01358; GFX12-NEXT: scratch_load_b32 v0, off, s32 scope:SCOPE_SYS1359; GFX12-NEXT: s_wait_loadcnt 0x01360; GFX12-NEXT: s_mov_b32 s0, 01361; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1362; GFX12-NEXT: s_mov_b32 s1, s01363; GFX12-NEXT: s_mov_b32 s2, s01364; GFX12-NEXT: s_mov_b32 s3, s01365; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)1366; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11367; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31368; GFX12-NEXT: s_clause 0x31369; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2561370; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2721371; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2881372; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:3041373; GFX12-NEXT: s_setpc_b64 s[30:31]1374;1375; GFX9-PAL-LABEL: zero_init_small_offset_foo:1376; GFX9-PAL: ; %bb.0:1377; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1378; GFX9-PAL-NEXT: scratch_load_dword v0, off, s32 glc1379; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1380; GFX9-PAL-NEXT: s_mov_b32 s0, 01381; GFX9-PAL-NEXT: s_mov_b32 s1, s01382; GFX9-PAL-NEXT: s_mov_b32 s2, s01383; GFX9-PAL-NEXT: s_mov_b32 s3, s01384; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s01385; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s11386; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s21387; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s31388; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2561389; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2721390; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2881391; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:3041392; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1393; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]1394;1395; GFX942-LABEL: zero_init_small_offset_foo:1396; GFX942: ; %bb.0:1397; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1398; GFX942-NEXT: scratch_load_dword v0, off, s32 sc0 sc11399; GFX942-NEXT: s_waitcnt vmcnt(0)1400; GFX942-NEXT: s_mov_b32 s0, 01401; GFX942-NEXT: s_mov_b32 s1, s01402; GFX942-NEXT: s_mov_b32 s2, s01403; GFX942-NEXT: s_mov_b32 s3, s01404; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]1405; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]1406; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2561407; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2721408; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2881409; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:3041410; GFX942-NEXT: s_waitcnt vmcnt(0)1411; GFX942-NEXT: s_setpc_b64 s[30:31]1412;1413; GFX10-PAL-LABEL: zero_init_small_offset_foo:1414; GFX10-PAL: ; %bb.0:1415; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1416; GFX10-PAL-NEXT: scratch_load_dword v0, off, s32 glc dlc1417; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)1418; GFX10-PAL-NEXT: s_mov_b32 s0, 01419; GFX10-PAL-NEXT: s_mov_b32 s1, s01420; GFX10-PAL-NEXT: s_mov_b32 s2, s01421; GFX10-PAL-NEXT: s_mov_b32 s3, s01422; GFX10-PAL-NEXT: v_mov_b32_e32 v0, s01423; GFX10-PAL-NEXT: v_mov_b32_e32 v1, s11424; GFX10-PAL-NEXT: v_mov_b32_e32 v2, s21425; GFX10-PAL-NEXT: v_mov_b32_e32 v3, s31426; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2561427; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2721428; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:2881429; GFX10-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s32 offset:3041430; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]1431;1432; GFX11-PAL-LABEL: zero_init_small_offset_foo:1433; GFX11-PAL: ; %bb.0:1434; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1435; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s32 glc dlc1436; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)1437; GFX11-PAL-NEXT: s_mov_b32 s0, 01438; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)1439; GFX11-PAL-NEXT: s_mov_b32 s1, s01440; GFX11-PAL-NEXT: s_mov_b32 s2, s01441; GFX11-PAL-NEXT: s_mov_b32 s3, s01442; GFX11-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11443; GFX11-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31444; GFX11-PAL-NEXT: s_clause 0x31445; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2561446; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2721447; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2881448; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:3041449; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]1450;1451; GFX12-PAL-LABEL: zero_init_small_offset_foo:1452; GFX12-PAL: ; %bb.0:1453; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x01454; GFX12-PAL-NEXT: s_wait_expcnt 0x01455; GFX12-PAL-NEXT: s_wait_samplecnt 0x01456; GFX12-PAL-NEXT: s_wait_bvhcnt 0x01457; GFX12-PAL-NEXT: s_wait_kmcnt 0x01458; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s32 scope:SCOPE_SYS1459; GFX12-PAL-NEXT: s_wait_loadcnt 0x01460; GFX12-PAL-NEXT: s_mov_b32 s0, 01461; GFX12-PAL-NEXT: s_wait_alu depctr_sa_sdst(0)1462; GFX12-PAL-NEXT: s_mov_b32 s1, s01463; GFX12-PAL-NEXT: s_mov_b32 s2, s01464; GFX12-PAL-NEXT: s_mov_b32 s3, s01465; GFX12-PAL-NEXT: s_wait_alu depctr_sa_sdst(0)1466; GFX12-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s11467; GFX12-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s31468; GFX12-PAL-NEXT: s_clause 0x31469; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2561470; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2721471; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:2881472; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:3041473; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]1474 %padding = alloca [64 x i32], align 4, addrspace(5)1475 %alloca = alloca [32 x i16], align 2, addrspace(5)1476 %pad_gep = getelementptr inbounds [64 x i32], ptr addrspace(5) %padding, i32 0, i32 01477 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 41478 call void @llvm.memset.p5.i64(ptr addrspace(5) align 2 dereferenceable(64) %alloca, i8 0, i64 64, i1 false)1479 ret void1480}1481 1482define amdgpu_kernel void @store_load_sindex_small_offset_kernel(i32 %idx) {1483; GFX9-LABEL: store_load_sindex_small_offset_kernel:1484; GFX9: ; %bb.0: ; %bb1485; GFX9-NEXT: s_load_dword s0, s[4:5], 0x241486; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s131487; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 01488; GFX9-NEXT: s_mov_b32 s1, 01489; GFX9-NEXT: scratch_load_dword v0, off, s1 glc1490; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)1491; GFX9-NEXT: s_lshl_b32 s1, s0, 21492; GFX9-NEXT: s_and_b32 s0, s0, 151493; GFX9-NEXT: v_mov_b32_e32 v0, 151494; GFX9-NEXT: s_addk_i32 s1, 0x1001495; GFX9-NEXT: s_lshl_b32 s0, s0, 21496; GFX9-NEXT: scratch_store_dword off, v0, s11497; GFX9-NEXT: s_waitcnt vmcnt(0)1498; GFX9-NEXT: s_addk_i32 s0, 0x1001499; GFX9-NEXT: scratch_load_dword v0, off, s0 glc1500; GFX9-NEXT: s_waitcnt vmcnt(0)1501; GFX9-NEXT: s_endpgm1502;1503; GFX10-LABEL: store_load_sindex_small_offset_kernel:1504; GFX10: ; %bb.0: ; %bb1505; GFX10-NEXT: s_add_u32 s8, s8, s131506; GFX10-NEXT: s_addc_u32 s9, s9, 01507; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s81508; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s91509; GFX10-NEXT: s_load_dword s0, s[4:5], 0x241510; GFX10-NEXT: scratch_load_dword v0, off, off glc dlc1511; GFX10-NEXT: s_waitcnt vmcnt(0)1512; GFX10-NEXT: v_mov_b32_e32 v0, 151513; GFX10-NEXT: s_waitcnt lgkmcnt(0)1514; GFX10-NEXT: s_and_b32 s1, s0, 151515; GFX10-NEXT: s_lshl_b32 s0, s0, 21516; GFX10-NEXT: s_lshl_b32 s1, s1, 21517; GFX10-NEXT: s_addk_i32 s0, 0x1001518; GFX10-NEXT: s_addk_i32 s1, 0x1001519; GFX10-NEXT: scratch_store_dword off, v0, s01520; GFX10-NEXT: s_waitcnt_vscnt null, 0x01521; GFX10-NEXT: scratch_load_dword v0, off, s1 glc dlc1522; GFX10-NEXT: s_waitcnt vmcnt(0)1523; GFX10-NEXT: s_endpgm1524;1525; GFX11-LABEL: store_load_sindex_small_offset_kernel:1526; GFX11: ; %bb.0: ; %bb1527; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x241528; GFX11-NEXT: scratch_load_b32 v0, off, off glc dlc1529; GFX11-NEXT: s_waitcnt vmcnt(0)1530; GFX11-NEXT: v_mov_b32_e32 v0, 151531; GFX11-NEXT: s_waitcnt lgkmcnt(0)1532; GFX11-NEXT: s_and_b32 s1, s0, 151533; GFX11-NEXT: s_lshl_b32 s0, s0, 21534; GFX11-NEXT: s_lshl_b32 s1, s1, 21535; GFX11-NEXT: s_addk_i32 s0, 0x1001536; GFX11-NEXT: s_addk_i32 s1, 0x1001537; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc1538; GFX11-NEXT: s_waitcnt_vscnt null, 0x01539; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc1540; GFX11-NEXT: s_waitcnt vmcnt(0)1541; GFX11-NEXT: s_endpgm1542;1543; GFX12-LABEL: store_load_sindex_small_offset_kernel:1544; GFX12: ; %bb.0: ; %bb1545; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x241546; GFX12-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS1547; GFX12-NEXT: s_wait_loadcnt 0x01548; GFX12-NEXT: v_mov_b32_e32 v0, 151549; GFX12-NEXT: s_wait_kmcnt 0x01550; GFX12-NEXT: s_and_b32 s1, s0, 151551; GFX12-NEXT: s_lshl_b32 s0, s0, 21552; GFX12-NEXT: s_lshl_b32 s1, s1, 21553; GFX12-NEXT: s_addk_co_i32 s0, 0x1001554; GFX12-NEXT: s_addk_co_i32 s1, 0x1001555; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS1556; GFX12-NEXT: s_wait_storecnt 0x01557; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS1558; GFX12-NEXT: s_wait_loadcnt 0x01559; GFX12-NEXT: s_endpgm1560;1561; GFX9-PAL-LABEL: store_load_sindex_small_offset_kernel:1562; GFX9-PAL: ; %bb.0: ; %bb1563; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]1564; GFX9-PAL-NEXT: s_mov_b32 s12, s01565; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01566; GFX9-PAL-NEXT: s_mov_b32 s1, 01567; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x01568; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)1569; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff1570; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s111571; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 01572; GFX9-PAL-NEXT: scratch_load_dword v0, off, s1 glc1573; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1574; GFX9-PAL-NEXT: s_lshl_b32 s1, s0, 21575; GFX9-PAL-NEXT: s_and_b32 s0, s0, 151576; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 151577; GFX9-PAL-NEXT: s_addk_i32 s1, 0x1001578; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 21579; GFX9-PAL-NEXT: scratch_store_dword off, v0, s11580; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1581; GFX9-PAL-NEXT: s_addk_i32 s0, 0x1001582; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc1583; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1584; GFX9-PAL-NEXT: s_endpgm1585;1586; GFX942-LABEL: store_load_sindex_small_offset_kernel:1587; GFX942: ; %bb.0: ; %bb1588; GFX942-NEXT: s_load_dword s0, s[4:5], 0x241589; GFX942-NEXT: scratch_load_dword v0, off, off sc0 sc11590; GFX942-NEXT: s_waitcnt vmcnt(0)1591; GFX942-NEXT: v_mov_b32_e32 v0, 151592; GFX942-NEXT: s_waitcnt lgkmcnt(0)1593; GFX942-NEXT: s_lshl_b32 s1, s0, 21594; GFX942-NEXT: s_and_b32 s0, s0, 151595; GFX942-NEXT: s_addk_i32 s1, 0x1001596; GFX942-NEXT: s_lshl_b32 s0, s0, 21597; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc11598; GFX942-NEXT: s_waitcnt vmcnt(0)1599; GFX942-NEXT: s_addk_i32 s0, 0x1001600; GFX942-NEXT: scratch_load_dword v0, off, s0 sc0 sc11601; GFX942-NEXT: s_waitcnt vmcnt(0)1602; GFX942-NEXT: s_endpgm1603;1604; GFX1010-PAL-LABEL: store_load_sindex_small_offset_kernel:1605; GFX1010-PAL: ; %bb.0: ; %bb1606; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]1607; GFX1010-PAL-NEXT: s_mov_b32 s12, s01608; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01609; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)1610; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff1611; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s111612; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 01613; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s121614; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s131615; GFX1010-PAL-NEXT: s_load_dword s0, s[4:5], 0x01616; GFX1010-PAL-NEXT: s_mov_b32 s1, 01617; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc1618; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)1619; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, 151620; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)1621; GFX1010-PAL-NEXT: s_and_b32 s1, s0, 151622; GFX1010-PAL-NEXT: s_lshl_b32 s0, s0, 21623; GFX1010-PAL-NEXT: s_lshl_b32 s1, s1, 21624; GFX1010-PAL-NEXT: s_addk_i32 s0, 0x1001625; GFX1010-PAL-NEXT: s_addk_i32 s1, 0x1001626; GFX1010-PAL-NEXT: scratch_store_dword off, v0, s01627; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x01628; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc1629; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)1630; GFX1010-PAL-NEXT: s_endpgm1631;1632; GFX1030-PAL-LABEL: store_load_sindex_small_offset_kernel:1633; GFX1030-PAL: ; %bb.0: ; %bb1634; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]1635; GFX1030-PAL-NEXT: s_mov_b32 s12, s01636; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01637; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)1638; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff1639; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s111640; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 01641; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s121642; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s131643; GFX1030-PAL-NEXT: s_load_dword s0, s[4:5], 0x01644; GFX1030-PAL-NEXT: scratch_load_dword v0, off, off glc dlc1645; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)1646; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, 151647; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)1648; GFX1030-PAL-NEXT: s_and_b32 s1, s0, 151649; GFX1030-PAL-NEXT: s_lshl_b32 s0, s0, 21650; GFX1030-PAL-NEXT: s_lshl_b32 s1, s1, 21651; GFX1030-PAL-NEXT: s_addk_i32 s0, 0x1001652; GFX1030-PAL-NEXT: s_addk_i32 s1, 0x1001653; GFX1030-PAL-NEXT: scratch_store_dword off, v0, s01654; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x01655; GFX1030-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc1656; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)1657; GFX1030-PAL-NEXT: s_endpgm1658;1659; GFX11-PAL-LABEL: store_load_sindex_small_offset_kernel:1660; GFX11-PAL: ; %bb.0: ; %bb1661; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x01662; GFX11-PAL-NEXT: scratch_load_b32 v0, off, off glc dlc1663; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)1664; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 151665; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)1666; GFX11-PAL-NEXT: s_and_b32 s1, s0, 151667; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 21668; GFX11-PAL-NEXT: s_lshl_b32 s1, s1, 21669; GFX11-PAL-NEXT: s_addk_i32 s0, 0x1001670; GFX11-PAL-NEXT: s_addk_i32 s1, 0x1001671; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s0 dlc1672; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x01673; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s1 glc dlc1674; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)1675; GFX11-PAL-NEXT: s_endpgm1676;1677; GFX12-PAL-LABEL: store_load_sindex_small_offset_kernel:1678; GFX12-PAL: ; %bb.0: ; %bb1679; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x01680; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS1681; GFX12-PAL-NEXT: s_wait_loadcnt 0x01682; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 151683; GFX12-PAL-NEXT: s_wait_kmcnt 0x01684; GFX12-PAL-NEXT: s_and_b32 s1, s0, 151685; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 21686; GFX12-PAL-NEXT: s_lshl_b32 s1, s1, 21687; GFX12-PAL-NEXT: s_addk_co_i32 s0, 0x1001688; GFX12-PAL-NEXT: s_addk_co_i32 s1, 0x1001689; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS1690; GFX12-PAL-NEXT: s_wait_storecnt 0x01691; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS1692; GFX12-PAL-NEXT: s_wait_loadcnt 0x01693; GFX12-PAL-NEXT: s_endpgm1694bb:1695 %padding = alloca [64 x i32], align 4, addrspace(5)1696 %i = alloca [32 x float], align 4, addrspace(5)1697 %pad_gep = getelementptr inbounds [64 x i32], ptr addrspace(5) %padding, i32 0, i32 01698 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 41699 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx1700 store volatile i32 15, ptr addrspace(5) %i7, align 41701 %i9 = and i32 %idx, 151702 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i91703 %i12 = load volatile i32, ptr addrspace(5) %i10, align 41704 ret void1705}1706 1707define amdgpu_ps void @store_load_sindex_small_offset_foo(i32 inreg %idx) {1708; GFX9-LABEL: store_load_sindex_small_offset_foo:1709; GFX9: ; %bb.0: ; %bb1710; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s31711; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 01712; GFX9-NEXT: s_mov_b32 s0, 01713; GFX9-NEXT: scratch_load_dword v0, off, s0 glc1714; GFX9-NEXT: s_waitcnt vmcnt(0)1715; GFX9-NEXT: s_lshl_b32 s0, s2, 21716; GFX9-NEXT: s_addk_i32 s0, 0x1001717; GFX9-NEXT: v_mov_b32_e32 v0, 151718; GFX9-NEXT: scratch_store_dword off, v0, s01719; GFX9-NEXT: s_waitcnt vmcnt(0)1720; GFX9-NEXT: s_and_b32 s0, s2, 151721; GFX9-NEXT: s_lshl_b32 s0, s0, 21722; GFX9-NEXT: s_addk_i32 s0, 0x1001723; GFX9-NEXT: scratch_load_dword v0, off, s0 glc1724; GFX9-NEXT: s_waitcnt vmcnt(0)1725; GFX9-NEXT: s_endpgm1726;1727; GFX10-LABEL: store_load_sindex_small_offset_foo:1728; GFX10: ; %bb.0: ; %bb1729; GFX10-NEXT: s_add_u32 s0, s0, s31730; GFX10-NEXT: s_addc_u32 s1, s1, 01731; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s01732; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s11733; GFX10-NEXT: scratch_load_dword v0, off, off glc dlc1734; GFX10-NEXT: s_waitcnt vmcnt(0)1735; GFX10-NEXT: v_mov_b32_e32 v0, 151736; GFX10-NEXT: s_and_b32 s0, s2, 151737; GFX10-NEXT: s_lshl_b32 s1, s2, 21738; GFX10-NEXT: s_lshl_b32 s0, s0, 21739; GFX10-NEXT: s_addk_i32 s1, 0x1001740; GFX10-NEXT: s_addk_i32 s0, 0x1001741; GFX10-NEXT: scratch_store_dword off, v0, s11742; GFX10-NEXT: s_waitcnt_vscnt null, 0x01743; GFX10-NEXT: scratch_load_dword v0, off, s0 glc dlc1744; GFX10-NEXT: s_waitcnt vmcnt(0)1745; GFX10-NEXT: s_endpgm1746;1747; GFX11-LABEL: store_load_sindex_small_offset_foo:1748; GFX11: ; %bb.0: ; %bb1749; GFX11-NEXT: scratch_load_b32 v0, off, off glc dlc1750; GFX11-NEXT: s_waitcnt vmcnt(0)1751; GFX11-NEXT: v_mov_b32_e32 v0, 151752; GFX11-NEXT: s_and_b32 s1, s0, 151753; GFX11-NEXT: s_lshl_b32 s0, s0, 21754; GFX11-NEXT: s_lshl_b32 s1, s1, 21755; GFX11-NEXT: s_addk_i32 s0, 0x1001756; GFX11-NEXT: s_addk_i32 s1, 0x1001757; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc1758; GFX11-NEXT: s_waitcnt_vscnt null, 0x01759; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc1760; GFX11-NEXT: s_waitcnt vmcnt(0)1761; GFX11-NEXT: s_endpgm1762;1763; GFX12-LABEL: store_load_sindex_small_offset_foo:1764; GFX12: ; %bb.0: ; %bb1765; GFX12-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS1766; GFX12-NEXT: s_wait_loadcnt 0x01767; GFX12-NEXT: v_mov_b32_e32 v0, 151768; GFX12-NEXT: s_and_b32 s1, s0, 151769; GFX12-NEXT: s_lshl_b32 s0, s0, 21770; GFX12-NEXT: s_lshl_b32 s1, s1, 21771; GFX12-NEXT: s_addk_co_i32 s0, 0x1001772; GFX12-NEXT: s_addk_co_i32 s1, 0x1001773; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS1774; GFX12-NEXT: s_wait_storecnt 0x01775; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS1776; GFX12-NEXT: s_wait_loadcnt 0x01777; GFX12-NEXT: s_endpgm1778;1779; GFX9-PAL-LABEL: store_load_sindex_small_offset_foo:1780; GFX9-PAL: ; %bb.0: ; %bb1781; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]1782; GFX9-PAL-NEXT: s_mov_b32 s2, s01783; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x01784; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)1785; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff1786; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s11787; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 01788; GFX9-PAL-NEXT: s_mov_b32 s1, 01789; GFX9-PAL-NEXT: scratch_load_dword v0, off, s1 glc1790; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1791; GFX9-PAL-NEXT: s_lshl_b32 s1, s0, 21792; GFX9-PAL-NEXT: s_and_b32 s0, s0, 151793; GFX9-PAL-NEXT: s_addk_i32 s1, 0x1001794; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 151795; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 21796; GFX9-PAL-NEXT: scratch_store_dword off, v0, s11797; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1798; GFX9-PAL-NEXT: s_addk_i32 s0, 0x1001799; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc1800; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)1801; GFX9-PAL-NEXT: s_endpgm1802;1803; GFX942-LABEL: store_load_sindex_small_offset_foo:1804; GFX942: ; %bb.0: ; %bb1805; GFX942-NEXT: scratch_load_dword v0, off, off sc0 sc11806; GFX942-NEXT: s_waitcnt vmcnt(0)1807; GFX942-NEXT: s_lshl_b32 s1, s0, 21808; GFX942-NEXT: s_and_b32 s0, s0, 151809; GFX942-NEXT: s_addk_i32 s1, 0x1001810; GFX942-NEXT: v_mov_b32_e32 v0, 151811; GFX942-NEXT: s_lshl_b32 s0, s0, 21812; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc11813; GFX942-NEXT: s_waitcnt vmcnt(0)1814; GFX942-NEXT: s_addk_i32 s0, 0x1001815; GFX942-NEXT: scratch_load_dword v0, off, s0 sc0 sc11816; GFX942-NEXT: s_waitcnt vmcnt(0)1817; GFX942-NEXT: s_endpgm1818;1819; GFX1010-PAL-LABEL: store_load_sindex_small_offset_foo:1820; GFX1010-PAL: ; %bb.0: ; %bb1821; GFX1010-PAL-NEXT: s_getpc_b64 s[2:3]1822; GFX1010-PAL-NEXT: s_mov_b32 s2, s01823; GFX1010-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x01824; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)1825; GFX1010-PAL-NEXT: s_and_b32 s3, s3, 0xffff1826; GFX1010-PAL-NEXT: s_add_u32 s2, s2, s11827; GFX1010-PAL-NEXT: s_addc_u32 s3, s3, 01828; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s21829; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s31830; GFX1010-PAL-NEXT: s_mov_b32 s1, 01831; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc1832; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)1833; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, 151834; GFX1010-PAL-NEXT: s_and_b32 s1, s0, 151835; GFX1010-PAL-NEXT: s_lshl_b32 s0, s0, 21836; GFX1010-PAL-NEXT: s_lshl_b32 s1, s1, 21837; GFX1010-PAL-NEXT: s_addk_i32 s0, 0x1001838; GFX1010-PAL-NEXT: s_addk_i32 s1, 0x1001839; GFX1010-PAL-NEXT: scratch_store_dword off, v0, s01840; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x01841; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc1842; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)1843; GFX1010-PAL-NEXT: s_endpgm1844;1845; GFX1030-PAL-LABEL: store_load_sindex_small_offset_foo:1846; GFX1030-PAL: ; %bb.0: ; %bb1847; GFX1030-PAL-NEXT: s_getpc_b64 s[2:3]1848; GFX1030-PAL-NEXT: s_mov_b32 s2, s01849; GFX1030-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x01850; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)1851; GFX1030-PAL-NEXT: s_and_b32 s3, s3, 0xffff1852; GFX1030-PAL-NEXT: s_add_u32 s2, s2, s11853; GFX1030-PAL-NEXT: s_addc_u32 s3, s3, 01854; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s21855; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s31856; GFX1030-PAL-NEXT: scratch_load_dword v0, off, off glc dlc1857; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)1858; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, 151859; GFX1030-PAL-NEXT: s_and_b32 s1, s0, 151860; GFX1030-PAL-NEXT: s_lshl_b32 s0, s0, 21861; GFX1030-PAL-NEXT: s_lshl_b32 s1, s1, 21862; GFX1030-PAL-NEXT: s_addk_i32 s0, 0x1001863; GFX1030-PAL-NEXT: s_addk_i32 s1, 0x1001864; GFX1030-PAL-NEXT: scratch_store_dword off, v0, s01865; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x01866; GFX1030-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc1867; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)1868; GFX1030-PAL-NEXT: s_endpgm1869;1870; GFX11-PAL-LABEL: store_load_sindex_small_offset_foo:1871; GFX11-PAL: ; %bb.0: ; %bb1872; GFX11-PAL-NEXT: scratch_load_b32 v0, off, off glc dlc1873; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)1874; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 151875; GFX11-PAL-NEXT: s_and_b32 s1, s0, 151876; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 21877; GFX11-PAL-NEXT: s_lshl_b32 s1, s1, 21878; GFX11-PAL-NEXT: s_addk_i32 s0, 0x1001879; GFX11-PAL-NEXT: s_addk_i32 s1, 0x1001880; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s0 dlc1881; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x01882; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s1 glc dlc1883; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)1884; GFX11-PAL-NEXT: s_endpgm1885;1886; GFX12-PAL-LABEL: store_load_sindex_small_offset_foo:1887; GFX12-PAL: ; %bb.0: ; %bb1888; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS1889; GFX12-PAL-NEXT: s_wait_loadcnt 0x01890; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 151891; GFX12-PAL-NEXT: s_and_b32 s1, s0, 151892; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 21893; GFX12-PAL-NEXT: s_lshl_b32 s1, s1, 21894; GFX12-PAL-NEXT: s_addk_co_i32 s0, 0x1001895; GFX12-PAL-NEXT: s_addk_co_i32 s1, 0x1001896; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS1897; GFX12-PAL-NEXT: s_wait_storecnt 0x01898; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS1899; GFX12-PAL-NEXT: s_wait_loadcnt 0x01900; GFX12-PAL-NEXT: s_endpgm1901bb:1902 %padding = alloca [64 x i32], align 4, addrspace(5)1903 %i = alloca [32 x float], align 4, addrspace(5)1904 %pad_gep = getelementptr inbounds [64 x i32], ptr addrspace(5) %padding, i32 0, i32 01905 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 41906 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx1907 store volatile i32 15, ptr addrspace(5) %i7, align 41908 %i9 = and i32 %idx, 151909 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i91910 %i12 = load volatile i32, ptr addrspace(5) %i10, align 41911 ret void1912}1913 1914define amdgpu_kernel void @store_load_vindex_small_offset_kernel(i32 %n) {1915; GFX9-LABEL: store_load_vindex_small_offset_kernel:1916; GFX9: ; %bb.0: ; %bb1917; GFX9-NEXT: s_load_dword s0, s[4:5], 0x241918; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s131919; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 01920; GFX9-NEXT: s_mov_b32 s1, 01921; GFX9-NEXT: scratch_load_dword v1, off, s1 glc1922; GFX9-NEXT: s_waitcnt vmcnt(0)1923; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v01924; GFX9-NEXT: s_waitcnt lgkmcnt(0)1925; GFX9-NEXT: s_lshl_b32 s0, s0, 71926; GFX9-NEXT: v_add_u32_e32 v1, 0x100, v01927; GFX9-NEXT: s_addk_i32 s0, 0x1001928; GFX9-NEXT: v_mov_b32_e32 v2, 151929; GFX9-NEXT: scratch_store_dword v1, v2, off offset:1281930; GFX9-NEXT: s_waitcnt vmcnt(0)1931; GFX9-NEXT: v_sub_u32_e32 v0, s0, v01932; GFX9-NEXT: scratch_load_dword v0, v0, off offset:124 glc1933; GFX9-NEXT: s_waitcnt vmcnt(0)1934; GFX9-NEXT: s_endpgm1935;1936; GFX10-LABEL: store_load_vindex_small_offset_kernel:1937; GFX10: ; %bb.0: ; %bb1938; GFX10-NEXT: s_add_u32 s8, s8, s131939; GFX10-NEXT: s_addc_u32 s9, s9, 01940; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s81941; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s91942; GFX10-NEXT: s_load_dword s0, s[4:5], 0x241943; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v01944; GFX10-NEXT: v_mov_b32_e32 v2, 151945; GFX10-NEXT: scratch_load_dword v3, off, off glc dlc1946; GFX10-NEXT: s_waitcnt vmcnt(0)1947; GFX10-NEXT: v_add_nc_u32_e32 v1, 0x100, v01948; GFX10-NEXT: scratch_store_dword v1, v2, off offset:1281949; GFX10-NEXT: s_waitcnt_vscnt null, 0x01950; GFX10-NEXT: s_waitcnt lgkmcnt(0)1951; GFX10-NEXT: s_lshl_b32 s0, s0, 71952; GFX10-NEXT: s_addk_i32 s0, 0x1001953; GFX10-NEXT: v_sub_nc_u32_e32 v0, s0, v01954; GFX10-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc1955; GFX10-NEXT: s_waitcnt vmcnt(0)1956; GFX10-NEXT: s_endpgm1957;1958; GFX11-LABEL: store_load_vindex_small_offset_kernel:1959; GFX11: ; %bb.0: ; %bb1960; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x241961; GFX11-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v01962; GFX11-NEXT: scratch_load_b32 v3, off, off glc dlc1963; GFX11-NEXT: s_waitcnt vmcnt(0)1964; GFX11-NEXT: v_and_b32_e32 v0, 0xffc, v01965; GFX11-NEXT: scratch_store_b32 v0, v1, off offset:384 dlc1966; GFX11-NEXT: s_waitcnt_vscnt null, 0x01967; GFX11-NEXT: s_waitcnt lgkmcnt(0)1968; GFX11-NEXT: s_lshl_b32 s0, s0, 71969; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1970; GFX11-NEXT: s_addk_i32 s0, 0x1001971; GFX11-NEXT: v_sub_nc_u32_e32 v2, s0, v01972; GFX11-NEXT: scratch_load_b32 v0, v2, off offset:124 glc dlc1973; GFX11-NEXT: s_waitcnt vmcnt(0)1974; GFX11-NEXT: s_endpgm1975;1976; GFX12-LABEL: store_load_vindex_small_offset_kernel:1977; GFX12: ; %bb.0: ; %bb1978; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x241979; GFX12-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v01980; GFX12-NEXT: scratch_load_b32 v3, off, off scope:SCOPE_SYS1981; GFX12-NEXT: s_wait_loadcnt 0x01982; GFX12-NEXT: v_and_b32_e32 v0, 0xffc, v01983; GFX12-NEXT: s_wait_kmcnt 0x01984; GFX12-NEXT: scratch_store_b32 v0, v1, off offset:384 scope:SCOPE_SYS1985; GFX12-NEXT: s_wait_storecnt 0x01986; GFX12-NEXT: s_lshl_b32 s0, s0, 71987; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)1988; GFX12-NEXT: s_addk_co_i32 s0, 0x1001989; GFX12-NEXT: v_sub_nc_u32_e32 v2, s0, v01990; GFX12-NEXT: scratch_load_b32 v0, v2, off offset:124 scope:SCOPE_SYS1991; GFX12-NEXT: s_wait_loadcnt 0x01992; GFX12-NEXT: s_endpgm1993;1994; GFX9-PAL-LABEL: store_load_vindex_small_offset_kernel:1995; GFX9-PAL: ; %bb.0: ; %bb1996; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]1997; GFX9-PAL-NEXT: s_mov_b32 s12, s01998; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x01999; GFX9-PAL-NEXT: s_mov_b32 s1, 02000; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x02001; GFX9-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v02002; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 152003; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)2004; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff2005; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s112006; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 02007; GFX9-PAL-NEXT: scratch_load_dword v1, off, s1 glc2008; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2009; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 72010; GFX9-PAL-NEXT: v_add_u32_e32 v1, 0x100, v02011; GFX9-PAL-NEXT: s_addk_i32 s0, 0x1002012; GFX9-PAL-NEXT: scratch_store_dword v1, v2, off offset:1282013; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2014; GFX9-PAL-NEXT: v_sub_u32_e32 v0, s0, v02015; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc2016; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2017; GFX9-PAL-NEXT: s_endpgm2018;2019; GFX942-LABEL: store_load_vindex_small_offset_kernel:2020; GFX942: ; %bb.0: ; %bb2021; GFX942-NEXT: s_load_dword s0, s[4:5], 0x242022; GFX942-NEXT: scratch_load_dword v1, off, off sc0 sc12023; GFX942-NEXT: s_waitcnt vmcnt(0)2024; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v02025; GFX942-NEXT: v_and_b32_e32 v0, 0xffc, v02026; GFX942-NEXT: v_mov_b32_e32 v1, 152027; GFX942-NEXT: s_waitcnt lgkmcnt(0)2028; GFX942-NEXT: s_lshl_b32 s0, s0, 72029; GFX942-NEXT: s_addk_i32 s0, 0x1002030; GFX942-NEXT: scratch_store_dword v0, v1, off offset:384 sc0 sc12031; GFX942-NEXT: s_waitcnt vmcnt(0)2032; GFX942-NEXT: v_sub_u32_e32 v0, s0, v02033; GFX942-NEXT: scratch_load_dword v0, v0, off offset:124 sc0 sc12034; GFX942-NEXT: s_waitcnt vmcnt(0)2035; GFX942-NEXT: s_endpgm2036;2037; GFX1010-PAL-LABEL: store_load_vindex_small_offset_kernel:2038; GFX1010-PAL: ; %bb.0: ; %bb2039; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]2040; GFX1010-PAL-NEXT: s_mov_b32 s12, s02041; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02042; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)2043; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff2044; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s112045; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 02046; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s122047; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s132048; GFX1010-PAL-NEXT: s_load_dword s0, s[4:5], 0x02049; GFX1010-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v02050; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, 152051; GFX1010-PAL-NEXT: v_add_nc_u32_e32 v1, 0x100, v02052; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)2053; GFX1010-PAL-NEXT: s_lshl_b32 s0, s0, 72054; GFX1010-PAL-NEXT: s_addk_i32 s0, 0x1002055; GFX1010-PAL-NEXT: v_sub_nc_u32_e32 v0, s0, v02056; GFX1010-PAL-NEXT: s_mov_b32 s0, 02057; GFX1010-PAL-NEXT: scratch_load_dword v3, off, s0 glc dlc2058; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)2059; GFX1010-PAL-NEXT: scratch_store_dword v1, v2, off offset:1282060; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x02061; GFX1010-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc2062; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)2063; GFX1010-PAL-NEXT: s_endpgm2064;2065; GFX1030-PAL-LABEL: store_load_vindex_small_offset_kernel:2066; GFX1030-PAL: ; %bb.0: ; %bb2067; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]2068; GFX1030-PAL-NEXT: s_mov_b32 s12, s02069; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02070; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)2071; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff2072; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s112073; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 02074; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s122075; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s132076; GFX1030-PAL-NEXT: s_load_dword s0, s[4:5], 0x02077; GFX1030-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v02078; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, 152079; GFX1030-PAL-NEXT: scratch_load_dword v3, off, off glc dlc2080; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)2081; GFX1030-PAL-NEXT: v_add_nc_u32_e32 v1, 0x100, v02082; GFX1030-PAL-NEXT: scratch_store_dword v1, v2, off offset:1282083; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x02084; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)2085; GFX1030-PAL-NEXT: s_lshl_b32 s0, s0, 72086; GFX1030-PAL-NEXT: s_addk_i32 s0, 0x1002087; GFX1030-PAL-NEXT: v_sub_nc_u32_e32 v0, s0, v02088; GFX1030-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc2089; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)2090; GFX1030-PAL-NEXT: s_endpgm2091;2092; GFX11-PAL-LABEL: store_load_vindex_small_offset_kernel:2093; GFX11-PAL: ; %bb.0: ; %bb2094; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x02095; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v02096; GFX11-PAL-NEXT: scratch_load_b32 v3, off, off glc dlc2097; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2098; GFX11-PAL-NEXT: v_and_b32_e32 v0, 0xffc, v02099; GFX11-PAL-NEXT: scratch_store_b32 v0, v1, off offset:384 dlc2100; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x02101; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)2102; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 72103; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)2104; GFX11-PAL-NEXT: s_addk_i32 s0, 0x1002105; GFX11-PAL-NEXT: v_sub_nc_u32_e32 v2, s0, v02106; GFX11-PAL-NEXT: scratch_load_b32 v0, v2, off offset:124 glc dlc2107; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2108; GFX11-PAL-NEXT: s_endpgm2109;2110; GFX12-PAL-LABEL: store_load_vindex_small_offset_kernel:2111; GFX12-PAL: ; %bb.0: ; %bb2112; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x02113; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v02114; GFX12-PAL-NEXT: scratch_load_b32 v3, off, off scope:SCOPE_SYS2115; GFX12-PAL-NEXT: s_wait_loadcnt 0x02116; GFX12-PAL-NEXT: v_and_b32_e32 v0, 0xffc, v02117; GFX12-PAL-NEXT: s_wait_kmcnt 0x02118; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, off offset:384 scope:SCOPE_SYS2119; GFX12-PAL-NEXT: s_wait_storecnt 0x02120; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 72121; GFX12-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)2122; GFX12-PAL-NEXT: s_addk_co_i32 s0, 0x1002123; GFX12-PAL-NEXT: v_sub_nc_u32_e32 v2, s0, v02124; GFX12-PAL-NEXT: scratch_load_b32 v0, v2, off offset:124 scope:SCOPE_SYS2125; GFX12-PAL-NEXT: s_wait_loadcnt 0x02126; GFX12-PAL-NEXT: s_endpgm2127bb:2128 %padding = alloca [64 x i32], align 4, addrspace(5)2129 %i.alloca = alloca [2 x [32 x float]], align 4, addrspace(5)2130 %i = getelementptr inbounds [2 x [32 x float]], ptr addrspace (5) %i.alloca, i32 0, i32 %n2131 %i.1 = getelementptr inbounds [2 x [32 x float]], ptr addrspace (5) %i.alloca, i32 0, i32 12132 %pad_gep = getelementptr inbounds [64 x i32], ptr addrspace(5) %padding, i32 0, i32 02133 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 42134 %i2 = tail call i32 @llvm.amdgcn.workitem.id.x()2135 %i3 = zext i32 %i2 to i642136 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i.1, i32 0, i32 %i22137 store volatile i32 15, ptr addrspace(5) %i7, align 42138 %i9 = sub nsw i32 0, %i22139 %i9.1 = getelementptr [32 x float], ptr addrspace(5) %i, i32 0, i32 %i92140 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i9.1, i32 0, i32 312141 %i12 = load volatile i32, ptr addrspace(5) %i10, align 42142 ret void2143}2144 2145define void @store_load_vindex_small_offset_foo(i32 %idx) {2146; GFX9-LABEL: store_load_vindex_small_offset_foo:2147; GFX9: ; %bb.0: ; %bb2148; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2149; GFX9-NEXT: s_add_i32 s1, s32, 0x1002150; GFX9-NEXT: scratch_load_dword v1, off, s32 glc2151; GFX9-NEXT: s_waitcnt vmcnt(0)2152; GFX9-NEXT: s_mov_b32 s0, s12153; GFX9-NEXT: v_lshl_add_u32 v1, v0, 2, s02154; GFX9-NEXT: v_mov_b32_e32 v2, 152155; GFX9-NEXT: v_and_b32_e32 v0, 15, v02156; GFX9-NEXT: scratch_store_dword v1, v2, off2157; GFX9-NEXT: s_waitcnt vmcnt(0)2158; GFX9-NEXT: v_lshl_add_u32 v0, v0, 2, s02159; GFX9-NEXT: scratch_load_dword v0, v0, off glc2160; GFX9-NEXT: s_waitcnt vmcnt(0)2161; GFX9-NEXT: s_setpc_b64 s[30:31]2162;2163; GFX10-LABEL: store_load_vindex_small_offset_foo:2164; GFX10: ; %bb.0: ; %bb2165; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2166; GFX10-NEXT: v_and_b32_e32 v1, 15, v02167; GFX10-NEXT: s_add_i32 s0, s32, 0x1002168; GFX10-NEXT: v_mov_b32_e32 v2, 152169; GFX10-NEXT: v_lshl_add_u32 v0, v0, 2, s02170; GFX10-NEXT: s_add_i32 s0, s32, 0x1002171; GFX10-NEXT: scratch_load_dword v3, off, s32 glc dlc2172; GFX10-NEXT: s_waitcnt vmcnt(0)2173; GFX10-NEXT: v_lshl_add_u32 v1, v1, 2, s02174; GFX10-NEXT: scratch_store_dword v0, v2, off2175; GFX10-NEXT: s_waitcnt_vscnt null, 0x02176; GFX10-NEXT: scratch_load_dword v0, v1, off glc dlc2177; GFX10-NEXT: s_waitcnt vmcnt(0)2178; GFX10-NEXT: s_setpc_b64 s[30:31]2179;2180; GFX11-LABEL: store_load_vindex_small_offset_foo:2181; GFX11: ; %bb.0: ; %bb2182; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2183; GFX11-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v02184; GFX11-NEXT: s_add_i32 s0, s32, 0x1002185; GFX11-NEXT: scratch_load_b32 v3, off, s32 glc dlc2186; GFX11-NEXT: s_waitcnt vmcnt(0)2187; GFX11-NEXT: v_lshl_add_u32 v0, v0, 2, s02188; GFX11-NEXT: v_lshlrev_b32_e32 v1, 2, v12189; GFX11-NEXT: scratch_store_b32 v0, v2, off dlc2190; GFX11-NEXT: s_waitcnt_vscnt null, 0x02191; GFX11-NEXT: scratch_load_b32 v0, v1, s32 offset:256 glc dlc2192; GFX11-NEXT: s_waitcnt vmcnt(0)2193; GFX11-NEXT: s_setpc_b64 s[30:31]2194;2195; GFX12-LABEL: store_load_vindex_small_offset_foo:2196; GFX12: ; %bb.0: ; %bb2197; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02198; GFX12-NEXT: s_wait_expcnt 0x02199; GFX12-NEXT: s_wait_samplecnt 0x02200; GFX12-NEXT: s_wait_bvhcnt 0x02201; GFX12-NEXT: s_wait_kmcnt 0x02202; GFX12-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v02203; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v02204; GFX12-NEXT: scratch_load_b32 v3, off, s32 scope:SCOPE_SYS2205; GFX12-NEXT: s_wait_loadcnt 0x02206; GFX12-NEXT: v_lshlrev_b32_e32 v1, 2, v12207; GFX12-NEXT: s_wait_storecnt 0x02208; GFX12-NEXT: scratch_store_b32 v0, v2, s32 offset:256 scope:SCOPE_SYS2209; GFX12-NEXT: s_wait_storecnt 0x02210; GFX12-NEXT: scratch_load_b32 v0, v1, s32 offset:256 scope:SCOPE_SYS2211; GFX12-NEXT: s_wait_loadcnt 0x02212; GFX12-NEXT: s_setpc_b64 s[30:31]2213;2214; GFX9-PAL-LABEL: store_load_vindex_small_offset_foo:2215; GFX9-PAL: ; %bb.0: ; %bb2216; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2217; GFX9-PAL-NEXT: s_add_i32 s1, s32, 0x1002218; GFX9-PAL-NEXT: scratch_load_dword v1, off, s32 glc2219; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2220; GFX9-PAL-NEXT: s_mov_b32 s0, s12221; GFX9-PAL-NEXT: v_lshl_add_u32 v1, v0, 2, s02222; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 152223; GFX9-PAL-NEXT: v_and_b32_e32 v0, 15, v02224; GFX9-PAL-NEXT: scratch_store_dword v1, v2, off2225; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2226; GFX9-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s02227; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off glc2228; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2229; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]2230;2231; GFX942-LABEL: store_load_vindex_small_offset_foo:2232; GFX942: ; %bb.0: ; %bb2233; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2234; GFX942-NEXT: s_add_i32 s1, s32, 0x1002235; GFX942-NEXT: scratch_load_dword v1, off, s32 sc0 sc12236; GFX942-NEXT: s_waitcnt vmcnt(0)2237; GFX942-NEXT: s_mov_b32 s0, s12238; GFX942-NEXT: v_lshl_add_u32 v1, v0, 2, s02239; GFX942-NEXT: v_mov_b32_e32 v2, 152240; GFX942-NEXT: v_and_b32_e32 v0, 15, v02241; GFX942-NEXT: scratch_store_dword v1, v2, off sc0 sc12242; GFX942-NEXT: s_waitcnt vmcnt(0)2243; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v02244; GFX942-NEXT: scratch_load_dword v0, v0, s32 offset:256 sc0 sc12245; GFX942-NEXT: s_waitcnt vmcnt(0)2246; GFX942-NEXT: s_setpc_b64 s[30:31]2247;2248; GFX10-PAL-LABEL: store_load_vindex_small_offset_foo:2249; GFX10-PAL: ; %bb.0: ; %bb2250; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2251; GFX10-PAL-NEXT: v_and_b32_e32 v1, 15, v02252; GFX10-PAL-NEXT: s_add_i32 s0, s32, 0x1002253; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 152254; GFX10-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s02255; GFX10-PAL-NEXT: s_add_i32 s0, s32, 0x1002256; GFX10-PAL-NEXT: scratch_load_dword v3, off, s32 glc dlc2257; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)2258; GFX10-PAL-NEXT: v_lshl_add_u32 v1, v1, 2, s02259; GFX10-PAL-NEXT: scratch_store_dword v0, v2, off2260; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x02261; GFX10-PAL-NEXT: scratch_load_dword v0, v1, off glc dlc2262; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)2263; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]2264;2265; GFX11-PAL-LABEL: store_load_vindex_small_offset_foo:2266; GFX11-PAL: ; %bb.0: ; %bb2267; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2268; GFX11-PAL-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v02269; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x1002270; GFX11-PAL-NEXT: scratch_load_b32 v3, off, s32 glc dlc2271; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2272; GFX11-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s02273; GFX11-PAL-NEXT: v_lshlrev_b32_e32 v1, 2, v12274; GFX11-PAL-NEXT: scratch_store_b32 v0, v2, off dlc2275; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x02276; GFX11-PAL-NEXT: scratch_load_b32 v0, v1, s32 offset:256 glc dlc2277; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2278; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]2279;2280; GFX12-PAL-LABEL: store_load_vindex_small_offset_foo:2281; GFX12-PAL: ; %bb.0: ; %bb2282; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x02283; GFX12-PAL-NEXT: s_wait_expcnt 0x02284; GFX12-PAL-NEXT: s_wait_samplecnt 0x02285; GFX12-PAL-NEXT: s_wait_bvhcnt 0x02286; GFX12-PAL-NEXT: s_wait_kmcnt 0x02287; GFX12-PAL-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v02288; GFX12-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v02289; GFX12-PAL-NEXT: scratch_load_b32 v3, off, s32 scope:SCOPE_SYS2290; GFX12-PAL-NEXT: s_wait_loadcnt 0x02291; GFX12-PAL-NEXT: v_lshlrev_b32_e32 v1, 2, v12292; GFX12-PAL-NEXT: s_wait_storecnt 0x02293; GFX12-PAL-NEXT: scratch_store_b32 v0, v2, s32 offset:256 scope:SCOPE_SYS2294; GFX12-PAL-NEXT: s_wait_storecnt 0x02295; GFX12-PAL-NEXT: scratch_load_b32 v0, v1, s32 offset:256 scope:SCOPE_SYS2296; GFX12-PAL-NEXT: s_wait_loadcnt 0x02297; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]2298bb:2299 %padding = alloca [64 x i32], align 4, addrspace(5)2300 %i = alloca [32 x float], align 4, addrspace(5)2301 %pad_gep = getelementptr inbounds [64 x i32], ptr addrspace(5) %padding, i32 0, i32 02302 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 42303 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx2304 store volatile i32 15, ptr addrspace(5) %i7, align 42305 %i9 = and i32 %idx, 152306 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i92307 %i12 = load volatile i32, ptr addrspace(5) %i10, align 42308 ret void2309}2310 2311define amdgpu_kernel void @zero_init_large_offset_kernel() {2312; GFX9-LABEL: zero_init_large_offset_kernel:2313; GFX9: ; %bb.0:2314; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s132315; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 02316; GFX9-NEXT: s_mov_b32 s0, 02317; GFX9-NEXT: scratch_load_dword v0, off, s0 offset:4 glc2318; GFX9-NEXT: s_waitcnt vmcnt(0)2319; GFX9-NEXT: s_mov_b32 s1, s02320; GFX9-NEXT: s_mov_b32 s2, s02321; GFX9-NEXT: s_mov_b32 s3, s02322; GFX9-NEXT: v_mov_b32_e32 v0, s02323; GFX9-NEXT: v_mov_b32_e32 v1, s12324; GFX9-NEXT: v_mov_b32_e32 v2, s22325; GFX9-NEXT: v_mov_b32_e32 v3, s32326; GFX9-NEXT: s_movk_i32 s0, 0x40042327; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s02328; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162329; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322330; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482331; GFX9-NEXT: s_endpgm2332;2333; GFX10-LABEL: zero_init_large_offset_kernel:2334; GFX10: ; %bb.0:2335; GFX10-NEXT: s_add_u32 s8, s8, s132336; GFX10-NEXT: s_addc_u32 s9, s9, 02337; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s82338; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s92339; GFX10-NEXT: scratch_load_dword v0, off, off offset:4 glc dlc2340; GFX10-NEXT: s_waitcnt vmcnt(0)2341; GFX10-NEXT: s_mov_b32 s0, 02342; GFX10-NEXT: s_mov_b32 s1, s02343; GFX10-NEXT: s_mov_b32 s2, s02344; GFX10-NEXT: s_mov_b32 s3, s02345; GFX10-NEXT: v_mov_b32_e32 v0, s02346; GFX10-NEXT: v_mov_b32_e32 v1, s12347; GFX10-NEXT: v_mov_b32_e32 v2, s22348; GFX10-NEXT: v_mov_b32_e32 v3, s32349; GFX10-NEXT: s_movk_i32 s0, 0x40042350; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s02351; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162352; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322353; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482354; GFX10-NEXT: s_endpgm2355;2356; GFX11-LABEL: zero_init_large_offset_kernel:2357; GFX11: ; %bb.0:2358; GFX11-NEXT: scratch_load_b32 v0, off, off offset:4 glc dlc2359; GFX11-NEXT: s_waitcnt vmcnt(0)2360; GFX11-NEXT: s_mov_b32 s0, 02361; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2362; GFX11-NEXT: s_mov_b32 s1, s02363; GFX11-NEXT: s_mov_b32 s2, s02364; GFX11-NEXT: s_mov_b32 s3, s02365; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12366; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32367; GFX11-NEXT: s_movk_i32 s0, 0x40042368; GFX11-NEXT: s_clause 0x32369; GFX11-NEXT: scratch_store_b128 off, v[0:3], s02370; GFX11-NEXT: scratch_store_b128 off, v[0:3], s0 offset:162371; GFX11-NEXT: scratch_store_b128 off, v[0:3], s0 offset:322372; GFX11-NEXT: scratch_store_b128 off, v[0:3], s0 offset:482373; GFX11-NEXT: s_endpgm2374;2375; GFX12-LABEL: zero_init_large_offset_kernel:2376; GFX12: ; %bb.0:2377; GFX12-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS2378; GFX12-NEXT: s_wait_loadcnt 0x02379; GFX12-NEXT: s_mov_b32 s0, 02380; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2381; GFX12-NEXT: s_mov_b32 s1, s02382; GFX12-NEXT: s_mov_b32 s2, s02383; GFX12-NEXT: s_mov_b32 s3, s02384; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12385; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32386; GFX12-NEXT: s_clause 0x32387; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:163842388; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:164002389; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:164162390; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:164322391; GFX12-NEXT: s_endpgm2392;2393; GFX9-PAL-LABEL: zero_init_large_offset_kernel:2394; GFX9-PAL: ; %bb.0:2395; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]2396; GFX9-PAL-NEXT: s_mov_b32 s12, s02397; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02398; GFX9-PAL-NEXT: s_mov_b32 s0, 02399; GFX9-PAL-NEXT: s_mov_b32 s1, s02400; GFX9-PAL-NEXT: s_mov_b32 s2, s02401; GFX9-PAL-NEXT: s_mov_b32 s3, s02402; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)2403; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff2404; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s112405; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 02406; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 offset:4 glc2407; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2408; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s02409; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s12410; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s22411; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s32412; GFX9-PAL-NEXT: s_movk_i32 s0, 0x40042413; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s02414; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162415; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322416; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482417; GFX9-PAL-NEXT: s_endpgm2418;2419; GFX942-LABEL: zero_init_large_offset_kernel:2420; GFX942: ; %bb.0:2421; GFX942-NEXT: scratch_load_dword v0, off, off offset:4 sc0 sc12422; GFX942-NEXT: s_waitcnt vmcnt(0)2423; GFX942-NEXT: s_mov_b32 s0, 02424; GFX942-NEXT: s_mov_b32 s1, s02425; GFX942-NEXT: s_mov_b32 s2, s02426; GFX942-NEXT: s_mov_b32 s3, s02427; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]2428; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2429; GFX942-NEXT: s_movk_i32 s0, 0x40042430; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s02431; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162432; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322433; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482434; GFX942-NEXT: s_endpgm2435;2436; GFX1010-PAL-LABEL: zero_init_large_offset_kernel:2437; GFX1010-PAL: ; %bb.0:2438; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]2439; GFX1010-PAL-NEXT: s_mov_b32 s12, s02440; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02441; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)2442; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff2443; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s112444; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 02445; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s122446; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s132447; GFX1010-PAL-NEXT: s_mov_b32 s0, 02448; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s0 offset:4 glc dlc2449; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)2450; GFX1010-PAL-NEXT: s_mov_b32 s1, s02451; GFX1010-PAL-NEXT: s_mov_b32 s2, s02452; GFX1010-PAL-NEXT: s_mov_b32 s3, s02453; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, s02454; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, s12455; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, s22456; GFX1010-PAL-NEXT: v_mov_b32_e32 v3, s32457; GFX1010-PAL-NEXT: s_movk_i32 s0, 0x40042458; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s02459; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162460; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322461; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482462; GFX1010-PAL-NEXT: s_endpgm2463;2464; GFX1030-PAL-LABEL: zero_init_large_offset_kernel:2465; GFX1030-PAL: ; %bb.0:2466; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]2467; GFX1030-PAL-NEXT: s_mov_b32 s12, s02468; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02469; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)2470; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff2471; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s112472; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 02473; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s122474; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s132475; GFX1030-PAL-NEXT: scratch_load_dword v0, off, off offset:4 glc dlc2476; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)2477; GFX1030-PAL-NEXT: s_mov_b32 s0, 02478; GFX1030-PAL-NEXT: s_mov_b32 s1, s02479; GFX1030-PAL-NEXT: s_mov_b32 s2, s02480; GFX1030-PAL-NEXT: s_mov_b32 s3, s02481; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, s02482; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, s12483; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, s22484; GFX1030-PAL-NEXT: v_mov_b32_e32 v3, s32485; GFX1030-PAL-NEXT: s_movk_i32 s0, 0x40042486; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s02487; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162488; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322489; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482490; GFX1030-PAL-NEXT: s_endpgm2491;2492; GFX11-PAL-LABEL: zero_init_large_offset_kernel:2493; GFX11-PAL: ; %bb.0:2494; GFX11-PAL-NEXT: scratch_load_b32 v0, off, off offset:4 glc dlc2495; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2496; GFX11-PAL-NEXT: s_mov_b32 s0, 02497; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2498; GFX11-PAL-NEXT: s_mov_b32 s1, s02499; GFX11-PAL-NEXT: s_mov_b32 s2, s02500; GFX11-PAL-NEXT: s_mov_b32 s3, s02501; GFX11-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12502; GFX11-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32503; GFX11-PAL-NEXT: s_movk_i32 s0, 0x40042504; GFX11-PAL-NEXT: s_clause 0x32505; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s02506; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s0 offset:162507; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s0 offset:322508; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s0 offset:482509; GFX11-PAL-NEXT: s_endpgm2510;2511; GFX12-PAL-LABEL: zero_init_large_offset_kernel:2512; GFX12-PAL: ; %bb.0:2513; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS2514; GFX12-PAL-NEXT: s_wait_loadcnt 0x02515; GFX12-PAL-NEXT: s_mov_b32 s0, 02516; GFX12-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2517; GFX12-PAL-NEXT: s_mov_b32 s1, s02518; GFX12-PAL-NEXT: s_mov_b32 s2, s02519; GFX12-PAL-NEXT: s_mov_b32 s3, s02520; GFX12-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12521; GFX12-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32522; GFX12-PAL-NEXT: s_clause 0x32523; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:163842524; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:164002525; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:164162526; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:164322527; GFX12-PAL-NEXT: s_endpgm2528 %padding = alloca [4096 x i32], align 4, addrspace(5)2529 %alloca = alloca [32 x i16], align 2, addrspace(5)2530 %pad_gep = getelementptr inbounds [4096 x i32], ptr addrspace(5) %padding, i32 0, i32 02531 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 42532 call void @llvm.memset.p5.i64(ptr addrspace(5) align 2 dereferenceable(64) %alloca, i8 0, i64 64, i1 false)2533 ret void2534}2535 2536define void @zero_init_large_offset_foo() {2537; GFX9-LABEL: zero_init_large_offset_foo:2538; GFX9: ; %bb.0:2539; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2540; GFX9-NEXT: scratch_load_dword v0, off, s32 offset:4 glc2541; GFX9-NEXT: s_waitcnt vmcnt(0)2542; GFX9-NEXT: s_mov_b32 s0, 02543; GFX9-NEXT: s_mov_b32 s1, s02544; GFX9-NEXT: s_mov_b32 s2, s02545; GFX9-NEXT: s_mov_b32 s3, s02546; GFX9-NEXT: v_mov_b32_e32 v0, s02547; GFX9-NEXT: v_mov_b32_e32 v1, s12548; GFX9-NEXT: v_mov_b32_e32 v2, s22549; GFX9-NEXT: v_mov_b32_e32 v3, s32550; GFX9-NEXT: s_add_i32 s0, s32, 0x40042551; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s02552; GFX9-NEXT: s_add_i32 s0, s32, 0x40042553; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162554; GFX9-NEXT: s_add_i32 s0, s32, 0x40042555; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322556; GFX9-NEXT: s_add_i32 s0, s32, 0x40042557; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482558; GFX9-NEXT: s_waitcnt vmcnt(0)2559; GFX9-NEXT: s_setpc_b64 s[30:31]2560;2561; GFX10-LABEL: zero_init_large_offset_foo:2562; GFX10: ; %bb.0:2563; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2564; GFX10-NEXT: scratch_load_dword v0, off, s32 offset:4 glc dlc2565; GFX10-NEXT: s_waitcnt vmcnt(0)2566; GFX10-NEXT: s_mov_b32 s0, 02567; GFX10-NEXT: s_mov_b32 s1, s02568; GFX10-NEXT: s_mov_b32 s2, s02569; GFX10-NEXT: s_mov_b32 s3, s02570; GFX10-NEXT: v_mov_b32_e32 v0, s02571; GFX10-NEXT: v_mov_b32_e32 v1, s12572; GFX10-NEXT: v_mov_b32_e32 v2, s22573; GFX10-NEXT: v_mov_b32_e32 v3, s32574; GFX10-NEXT: s_add_i32 s0, s32, 0x40042575; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s02576; GFX10-NEXT: s_add_i32 s0, s32, 0x40042577; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162578; GFX10-NEXT: s_add_i32 s0, s32, 0x40042579; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322580; GFX10-NEXT: s_add_i32 s0, s32, 0x40042581; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482582; GFX10-NEXT: s_setpc_b64 s[30:31]2583;2584; GFX11-LABEL: zero_init_large_offset_foo:2585; GFX11: ; %bb.0:2586; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2587; GFX11-NEXT: scratch_load_b32 v0, off, s32 offset:4 glc dlc2588; GFX11-NEXT: s_waitcnt vmcnt(0)2589; GFX11-NEXT: s_mov_b32 s0, 02590; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2591; GFX11-NEXT: s_mov_b32 s1, s02592; GFX11-NEXT: s_mov_b32 s2, s02593; GFX11-NEXT: s_mov_b32 s3, s02594; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12595; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32596; GFX11-NEXT: s_add_i32 s0, s32, 0x40042597; GFX11-NEXT: scratch_store_b128 off, v[0:3], s02598; GFX11-NEXT: s_add_i32 s0, s32, 0x40042599; GFX11-NEXT: scratch_store_b128 off, v[0:3], s0 offset:162600; GFX11-NEXT: s_add_i32 s0, s32, 0x40042601; GFX11-NEXT: scratch_store_b128 off, v[0:3], s0 offset:322602; GFX11-NEXT: s_add_i32 s0, s32, 0x40042603; GFX11-NEXT: scratch_store_b128 off, v[0:3], s0 offset:482604; GFX11-NEXT: s_setpc_b64 s[30:31]2605;2606; GFX12-LABEL: zero_init_large_offset_foo:2607; GFX12: ; %bb.0:2608; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02609; GFX12-NEXT: s_wait_expcnt 0x02610; GFX12-NEXT: s_wait_samplecnt 0x02611; GFX12-NEXT: s_wait_bvhcnt 0x02612; GFX12-NEXT: s_wait_kmcnt 0x02613; GFX12-NEXT: scratch_load_b32 v0, off, s32 scope:SCOPE_SYS2614; GFX12-NEXT: s_wait_loadcnt 0x02615; GFX12-NEXT: s_mov_b32 s0, 02616; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)2617; GFX12-NEXT: s_mov_b32 s1, s02618; GFX12-NEXT: s_mov_b32 s2, s02619; GFX12-NEXT: s_mov_b32 s3, s02620; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)2621; GFX12-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12622; GFX12-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32623; GFX12-NEXT: s_clause 0x32624; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:163842625; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:164002626; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:164162627; GFX12-NEXT: scratch_store_b128 off, v[0:3], s32 offset:164322628; GFX12-NEXT: s_setpc_b64 s[30:31]2629;2630; GFX9-PAL-LABEL: zero_init_large_offset_foo:2631; GFX9-PAL: ; %bb.0:2632; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2633; GFX9-PAL-NEXT: scratch_load_dword v0, off, s32 offset:4 glc2634; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2635; GFX9-PAL-NEXT: s_mov_b32 s0, 02636; GFX9-PAL-NEXT: s_mov_b32 s1, s02637; GFX9-PAL-NEXT: s_mov_b32 s2, s02638; GFX9-PAL-NEXT: s_mov_b32 s3, s02639; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s02640; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s12641; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s22642; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s32643; GFX9-PAL-NEXT: s_add_i32 s0, s32, 0x40042644; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s02645; GFX9-PAL-NEXT: s_add_i32 s0, s32, 0x40042646; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162647; GFX9-PAL-NEXT: s_add_i32 s0, s32, 0x40042648; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322649; GFX9-PAL-NEXT: s_add_i32 s0, s32, 0x40042650; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482651; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2652; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]2653;2654; GFX942-LABEL: zero_init_large_offset_foo:2655; GFX942: ; %bb.0:2656; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2657; GFX942-NEXT: scratch_load_dword v0, off, s32 offset:4 sc0 sc12658; GFX942-NEXT: s_waitcnt vmcnt(0)2659; GFX942-NEXT: s_mov_b32 s0, 02660; GFX942-NEXT: s_mov_b32 s1, s02661; GFX942-NEXT: s_mov_b32 s2, s02662; GFX942-NEXT: s_mov_b32 s3, s02663; GFX942-NEXT: v_mov_b64_e32 v[0:1], s[0:1]2664; GFX942-NEXT: v_mov_b64_e32 v[2:3], s[2:3]2665; GFX942-NEXT: s_add_i32 s0, s32, 0x40042666; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s02667; GFX942-NEXT: s_add_i32 s0, s32, 0x40042668; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162669; GFX942-NEXT: s_add_i32 s0, s32, 0x40042670; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322671; GFX942-NEXT: s_add_i32 s0, s32, 0x40042672; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482673; GFX942-NEXT: s_waitcnt vmcnt(0)2674; GFX942-NEXT: s_setpc_b64 s[30:31]2675;2676; GFX1010-PAL-LABEL: zero_init_large_offset_foo:2677; GFX1010-PAL: ; %bb.0:2678; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2679; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s32 offset:4 glc dlc2680; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)2681; GFX1010-PAL-NEXT: s_mov_b32 s0, 02682; GFX1010-PAL-NEXT: s_mov_b32 s1, s02683; GFX1010-PAL-NEXT: s_mov_b32 s2, s02684; GFX1010-PAL-NEXT: s_mov_b32 s3, s02685; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, s02686; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, s12687; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, s22688; GFX1010-PAL-NEXT: v_mov_b32_e32 v3, s32689; GFX1010-PAL-NEXT: s_add_i32 s0, s32, 0x40042690; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s02691; GFX1010-PAL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)2692; GFX1010-PAL-NEXT: s_add_i32 s0, s32, 0x40042693; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162694; GFX1010-PAL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)2695; GFX1010-PAL-NEXT: s_add_i32 s0, s32, 0x40042696; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322697; GFX1010-PAL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)2698; GFX1010-PAL-NEXT: s_add_i32 s0, s32, 0x40042699; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482700; GFX1010-PAL-NEXT: s_setpc_b64 s[30:31]2701;2702; GFX1030-PAL-LABEL: zero_init_large_offset_foo:2703; GFX1030-PAL: ; %bb.0:2704; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2705; GFX1030-PAL-NEXT: scratch_load_dword v0, off, s32 offset:4 glc dlc2706; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)2707; GFX1030-PAL-NEXT: s_mov_b32 s0, 02708; GFX1030-PAL-NEXT: s_mov_b32 s1, s02709; GFX1030-PAL-NEXT: s_mov_b32 s2, s02710; GFX1030-PAL-NEXT: s_mov_b32 s3, s02711; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, s02712; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, s12713; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, s22714; GFX1030-PAL-NEXT: v_mov_b32_e32 v3, s32715; GFX1030-PAL-NEXT: s_add_i32 s0, s32, 0x40042716; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s02717; GFX1030-PAL-NEXT: s_add_i32 s0, s32, 0x40042718; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:162719; GFX1030-PAL-NEXT: s_add_i32 s0, s32, 0x40042720; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:322721; GFX1030-PAL-NEXT: s_add_i32 s0, s32, 0x40042722; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:482723; GFX1030-PAL-NEXT: s_setpc_b64 s[30:31]2724;2725; GFX11-PAL-LABEL: zero_init_large_offset_foo:2726; GFX11-PAL: ; %bb.0:2727; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2728; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s32 offset:4 glc dlc2729; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2730; GFX11-PAL-NEXT: s_mov_b32 s0, 02731; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)2732; GFX11-PAL-NEXT: s_mov_b32 s1, s02733; GFX11-PAL-NEXT: s_mov_b32 s2, s02734; GFX11-PAL-NEXT: s_mov_b32 s3, s02735; GFX11-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12736; GFX11-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32737; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x40042738; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s02739; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x40042740; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s0 offset:162741; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x40042742; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s0 offset:322743; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x40042744; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], s0 offset:482745; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]2746;2747; GFX12-PAL-LABEL: zero_init_large_offset_foo:2748; GFX12-PAL: ; %bb.0:2749; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x02750; GFX12-PAL-NEXT: s_wait_expcnt 0x02751; GFX12-PAL-NEXT: s_wait_samplecnt 0x02752; GFX12-PAL-NEXT: s_wait_bvhcnt 0x02753; GFX12-PAL-NEXT: s_wait_kmcnt 0x02754; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s32 scope:SCOPE_SYS2755; GFX12-PAL-NEXT: s_wait_loadcnt 0x02756; GFX12-PAL-NEXT: s_mov_b32 s0, 02757; GFX12-PAL-NEXT: s_wait_alu depctr_sa_sdst(0)2758; GFX12-PAL-NEXT: s_mov_b32 s1, s02759; GFX12-PAL-NEXT: s_mov_b32 s2, s02760; GFX12-PAL-NEXT: s_mov_b32 s3, s02761; GFX12-PAL-NEXT: s_wait_alu depctr_sa_sdst(0)2762; GFX12-PAL-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s12763; GFX12-PAL-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s32764; GFX12-PAL-NEXT: s_clause 0x32765; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:163842766; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:164002767; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:164162768; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], s32 offset:164322769; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]2770 %padding = alloca [4096 x i32], align 4, addrspace(5)2771 %alloca = alloca [32 x i16], align 2, addrspace(5)2772 %pad_gep = getelementptr inbounds [4096 x i32], ptr addrspace(5) %padding, i32 0, i32 02773 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 42774 call void @llvm.memset.p5.i64(ptr addrspace(5) align 2 dereferenceable(64) %alloca, i8 0, i64 64, i1 false)2775 ret void2776}2777 2778define amdgpu_kernel void @store_load_sindex_large_offset_kernel(i32 %idx) {2779; GFX9-LABEL: store_load_sindex_large_offset_kernel:2780; GFX9: ; %bb.0: ; %bb2781; GFX9-NEXT: s_load_dword s0, s[4:5], 0x242782; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s132783; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 02784; GFX9-NEXT: s_mov_b32 s1, 02785; GFX9-NEXT: scratch_load_dword v0, off, s1 offset:4 glc2786; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)2787; GFX9-NEXT: s_lshl_b32 s1, s0, 22788; GFX9-NEXT: s_and_b32 s0, s0, 152789; GFX9-NEXT: v_mov_b32_e32 v0, 152790; GFX9-NEXT: s_addk_i32 s1, 0x40042791; GFX9-NEXT: s_lshl_b32 s0, s0, 22792; GFX9-NEXT: scratch_store_dword off, v0, s12793; GFX9-NEXT: s_waitcnt vmcnt(0)2794; GFX9-NEXT: s_addk_i32 s0, 0x40042795; GFX9-NEXT: scratch_load_dword v0, off, s0 glc2796; GFX9-NEXT: s_waitcnt vmcnt(0)2797; GFX9-NEXT: s_endpgm2798;2799; GFX10-LABEL: store_load_sindex_large_offset_kernel:2800; GFX10: ; %bb.0: ; %bb2801; GFX10-NEXT: s_add_u32 s8, s8, s132802; GFX10-NEXT: s_addc_u32 s9, s9, 02803; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s82804; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s92805; GFX10-NEXT: s_load_dword s0, s[4:5], 0x242806; GFX10-NEXT: scratch_load_dword v0, off, off offset:4 glc dlc2807; GFX10-NEXT: s_waitcnt vmcnt(0)2808; GFX10-NEXT: v_mov_b32_e32 v0, 152809; GFX10-NEXT: s_waitcnt lgkmcnt(0)2810; GFX10-NEXT: s_and_b32 s1, s0, 152811; GFX10-NEXT: s_lshl_b32 s0, s0, 22812; GFX10-NEXT: s_lshl_b32 s1, s1, 22813; GFX10-NEXT: s_addk_i32 s0, 0x40042814; GFX10-NEXT: s_addk_i32 s1, 0x40042815; GFX10-NEXT: scratch_store_dword off, v0, s02816; GFX10-NEXT: s_waitcnt_vscnt null, 0x02817; GFX10-NEXT: scratch_load_dword v0, off, s1 glc dlc2818; GFX10-NEXT: s_waitcnt vmcnt(0)2819; GFX10-NEXT: s_endpgm2820;2821; GFX11-LABEL: store_load_sindex_large_offset_kernel:2822; GFX11: ; %bb.0: ; %bb2823; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x242824; GFX11-NEXT: scratch_load_b32 v0, off, off offset:4 glc dlc2825; GFX11-NEXT: s_waitcnt vmcnt(0)2826; GFX11-NEXT: v_mov_b32_e32 v0, 152827; GFX11-NEXT: s_waitcnt lgkmcnt(0)2828; GFX11-NEXT: s_and_b32 s1, s0, 152829; GFX11-NEXT: s_lshl_b32 s0, s0, 22830; GFX11-NEXT: s_lshl_b32 s1, s1, 22831; GFX11-NEXT: s_addk_i32 s0, 0x40042832; GFX11-NEXT: s_addk_i32 s1, 0x40042833; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc2834; GFX11-NEXT: s_waitcnt_vscnt null, 0x02835; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc2836; GFX11-NEXT: s_waitcnt vmcnt(0)2837; GFX11-NEXT: s_endpgm2838;2839; GFX12-LABEL: store_load_sindex_large_offset_kernel:2840; GFX12: ; %bb.0: ; %bb2841; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x242842; GFX12-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS2843; GFX12-NEXT: s_wait_loadcnt 0x02844; GFX12-NEXT: v_mov_b32_e32 v0, 152845; GFX12-NEXT: s_wait_kmcnt 0x02846; GFX12-NEXT: s_and_b32 s1, s0, 152847; GFX12-NEXT: s_lshl_b32 s0, s0, 22848; GFX12-NEXT: s_lshl_b32 s1, s1, 22849; GFX12-NEXT: s_addk_co_i32 s0, 0x40002850; GFX12-NEXT: s_addk_co_i32 s1, 0x40002851; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS2852; GFX12-NEXT: s_wait_storecnt 0x02853; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS2854; GFX12-NEXT: s_wait_loadcnt 0x02855; GFX12-NEXT: s_endpgm2856;2857; GFX9-PAL-LABEL: store_load_sindex_large_offset_kernel:2858; GFX9-PAL: ; %bb.0: ; %bb2859; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]2860; GFX9-PAL-NEXT: s_mov_b32 s12, s02861; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02862; GFX9-PAL-NEXT: s_mov_b32 s1, 02863; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x02864; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)2865; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff2866; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s112867; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 02868; GFX9-PAL-NEXT: scratch_load_dword v0, off, s1 offset:4 glc2869; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2870; GFX9-PAL-NEXT: s_lshl_b32 s1, s0, 22871; GFX9-PAL-NEXT: s_and_b32 s0, s0, 152872; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 152873; GFX9-PAL-NEXT: s_addk_i32 s1, 0x40042874; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 22875; GFX9-PAL-NEXT: scratch_store_dword off, v0, s12876; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2877; GFX9-PAL-NEXT: s_addk_i32 s0, 0x40042878; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc2879; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)2880; GFX9-PAL-NEXT: s_endpgm2881;2882; GFX942-LABEL: store_load_sindex_large_offset_kernel:2883; GFX942: ; %bb.0: ; %bb2884; GFX942-NEXT: s_load_dword s0, s[4:5], 0x242885; GFX942-NEXT: scratch_load_dword v0, off, off offset:4 sc0 sc12886; GFX942-NEXT: s_waitcnt vmcnt(0)2887; GFX942-NEXT: v_mov_b32_e32 v0, 152888; GFX942-NEXT: s_waitcnt lgkmcnt(0)2889; GFX942-NEXT: s_lshl_b32 s1, s0, 22890; GFX942-NEXT: s_and_b32 s0, s0, 152891; GFX942-NEXT: s_addk_i32 s1, 0x40042892; GFX942-NEXT: s_lshl_b32 s0, s0, 22893; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc12894; GFX942-NEXT: s_waitcnt vmcnt(0)2895; GFX942-NEXT: s_addk_i32 s0, 0x40042896; GFX942-NEXT: scratch_load_dword v0, off, s0 sc0 sc12897; GFX942-NEXT: s_waitcnt vmcnt(0)2898; GFX942-NEXT: s_endpgm2899;2900; GFX1010-PAL-LABEL: store_load_sindex_large_offset_kernel:2901; GFX1010-PAL: ; %bb.0: ; %bb2902; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]2903; GFX1010-PAL-NEXT: s_mov_b32 s12, s02904; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02905; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)2906; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff2907; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s112908; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 02909; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s122910; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s132911; GFX1010-PAL-NEXT: s_load_dword s0, s[4:5], 0x02912; GFX1010-PAL-NEXT: s_mov_b32 s1, 02913; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 offset:4 glc dlc2914; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)2915; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, 152916; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)2917; GFX1010-PAL-NEXT: s_and_b32 s1, s0, 152918; GFX1010-PAL-NEXT: s_lshl_b32 s0, s0, 22919; GFX1010-PAL-NEXT: s_lshl_b32 s1, s1, 22920; GFX1010-PAL-NEXT: s_addk_i32 s0, 0x40042921; GFX1010-PAL-NEXT: s_addk_i32 s1, 0x40042922; GFX1010-PAL-NEXT: scratch_store_dword off, v0, s02923; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x02924; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc2925; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)2926; GFX1010-PAL-NEXT: s_endpgm2927;2928; GFX1030-PAL-LABEL: store_load_sindex_large_offset_kernel:2929; GFX1030-PAL: ; %bb.0: ; %bb2930; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]2931; GFX1030-PAL-NEXT: s_mov_b32 s12, s02932; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x02933; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)2934; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff2935; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s112936; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 02937; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s122938; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s132939; GFX1030-PAL-NEXT: s_load_dword s0, s[4:5], 0x02940; GFX1030-PAL-NEXT: scratch_load_dword v0, off, off offset:4 glc dlc2941; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)2942; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, 152943; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)2944; GFX1030-PAL-NEXT: s_and_b32 s1, s0, 152945; GFX1030-PAL-NEXT: s_lshl_b32 s0, s0, 22946; GFX1030-PAL-NEXT: s_lshl_b32 s1, s1, 22947; GFX1030-PAL-NEXT: s_addk_i32 s0, 0x40042948; GFX1030-PAL-NEXT: s_addk_i32 s1, 0x40042949; GFX1030-PAL-NEXT: scratch_store_dword off, v0, s02950; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x02951; GFX1030-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc2952; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)2953; GFX1030-PAL-NEXT: s_endpgm2954;2955; GFX11-PAL-LABEL: store_load_sindex_large_offset_kernel:2956; GFX11-PAL: ; %bb.0: ; %bb2957; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x02958; GFX11-PAL-NEXT: scratch_load_b32 v0, off, off offset:4 glc dlc2959; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2960; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 152961; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)2962; GFX11-PAL-NEXT: s_and_b32 s1, s0, 152963; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 22964; GFX11-PAL-NEXT: s_lshl_b32 s1, s1, 22965; GFX11-PAL-NEXT: s_addk_i32 s0, 0x40042966; GFX11-PAL-NEXT: s_addk_i32 s1, 0x40042967; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s0 dlc2968; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x02969; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s1 glc dlc2970; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)2971; GFX11-PAL-NEXT: s_endpgm2972;2973; GFX12-PAL-LABEL: store_load_sindex_large_offset_kernel:2974; GFX12-PAL: ; %bb.0: ; %bb2975; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x02976; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS2977; GFX12-PAL-NEXT: s_wait_loadcnt 0x02978; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 152979; GFX12-PAL-NEXT: s_wait_kmcnt 0x02980; GFX12-PAL-NEXT: s_and_b32 s1, s0, 152981; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 22982; GFX12-PAL-NEXT: s_lshl_b32 s1, s1, 22983; GFX12-PAL-NEXT: s_addk_co_i32 s0, 0x40002984; GFX12-PAL-NEXT: s_addk_co_i32 s1, 0x40002985; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS2986; GFX12-PAL-NEXT: s_wait_storecnt 0x02987; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS2988; GFX12-PAL-NEXT: s_wait_loadcnt 0x02989; GFX12-PAL-NEXT: s_endpgm2990bb:2991 %padding = alloca [4096 x i32], align 4, addrspace(5)2992 %i = alloca [32 x float], align 4, addrspace(5)2993 %pad_gep = getelementptr inbounds [4096 x i32], ptr addrspace(5) %padding, i32 0, i32 02994 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 42995 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx2996 store volatile i32 15, ptr addrspace(5) %i7, align 42997 %i9 = and i32 %idx, 152998 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i92999 %i12 = load volatile i32, ptr addrspace(5) %i10, align 43000 ret void3001}3002 3003define amdgpu_ps void @store_load_sindex_large_offset_foo(i32 inreg %idx) {3004; GFX9-LABEL: store_load_sindex_large_offset_foo:3005; GFX9: ; %bb.0: ; %bb3006; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s33007; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 03008; GFX9-NEXT: s_mov_b32 s0, 03009; GFX9-NEXT: scratch_load_dword v0, off, s0 offset:4 glc3010; GFX9-NEXT: s_waitcnt vmcnt(0)3011; GFX9-NEXT: s_lshl_b32 s0, s2, 23012; GFX9-NEXT: s_addk_i32 s0, 0x40043013; GFX9-NEXT: v_mov_b32_e32 v0, 153014; GFX9-NEXT: scratch_store_dword off, v0, s03015; GFX9-NEXT: s_waitcnt vmcnt(0)3016; GFX9-NEXT: s_and_b32 s0, s2, 153017; GFX9-NEXT: s_lshl_b32 s0, s0, 23018; GFX9-NEXT: s_addk_i32 s0, 0x40043019; GFX9-NEXT: scratch_load_dword v0, off, s0 glc3020; GFX9-NEXT: s_waitcnt vmcnt(0)3021; GFX9-NEXT: s_endpgm3022;3023; GFX10-LABEL: store_load_sindex_large_offset_foo:3024; GFX10: ; %bb.0: ; %bb3025; GFX10-NEXT: s_add_u32 s0, s0, s33026; GFX10-NEXT: s_addc_u32 s1, s1, 03027; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s03028; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s13029; GFX10-NEXT: scratch_load_dword v0, off, off offset:4 glc dlc3030; GFX10-NEXT: s_waitcnt vmcnt(0)3031; GFX10-NEXT: v_mov_b32_e32 v0, 153032; GFX10-NEXT: s_and_b32 s0, s2, 153033; GFX10-NEXT: s_lshl_b32 s1, s2, 23034; GFX10-NEXT: s_lshl_b32 s0, s0, 23035; GFX10-NEXT: s_addk_i32 s1, 0x40043036; GFX10-NEXT: s_addk_i32 s0, 0x40043037; GFX10-NEXT: scratch_store_dword off, v0, s13038; GFX10-NEXT: s_waitcnt_vscnt null, 0x03039; GFX10-NEXT: scratch_load_dword v0, off, s0 glc dlc3040; GFX10-NEXT: s_waitcnt vmcnt(0)3041; GFX10-NEXT: s_endpgm3042;3043; GFX11-LABEL: store_load_sindex_large_offset_foo:3044; GFX11: ; %bb.0: ; %bb3045; GFX11-NEXT: scratch_load_b32 v0, off, off offset:4 glc dlc3046; GFX11-NEXT: s_waitcnt vmcnt(0)3047; GFX11-NEXT: v_mov_b32_e32 v0, 153048; GFX11-NEXT: s_and_b32 s1, s0, 153049; GFX11-NEXT: s_lshl_b32 s0, s0, 23050; GFX11-NEXT: s_lshl_b32 s1, s1, 23051; GFX11-NEXT: s_addk_i32 s0, 0x40043052; GFX11-NEXT: s_addk_i32 s1, 0x40043053; GFX11-NEXT: scratch_store_b32 off, v0, s0 dlc3054; GFX11-NEXT: s_waitcnt_vscnt null, 0x03055; GFX11-NEXT: scratch_load_b32 v0, off, s1 glc dlc3056; GFX11-NEXT: s_waitcnt vmcnt(0)3057; GFX11-NEXT: s_endpgm3058;3059; GFX12-LABEL: store_load_sindex_large_offset_foo:3060; GFX12: ; %bb.0: ; %bb3061; GFX12-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS3062; GFX12-NEXT: s_wait_loadcnt 0x03063; GFX12-NEXT: v_mov_b32_e32 v0, 153064; GFX12-NEXT: s_and_b32 s1, s0, 153065; GFX12-NEXT: s_lshl_b32 s0, s0, 23066; GFX12-NEXT: s_lshl_b32 s1, s1, 23067; GFX12-NEXT: s_addk_co_i32 s0, 0x40003068; GFX12-NEXT: s_addk_co_i32 s1, 0x40003069; GFX12-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS3070; GFX12-NEXT: s_wait_storecnt 0x03071; GFX12-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS3072; GFX12-NEXT: s_wait_loadcnt 0x03073; GFX12-NEXT: s_endpgm3074;3075; GFX9-PAL-LABEL: store_load_sindex_large_offset_foo:3076; GFX9-PAL: ; %bb.0: ; %bb3077; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]3078; GFX9-PAL-NEXT: s_mov_b32 s2, s03079; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x03080; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)3081; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff3082; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s13083; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 03084; GFX9-PAL-NEXT: s_mov_b32 s1, 03085; GFX9-PAL-NEXT: scratch_load_dword v0, off, s1 offset:4 glc3086; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3087; GFX9-PAL-NEXT: s_lshl_b32 s1, s0, 23088; GFX9-PAL-NEXT: s_and_b32 s0, s0, 153089; GFX9-PAL-NEXT: s_addk_i32 s1, 0x40043090; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 153091; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 23092; GFX9-PAL-NEXT: scratch_store_dword off, v0, s13093; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3094; GFX9-PAL-NEXT: s_addk_i32 s0, 0x40043095; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 glc3096; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3097; GFX9-PAL-NEXT: s_endpgm3098;3099; GFX942-LABEL: store_load_sindex_large_offset_foo:3100; GFX942: ; %bb.0: ; %bb3101; GFX942-NEXT: scratch_load_dword v0, off, off offset:4 sc0 sc13102; GFX942-NEXT: s_waitcnt vmcnt(0)3103; GFX942-NEXT: s_lshl_b32 s1, s0, 23104; GFX942-NEXT: s_and_b32 s0, s0, 153105; GFX942-NEXT: s_addk_i32 s1, 0x40043106; GFX942-NEXT: v_mov_b32_e32 v0, 153107; GFX942-NEXT: s_lshl_b32 s0, s0, 23108; GFX942-NEXT: scratch_store_dword off, v0, s1 sc0 sc13109; GFX942-NEXT: s_waitcnt vmcnt(0)3110; GFX942-NEXT: s_addk_i32 s0, 0x40043111; GFX942-NEXT: scratch_load_dword v0, off, s0 sc0 sc13112; GFX942-NEXT: s_waitcnt vmcnt(0)3113; GFX942-NEXT: s_endpgm3114;3115; GFX1010-PAL-LABEL: store_load_sindex_large_offset_foo:3116; GFX1010-PAL: ; %bb.0: ; %bb3117; GFX1010-PAL-NEXT: s_getpc_b64 s[2:3]3118; GFX1010-PAL-NEXT: s_mov_b32 s2, s03119; GFX1010-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x03120; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)3121; GFX1010-PAL-NEXT: s_and_b32 s3, s3, 0xffff3122; GFX1010-PAL-NEXT: s_add_u32 s2, s2, s13123; GFX1010-PAL-NEXT: s_addc_u32 s3, s3, 03124; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s23125; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s33126; GFX1010-PAL-NEXT: s_mov_b32 s1, 03127; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 offset:4 glc dlc3128; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)3129; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, 153130; GFX1010-PAL-NEXT: s_and_b32 s1, s0, 153131; GFX1010-PAL-NEXT: s_lshl_b32 s0, s0, 23132; GFX1010-PAL-NEXT: s_lshl_b32 s1, s1, 23133; GFX1010-PAL-NEXT: s_addk_i32 s0, 0x40043134; GFX1010-PAL-NEXT: s_addk_i32 s1, 0x40043135; GFX1010-PAL-NEXT: scratch_store_dword off, v0, s03136; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x03137; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc3138; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)3139; GFX1010-PAL-NEXT: s_endpgm3140;3141; GFX1030-PAL-LABEL: store_load_sindex_large_offset_foo:3142; GFX1030-PAL: ; %bb.0: ; %bb3143; GFX1030-PAL-NEXT: s_getpc_b64 s[2:3]3144; GFX1030-PAL-NEXT: s_mov_b32 s2, s03145; GFX1030-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x03146; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)3147; GFX1030-PAL-NEXT: s_and_b32 s3, s3, 0xffff3148; GFX1030-PAL-NEXT: s_add_u32 s2, s2, s13149; GFX1030-PAL-NEXT: s_addc_u32 s3, s3, 03150; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s23151; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s33152; GFX1030-PAL-NEXT: scratch_load_dword v0, off, off offset:4 glc dlc3153; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)3154; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, 153155; GFX1030-PAL-NEXT: s_and_b32 s1, s0, 153156; GFX1030-PAL-NEXT: s_lshl_b32 s0, s0, 23157; GFX1030-PAL-NEXT: s_lshl_b32 s1, s1, 23158; GFX1030-PAL-NEXT: s_addk_i32 s0, 0x40043159; GFX1030-PAL-NEXT: s_addk_i32 s1, 0x40043160; GFX1030-PAL-NEXT: scratch_store_dword off, v0, s03161; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x03162; GFX1030-PAL-NEXT: scratch_load_dword v0, off, s1 glc dlc3163; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)3164; GFX1030-PAL-NEXT: s_endpgm3165;3166; GFX11-PAL-LABEL: store_load_sindex_large_offset_foo:3167; GFX11-PAL: ; %bb.0: ; %bb3168; GFX11-PAL-NEXT: scratch_load_b32 v0, off, off offset:4 glc dlc3169; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3170; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 153171; GFX11-PAL-NEXT: s_and_b32 s1, s0, 153172; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 23173; GFX11-PAL-NEXT: s_lshl_b32 s1, s1, 23174; GFX11-PAL-NEXT: s_addk_i32 s0, 0x40043175; GFX11-PAL-NEXT: s_addk_i32 s1, 0x40043176; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s0 dlc3177; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03178; GFX11-PAL-NEXT: scratch_load_b32 v0, off, s1 glc dlc3179; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3180; GFX11-PAL-NEXT: s_endpgm3181;3182; GFX12-PAL-LABEL: store_load_sindex_large_offset_foo:3183; GFX12-PAL: ; %bb.0: ; %bb3184; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off scope:SCOPE_SYS3185; GFX12-PAL-NEXT: s_wait_loadcnt 0x03186; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 153187; GFX12-PAL-NEXT: s_and_b32 s1, s0, 153188; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 23189; GFX12-PAL-NEXT: s_lshl_b32 s1, s1, 23190; GFX12-PAL-NEXT: s_addk_co_i32 s0, 0x40003191; GFX12-PAL-NEXT: s_addk_co_i32 s1, 0x40003192; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s0 scope:SCOPE_SYS3193; GFX12-PAL-NEXT: s_wait_storecnt 0x03194; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s1 scope:SCOPE_SYS3195; GFX12-PAL-NEXT: s_wait_loadcnt 0x03196; GFX12-PAL-NEXT: s_endpgm3197bb:3198 %padding = alloca [4096 x i32], align 4, addrspace(5)3199 %i = alloca [32 x float], align 4, addrspace(5)3200 %pad_gep = getelementptr inbounds [4096 x i32], ptr addrspace(5) %padding, i32 0, i32 03201 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 43202 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx3203 store volatile i32 15, ptr addrspace(5) %i7, align 43204 %i9 = and i32 %idx, 153205 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i93206 %i12 = load volatile i32, ptr addrspace(5) %i10, align 43207 ret void3208}3209 3210define amdgpu_kernel void @store_load_vindex_large_offset_kernel(i32 %n) {3211; GFX9-LABEL: store_load_vindex_large_offset_kernel:3212; GFX9: ; %bb.0: ; %bb3213; GFX9-NEXT: s_load_dword s0, s[4:5], 0x243214; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s133215; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 03216; GFX9-NEXT: s_mov_b32 s1, 03217; GFX9-NEXT: scratch_load_dword v1, off, s1 offset:4 glc3218; GFX9-NEXT: s_waitcnt vmcnt(0)3219; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v03220; GFX9-NEXT: s_waitcnt lgkmcnt(0)3221; GFX9-NEXT: s_lshl_b32 s0, s0, 73222; GFX9-NEXT: v_add_u32_e32 v1, 0x4004, v03223; GFX9-NEXT: s_addk_i32 s0, 0x40043224; GFX9-NEXT: v_mov_b32_e32 v2, 153225; GFX9-NEXT: scratch_store_dword v1, v2, off offset:1283226; GFX9-NEXT: s_waitcnt vmcnt(0)3227; GFX9-NEXT: v_sub_u32_e32 v0, s0, v03228; GFX9-NEXT: scratch_load_dword v0, v0, off offset:124 glc3229; GFX9-NEXT: s_waitcnt vmcnt(0)3230; GFX9-NEXT: s_endpgm3231;3232; GFX10-LABEL: store_load_vindex_large_offset_kernel:3233; GFX10: ; %bb.0: ; %bb3234; GFX10-NEXT: s_add_u32 s8, s8, s133235; GFX10-NEXT: s_addc_u32 s9, s9, 03236; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s83237; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s93238; GFX10-NEXT: s_load_dword s0, s[4:5], 0x243239; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v03240; GFX10-NEXT: v_mov_b32_e32 v2, 153241; GFX10-NEXT: scratch_load_dword v3, off, off offset:4 glc dlc3242; GFX10-NEXT: s_waitcnt vmcnt(0)3243; GFX10-NEXT: v_add_nc_u32_e32 v1, 0x4004, v03244; GFX10-NEXT: scratch_store_dword v1, v2, off offset:1283245; GFX10-NEXT: s_waitcnt_vscnt null, 0x03246; GFX10-NEXT: s_waitcnt lgkmcnt(0)3247; GFX10-NEXT: s_lshl_b32 s0, s0, 73248; GFX10-NEXT: s_addk_i32 s0, 0x40043249; GFX10-NEXT: v_sub_nc_u32_e32 v0, s0, v03250; GFX10-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc3251; GFX10-NEXT: s_waitcnt vmcnt(0)3252; GFX10-NEXT: s_endpgm3253;3254; GFX11-LABEL: store_load_vindex_large_offset_kernel:3255; GFX11: ; %bb.0: ; %bb3256; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x243257; GFX11-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v03258; GFX11-NEXT: scratch_load_b32 v3, off, off offset:4 glc dlc3259; GFX11-NEXT: s_waitcnt vmcnt(0)3260; GFX11-NEXT: v_and_b32_e32 v0, 0xffc, v03261; GFX11-NEXT: s_waitcnt lgkmcnt(0)3262; GFX11-NEXT: s_lshl_b32 s0, s0, 73263; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3264; GFX11-NEXT: s_addk_i32 s0, 0x40043265; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)3266; GFX11-NEXT: v_sub_nc_u32_e32 v2, s0, v03267; GFX11-NEXT: s_movk_i32 s0, 0x40043268; GFX11-NEXT: scratch_store_b32 v0, v1, s0 offset:128 dlc3269; GFX11-NEXT: s_waitcnt_vscnt null, 0x03270; GFX11-NEXT: scratch_load_b32 v0, v2, off offset:124 glc dlc3271; GFX11-NEXT: s_waitcnt vmcnt(0)3272; GFX11-NEXT: s_endpgm3273;3274; GFX12-LABEL: store_load_vindex_large_offset_kernel:3275; GFX12: ; %bb.0: ; %bb3276; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x243277; GFX12-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v03278; GFX12-NEXT: scratch_load_b32 v3, off, off scope:SCOPE_SYS3279; GFX12-NEXT: s_wait_loadcnt 0x03280; GFX12-NEXT: v_and_b32_e32 v0, 0xffc, v03281; GFX12-NEXT: s_wait_kmcnt 0x03282; GFX12-NEXT: scratch_store_b32 v0, v1, off offset:16512 scope:SCOPE_SYS3283; GFX12-NEXT: s_wait_storecnt 0x03284; GFX12-NEXT: s_lshl_b32 s0, s0, 73285; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3286; GFX12-NEXT: s_addk_co_i32 s0, 0x40003287; GFX12-NEXT: v_sub_nc_u32_e32 v2, s0, v03288; GFX12-NEXT: scratch_load_b32 v0, v2, off offset:124 scope:SCOPE_SYS3289; GFX12-NEXT: s_wait_loadcnt 0x03290; GFX12-NEXT: s_endpgm3291;3292; GFX9-PAL-LABEL: store_load_vindex_large_offset_kernel:3293; GFX9-PAL: ; %bb.0: ; %bb3294; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]3295; GFX9-PAL-NEXT: s_mov_b32 s12, s03296; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x03297; GFX9-PAL-NEXT: s_mov_b32 s1, 03298; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x03299; GFX9-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v03300; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 153301; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)3302; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff3303; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s113304; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 03305; GFX9-PAL-NEXT: scratch_load_dword v1, off, s1 offset:4 glc3306; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3307; GFX9-PAL-NEXT: s_lshl_b32 s0, s0, 73308; GFX9-PAL-NEXT: v_add_u32_e32 v1, 0x4004, v03309; GFX9-PAL-NEXT: s_addk_i32 s0, 0x40043310; GFX9-PAL-NEXT: scratch_store_dword v1, v2, off offset:1283311; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3312; GFX9-PAL-NEXT: v_sub_u32_e32 v0, s0, v03313; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc3314; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3315; GFX9-PAL-NEXT: s_endpgm3316;3317; GFX942-LABEL: store_load_vindex_large_offset_kernel:3318; GFX942: ; %bb.0: ; %bb3319; GFX942-NEXT: s_load_dword s0, s[4:5], 0x243320; GFX942-NEXT: scratch_load_dword v1, off, off offset:4 sc0 sc13321; GFX942-NEXT: s_waitcnt vmcnt(0)3322; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v03323; GFX942-NEXT: v_and_b32_e32 v0, 0xffc, v03324; GFX942-NEXT: v_mov_b32_e32 v1, 153325; GFX942-NEXT: s_waitcnt lgkmcnt(0)3326; GFX942-NEXT: s_lshl_b32 s0, s0, 73327; GFX942-NEXT: s_addk_i32 s0, 0x40043328; GFX942-NEXT: s_movk_i32 s1, 0x40043329; GFX942-NEXT: scratch_store_dword v0, v1, s1 offset:128 sc0 sc13330; GFX942-NEXT: s_waitcnt vmcnt(0)3331; GFX942-NEXT: v_sub_u32_e32 v0, s0, v03332; GFX942-NEXT: scratch_load_dword v0, v0, off offset:124 sc0 sc13333; GFX942-NEXT: s_waitcnt vmcnt(0)3334; GFX942-NEXT: s_endpgm3335;3336; GFX1010-PAL-LABEL: store_load_vindex_large_offset_kernel:3337; GFX1010-PAL: ; %bb.0: ; %bb3338; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]3339; GFX1010-PAL-NEXT: s_mov_b32 s12, s03340; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x03341; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)3342; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff3343; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s113344; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 03345; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s123346; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s133347; GFX1010-PAL-NEXT: s_load_dword s0, s[4:5], 0x03348; GFX1010-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v03349; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, 153350; GFX1010-PAL-NEXT: v_add_nc_u32_e32 v1, 0x4004, v03351; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)3352; GFX1010-PAL-NEXT: s_lshl_b32 s0, s0, 73353; GFX1010-PAL-NEXT: s_addk_i32 s0, 0x40043354; GFX1010-PAL-NEXT: v_sub_nc_u32_e32 v0, s0, v03355; GFX1010-PAL-NEXT: s_mov_b32 s0, 03356; GFX1010-PAL-NEXT: scratch_load_dword v3, off, s0 offset:4 glc dlc3357; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)3358; GFX1010-PAL-NEXT: scratch_store_dword v1, v2, off offset:1283359; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x03360; GFX1010-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc3361; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)3362; GFX1010-PAL-NEXT: s_endpgm3363;3364; GFX1030-PAL-LABEL: store_load_vindex_large_offset_kernel:3365; GFX1030-PAL: ; %bb.0: ; %bb3366; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]3367; GFX1030-PAL-NEXT: s_mov_b32 s12, s03368; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x03369; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)3370; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff3371; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s113372; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 03373; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s123374; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s133375; GFX1030-PAL-NEXT: s_load_dword s0, s[4:5], 0x03376; GFX1030-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v03377; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, 153378; GFX1030-PAL-NEXT: scratch_load_dword v3, off, off offset:4 glc dlc3379; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)3380; GFX1030-PAL-NEXT: v_add_nc_u32_e32 v1, 0x4004, v03381; GFX1030-PAL-NEXT: scratch_store_dword v1, v2, off offset:1283382; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x03383; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)3384; GFX1030-PAL-NEXT: s_lshl_b32 s0, s0, 73385; GFX1030-PAL-NEXT: s_addk_i32 s0, 0x40043386; GFX1030-PAL-NEXT: v_sub_nc_u32_e32 v0, s0, v03387; GFX1030-PAL-NEXT: scratch_load_dword v0, v0, off offset:124 glc dlc3388; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)3389; GFX1030-PAL-NEXT: s_endpgm3390;3391; GFX11-PAL-LABEL: store_load_vindex_large_offset_kernel:3392; GFX11-PAL: ; %bb.0: ; %bb3393; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x03394; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v03395; GFX11-PAL-NEXT: scratch_load_b32 v3, off, off offset:4 glc dlc3396; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3397; GFX11-PAL-NEXT: v_and_b32_e32 v0, 0xffc, v03398; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)3399; GFX11-PAL-NEXT: s_lshl_b32 s0, s0, 73400; GFX11-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1)3401; GFX11-PAL-NEXT: s_addk_i32 s0, 0x40043402; GFX11-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)3403; GFX11-PAL-NEXT: v_sub_nc_u32_e32 v2, s0, v03404; GFX11-PAL-NEXT: s_movk_i32 s0, 0x40043405; GFX11-PAL-NEXT: scratch_store_b32 v0, v1, s0 offset:128 dlc3406; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03407; GFX11-PAL-NEXT: scratch_load_b32 v0, v2, off offset:124 glc dlc3408; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3409; GFX11-PAL-NEXT: s_endpgm3410;3411; GFX12-PAL-LABEL: store_load_vindex_large_offset_kernel:3412; GFX12-PAL: ; %bb.0: ; %bb3413; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x03414; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_lshlrev_b32 v0, 2, v03415; GFX12-PAL-NEXT: scratch_load_b32 v3, off, off scope:SCOPE_SYS3416; GFX12-PAL-NEXT: s_wait_loadcnt 0x03417; GFX12-PAL-NEXT: v_and_b32_e32 v0, 0xffc, v03418; GFX12-PAL-NEXT: s_wait_kmcnt 0x03419; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, off offset:16512 scope:SCOPE_SYS3420; GFX12-PAL-NEXT: s_wait_storecnt 0x03421; GFX12-PAL-NEXT: s_lshl_b32 s0, s0, 73422; GFX12-PAL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)3423; GFX12-PAL-NEXT: s_addk_co_i32 s0, 0x40003424; GFX12-PAL-NEXT: v_sub_nc_u32_e32 v2, s0, v03425; GFX12-PAL-NEXT: scratch_load_b32 v0, v2, off offset:124 scope:SCOPE_SYS3426; GFX12-PAL-NEXT: s_wait_loadcnt 0x03427; GFX12-PAL-NEXT: s_endpgm3428bb:3429 %padding = alloca [4096 x i32], align 4, addrspace(5)3430 %i.alloca = alloca [2 x [32 x float]], align 4, addrspace(5)3431 %i = getelementptr inbounds [2 x [32 x float]], ptr addrspace (5) %i.alloca, i32 0, i32 %n3432 %i.1 = getelementptr inbounds [2 x [32 x float]], ptr addrspace (5) %i.alloca, i32 0, i32 13433 %pad_gep = getelementptr inbounds [4096 x i32], ptr addrspace(5) %padding, i32 0, i32 03434 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 43435 %i2 = tail call i32 @llvm.amdgcn.workitem.id.x()3436 %i3 = zext i32 %i2 to i643437 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i.1, i32 0, i32 %i23438 store volatile i32 15, ptr addrspace(5) %i7, align 43439 %i9 = sub nsw i32 0, %i23440 %i9.1 = getelementptr [32 x float], ptr addrspace(5) %i, i32 0, i32 %i93441 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i9.1, i32 0, i32 313442 %i12 = load volatile i32, ptr addrspace(5) %i10, align 43443 ret void3444}3445 3446define void @store_load_vindex_large_offset_foo(i32 %idx) {3447; GFX9-LABEL: store_load_vindex_large_offset_foo:3448; GFX9: ; %bb.0: ; %bb3449; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3450; GFX9-NEXT: s_add_i32 s1, s32, 0x40043451; GFX9-NEXT: scratch_load_dword v1, off, s32 offset:4 glc3452; GFX9-NEXT: s_waitcnt vmcnt(0)3453; GFX9-NEXT: s_mov_b32 s0, s13454; GFX9-NEXT: v_lshl_add_u32 v1, v0, 2, s03455; GFX9-NEXT: v_mov_b32_e32 v2, 153456; GFX9-NEXT: v_and_b32_e32 v0, 15, v03457; GFX9-NEXT: scratch_store_dword v1, v2, off3458; GFX9-NEXT: s_waitcnt vmcnt(0)3459; GFX9-NEXT: v_lshl_add_u32 v0, v0, 2, s03460; GFX9-NEXT: scratch_load_dword v0, v0, off glc3461; GFX9-NEXT: s_waitcnt vmcnt(0)3462; GFX9-NEXT: s_setpc_b64 s[30:31]3463;3464; GFX10-LABEL: store_load_vindex_large_offset_foo:3465; GFX10: ; %bb.0: ; %bb3466; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3467; GFX10-NEXT: v_and_b32_e32 v1, 15, v03468; GFX10-NEXT: s_add_i32 s0, s32, 0x40043469; GFX10-NEXT: v_mov_b32_e32 v2, 153470; GFX10-NEXT: v_lshl_add_u32 v0, v0, 2, s03471; GFX10-NEXT: s_add_i32 s0, s32, 0x40043472; GFX10-NEXT: scratch_load_dword v3, off, s32 offset:4 glc dlc3473; GFX10-NEXT: s_waitcnt vmcnt(0)3474; GFX10-NEXT: v_lshl_add_u32 v1, v1, 2, s03475; GFX10-NEXT: scratch_store_dword v0, v2, off3476; GFX10-NEXT: s_waitcnt_vscnt null, 0x03477; GFX10-NEXT: scratch_load_dword v0, v1, off glc dlc3478; GFX10-NEXT: s_waitcnt vmcnt(0)3479; GFX10-NEXT: s_setpc_b64 s[30:31]3480;3481; GFX11-LABEL: store_load_vindex_large_offset_foo:3482; GFX11: ; %bb.0: ; %bb3483; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3484; GFX11-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v03485; GFX11-NEXT: s_add_i32 s0, s32, 0x40043486; GFX11-NEXT: scratch_load_b32 v3, off, s32 offset:4 glc dlc3487; GFX11-NEXT: s_waitcnt vmcnt(0)3488; GFX11-NEXT: v_lshl_add_u32 v0, v0, 2, s03489; GFX11-NEXT: v_lshlrev_b32_e32 v1, 2, v13490; GFX11-NEXT: s_add_i32 s0, s32, 0x40043491; GFX11-NEXT: scratch_store_b32 v0, v2, off dlc3492; GFX11-NEXT: s_waitcnt_vscnt null, 0x03493; GFX11-NEXT: scratch_load_b32 v0, v1, s0 glc dlc3494; GFX11-NEXT: s_waitcnt vmcnt(0)3495; GFX11-NEXT: s_setpc_b64 s[30:31]3496;3497; GFX12-LABEL: store_load_vindex_large_offset_foo:3498; GFX12: ; %bb.0: ; %bb3499; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03500; GFX12-NEXT: s_wait_expcnt 0x03501; GFX12-NEXT: s_wait_samplecnt 0x03502; GFX12-NEXT: s_wait_bvhcnt 0x03503; GFX12-NEXT: s_wait_kmcnt 0x03504; GFX12-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v03505; GFX12-NEXT: v_lshlrev_b32_e32 v0, 2, v03506; GFX12-NEXT: scratch_load_b32 v3, off, s32 scope:SCOPE_SYS3507; GFX12-NEXT: s_wait_loadcnt 0x03508; GFX12-NEXT: v_lshlrev_b32_e32 v1, 2, v13509; GFX12-NEXT: s_wait_storecnt 0x03510; GFX12-NEXT: scratch_store_b32 v0, v2, s32 offset:16384 scope:SCOPE_SYS3511; GFX12-NEXT: s_wait_storecnt 0x03512; GFX12-NEXT: scratch_load_b32 v0, v1, s32 offset:16384 scope:SCOPE_SYS3513; GFX12-NEXT: s_wait_loadcnt 0x03514; GFX12-NEXT: s_setpc_b64 s[30:31]3515;3516; GFX9-PAL-LABEL: store_load_vindex_large_offset_foo:3517; GFX9-PAL: ; %bb.0: ; %bb3518; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3519; GFX9-PAL-NEXT: s_add_i32 s1, s32, 0x40043520; GFX9-PAL-NEXT: scratch_load_dword v1, off, s32 offset:4 glc3521; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3522; GFX9-PAL-NEXT: s_mov_b32 s0, s13523; GFX9-PAL-NEXT: v_lshl_add_u32 v1, v0, 2, s03524; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 153525; GFX9-PAL-NEXT: v_and_b32_e32 v0, 15, v03526; GFX9-PAL-NEXT: scratch_store_dword v1, v2, off3527; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3528; GFX9-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s03529; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off glc3530; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3531; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]3532;3533; GFX942-LABEL: store_load_vindex_large_offset_foo:3534; GFX942: ; %bb.0: ; %bb3535; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3536; GFX942-NEXT: s_add_i32 s1, s32, 0x40043537; GFX942-NEXT: scratch_load_dword v1, off, s32 offset:4 sc0 sc13538; GFX942-NEXT: s_waitcnt vmcnt(0)3539; GFX942-NEXT: s_mov_b32 s0, s13540; GFX942-NEXT: v_lshl_add_u32 v1, v0, 2, s03541; GFX942-NEXT: v_mov_b32_e32 v2, 153542; GFX942-NEXT: v_and_b32_e32 v0, 15, v03543; GFX942-NEXT: scratch_store_dword v1, v2, off sc0 sc13544; GFX942-NEXT: s_waitcnt vmcnt(0)3545; GFX942-NEXT: v_lshlrev_b32_e32 v0, 2, v03546; GFX942-NEXT: s_add_i32 s0, s32, 0x40043547; GFX942-NEXT: scratch_load_dword v0, v0, s0 sc0 sc13548; GFX942-NEXT: s_waitcnt vmcnt(0)3549; GFX942-NEXT: s_setpc_b64 s[30:31]3550;3551; GFX10-PAL-LABEL: store_load_vindex_large_offset_foo:3552; GFX10-PAL: ; %bb.0: ; %bb3553; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3554; GFX10-PAL-NEXT: v_and_b32_e32 v1, 15, v03555; GFX10-PAL-NEXT: s_add_i32 s0, s32, 0x40043556; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 153557; GFX10-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s03558; GFX10-PAL-NEXT: s_add_i32 s0, s32, 0x40043559; GFX10-PAL-NEXT: scratch_load_dword v3, off, s32 offset:4 glc dlc3560; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)3561; GFX10-PAL-NEXT: v_lshl_add_u32 v1, v1, 2, s03562; GFX10-PAL-NEXT: scratch_store_dword v0, v2, off3563; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x03564; GFX10-PAL-NEXT: scratch_load_dword v0, v1, off glc dlc3565; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)3566; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]3567;3568; GFX11-PAL-LABEL: store_load_vindex_large_offset_foo:3569; GFX11-PAL: ; %bb.0: ; %bb3570; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3571; GFX11-PAL-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v03572; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x40043573; GFX11-PAL-NEXT: scratch_load_b32 v3, off, s32 offset:4 glc dlc3574; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3575; GFX11-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s03576; GFX11-PAL-NEXT: v_lshlrev_b32_e32 v1, 2, v13577; GFX11-PAL-NEXT: s_add_i32 s0, s32, 0x40043578; GFX11-PAL-NEXT: scratch_store_b32 v0, v2, off dlc3579; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03580; GFX11-PAL-NEXT: scratch_load_b32 v0, v1, s0 glc dlc3581; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3582; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]3583;3584; GFX12-PAL-LABEL: store_load_vindex_large_offset_foo:3585; GFX12-PAL: ; %bb.0: ; %bb3586; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x03587; GFX12-PAL-NEXT: s_wait_expcnt 0x03588; GFX12-PAL-NEXT: s_wait_samplecnt 0x03589; GFX12-PAL-NEXT: s_wait_bvhcnt 0x03590; GFX12-PAL-NEXT: s_wait_kmcnt 0x03591; GFX12-PAL-NEXT: v_dual_mov_b32 v2, 15 :: v_dual_and_b32 v1, 15, v03592; GFX12-PAL-NEXT: v_lshlrev_b32_e32 v0, 2, v03593; GFX12-PAL-NEXT: scratch_load_b32 v3, off, s32 scope:SCOPE_SYS3594; GFX12-PAL-NEXT: s_wait_loadcnt 0x03595; GFX12-PAL-NEXT: v_lshlrev_b32_e32 v1, 2, v13596; GFX12-PAL-NEXT: s_wait_storecnt 0x03597; GFX12-PAL-NEXT: scratch_store_b32 v0, v2, s32 offset:16384 scope:SCOPE_SYS3598; GFX12-PAL-NEXT: s_wait_storecnt 0x03599; GFX12-PAL-NEXT: scratch_load_b32 v0, v1, s32 offset:16384 scope:SCOPE_SYS3600; GFX12-PAL-NEXT: s_wait_loadcnt 0x03601; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]3602bb:3603 %padding = alloca [4096 x i32], align 4, addrspace(5)3604 %i = alloca [32 x float], align 4, addrspace(5)3605 %pad_gep = getelementptr inbounds [4096 x i32], ptr addrspace(5) %padding, i32 0, i32 03606 %pad_load = load volatile i32, ptr addrspace(5) %pad_gep, align 43607 %i7 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %idx3608 store volatile i32 15, ptr addrspace(5) %i7, align 43609 %i9 = and i32 %idx, 153610 %i10 = getelementptr inbounds [32 x float], ptr addrspace(5) %i, i32 0, i32 %i93611 %i12 = load volatile i32, ptr addrspace(5) %i10, align 43612 ret void3613}3614 3615define amdgpu_kernel void @store_load_large_imm_offset_kernel() {3616; GFX9-LABEL: store_load_large_imm_offset_kernel:3617; GFX9: ; %bb.0: ; %bb3618; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s133619; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 03620; GFX9-NEXT: v_mov_b32_e32 v0, 133621; GFX9-NEXT: s_mov_b32 s0, 03622; GFX9-NEXT: scratch_store_dword off, v0, s0 offset:43623; GFX9-NEXT: s_waitcnt vmcnt(0)3624; GFX9-NEXT: s_movk_i32 s0, 0x30003625; GFX9-NEXT: s_add_i32 s0, s0, 43626; GFX9-NEXT: v_mov_b32_e32 v0, 153627; GFX9-NEXT: scratch_store_dword off, v0, s0 offset:37123628; GFX9-NEXT: s_waitcnt vmcnt(0)3629; GFX9-NEXT: scratch_load_dword v0, off, s0 offset:3712 glc3630; GFX9-NEXT: s_waitcnt vmcnt(0)3631; GFX9-NEXT: s_endpgm3632;3633; GFX10-LABEL: store_load_large_imm_offset_kernel:3634; GFX10: ; %bb.0: ; %bb3635; GFX10-NEXT: s_add_u32 s8, s8, s133636; GFX10-NEXT: s_addc_u32 s9, s9, 03637; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s83638; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s93639; GFX10-NEXT: v_mov_b32_e32 v0, 133640; GFX10-NEXT: v_mov_b32_e32 v1, 153641; GFX10-NEXT: s_movk_i32 s0, 0x38003642; GFX10-NEXT: s_add_i32 s0, s0, 43643; GFX10-NEXT: scratch_store_dword off, v0, off offset:43644; GFX10-NEXT: s_waitcnt_vscnt null, 0x03645; GFX10-NEXT: scratch_store_dword off, v1, s0 offset:16643646; GFX10-NEXT: s_waitcnt_vscnt null, 0x03647; GFX10-NEXT: scratch_load_dword v0, off, s0 offset:1664 glc dlc3648; GFX10-NEXT: s_waitcnt vmcnt(0)3649; GFX10-NEXT: s_endpgm3650;3651; GFX11-LABEL: store_load_large_imm_offset_kernel:3652; GFX11: ; %bb.0: ; %bb3653; GFX11-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 0x30003654; GFX11-NEXT: v_mov_b32_e32 v2, 153655; GFX11-NEXT: scratch_store_b32 off, v0, off offset:4 dlc3656; GFX11-NEXT: s_waitcnt_vscnt null, 0x03657; GFX11-NEXT: scratch_store_b32 v1, v2, off offset:3716 dlc3658; GFX11-NEXT: s_waitcnt_vscnt null, 0x03659; GFX11-NEXT: scratch_load_b32 v0, v1, off offset:3716 glc dlc3660; GFX11-NEXT: s_waitcnt vmcnt(0)3661; GFX11-NEXT: s_endpgm3662;3663; GFX12-LABEL: store_load_large_imm_offset_kernel:3664; GFX12: ; %bb.0: ; %bb3665; GFX12-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 153666; GFX12-NEXT: scratch_store_b32 off, v0, off scope:SCOPE_SYS3667; GFX12-NEXT: s_wait_storecnt 0x03668; GFX12-NEXT: scratch_store_b32 off, v1, off offset:16000 scope:SCOPE_SYS3669; GFX12-NEXT: s_wait_storecnt 0x03670; GFX12-NEXT: scratch_load_b32 v0, off, off offset:16000 scope:SCOPE_SYS3671; GFX12-NEXT: s_wait_loadcnt 0x03672; GFX12-NEXT: s_endpgm3673;3674; GFX9-PAL-LABEL: store_load_large_imm_offset_kernel:3675; GFX9-PAL: ; %bb.0: ; %bb3676; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]3677; GFX9-PAL-NEXT: s_mov_b32 s12, s03678; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x03679; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 133680; GFX9-PAL-NEXT: s_mov_b32 s0, 03681; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)3682; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff3683; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s113684; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 03685; GFX9-PAL-NEXT: scratch_store_dword off, v0, s0 offset:43686; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3687; GFX9-PAL-NEXT: s_movk_i32 s0, 0x30003688; GFX9-PAL-NEXT: s_add_i32 s0, s0, 43689; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 153690; GFX9-PAL-NEXT: scratch_store_dword off, v0, s0 offset:37123691; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3692; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 offset:3712 glc3693; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3694; GFX9-PAL-NEXT: s_endpgm3695;3696; GFX942-LABEL: store_load_large_imm_offset_kernel:3697; GFX942: ; %bb.0: ; %bb3698; GFX942-NEXT: v_mov_b32_e32 v0, 133699; GFX942-NEXT: scratch_store_dword off, v0, off offset:4 sc0 sc13700; GFX942-NEXT: s_waitcnt vmcnt(0)3701; GFX942-NEXT: v_mov_b32_e32 v0, 0x30003702; GFX942-NEXT: v_mov_b32_e32 v1, 153703; GFX942-NEXT: scratch_store_dword v0, v1, off offset:3716 sc0 sc13704; GFX942-NEXT: s_waitcnt vmcnt(0)3705; GFX942-NEXT: scratch_load_dword v0, v0, off offset:3716 sc0 sc13706; GFX942-NEXT: s_waitcnt vmcnt(0)3707; GFX942-NEXT: s_endpgm3708;3709; GFX1010-PAL-LABEL: store_load_large_imm_offset_kernel:3710; GFX1010-PAL: ; %bb.0: ; %bb3711; GFX1010-PAL-NEXT: s_getpc_b64 s[12:13]3712; GFX1010-PAL-NEXT: s_mov_b32 s12, s03713; GFX1010-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x03714; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)3715; GFX1010-PAL-NEXT: s_and_b32 s13, s13, 0xffff3716; GFX1010-PAL-NEXT: s_add_u32 s12, s12, s113717; GFX1010-PAL-NEXT: s_addc_u32 s13, s13, 03718; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s123719; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s133720; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, 133721; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, 153722; GFX1010-PAL-NEXT: s_movk_i32 s0, 0x38003723; GFX1010-PAL-NEXT: s_mov_b32 s1, 03724; GFX1010-PAL-NEXT: s_add_i32 s0, s0, 43725; GFX1010-PAL-NEXT: scratch_store_dword off, v0, s1 offset:43726; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x03727; GFX1010-PAL-NEXT: scratch_store_dword off, v1, s0 offset:16643728; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x03729; GFX1010-PAL-NEXT: scratch_load_dword v0, off, s0 offset:1664 glc dlc3730; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)3731; GFX1010-PAL-NEXT: s_endpgm3732;3733; GFX1030-PAL-LABEL: store_load_large_imm_offset_kernel:3734; GFX1030-PAL: ; %bb.0: ; %bb3735; GFX1030-PAL-NEXT: s_getpc_b64 s[12:13]3736; GFX1030-PAL-NEXT: s_mov_b32 s12, s03737; GFX1030-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x03738; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)3739; GFX1030-PAL-NEXT: s_and_b32 s13, s13, 0xffff3740; GFX1030-PAL-NEXT: s_add_u32 s12, s12, s113741; GFX1030-PAL-NEXT: s_addc_u32 s13, s13, 03742; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s123743; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s133744; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, 133745; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, 153746; GFX1030-PAL-NEXT: s_movk_i32 s0, 0x38003747; GFX1030-PAL-NEXT: s_add_i32 s0, s0, 43748; GFX1030-PAL-NEXT: scratch_store_dword off, v0, off offset:43749; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x03750; GFX1030-PAL-NEXT: scratch_store_dword off, v1, s0 offset:16643751; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x03752; GFX1030-PAL-NEXT: scratch_load_dword v0, off, s0 offset:1664 glc dlc3753; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)3754; GFX1030-PAL-NEXT: s_endpgm3755;3756; GFX11-PAL-LABEL: store_load_large_imm_offset_kernel:3757; GFX11-PAL: ; %bb.0: ; %bb3758; GFX11-PAL-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 0x30003759; GFX11-PAL-NEXT: v_mov_b32_e32 v2, 153760; GFX11-PAL-NEXT: scratch_store_b32 off, v0, off offset:4 dlc3761; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03762; GFX11-PAL-NEXT: scratch_store_b32 v1, v2, off offset:3716 dlc3763; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03764; GFX11-PAL-NEXT: scratch_load_b32 v0, v1, off offset:3716 glc dlc3765; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3766; GFX11-PAL-NEXT: s_endpgm3767;3768; GFX12-PAL-LABEL: store_load_large_imm_offset_kernel:3769; GFX12-PAL: ; %bb.0: ; %bb3770; GFX12-PAL-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 153771; GFX12-PAL-NEXT: scratch_store_b32 off, v0, off scope:SCOPE_SYS3772; GFX12-PAL-NEXT: s_wait_storecnt 0x03773; GFX12-PAL-NEXT: scratch_store_b32 off, v1, off offset:16000 scope:SCOPE_SYS3774; GFX12-PAL-NEXT: s_wait_storecnt 0x03775; GFX12-PAL-NEXT: scratch_load_b32 v0, off, off offset:16000 scope:SCOPE_SYS3776; GFX12-PAL-NEXT: s_wait_loadcnt 0x03777; GFX12-PAL-NEXT: s_endpgm3778bb:3779 %i = alloca [4096 x i32], align 4, addrspace(5)3780 %i1 = getelementptr inbounds [4096 x i32], ptr addrspace(5) %i, i32 0, i32 03781 store volatile i32 13, ptr addrspace(5) %i1, align 43782 %i7 = getelementptr inbounds [4096 x i32], ptr addrspace(5) %i, i32 0, i32 40003783 store volatile i32 15, ptr addrspace(5) %i7, align 43784 %i10 = getelementptr inbounds [4096 x i32], ptr addrspace(5) %i, i32 0, i32 40003785 %i12 = load volatile i32, ptr addrspace(5) %i10, align 43786 ret void3787}3788 3789define void @store_load_large_imm_offset_foo() {3790; GFX9-LABEL: store_load_large_imm_offset_foo:3791; GFX9: ; %bb.0: ; %bb3792; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3793; GFX9-NEXT: s_movk_i32 s0, 0x30003794; GFX9-NEXT: v_mov_b32_e32 v0, 133795; GFX9-NEXT: s_add_i32 s1, s32, s03796; GFX9-NEXT: scratch_store_dword off, v0, s32 offset:43797; GFX9-NEXT: s_waitcnt vmcnt(0)3798; GFX9-NEXT: s_add_i32 s0, s1, 43799; GFX9-NEXT: v_mov_b32_e32 v0, 153800; GFX9-NEXT: scratch_store_dword off, v0, s0 offset:37123801; GFX9-NEXT: s_waitcnt vmcnt(0)3802; GFX9-NEXT: scratch_load_dword v0, off, s0 offset:3712 glc3803; GFX9-NEXT: s_waitcnt vmcnt(0)3804; GFX9-NEXT: s_setpc_b64 s[30:31]3805;3806; GFX10-LABEL: store_load_large_imm_offset_foo:3807; GFX10: ; %bb.0: ; %bb3808; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3809; GFX10-NEXT: v_mov_b32_e32 v0, 133810; GFX10-NEXT: s_movk_i32 s0, 0x38003811; GFX10-NEXT: v_mov_b32_e32 v1, 153812; GFX10-NEXT: s_add_i32 s1, s32, s03813; GFX10-NEXT: s_add_i32 s0, s1, 43814; GFX10-NEXT: scratch_store_dword off, v0, s32 offset:43815; GFX10-NEXT: s_waitcnt_vscnt null, 0x03816; GFX10-NEXT: scratch_store_dword off, v1, s0 offset:16643817; GFX10-NEXT: s_waitcnt_vscnt null, 0x03818; GFX10-NEXT: scratch_load_dword v0, off, s0 offset:1664 glc dlc3819; GFX10-NEXT: s_waitcnt vmcnt(0)3820; GFX10-NEXT: s_setpc_b64 s[30:31]3821;3822; GFX11-LABEL: store_load_large_imm_offset_foo:3823; GFX11: ; %bb.0: ; %bb3824; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3825; GFX11-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 0x30003826; GFX11-NEXT: v_mov_b32_e32 v2, 153827; GFX11-NEXT: scratch_store_b32 off, v0, s32 offset:4 dlc3828; GFX11-NEXT: s_waitcnt_vscnt null, 0x03829; GFX11-NEXT: scratch_store_b32 v1, v2, s32 offset:3716 dlc3830; GFX11-NEXT: s_waitcnt_vscnt null, 0x03831; GFX11-NEXT: scratch_load_b32 v0, v1, s32 offset:3716 glc dlc3832; GFX11-NEXT: s_waitcnt vmcnt(0)3833; GFX11-NEXT: s_setpc_b64 s[30:31]3834;3835; GFX12-LABEL: store_load_large_imm_offset_foo:3836; GFX12: ; %bb.0: ; %bb3837; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03838; GFX12-NEXT: s_wait_expcnt 0x03839; GFX12-NEXT: s_wait_samplecnt 0x03840; GFX12-NEXT: s_wait_bvhcnt 0x03841; GFX12-NEXT: s_wait_kmcnt 0x03842; GFX12-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 153843; GFX12-NEXT: s_wait_storecnt 0x03844; GFX12-NEXT: scratch_store_b32 off, v0, s32 scope:SCOPE_SYS3845; GFX12-NEXT: s_wait_storecnt 0x03846; GFX12-NEXT: scratch_store_b32 off, v1, s32 offset:16000 scope:SCOPE_SYS3847; GFX12-NEXT: s_wait_storecnt 0x03848; GFX12-NEXT: scratch_load_b32 v0, off, s32 offset:16000 scope:SCOPE_SYS3849; GFX12-NEXT: s_wait_loadcnt 0x03850; GFX12-NEXT: s_setpc_b64 s[30:31]3851;3852; GFX9-PAL-LABEL: store_load_large_imm_offset_foo:3853; GFX9-PAL: ; %bb.0: ; %bb3854; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3855; GFX9-PAL-NEXT: s_movk_i32 s0, 0x30003856; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 133857; GFX9-PAL-NEXT: s_add_i32 s1, s32, s03858; GFX9-PAL-NEXT: scratch_store_dword off, v0, s32 offset:43859; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3860; GFX9-PAL-NEXT: s_add_i32 s0, s1, 43861; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 153862; GFX9-PAL-NEXT: scratch_store_dword off, v0, s0 offset:37123863; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3864; GFX9-PAL-NEXT: scratch_load_dword v0, off, s0 offset:3712 glc3865; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)3866; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]3867;3868; GFX942-LABEL: store_load_large_imm_offset_foo:3869; GFX942: ; %bb.0: ; %bb3870; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3871; GFX942-NEXT: v_mov_b32_e32 v0, 133872; GFX942-NEXT: scratch_store_dword off, v0, s32 offset:4 sc0 sc13873; GFX942-NEXT: s_waitcnt vmcnt(0)3874; GFX942-NEXT: v_mov_b32_e32 v0, 0x30003875; GFX942-NEXT: v_mov_b32_e32 v1, 153876; GFX942-NEXT: scratch_store_dword v0, v1, s32 offset:3716 sc0 sc13877; GFX942-NEXT: s_waitcnt vmcnt(0)3878; GFX942-NEXT: scratch_load_dword v0, v0, s32 offset:3716 sc0 sc13879; GFX942-NEXT: s_waitcnt vmcnt(0)3880; GFX942-NEXT: s_setpc_b64 s[30:31]3881;3882; GFX10-PAL-LABEL: store_load_large_imm_offset_foo:3883; GFX10-PAL: ; %bb.0: ; %bb3884; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3885; GFX10-PAL-NEXT: v_mov_b32_e32 v0, 133886; GFX10-PAL-NEXT: s_movk_i32 s0, 0x38003887; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 153888; GFX10-PAL-NEXT: s_add_i32 s1, s32, s03889; GFX10-PAL-NEXT: s_add_i32 s0, s1, 43890; GFX10-PAL-NEXT: scratch_store_dword off, v0, s32 offset:43891; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x03892; GFX10-PAL-NEXT: scratch_store_dword off, v1, s0 offset:16643893; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x03894; GFX10-PAL-NEXT: scratch_load_dword v0, off, s0 offset:1664 glc dlc3895; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)3896; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]3897;3898; GFX11-PAL-LABEL: store_load_large_imm_offset_foo:3899; GFX11-PAL: ; %bb.0: ; %bb3900; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3901; GFX11-PAL-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 0x30003902; GFX11-PAL-NEXT: v_mov_b32_e32 v2, 153903; GFX11-PAL-NEXT: scratch_store_b32 off, v0, s32 offset:4 dlc3904; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03905; GFX11-PAL-NEXT: scratch_store_b32 v1, v2, s32 offset:3716 dlc3906; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x03907; GFX11-PAL-NEXT: scratch_load_b32 v0, v1, s32 offset:3716 glc dlc3908; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)3909; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]3910;3911; GFX12-PAL-LABEL: store_load_large_imm_offset_foo:3912; GFX12-PAL: ; %bb.0: ; %bb3913; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x03914; GFX12-PAL-NEXT: s_wait_expcnt 0x03915; GFX12-PAL-NEXT: s_wait_samplecnt 0x03916; GFX12-PAL-NEXT: s_wait_bvhcnt 0x03917; GFX12-PAL-NEXT: s_wait_kmcnt 0x03918; GFX12-PAL-NEXT: v_dual_mov_b32 v0, 13 :: v_dual_mov_b32 v1, 153919; GFX12-PAL-NEXT: s_wait_storecnt 0x03920; GFX12-PAL-NEXT: scratch_store_b32 off, v0, s32 scope:SCOPE_SYS3921; GFX12-PAL-NEXT: s_wait_storecnt 0x03922; GFX12-PAL-NEXT: scratch_store_b32 off, v1, s32 offset:16000 scope:SCOPE_SYS3923; GFX12-PAL-NEXT: s_wait_storecnt 0x03924; GFX12-PAL-NEXT: scratch_load_b32 v0, off, s32 offset:16000 scope:SCOPE_SYS3925; GFX12-PAL-NEXT: s_wait_loadcnt 0x03926; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]3927bb:3928 %i = alloca [4096 x i32], align 4, addrspace(5)3929 %i1 = getelementptr inbounds [4096 x i32], ptr addrspace(5) %i, i32 0, i32 03930 store volatile i32 13, ptr addrspace(5) %i1, align 43931 %i7 = getelementptr inbounds [4096 x i32], ptr addrspace(5) %i, i32 0, i32 40003932 store volatile i32 15, ptr addrspace(5) %i7, align 43933 %i10 = getelementptr inbounds [4096 x i32], ptr addrspace(5) %i, i32 0, i32 40003934 %i12 = load volatile i32, ptr addrspace(5) %i10, align 43935 ret void3936}3937 3938define amdgpu_kernel void @store_load_vidx_sidx_offset(i32 %sidx) {3939; GFX9-LABEL: store_load_vidx_sidx_offset:3940; GFX9: ; %bb.0: ; %bb3941; GFX9-NEXT: s_load_dword s0, s[4:5], 0x243942; GFX9-NEXT: s_add_u32 flat_scratch_lo, s8, s133943; GFX9-NEXT: s_mov_b32 s1, 03944; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s9, 03945; GFX9-NEXT: v_mov_b32_e32 v1, 153946; GFX9-NEXT: s_waitcnt lgkmcnt(0)3947; GFX9-NEXT: v_add_u32_e32 v0, s0, v03948; GFX9-NEXT: v_lshl_add_u32 v0, v0, 2, s13949; GFX9-NEXT: scratch_store_dword v0, v1, off offset:10243950; GFX9-NEXT: s_waitcnt vmcnt(0)3951; GFX9-NEXT: scratch_load_dword v0, v0, off offset:1024 glc3952; GFX9-NEXT: s_waitcnt vmcnt(0)3953; GFX9-NEXT: s_endpgm3954;3955; GFX10-LABEL: store_load_vidx_sidx_offset:3956; GFX10: ; %bb.0: ; %bb3957; GFX10-NEXT: s_add_u32 s8, s8, s133958; GFX10-NEXT: s_addc_u32 s9, s9, 03959; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s83960; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s93961; GFX10-NEXT: s_load_dword s0, s[4:5], 0x243962; GFX10-NEXT: v_mov_b32_e32 v1, 153963; GFX10-NEXT: s_waitcnt lgkmcnt(0)3964; GFX10-NEXT: v_add_nc_u32_e32 v0, s0, v03965; GFX10-NEXT: v_lshl_add_u32 v0, v0, 2, 03966; GFX10-NEXT: scratch_store_dword v0, v1, off offset:10243967; GFX10-NEXT: s_waitcnt_vscnt null, 0x03968; GFX10-NEXT: scratch_load_dword v0, v0, off offset:1024 glc dlc3969; GFX10-NEXT: s_waitcnt vmcnt(0)3970; GFX10-NEXT: s_endpgm3971;3972; GFX11-LABEL: store_load_vidx_sidx_offset:3973; GFX11: ; %bb.0: ; %bb3974; GFX11-NEXT: s_load_b32 s0, s[4:5], 0x243975; GFX11-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_and_b32 v0, 0x3ff, v03976; GFX11-NEXT: s_waitcnt lgkmcnt(0)3977; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3978; GFX11-NEXT: v_add_nc_u32_e32 v0, s0, v03979; GFX11-NEXT: v_lshl_add_u32 v0, v0, 2, 03980; GFX11-NEXT: scratch_store_b32 v0, v1, off offset:1024 dlc3981; GFX11-NEXT: s_waitcnt_vscnt null, 0x03982; GFX11-NEXT: scratch_load_b32 v0, v0, off offset:1024 glc dlc3983; GFX11-NEXT: s_waitcnt vmcnt(0)3984; GFX11-NEXT: s_endpgm3985;3986; GFX12-LABEL: store_load_vidx_sidx_offset:3987; GFX12: ; %bb.0: ; %bb3988; GFX12-NEXT: s_load_b32 s0, s[4:5], 0x243989; GFX12-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_and_b32 v0, 0x3ff, v03990; GFX12-NEXT: s_wait_kmcnt 0x03991; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3992; GFX12-NEXT: v_add_lshl_u32 v0, s0, v0, 23993; GFX12-NEXT: scratch_store_b32 v0, v1, off offset:1024 scope:SCOPE_SYS3994; GFX12-NEXT: s_wait_storecnt 0x03995; GFX12-NEXT: scratch_load_b32 v0, v0, off offset:1024 scope:SCOPE_SYS3996; GFX12-NEXT: s_wait_loadcnt 0x03997; GFX12-NEXT: s_endpgm3998;3999; GFX9-PAL-LABEL: store_load_vidx_sidx_offset:4000; GFX9-PAL: ; %bb.0: ; %bb4001; GFX9-PAL-NEXT: s_getpc_b64 s[12:13]4002; GFX9-PAL-NEXT: s_mov_b32 s12, s04003; GFX9-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x04004; GFX9-PAL-NEXT: s_mov_b32 s1, 04005; GFX9-PAL-NEXT: s_load_dword s0, s[4:5], 0x04006; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 154007; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)4008; GFX9-PAL-NEXT: s_and_b32 s13, s13, 0xffff4009; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s12, s114010; GFX9-PAL-NEXT: v_add_u32_e32 v0, s0, v04011; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s13, 04012; GFX9-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, s14013; GFX9-PAL-NEXT: scratch_store_dword v0, v1, off offset:10244014; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4015; GFX9-PAL-NEXT: scratch_load_dword v0, v0, off offset:1024 glc4016; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4017; GFX9-PAL-NEXT: s_endpgm4018;4019; GFX942-LABEL: store_load_vidx_sidx_offset:4020; GFX942: ; %bb.0: ; %bb4021; GFX942-NEXT: s_load_dword s0, s[4:5], 0x244022; GFX942-NEXT: v_and_b32_e32 v0, 0x3ff, v04023; GFX942-NEXT: s_mov_b32 s1, 04024; GFX942-NEXT: v_mov_b32_e32 v1, 154025; GFX942-NEXT: s_waitcnt lgkmcnt(0)4026; GFX942-NEXT: v_add_u32_e32 v0, s0, v04027; GFX942-NEXT: v_lshl_add_u32 v0, v0, 2, s14028; GFX942-NEXT: scratch_store_dword v0, v1, off offset:1024 sc0 sc14029; GFX942-NEXT: s_waitcnt vmcnt(0)4030; GFX942-NEXT: scratch_load_dword v0, v0, off offset:1024 sc0 sc14031; GFX942-NEXT: s_waitcnt vmcnt(0)4032; GFX942-NEXT: s_endpgm4033;4034; GFX10-PAL-LABEL: store_load_vidx_sidx_offset:4035; GFX10-PAL: ; %bb.0: ; %bb4036; GFX10-PAL-NEXT: s_getpc_b64 s[12:13]4037; GFX10-PAL-NEXT: s_mov_b32 s12, s04038; GFX10-PAL-NEXT: s_load_dwordx2 s[12:13], s[12:13], 0x04039; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)4040; GFX10-PAL-NEXT: s_and_b32 s13, s13, 0xffff4041; GFX10-PAL-NEXT: s_add_u32 s12, s12, s114042; GFX10-PAL-NEXT: s_addc_u32 s13, s13, 04043; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s124044; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s134045; GFX10-PAL-NEXT: s_load_dword s0, s[4:5], 0x04046; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 154047; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)4048; GFX10-PAL-NEXT: v_add_nc_u32_e32 v0, s0, v04049; GFX10-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, 04050; GFX10-PAL-NEXT: scratch_store_dword v0, v1, off offset:10244051; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x04052; GFX10-PAL-NEXT: scratch_load_dword v0, v0, off offset:1024 glc dlc4053; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)4054; GFX10-PAL-NEXT: s_endpgm4055;4056; GFX11-PAL-LABEL: store_load_vidx_sidx_offset:4057; GFX11-PAL: ; %bb.0: ; %bb4058; GFX11-PAL-NEXT: s_load_b32 s0, s[4:5], 0x04059; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_and_b32 v0, 0x3ff, v04060; GFX11-PAL-NEXT: s_waitcnt lgkmcnt(0)4061; GFX11-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)4062; GFX11-PAL-NEXT: v_add_nc_u32_e32 v0, s0, v04063; GFX11-PAL-NEXT: v_lshl_add_u32 v0, v0, 2, 04064; GFX11-PAL-NEXT: scratch_store_b32 v0, v1, off offset:1024 dlc4065; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x04066; GFX11-PAL-NEXT: scratch_load_b32 v0, v0, off offset:1024 glc dlc4067; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)4068; GFX11-PAL-NEXT: s_endpgm4069;4070; GFX12-PAL-LABEL: store_load_vidx_sidx_offset:4071; GFX12-PAL: ; %bb.0: ; %bb4072; GFX12-PAL-NEXT: s_load_b32 s0, s[4:5], 0x04073; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_and_b32 v0, 0x3ff, v04074; GFX12-PAL-NEXT: s_wait_kmcnt 0x04075; GFX12-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1)4076; GFX12-PAL-NEXT: v_add_lshl_u32 v0, s0, v0, 24077; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, off offset:1024 scope:SCOPE_SYS4078; GFX12-PAL-NEXT: s_wait_storecnt 0x04079; GFX12-PAL-NEXT: scratch_load_b32 v0, v0, off offset:1024 scope:SCOPE_SYS4080; GFX12-PAL-NEXT: s_wait_loadcnt 0x04081; GFX12-PAL-NEXT: s_endpgm4082bb:4083 %alloca = alloca [32 x i32], align 4, addrspace(5)4084 %vidx = tail call i32 @llvm.amdgcn.workitem.id.x()4085 %add1 = add nsw i32 %sidx, %vidx4086 %gep1 = getelementptr [32 x float], ptr addrspace(5) %alloca, i32 0, i32 %add14087 %gep = getelementptr inbounds [32 x float], ptr addrspace(5) %gep1, i32 0, i32 2564088 store volatile i32 15, ptr addrspace(5) %gep, align 44089 %load = load volatile i32, ptr addrspace(5) %gep, align 44090 ret void4091}4092 4093define void @store_load_i64_aligned(ptr addrspace(5) nocapture %arg) {4094; GFX9-LABEL: store_load_i64_aligned:4095; GFX9: ; %bb.0: ; %bb4096; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4097; GFX9-NEXT: v_mov_b32_e32 v1, 154098; GFX9-NEXT: v_mov_b32_e32 v2, 04099; GFX9-NEXT: scratch_store_dwordx2 v0, v[1:2], off4100; GFX9-NEXT: s_waitcnt vmcnt(0)4101; GFX9-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc4102; GFX9-NEXT: s_waitcnt vmcnt(0)4103; GFX9-NEXT: s_setpc_b64 s[30:31]4104;4105; GFX10-LABEL: store_load_i64_aligned:4106; GFX10: ; %bb.0: ; %bb4107; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4108; GFX10-NEXT: v_mov_b32_e32 v1, 154109; GFX10-NEXT: v_mov_b32_e32 v2, 04110; GFX10-NEXT: scratch_store_dwordx2 v0, v[1:2], off4111; GFX10-NEXT: s_waitcnt_vscnt null, 0x04112; GFX10-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc dlc4113; GFX10-NEXT: s_waitcnt vmcnt(0)4114; GFX10-NEXT: s_setpc_b64 s[30:31]4115;4116; GFX11-LABEL: store_load_i64_aligned:4117; GFX11: ; %bb.0: ; %bb4118; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4119; GFX11-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04120; GFX11-NEXT: scratch_store_b64 v0, v[1:2], off dlc4121; GFX11-NEXT: s_waitcnt_vscnt null, 0x04122; GFX11-NEXT: scratch_load_b64 v[0:1], v0, off glc dlc4123; GFX11-NEXT: s_waitcnt vmcnt(0)4124; GFX11-NEXT: s_setpc_b64 s[30:31]4125;4126; GFX12-LABEL: store_load_i64_aligned:4127; GFX12: ; %bb.0: ; %bb4128; GFX12-NEXT: s_wait_loadcnt_dscnt 0x04129; GFX12-NEXT: s_wait_expcnt 0x04130; GFX12-NEXT: s_wait_samplecnt 0x04131; GFX12-NEXT: s_wait_bvhcnt 0x04132; GFX12-NEXT: s_wait_kmcnt 0x04133; GFX12-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04134; GFX12-NEXT: s_wait_storecnt 0x04135; GFX12-NEXT: scratch_store_b64 v0, v[1:2], off scope:SCOPE_SYS4136; GFX12-NEXT: s_wait_storecnt 0x04137; GFX12-NEXT: scratch_load_b64 v[0:1], v0, off scope:SCOPE_SYS4138; GFX12-NEXT: s_wait_loadcnt 0x04139; GFX12-NEXT: s_setpc_b64 s[30:31]4140;4141; GFX9-PAL-LABEL: store_load_i64_aligned:4142; GFX9-PAL: ; %bb.0: ; %bb4143; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4144; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 154145; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 04146; GFX9-PAL-NEXT: scratch_store_dwordx2 v0, v[1:2], off4147; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4148; GFX9-PAL-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc4149; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4150; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]4151;4152; GFX942-LABEL: store_load_i64_aligned:4153; GFX942: ; %bb.0: ; %bb4154; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4155; GFX942-NEXT: v_mov_b32_e32 v2, 154156; GFX942-NEXT: v_mov_b32_e32 v3, 04157; GFX942-NEXT: scratch_store_dwordx2 v0, v[2:3], off sc0 sc14158; GFX942-NEXT: s_waitcnt vmcnt(0)4159; GFX942-NEXT: scratch_load_dwordx2 v[0:1], v0, off sc0 sc14160; GFX942-NEXT: s_waitcnt vmcnt(0)4161; GFX942-NEXT: s_setpc_b64 s[30:31]4162;4163; GFX10-PAL-LABEL: store_load_i64_aligned:4164; GFX10-PAL: ; %bb.0: ; %bb4165; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4166; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 154167; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 04168; GFX10-PAL-NEXT: scratch_store_dwordx2 v0, v[1:2], off4169; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x04170; GFX10-PAL-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc dlc4171; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)4172; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]4173;4174; GFX11-PAL-LABEL: store_load_i64_aligned:4175; GFX11-PAL: ; %bb.0: ; %bb4176; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4177; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04178; GFX11-PAL-NEXT: scratch_store_b64 v0, v[1:2], off dlc4179; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x04180; GFX11-PAL-NEXT: scratch_load_b64 v[0:1], v0, off glc dlc4181; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)4182; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]4183;4184; GFX12-PAL-LABEL: store_load_i64_aligned:4185; GFX12-PAL: ; %bb.0: ; %bb4186; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x04187; GFX12-PAL-NEXT: s_wait_expcnt 0x04188; GFX12-PAL-NEXT: s_wait_samplecnt 0x04189; GFX12-PAL-NEXT: s_wait_bvhcnt 0x04190; GFX12-PAL-NEXT: s_wait_kmcnt 0x04191; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04192; GFX12-PAL-NEXT: s_wait_storecnt 0x04193; GFX12-PAL-NEXT: scratch_store_b64 v0, v[1:2], off scope:SCOPE_SYS4194; GFX12-PAL-NEXT: s_wait_storecnt 0x04195; GFX12-PAL-NEXT: scratch_load_b64 v[0:1], v0, off scope:SCOPE_SYS4196; GFX12-PAL-NEXT: s_wait_loadcnt 0x04197; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]4198bb:4199 store volatile i64 15, ptr addrspace(5) %arg, align 84200 %load = load volatile i64, ptr addrspace(5) %arg, align 84201 ret void4202}4203 4204define void @store_load_i64_unaligned(ptr addrspace(5) nocapture %arg) {4205; GFX9-LABEL: store_load_i64_unaligned:4206; GFX9: ; %bb.0: ; %bb4207; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4208; GFX9-NEXT: v_mov_b32_e32 v1, 154209; GFX9-NEXT: v_mov_b32_e32 v2, 04210; GFX9-NEXT: scratch_store_dwordx2 v0, v[1:2], off4211; GFX9-NEXT: s_waitcnt vmcnt(0)4212; GFX9-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc4213; GFX9-NEXT: s_waitcnt vmcnt(0)4214; GFX9-NEXT: s_setpc_b64 s[30:31]4215;4216; GFX10-LABEL: store_load_i64_unaligned:4217; GFX10: ; %bb.0: ; %bb4218; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4219; GFX10-NEXT: v_mov_b32_e32 v1, 154220; GFX10-NEXT: v_mov_b32_e32 v2, 04221; GFX10-NEXT: scratch_store_dwordx2 v0, v[1:2], off4222; GFX10-NEXT: s_waitcnt_vscnt null, 0x04223; GFX10-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc dlc4224; GFX10-NEXT: s_waitcnt vmcnt(0)4225; GFX10-NEXT: s_setpc_b64 s[30:31]4226;4227; GFX11-LABEL: store_load_i64_unaligned:4228; GFX11: ; %bb.0: ; %bb4229; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4230; GFX11-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04231; GFX11-NEXT: scratch_store_b64 v0, v[1:2], off dlc4232; GFX11-NEXT: s_waitcnt_vscnt null, 0x04233; GFX11-NEXT: scratch_load_b64 v[0:1], v0, off glc dlc4234; GFX11-NEXT: s_waitcnt vmcnt(0)4235; GFX11-NEXT: s_setpc_b64 s[30:31]4236;4237; GFX12-LABEL: store_load_i64_unaligned:4238; GFX12: ; %bb.0: ; %bb4239; GFX12-NEXT: s_wait_loadcnt_dscnt 0x04240; GFX12-NEXT: s_wait_expcnt 0x04241; GFX12-NEXT: s_wait_samplecnt 0x04242; GFX12-NEXT: s_wait_bvhcnt 0x04243; GFX12-NEXT: s_wait_kmcnt 0x04244; GFX12-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04245; GFX12-NEXT: s_wait_storecnt 0x04246; GFX12-NEXT: scratch_store_b64 v0, v[1:2], off scope:SCOPE_SYS4247; GFX12-NEXT: s_wait_storecnt 0x04248; GFX12-NEXT: scratch_load_b64 v[0:1], v0, off scope:SCOPE_SYS4249; GFX12-NEXT: s_wait_loadcnt 0x04250; GFX12-NEXT: s_setpc_b64 s[30:31]4251;4252; GFX9-PAL-LABEL: store_load_i64_unaligned:4253; GFX9-PAL: ; %bb.0: ; %bb4254; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4255; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 154256; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 04257; GFX9-PAL-NEXT: scratch_store_dwordx2 v0, v[1:2], off4258; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4259; GFX9-PAL-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc4260; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4261; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]4262;4263; GFX942-LABEL: store_load_i64_unaligned:4264; GFX942: ; %bb.0: ; %bb4265; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4266; GFX942-NEXT: v_mov_b32_e32 v2, 154267; GFX942-NEXT: v_mov_b32_e32 v3, 04268; GFX942-NEXT: scratch_store_dwordx2 v0, v[2:3], off sc0 sc14269; GFX942-NEXT: s_waitcnt vmcnt(0)4270; GFX942-NEXT: scratch_load_dwordx2 v[0:1], v0, off sc0 sc14271; GFX942-NEXT: s_waitcnt vmcnt(0)4272; GFX942-NEXT: s_setpc_b64 s[30:31]4273;4274; GFX10-PAL-LABEL: store_load_i64_unaligned:4275; GFX10-PAL: ; %bb.0: ; %bb4276; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4277; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 154278; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 04279; GFX10-PAL-NEXT: scratch_store_dwordx2 v0, v[1:2], off4280; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x04281; GFX10-PAL-NEXT: scratch_load_dwordx2 v[0:1], v0, off glc dlc4282; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)4283; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]4284;4285; GFX11-PAL-LABEL: store_load_i64_unaligned:4286; GFX11-PAL: ; %bb.0: ; %bb4287; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4288; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04289; GFX11-PAL-NEXT: scratch_store_b64 v0, v[1:2], off dlc4290; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x04291; GFX11-PAL-NEXT: scratch_load_b64 v[0:1], v0, off glc dlc4292; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)4293; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]4294;4295; GFX12-PAL-LABEL: store_load_i64_unaligned:4296; GFX12-PAL: ; %bb.0: ; %bb4297; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x04298; GFX12-PAL-NEXT: s_wait_expcnt 0x04299; GFX12-PAL-NEXT: s_wait_samplecnt 0x04300; GFX12-PAL-NEXT: s_wait_bvhcnt 0x04301; GFX12-PAL-NEXT: s_wait_kmcnt 0x04302; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 15 :: v_dual_mov_b32 v2, 04303; GFX12-PAL-NEXT: s_wait_storecnt 0x04304; GFX12-PAL-NEXT: scratch_store_b64 v0, v[1:2], off scope:SCOPE_SYS4305; GFX12-PAL-NEXT: s_wait_storecnt 0x04306; GFX12-PAL-NEXT: scratch_load_b64 v[0:1], v0, off scope:SCOPE_SYS4307; GFX12-PAL-NEXT: s_wait_loadcnt 0x04308; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]4309bb:4310 store volatile i64 15, ptr addrspace(5) %arg, align 14311 %load = load volatile i64, ptr addrspace(5) %arg, align 14312 ret void4313}4314 4315define void @store_load_v3i32_unaligned(ptr addrspace(5) nocapture %arg) {4316; GFX9-LABEL: store_load_v3i32_unaligned:4317; GFX9: ; %bb.0: ; %bb4318; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4319; GFX9-NEXT: v_mov_b32_e32 v1, 14320; GFX9-NEXT: v_mov_b32_e32 v2, 24321; GFX9-NEXT: v_mov_b32_e32 v3, 34322; GFX9-NEXT: scratch_store_dwordx3 v0, v[1:3], off4323; GFX9-NEXT: s_waitcnt vmcnt(0)4324; GFX9-NEXT: scratch_load_dwordx3 v[0:2], v0, off glc4325; GFX9-NEXT: s_waitcnt vmcnt(0)4326; GFX9-NEXT: s_setpc_b64 s[30:31]4327;4328; GFX10-LABEL: store_load_v3i32_unaligned:4329; GFX10: ; %bb.0: ; %bb4330; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4331; GFX10-NEXT: v_mov_b32_e32 v1, 14332; GFX10-NEXT: v_mov_b32_e32 v2, 24333; GFX10-NEXT: v_mov_b32_e32 v3, 34334; GFX10-NEXT: scratch_store_dwordx3 v0, v[1:3], off4335; GFX10-NEXT: s_waitcnt_vscnt null, 0x04336; GFX10-NEXT: scratch_load_dwordx3 v[0:2], v0, off glc dlc4337; GFX10-NEXT: s_waitcnt vmcnt(0)4338; GFX10-NEXT: s_setpc_b64 s[30:31]4339;4340; GFX11-LABEL: store_load_v3i32_unaligned:4341; GFX11: ; %bb.0: ; %bb4342; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4343; GFX11-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24344; GFX11-NEXT: v_mov_b32_e32 v3, 34345; GFX11-NEXT: scratch_store_b96 v0, v[1:3], off dlc4346; GFX11-NEXT: s_waitcnt_vscnt null, 0x04347; GFX11-NEXT: scratch_load_b96 v[0:2], v0, off glc dlc4348; GFX11-NEXT: s_waitcnt vmcnt(0)4349; GFX11-NEXT: s_setpc_b64 s[30:31]4350;4351; GFX12-LABEL: store_load_v3i32_unaligned:4352; GFX12: ; %bb.0: ; %bb4353; GFX12-NEXT: s_wait_loadcnt_dscnt 0x04354; GFX12-NEXT: s_wait_expcnt 0x04355; GFX12-NEXT: s_wait_samplecnt 0x04356; GFX12-NEXT: s_wait_bvhcnt 0x04357; GFX12-NEXT: s_wait_kmcnt 0x04358; GFX12-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24359; GFX12-NEXT: v_mov_b32_e32 v3, 34360; GFX12-NEXT: s_wait_storecnt 0x04361; GFX12-NEXT: scratch_store_b96 v0, v[1:3], off scope:SCOPE_SYS4362; GFX12-NEXT: s_wait_storecnt 0x04363; GFX12-NEXT: scratch_load_b96 v[0:2], v0, off scope:SCOPE_SYS4364; GFX12-NEXT: s_wait_loadcnt 0x04365; GFX12-NEXT: s_setpc_b64 s[30:31]4366;4367; GFX9-PAL-LABEL: store_load_v3i32_unaligned:4368; GFX9-PAL: ; %bb.0: ; %bb4369; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4370; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 14371; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 24372; GFX9-PAL-NEXT: v_mov_b32_e32 v3, 34373; GFX9-PAL-NEXT: scratch_store_dwordx3 v0, v[1:3], off4374; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4375; GFX9-PAL-NEXT: scratch_load_dwordx3 v[0:2], v0, off glc4376; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4377; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]4378;4379; GFX942-LABEL: store_load_v3i32_unaligned:4380; GFX942: ; %bb.0: ; %bb4381; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4382; GFX942-NEXT: v_mov_b32_e32 v2, 14383; GFX942-NEXT: v_mov_b32_e32 v3, 24384; GFX942-NEXT: v_mov_b32_e32 v4, 34385; GFX942-NEXT: scratch_store_dwordx3 v0, v[2:4], off sc0 sc14386; GFX942-NEXT: s_waitcnt vmcnt(0)4387; GFX942-NEXT: scratch_load_dwordx3 v[0:2], v0, off sc0 sc14388; GFX942-NEXT: s_waitcnt vmcnt(0)4389; GFX942-NEXT: s_setpc_b64 s[30:31]4390;4391; GFX10-PAL-LABEL: store_load_v3i32_unaligned:4392; GFX10-PAL: ; %bb.0: ; %bb4393; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4394; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 14395; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 24396; GFX10-PAL-NEXT: v_mov_b32_e32 v3, 34397; GFX10-PAL-NEXT: scratch_store_dwordx3 v0, v[1:3], off4398; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x04399; GFX10-PAL-NEXT: scratch_load_dwordx3 v[0:2], v0, off glc dlc4400; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)4401; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]4402;4403; GFX11-PAL-LABEL: store_load_v3i32_unaligned:4404; GFX11-PAL: ; %bb.0: ; %bb4405; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4406; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24407; GFX11-PAL-NEXT: v_mov_b32_e32 v3, 34408; GFX11-PAL-NEXT: scratch_store_b96 v0, v[1:3], off dlc4409; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x04410; GFX11-PAL-NEXT: scratch_load_b96 v[0:2], v0, off glc dlc4411; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)4412; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]4413;4414; GFX12-PAL-LABEL: store_load_v3i32_unaligned:4415; GFX12-PAL: ; %bb.0: ; %bb4416; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x04417; GFX12-PAL-NEXT: s_wait_expcnt 0x04418; GFX12-PAL-NEXT: s_wait_samplecnt 0x04419; GFX12-PAL-NEXT: s_wait_bvhcnt 0x04420; GFX12-PAL-NEXT: s_wait_kmcnt 0x04421; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24422; GFX12-PAL-NEXT: v_mov_b32_e32 v3, 34423; GFX12-PAL-NEXT: s_wait_storecnt 0x04424; GFX12-PAL-NEXT: scratch_store_b96 v0, v[1:3], off scope:SCOPE_SYS4425; GFX12-PAL-NEXT: s_wait_storecnt 0x04426; GFX12-PAL-NEXT: scratch_load_b96 v[0:2], v0, off scope:SCOPE_SYS4427; GFX12-PAL-NEXT: s_wait_loadcnt 0x04428; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]4429bb:4430 store volatile <3 x i32> <i32 1, i32 2, i32 3>, ptr addrspace(5) %arg, align 14431 %load = load volatile <3 x i32>, ptr addrspace(5) %arg, align 14432 ret void4433}4434 4435define void @store_load_v4i32_unaligned(ptr addrspace(5) nocapture %arg) {4436; GFX9-LABEL: store_load_v4i32_unaligned:4437; GFX9: ; %bb.0: ; %bb4438; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4439; GFX9-NEXT: v_mov_b32_e32 v1, 14440; GFX9-NEXT: v_mov_b32_e32 v2, 24441; GFX9-NEXT: v_mov_b32_e32 v3, 34442; GFX9-NEXT: v_mov_b32_e32 v4, 44443; GFX9-NEXT: scratch_store_dwordx4 v0, v[1:4], off4444; GFX9-NEXT: s_waitcnt vmcnt(0)4445; GFX9-NEXT: scratch_load_dwordx4 v[0:3], v0, off glc4446; GFX9-NEXT: s_waitcnt vmcnt(0)4447; GFX9-NEXT: s_setpc_b64 s[30:31]4448;4449; GFX10-LABEL: store_load_v4i32_unaligned:4450; GFX10: ; %bb.0: ; %bb4451; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4452; GFX10-NEXT: v_mov_b32_e32 v1, 14453; GFX10-NEXT: v_mov_b32_e32 v2, 24454; GFX10-NEXT: v_mov_b32_e32 v3, 34455; GFX10-NEXT: v_mov_b32_e32 v4, 44456; GFX10-NEXT: scratch_store_dwordx4 v0, v[1:4], off4457; GFX10-NEXT: s_waitcnt_vscnt null, 0x04458; GFX10-NEXT: scratch_load_dwordx4 v[0:3], v0, off glc dlc4459; GFX10-NEXT: s_waitcnt vmcnt(0)4460; GFX10-NEXT: s_setpc_b64 s[30:31]4461;4462; GFX11-LABEL: store_load_v4i32_unaligned:4463; GFX11: ; %bb.0: ; %bb4464; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4465; GFX11-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24466; GFX11-NEXT: v_dual_mov_b32 v3, 3 :: v_dual_mov_b32 v4, 44467; GFX11-NEXT: scratch_store_b128 v0, v[1:4], off dlc4468; GFX11-NEXT: s_waitcnt_vscnt null, 0x04469; GFX11-NEXT: scratch_load_b128 v[0:3], v0, off glc dlc4470; GFX11-NEXT: s_waitcnt vmcnt(0)4471; GFX11-NEXT: s_setpc_b64 s[30:31]4472;4473; GFX12-LABEL: store_load_v4i32_unaligned:4474; GFX12: ; %bb.0: ; %bb4475; GFX12-NEXT: s_wait_loadcnt_dscnt 0x04476; GFX12-NEXT: s_wait_expcnt 0x04477; GFX12-NEXT: s_wait_samplecnt 0x04478; GFX12-NEXT: s_wait_bvhcnt 0x04479; GFX12-NEXT: s_wait_kmcnt 0x04480; GFX12-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24481; GFX12-NEXT: v_dual_mov_b32 v3, 3 :: v_dual_mov_b32 v4, 44482; GFX12-NEXT: s_wait_storecnt 0x04483; GFX12-NEXT: scratch_store_b128 v0, v[1:4], off scope:SCOPE_SYS4484; GFX12-NEXT: s_wait_storecnt 0x04485; GFX12-NEXT: scratch_load_b128 v[0:3], v0, off scope:SCOPE_SYS4486; GFX12-NEXT: s_wait_loadcnt 0x04487; GFX12-NEXT: s_setpc_b64 s[30:31]4488;4489; GFX9-PAL-LABEL: store_load_v4i32_unaligned:4490; GFX9-PAL: ; %bb.0: ; %bb4491; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4492; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 14493; GFX9-PAL-NEXT: v_mov_b32_e32 v2, 24494; GFX9-PAL-NEXT: v_mov_b32_e32 v3, 34495; GFX9-PAL-NEXT: v_mov_b32_e32 v4, 44496; GFX9-PAL-NEXT: scratch_store_dwordx4 v0, v[1:4], off4497; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4498; GFX9-PAL-NEXT: scratch_load_dwordx4 v[0:3], v0, off glc4499; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4500; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]4501;4502; GFX942-LABEL: store_load_v4i32_unaligned:4503; GFX942: ; %bb.0: ; %bb4504; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4505; GFX942-NEXT: v_mov_b32_e32 v2, 14506; GFX942-NEXT: v_mov_b32_e32 v3, 24507; GFX942-NEXT: v_mov_b32_e32 v4, 34508; GFX942-NEXT: v_mov_b32_e32 v5, 44509; GFX942-NEXT: scratch_store_dwordx4 v0, v[2:5], off sc0 sc14510; GFX942-NEXT: s_waitcnt vmcnt(0)4511; GFX942-NEXT: scratch_load_dwordx4 v[0:3], v0, off sc0 sc14512; GFX942-NEXT: s_waitcnt vmcnt(0)4513; GFX942-NEXT: s_setpc_b64 s[30:31]4514;4515; GFX10-PAL-LABEL: store_load_v4i32_unaligned:4516; GFX10-PAL: ; %bb.0: ; %bb4517; GFX10-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4518; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 14519; GFX10-PAL-NEXT: v_mov_b32_e32 v2, 24520; GFX10-PAL-NEXT: v_mov_b32_e32 v3, 34521; GFX10-PAL-NEXT: v_mov_b32_e32 v4, 44522; GFX10-PAL-NEXT: scratch_store_dwordx4 v0, v[1:4], off4523; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x04524; GFX10-PAL-NEXT: scratch_load_dwordx4 v[0:3], v0, off glc dlc4525; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)4526; GFX10-PAL-NEXT: s_setpc_b64 s[30:31]4527;4528; GFX11-PAL-LABEL: store_load_v4i32_unaligned:4529; GFX11-PAL: ; %bb.0: ; %bb4530; GFX11-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4531; GFX11-PAL-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24532; GFX11-PAL-NEXT: v_dual_mov_b32 v3, 3 :: v_dual_mov_b32 v4, 44533; GFX11-PAL-NEXT: scratch_store_b128 v0, v[1:4], off dlc4534; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x04535; GFX11-PAL-NEXT: scratch_load_b128 v[0:3], v0, off glc dlc4536; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)4537; GFX11-PAL-NEXT: s_setpc_b64 s[30:31]4538;4539; GFX12-PAL-LABEL: store_load_v4i32_unaligned:4540; GFX12-PAL: ; %bb.0: ; %bb4541; GFX12-PAL-NEXT: s_wait_loadcnt_dscnt 0x04542; GFX12-PAL-NEXT: s_wait_expcnt 0x04543; GFX12-PAL-NEXT: s_wait_samplecnt 0x04544; GFX12-PAL-NEXT: s_wait_bvhcnt 0x04545; GFX12-PAL-NEXT: s_wait_kmcnt 0x04546; GFX12-PAL-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_mov_b32 v2, 24547; GFX12-PAL-NEXT: v_dual_mov_b32 v3, 3 :: v_dual_mov_b32 v4, 44548; GFX12-PAL-NEXT: s_wait_storecnt 0x04549; GFX12-PAL-NEXT: scratch_store_b128 v0, v[1:4], off scope:SCOPE_SYS4550; GFX12-PAL-NEXT: s_wait_storecnt 0x04551; GFX12-PAL-NEXT: scratch_load_b128 v[0:3], v0, off scope:SCOPE_SYS4552; GFX12-PAL-NEXT: s_wait_loadcnt 0x04553; GFX12-PAL-NEXT: s_setpc_b64 s[30:31]4554bb:4555 store volatile <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr addrspace(5) %arg, align 14556 %load = load volatile <4 x i32>, ptr addrspace(5) %arg, align 14557 ret void4558}4559 4560define void @store_load_i32_negative_unaligned(ptr addrspace(5) nocapture %arg) {4561; GFX9-LABEL: store_load_i32_negative_unaligned:4562; GFX9: ; %bb.0: ; %bb4563; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4564; GFX9-NEXT: v_add_u32_e32 v0, -1, v04565; GFX9-NEXT: v_mov_b32_e32 v1, 14566; GFX9-NEXT: scratch_store_byte v0, v1, off4567; GFX9-NEXT: s_waitcnt vmcnt(0)4568; GFX9-NEXT: scratch_load_ubyte v0, v0, off glc4569; GFX9-NEXT: s_waitcnt vmcnt(0)4570; GFX9-NEXT: s_setpc_b64 s[30:31]4571;4572; GFX10-LABEL: store_load_i32_negative_unaligned:4573; GFX10: ; %bb.0: ; %bb4574; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4575; GFX10-NEXT: v_mov_b32_e32 v1, 14576; GFX10-NEXT: scratch_store_byte v0, v1, off offset:-14577; GFX10-NEXT: s_waitcnt_vscnt null, 0x04578; GFX10-NEXT: scratch_load_ubyte v0, v0, off offset:-1 glc dlc4579; GFX10-NEXT: s_waitcnt vmcnt(0)4580; GFX10-NEXT: s_setpc_b64 s[30:31]4581;4582; GFX11-TRUE16-LABEL: store_load_i32_negative_unaligned:4583; GFX11-TRUE16: ; %bb.0: ; %bb4584; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4585; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, 14586; GFX11-TRUE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 dlc4587; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x04588; GFX11-TRUE16-NEXT: scratch_load_d16_u8 v0, v0, off offset:-1 glc dlc4589; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)4590; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]4591;4592; GFX11-FAKE16-LABEL: store_load_i32_negative_unaligned:4593; GFX11-FAKE16: ; %bb.0: ; %bb4594; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4595; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 14596; GFX11-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 dlc4597; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x04598; GFX11-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-1 glc dlc4599; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)4600; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]4601;4602; GFX12-TRUE16-LABEL: store_load_i32_negative_unaligned:4603; GFX12-TRUE16: ; %bb.0: ; %bb4604; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x04605; GFX12-TRUE16-NEXT: s_wait_expcnt 0x04606; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x04607; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x04608; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x04609; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, 14610; GFX12-TRUE16-NEXT: s_wait_storecnt 0x04611; GFX12-TRUE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 scope:SCOPE_SYS4612; GFX12-TRUE16-NEXT: s_wait_storecnt 0x04613; GFX12-TRUE16-NEXT: scratch_load_d16_u8 v0, v0, off offset:-1 scope:SCOPE_SYS4614; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x04615; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]4616;4617; GFX12-FAKE16-LABEL: store_load_i32_negative_unaligned:4618; GFX12-FAKE16: ; %bb.0: ; %bb4619; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x04620; GFX12-FAKE16-NEXT: s_wait_expcnt 0x04621; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x04622; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x04623; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x04624; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, 14625; GFX12-FAKE16-NEXT: s_wait_storecnt 0x04626; GFX12-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 scope:SCOPE_SYS4627; GFX12-FAKE16-NEXT: s_wait_storecnt 0x04628; GFX12-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-1 scope:SCOPE_SYS4629; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x04630; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]4631;4632; GFX9-PAL-LABEL: store_load_i32_negative_unaligned:4633; GFX9-PAL: ; %bb.0: ; %bb4634; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4635; GFX9-PAL-NEXT: v_add_u32_e32 v0, -1, v04636; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 14637; GFX9-PAL-NEXT: scratch_store_byte v0, v1, off4638; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4639; GFX9-PAL-NEXT: scratch_load_ubyte v0, v0, off glc4640; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4641; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]4642;4643; GFX942-LABEL: store_load_i32_negative_unaligned:4644; GFX942: ; %bb.0: ; %bb4645; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4646; GFX942-NEXT: v_add_u32_e32 v0, -1, v04647; GFX942-NEXT: v_mov_b32_e32 v1, 14648; GFX942-NEXT: scratch_store_byte v0, v1, off sc0 sc14649; GFX942-NEXT: s_waitcnt vmcnt(0)4650; GFX942-NEXT: scratch_load_ubyte v0, v0, off sc0 sc14651; GFX942-NEXT: s_waitcnt vmcnt(0)4652; GFX942-NEXT: s_setpc_b64 s[30:31]4653;4654; GFX1010-PAL-LABEL: store_load_i32_negative_unaligned:4655; GFX1010-PAL: ; %bb.0: ; %bb4656; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4657; GFX1010-PAL-NEXT: v_add_nc_u32_e32 v0, -1, v04658; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, 14659; GFX1010-PAL-NEXT: scratch_store_byte v0, v1, off4660; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x04661; GFX1010-PAL-NEXT: scratch_load_ubyte v0, v0, off glc dlc4662; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)4663; GFX1010-PAL-NEXT: s_setpc_b64 s[30:31]4664;4665; GFX1030-PAL-LABEL: store_load_i32_negative_unaligned:4666; GFX1030-PAL: ; %bb.0: ; %bb4667; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4668; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, 14669; GFX1030-PAL-NEXT: scratch_store_byte v0, v1, off offset:-14670; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x04671; GFX1030-PAL-NEXT: scratch_load_ubyte v0, v0, off offset:-1 glc dlc4672; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)4673; GFX1030-PAL-NEXT: s_setpc_b64 s[30:31]4674;4675; GFX11-PAL-TRUE16-LABEL: store_load_i32_negative_unaligned:4676; GFX11-PAL-TRUE16: ; %bb.0: ; %bb4677; GFX11-PAL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4678; GFX11-PAL-TRUE16-NEXT: v_mov_b16_e32 v1.l, 14679; GFX11-PAL-TRUE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 dlc4680; GFX11-PAL-TRUE16-NEXT: s_waitcnt_vscnt null, 0x04681; GFX11-PAL-TRUE16-NEXT: scratch_load_d16_u8 v0, v0, off offset:-1 glc dlc4682; GFX11-PAL-TRUE16-NEXT: s_waitcnt vmcnt(0)4683; GFX11-PAL-TRUE16-NEXT: s_setpc_b64 s[30:31]4684;4685; GFX11-PAL-FAKE16-LABEL: store_load_i32_negative_unaligned:4686; GFX11-PAL-FAKE16: ; %bb.0: ; %bb4687; GFX11-PAL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4688; GFX11-PAL-FAKE16-NEXT: v_mov_b32_e32 v1, 14689; GFX11-PAL-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 dlc4690; GFX11-PAL-FAKE16-NEXT: s_waitcnt_vscnt null, 0x04691; GFX11-PAL-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-1 glc dlc4692; GFX11-PAL-FAKE16-NEXT: s_waitcnt vmcnt(0)4693; GFX11-PAL-FAKE16-NEXT: s_setpc_b64 s[30:31]4694;4695; GFX12-PAL-TRUE16-LABEL: store_load_i32_negative_unaligned:4696; GFX12-PAL-TRUE16: ; %bb.0: ; %bb4697; GFX12-PAL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x04698; GFX12-PAL-TRUE16-NEXT: s_wait_expcnt 0x04699; GFX12-PAL-TRUE16-NEXT: s_wait_samplecnt 0x04700; GFX12-PAL-TRUE16-NEXT: s_wait_bvhcnt 0x04701; GFX12-PAL-TRUE16-NEXT: s_wait_kmcnt 0x04702; GFX12-PAL-TRUE16-NEXT: v_mov_b16_e32 v1.l, 14703; GFX12-PAL-TRUE16-NEXT: s_wait_storecnt 0x04704; GFX12-PAL-TRUE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 scope:SCOPE_SYS4705; GFX12-PAL-TRUE16-NEXT: s_wait_storecnt 0x04706; GFX12-PAL-TRUE16-NEXT: scratch_load_d16_u8 v0, v0, off offset:-1 scope:SCOPE_SYS4707; GFX12-PAL-TRUE16-NEXT: s_wait_loadcnt 0x04708; GFX12-PAL-TRUE16-NEXT: s_setpc_b64 s[30:31]4709;4710; GFX12-PAL-FAKE16-LABEL: store_load_i32_negative_unaligned:4711; GFX12-PAL-FAKE16: ; %bb.0: ; %bb4712; GFX12-PAL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x04713; GFX12-PAL-FAKE16-NEXT: s_wait_expcnt 0x04714; GFX12-PAL-FAKE16-NEXT: s_wait_samplecnt 0x04715; GFX12-PAL-FAKE16-NEXT: s_wait_bvhcnt 0x04716; GFX12-PAL-FAKE16-NEXT: s_wait_kmcnt 0x04717; GFX12-PAL-FAKE16-NEXT: v_mov_b32_e32 v1, 14718; GFX12-PAL-FAKE16-NEXT: s_wait_storecnt 0x04719; GFX12-PAL-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-1 scope:SCOPE_SYS4720; GFX12-PAL-FAKE16-NEXT: s_wait_storecnt 0x04721; GFX12-PAL-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-1 scope:SCOPE_SYS4722; GFX12-PAL-FAKE16-NEXT: s_wait_loadcnt 0x04723; GFX12-PAL-FAKE16-NEXT: s_setpc_b64 s[30:31]4724bb:4725 %ptr = getelementptr inbounds i8, ptr addrspace(5) %arg, i32 -14726 store volatile i8 1, ptr addrspace(5) %ptr, align 14727 %load = load volatile i8, ptr addrspace(5) %ptr, align 14728 ret void4729}4730 4731define void @store_load_i32_large_negative_unaligned(ptr addrspace(5) nocapture %arg) {4732; GFX9-LABEL: store_load_i32_large_negative_unaligned:4733; GFX9: ; %bb.0: ; %bb4734; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4735; GFX9-NEXT: v_add_u32_e32 v0, 0xffffef7f, v04736; GFX9-NEXT: v_mov_b32_e32 v1, 14737; GFX9-NEXT: scratch_store_byte v0, v1, off4738; GFX9-NEXT: s_waitcnt vmcnt(0)4739; GFX9-NEXT: scratch_load_ubyte v0, v0, off glc4740; GFX9-NEXT: s_waitcnt vmcnt(0)4741; GFX9-NEXT: s_setpc_b64 s[30:31]4742;4743; GFX10-LABEL: store_load_i32_large_negative_unaligned:4744; GFX10: ; %bb.0: ; %bb4745; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4746; GFX10-NEXT: v_add_nc_u32_e32 v0, 0xfffff000, v04747; GFX10-NEXT: v_mov_b32_e32 v1, 14748; GFX10-NEXT: scratch_store_byte v0, v1, off offset:-1294749; GFX10-NEXT: s_waitcnt_vscnt null, 0x04750; GFX10-NEXT: scratch_load_ubyte v0, v0, off offset:-129 glc dlc4751; GFX10-NEXT: s_waitcnt vmcnt(0)4752; GFX10-NEXT: s_setpc_b64 s[30:31]4753;4754; GFX11-TRUE16-LABEL: store_load_i32_large_negative_unaligned:4755; GFX11-TRUE16: ; %bb.0: ; %bb4756; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4757; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0xfffff000, v04758; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 14759; GFX11-TRUE16-NEXT: scratch_store_b8 v1, v0, off offset:-129 dlc4760; GFX11-TRUE16-NEXT: s_waitcnt_vscnt null, 0x04761; GFX11-TRUE16-NEXT: scratch_load_d16_u8 v0, v1, off offset:-129 glc dlc4762; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)4763; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]4764;4765; GFX11-FAKE16-LABEL: store_load_i32_large_negative_unaligned:4766; GFX11-FAKE16: ; %bb.0: ; %bb4767; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4768; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_add_nc_u32 v0, 0xfffff000, v04769; GFX11-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-129 dlc4770; GFX11-FAKE16-NEXT: s_waitcnt_vscnt null, 0x04771; GFX11-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-129 glc dlc4772; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)4773; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]4774;4775; GFX12-TRUE16-LABEL: store_load_i32_large_negative_unaligned:4776; GFX12-TRUE16: ; %bb.0: ; %bb4777; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x04778; GFX12-TRUE16-NEXT: s_wait_expcnt 0x04779; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x04780; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x04781; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x04782; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, 14783; GFX12-TRUE16-NEXT: s_wait_storecnt 0x04784; GFX12-TRUE16-NEXT: scratch_store_b8 v0, v1, off offset:-4225 scope:SCOPE_SYS4785; GFX12-TRUE16-NEXT: s_wait_storecnt 0x04786; GFX12-TRUE16-NEXT: scratch_load_d16_u8 v0, v0, off offset:-4225 scope:SCOPE_SYS4787; GFX12-TRUE16-NEXT: s_wait_loadcnt 0x04788; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]4789;4790; GFX12-FAKE16-LABEL: store_load_i32_large_negative_unaligned:4791; GFX12-FAKE16: ; %bb.0: ; %bb4792; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x04793; GFX12-FAKE16-NEXT: s_wait_expcnt 0x04794; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x04795; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x04796; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x04797; GFX12-FAKE16-NEXT: v_mov_b32_e32 v1, 14798; GFX12-FAKE16-NEXT: s_wait_storecnt 0x04799; GFX12-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-4225 scope:SCOPE_SYS4800; GFX12-FAKE16-NEXT: s_wait_storecnt 0x04801; GFX12-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-4225 scope:SCOPE_SYS4802; GFX12-FAKE16-NEXT: s_wait_loadcnt 0x04803; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]4804;4805; GFX9-PAL-LABEL: store_load_i32_large_negative_unaligned:4806; GFX9-PAL: ; %bb.0: ; %bb4807; GFX9-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4808; GFX9-PAL-NEXT: v_add_u32_e32 v0, 0xffffef7f, v04809; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 14810; GFX9-PAL-NEXT: scratch_store_byte v0, v1, off4811; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4812; GFX9-PAL-NEXT: scratch_load_ubyte v0, v0, off glc4813; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)4814; GFX9-PAL-NEXT: s_setpc_b64 s[30:31]4815;4816; GFX942-LABEL: store_load_i32_large_negative_unaligned:4817; GFX942: ; %bb.0: ; %bb4818; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4819; GFX942-NEXT: v_add_u32_e32 v0, 0xffffef7f, v04820; GFX942-NEXT: v_mov_b32_e32 v1, 14821; GFX942-NEXT: scratch_store_byte v0, v1, off sc0 sc14822; GFX942-NEXT: s_waitcnt vmcnt(0)4823; GFX942-NEXT: scratch_load_ubyte v0, v0, off sc0 sc14824; GFX942-NEXT: s_waitcnt vmcnt(0)4825; GFX942-NEXT: s_setpc_b64 s[30:31]4826;4827; GFX1010-PAL-LABEL: store_load_i32_large_negative_unaligned:4828; GFX1010-PAL: ; %bb.0: ; %bb4829; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4830; GFX1010-PAL-NEXT: v_add_nc_u32_e32 v0, 0xffffefff, v04831; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, 14832; GFX1010-PAL-NEXT: scratch_store_byte v0, v1, off offset:-1284833; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x04834; GFX1010-PAL-NEXT: scratch_load_ubyte v0, v0, off offset:-128 glc dlc4835; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)4836; GFX1010-PAL-NEXT: s_setpc_b64 s[30:31]4837;4838; GFX1030-PAL-LABEL: store_load_i32_large_negative_unaligned:4839; GFX1030-PAL: ; %bb.0: ; %bb4840; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4841; GFX1030-PAL-NEXT: v_add_nc_u32_e32 v0, 0xfffff000, v04842; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, 14843; GFX1030-PAL-NEXT: scratch_store_byte v0, v1, off offset:-1294844; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x04845; GFX1030-PAL-NEXT: scratch_load_ubyte v0, v0, off offset:-129 glc dlc4846; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)4847; GFX1030-PAL-NEXT: s_setpc_b64 s[30:31]4848;4849; GFX11-PAL-TRUE16-LABEL: store_load_i32_large_negative_unaligned:4850; GFX11-PAL-TRUE16: ; %bb.0: ; %bb4851; GFX11-PAL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4852; GFX11-PAL-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0xfffff000, v04853; GFX11-PAL-TRUE16-NEXT: v_mov_b16_e32 v0.l, 14854; GFX11-PAL-TRUE16-NEXT: scratch_store_b8 v1, v0, off offset:-129 dlc4855; GFX11-PAL-TRUE16-NEXT: s_waitcnt_vscnt null, 0x04856; GFX11-PAL-TRUE16-NEXT: scratch_load_d16_u8 v0, v1, off offset:-129 glc dlc4857; GFX11-PAL-TRUE16-NEXT: s_waitcnt vmcnt(0)4858; GFX11-PAL-TRUE16-NEXT: s_setpc_b64 s[30:31]4859;4860; GFX11-PAL-FAKE16-LABEL: store_load_i32_large_negative_unaligned:4861; GFX11-PAL-FAKE16: ; %bb.0: ; %bb4862; GFX11-PAL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4863; GFX11-PAL-FAKE16-NEXT: v_dual_mov_b32 v1, 1 :: v_dual_add_nc_u32 v0, 0xfffff000, v04864; GFX11-PAL-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-129 dlc4865; GFX11-PAL-FAKE16-NEXT: s_waitcnt_vscnt null, 0x04866; GFX11-PAL-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-129 glc dlc4867; GFX11-PAL-FAKE16-NEXT: s_waitcnt vmcnt(0)4868; GFX11-PAL-FAKE16-NEXT: s_setpc_b64 s[30:31]4869;4870; GFX12-PAL-TRUE16-LABEL: store_load_i32_large_negative_unaligned:4871; GFX12-PAL-TRUE16: ; %bb.0: ; %bb4872; GFX12-PAL-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x04873; GFX12-PAL-TRUE16-NEXT: s_wait_expcnt 0x04874; GFX12-PAL-TRUE16-NEXT: s_wait_samplecnt 0x04875; GFX12-PAL-TRUE16-NEXT: s_wait_bvhcnt 0x04876; GFX12-PAL-TRUE16-NEXT: s_wait_kmcnt 0x04877; GFX12-PAL-TRUE16-NEXT: v_mov_b16_e32 v1.l, 14878; GFX12-PAL-TRUE16-NEXT: s_wait_storecnt 0x04879; GFX12-PAL-TRUE16-NEXT: scratch_store_b8 v0, v1, off offset:-4225 scope:SCOPE_SYS4880; GFX12-PAL-TRUE16-NEXT: s_wait_storecnt 0x04881; GFX12-PAL-TRUE16-NEXT: scratch_load_d16_u8 v0, v0, off offset:-4225 scope:SCOPE_SYS4882; GFX12-PAL-TRUE16-NEXT: s_wait_loadcnt 0x04883; GFX12-PAL-TRUE16-NEXT: s_setpc_b64 s[30:31]4884;4885; GFX12-PAL-FAKE16-LABEL: store_load_i32_large_negative_unaligned:4886; GFX12-PAL-FAKE16: ; %bb.0: ; %bb4887; GFX12-PAL-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x04888; GFX12-PAL-FAKE16-NEXT: s_wait_expcnt 0x04889; GFX12-PAL-FAKE16-NEXT: s_wait_samplecnt 0x04890; GFX12-PAL-FAKE16-NEXT: s_wait_bvhcnt 0x04891; GFX12-PAL-FAKE16-NEXT: s_wait_kmcnt 0x04892; GFX12-PAL-FAKE16-NEXT: v_mov_b32_e32 v1, 14893; GFX12-PAL-FAKE16-NEXT: s_wait_storecnt 0x04894; GFX12-PAL-FAKE16-NEXT: scratch_store_b8 v0, v1, off offset:-4225 scope:SCOPE_SYS4895; GFX12-PAL-FAKE16-NEXT: s_wait_storecnt 0x04896; GFX12-PAL-FAKE16-NEXT: scratch_load_u8 v0, v0, off offset:-4225 scope:SCOPE_SYS4897; GFX12-PAL-FAKE16-NEXT: s_wait_loadcnt 0x04898; GFX12-PAL-FAKE16-NEXT: s_setpc_b64 s[30:31]4899bb:4900 %ptr = getelementptr inbounds i8, ptr addrspace(5) %arg, i32 -42254901 store volatile i8 1, ptr addrspace(5) %ptr, align 14902 %load = load volatile i8, ptr addrspace(5) %ptr, align 14903 ret void4904}4905 4906define amdgpu_ps void @large_offset() {4907; GFX9-LABEL: large_offset:4908; GFX9: ; %bb.0: ; %bb4909; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s24910; GFX9-NEXT: v_mov_b32_e32 v0, 04911; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 04912; GFX9-NEXT: v_mov_b32_e32 v1, v04913; GFX9-NEXT: v_mov_b32_e32 v2, v04914; GFX9-NEXT: v_mov_b32_e32 v3, v04915; GFX9-NEXT: s_mov_b32 s0, 04916; GFX9-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:30244917; GFX9-NEXT: s_waitcnt vmcnt(0)4918; GFX9-NEXT: scratch_load_dwordx4 v[0:3], off, s0 offset:3024 glc4919; GFX9-NEXT: s_waitcnt vmcnt(0)4920; GFX9-NEXT: s_mov_b32 s0, 164921; GFX9-NEXT: ;;#ASMSTART4922; GFX9-NEXT: ; use s04923; GFX9-NEXT: ;;#ASMEND4924; GFX9-NEXT: s_movk_i32 s0, 0x8104925; GFX9-NEXT: ;;#ASMSTART4926; GFX9-NEXT: ; use s04927; GFX9-NEXT: ;;#ASMEND4928; GFX9-NEXT: s_endpgm4929;4930; GFX10-LABEL: large_offset:4931; GFX10: ; %bb.0: ; %bb4932; GFX10-NEXT: s_add_u32 s0, s0, s24933; GFX10-NEXT: s_addc_u32 s1, s1, 04934; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s04935; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s14936; GFX10-NEXT: v_mov_b32_e32 v0, 04937; GFX10-NEXT: s_movk_i32 s0, 0x8104938; GFX10-NEXT: s_add_i32 s1, s0, 0x3c04939; GFX10-NEXT: v_mov_b32_e32 v1, v04940; GFX10-NEXT: v_mov_b32_e32 v2, v04941; GFX10-NEXT: v_mov_b32_e32 v3, v04942; GFX10-NEXT: scratch_store_dwordx4 off, v[0:3], s14943; GFX10-NEXT: s_waitcnt_vscnt null, 0x04944; GFX10-NEXT: scratch_load_dwordx4 v[0:3], off, s1 glc dlc4945; GFX10-NEXT: s_waitcnt vmcnt(0)4946; GFX10-NEXT: s_mov_b32 s1, 164947; GFX10-NEXT: ;;#ASMSTART4948; GFX10-NEXT: ; use s14949; GFX10-NEXT: ;;#ASMEND4950; GFX10-NEXT: ;;#ASMSTART4951; GFX10-NEXT: ; use s04952; GFX10-NEXT: ;;#ASMEND4953; GFX10-NEXT: s_endpgm4954;4955; GFX11-LABEL: large_offset:4956; GFX11: ; %bb.0: ; %bb4957; GFX11-NEXT: v_mov_b32_e32 v0, 04958; GFX11-NEXT: s_mov_b32 s0, 164959; GFX11-NEXT: s_movk_i32 s1, 0x8104960; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)4961; GFX11-NEXT: v_mov_b32_e32 v1, v04962; GFX11-NEXT: v_mov_b32_e32 v2, v04963; GFX11-NEXT: v_mov_b32_e32 v3, v04964; GFX11-NEXT: scratch_store_b128 off, v[0:3], off offset:3024 dlc4965; GFX11-NEXT: s_waitcnt_vscnt null, 0x04966; GFX11-NEXT: scratch_load_b128 v[0:3], off, off offset:3024 glc dlc4967; GFX11-NEXT: s_waitcnt vmcnt(0)4968; GFX11-NEXT: ;;#ASMSTART4969; GFX11-NEXT: ; use s04970; GFX11-NEXT: ;;#ASMEND4971; GFX11-NEXT: ;;#ASMSTART4972; GFX11-NEXT: ; use s14973; GFX11-NEXT: ;;#ASMEND4974; GFX11-NEXT: s_endpgm4975;4976; GFX12-LABEL: large_offset:4977; GFX12: ; %bb.0: ; %bb4978; GFX12-NEXT: v_mov_b32_e32 v0, 04979; GFX12-NEXT: s_mov_b32 s0, 04980; GFX12-NEXT: s_movk_i32 s1, 0x8004981; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)4982; GFX12-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, v04983; GFX12-NEXT: v_mov_b32_e32 v3, v04984; GFX12-NEXT: scratch_store_b128 off, v[0:3], off offset:3008 scope:SCOPE_SYS4985; GFX12-NEXT: s_wait_storecnt 0x04986; GFX12-NEXT: scratch_load_b128 v[0:3], off, off offset:3008 scope:SCOPE_SYS4987; GFX12-NEXT: s_wait_loadcnt 0x04988; GFX12-NEXT: ;;#ASMSTART4989; GFX12-NEXT: ; use s04990; GFX12-NEXT: ;;#ASMEND4991; GFX12-NEXT: ;;#ASMSTART4992; GFX12-NEXT: ; use s14993; GFX12-NEXT: ;;#ASMEND4994; GFX12-NEXT: s_endpgm4995;4996; GFX9-PAL-LABEL: large_offset:4997; GFX9-PAL: ; %bb.0: ; %bb4998; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]4999; GFX9-PAL-NEXT: s_mov_b32 s2, s05000; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05001; GFX9-PAL-NEXT: v_mov_b32_e32 v0, 05002; GFX9-PAL-NEXT: v_mov_b32_e32 v1, v05003; GFX9-PAL-NEXT: v_mov_b32_e32 v2, v05004; GFX9-PAL-NEXT: v_mov_b32_e32 v3, v05005; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)5006; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff5007; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s05008; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 05009; GFX9-PAL-NEXT: s_mov_b32 s0, 05010; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s0 offset:30245011; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5012; GFX9-PAL-NEXT: scratch_load_dwordx4 v[0:3], off, s0 offset:3024 glc5013; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5014; GFX9-PAL-NEXT: s_mov_b32 s0, 165015; GFX9-PAL-NEXT: ;;#ASMSTART5016; GFX9-PAL-NEXT: ; use s05017; GFX9-PAL-NEXT: ;;#ASMEND5018; GFX9-PAL-NEXT: s_movk_i32 s0, 0x8105019; GFX9-PAL-NEXT: ;;#ASMSTART5020; GFX9-PAL-NEXT: ; use s05021; GFX9-PAL-NEXT: ;;#ASMEND5022; GFX9-PAL-NEXT: s_endpgm5023;5024; GFX942-LABEL: large_offset:5025; GFX942: ; %bb.0: ; %bb5026; GFX942-NEXT: v_mov_b32_e32 v0, 05027; GFX942-NEXT: v_mov_b32_e32 v1, v05028; GFX942-NEXT: v_mov_b32_e32 v2, v05029; GFX942-NEXT: v_mov_b32_e32 v3, v05030; GFX942-NEXT: scratch_store_dwordx4 off, v[0:3], off offset:3024 sc0 sc15031; GFX942-NEXT: s_waitcnt vmcnt(0)5032; GFX942-NEXT: scratch_load_dwordx4 v[0:3], off, off offset:3024 sc0 sc15033; GFX942-NEXT: s_waitcnt vmcnt(0)5034; GFX942-NEXT: s_mov_b32 s0, 165035; GFX942-NEXT: ;;#ASMSTART5036; GFX942-NEXT: ; use s05037; GFX942-NEXT: ;;#ASMEND5038; GFX942-NEXT: s_movk_i32 s0, 0x8105039; GFX942-NEXT: ;;#ASMSTART5040; GFX942-NEXT: ; use s05041; GFX942-NEXT: ;;#ASMEND5042; GFX942-NEXT: s_endpgm5043;5044; GFX1010-PAL-LABEL: large_offset:5045; GFX1010-PAL: ; %bb.0: ; %bb5046; GFX1010-PAL-NEXT: s_getpc_b64 s[2:3]5047; GFX1010-PAL-NEXT: s_mov_b32 s2, s05048; GFX1010-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05049; GFX1010-PAL-NEXT: s_waitcnt lgkmcnt(0)5050; GFX1010-PAL-NEXT: s_and_b32 s3, s3, 0xffff5051; GFX1010-PAL-NEXT: s_add_u32 s2, s2, s05052; GFX1010-PAL-NEXT: s_addc_u32 s3, s3, 05053; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25054; GFX1010-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35055; GFX1010-PAL-NEXT: v_mov_b32_e32 v0, 05056; GFX1010-PAL-NEXT: s_movk_i32 s0, 0x8105057; GFX1010-PAL-NEXT: s_add_i32 s1, s0, 0x3c05058; GFX1010-PAL-NEXT: v_mov_b32_e32 v1, v05059; GFX1010-PAL-NEXT: v_mov_b32_e32 v2, v05060; GFX1010-PAL-NEXT: v_mov_b32_e32 v3, v05061; GFX1010-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s15062; GFX1010-PAL-NEXT: s_waitcnt_vscnt null, 0x05063; GFX1010-PAL-NEXT: scratch_load_dwordx4 v[0:3], off, s1 glc dlc5064; GFX1010-PAL-NEXT: s_waitcnt vmcnt(0)5065; GFX1010-PAL-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)5066; GFX1010-PAL-NEXT: s_mov_b32 s1, 165067; GFX1010-PAL-NEXT: ;;#ASMSTART5068; GFX1010-PAL-NEXT: ; use s15069; GFX1010-PAL-NEXT: ;;#ASMEND5070; GFX1010-PAL-NEXT: ;;#ASMSTART5071; GFX1010-PAL-NEXT: ; use s05072; GFX1010-PAL-NEXT: ;;#ASMEND5073; GFX1010-PAL-NEXT: s_endpgm5074;5075; GFX1030-PAL-LABEL: large_offset:5076; GFX1030-PAL: ; %bb.0: ; %bb5077; GFX1030-PAL-NEXT: s_getpc_b64 s[2:3]5078; GFX1030-PAL-NEXT: s_mov_b32 s2, s05079; GFX1030-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05080; GFX1030-PAL-NEXT: s_waitcnt lgkmcnt(0)5081; GFX1030-PAL-NEXT: s_and_b32 s3, s3, 0xffff5082; GFX1030-PAL-NEXT: s_add_u32 s2, s2, s05083; GFX1030-PAL-NEXT: s_addc_u32 s3, s3, 05084; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25085; GFX1030-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35086; GFX1030-PAL-NEXT: v_mov_b32_e32 v0, 05087; GFX1030-PAL-NEXT: s_movk_i32 s0, 0x8105088; GFX1030-PAL-NEXT: s_add_i32 s1, s0, 0x3c05089; GFX1030-PAL-NEXT: v_mov_b32_e32 v1, v05090; GFX1030-PAL-NEXT: v_mov_b32_e32 v2, v05091; GFX1030-PAL-NEXT: v_mov_b32_e32 v3, v05092; GFX1030-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], s15093; GFX1030-PAL-NEXT: s_waitcnt_vscnt null, 0x05094; GFX1030-PAL-NEXT: scratch_load_dwordx4 v[0:3], off, s1 glc dlc5095; GFX1030-PAL-NEXT: s_waitcnt vmcnt(0)5096; GFX1030-PAL-NEXT: s_mov_b32 s1, 165097; GFX1030-PAL-NEXT: ;;#ASMSTART5098; GFX1030-PAL-NEXT: ; use s15099; GFX1030-PAL-NEXT: ;;#ASMEND5100; GFX1030-PAL-NEXT: ;;#ASMSTART5101; GFX1030-PAL-NEXT: ; use s05102; GFX1030-PAL-NEXT: ;;#ASMEND5103; GFX1030-PAL-NEXT: s_endpgm5104;5105; GFX11-PAL-LABEL: large_offset:5106; GFX11-PAL: ; %bb.0: ; %bb5107; GFX11-PAL-NEXT: v_mov_b32_e32 v0, 05108; GFX11-PAL-NEXT: s_mov_b32 s0, 165109; GFX11-PAL-NEXT: s_movk_i32 s1, 0x8105110; GFX11-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1)5111; GFX11-PAL-NEXT: v_mov_b32_e32 v1, v05112; GFX11-PAL-NEXT: v_mov_b32_e32 v2, v05113; GFX11-PAL-NEXT: v_mov_b32_e32 v3, v05114; GFX11-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:3024 dlc5115; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x05116; GFX11-PAL-NEXT: scratch_load_b128 v[0:3], off, off offset:3024 glc dlc5117; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)5118; GFX11-PAL-NEXT: ;;#ASMSTART5119; GFX11-PAL-NEXT: ; use s05120; GFX11-PAL-NEXT: ;;#ASMEND5121; GFX11-PAL-NEXT: ;;#ASMSTART5122; GFX11-PAL-NEXT: ; use s15123; GFX11-PAL-NEXT: ;;#ASMEND5124; GFX11-PAL-NEXT: s_endpgm5125;5126; GFX12-PAL-LABEL: large_offset:5127; GFX12-PAL: ; %bb.0: ; %bb5128; GFX12-PAL-NEXT: v_mov_b32_e32 v0, 05129; GFX12-PAL-NEXT: s_mov_b32 s0, 05130; GFX12-PAL-NEXT: s_movk_i32 s1, 0x8005131; GFX12-PAL-NEXT: s_delay_alu instid0(VALU_DEP_1)5132; GFX12-PAL-NEXT: v_dual_mov_b32 v1, v0 :: v_dual_mov_b32 v2, v05133; GFX12-PAL-NEXT: v_mov_b32_e32 v3, v05134; GFX12-PAL-NEXT: scratch_store_b128 off, v[0:3], off offset:3008 scope:SCOPE_SYS5135; GFX12-PAL-NEXT: s_wait_storecnt 0x05136; GFX12-PAL-NEXT: scratch_load_b128 v[0:3], off, off offset:3008 scope:SCOPE_SYS5137; GFX12-PAL-NEXT: s_wait_loadcnt 0x05138; GFX12-PAL-NEXT: ;;#ASMSTART5139; GFX12-PAL-NEXT: ; use s05140; GFX12-PAL-NEXT: ;;#ASMEND5141; GFX12-PAL-NEXT: ;;#ASMSTART5142; GFX12-PAL-NEXT: ; use s15143; GFX12-PAL-NEXT: ;;#ASMEND5144; GFX12-PAL-NEXT: s_endpgm5145bb:5146 %alloca = alloca [128 x <4 x i32>], align 16, addrspace(5)5147 %alloca2 = alloca [128 x <4 x i32>], align 16, addrspace(5)5148 %gep = getelementptr inbounds [128 x <4 x i32>], ptr addrspace(5) %alloca2, i32 0, i32 605149 store volatile <4 x i32> zeroinitializer, ptr addrspace(5) %gep, align 165150 %load = load volatile <4 x i32>, ptr addrspace(5) %gep, align 165151 call void asm sideeffect "; use $0", "s"(ptr addrspace(5) %alloca) #05152 call void asm sideeffect "; use $0", "s"(ptr addrspace(5) %alloca2) #05153 ret void5154}5155 5156define amdgpu_gs void @sgpr_base_large_offset(ptr addrspace(1) %out, ptr addrspace(5) inreg %sgpr_base) {5157; GFX9-LABEL: sgpr_base_large_offset:5158; GFX9: ; %bb.0: ; %entry5159; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s55160; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 05161; GFX9-NEXT: s_add_i32 s2, s2, 0xffe85162; GFX9-NEXT: scratch_load_dword v2, off, s25163; GFX9-NEXT: s_waitcnt vmcnt(0)5164; GFX9-NEXT: global_store_dword v[0:1], v2, off5165; GFX9-NEXT: s_endpgm5166;5167; GFX10-LABEL: sgpr_base_large_offset:5168; GFX10: ; %bb.0: ; %entry5169; GFX10-NEXT: s_add_u32 s0, s0, s55170; GFX10-NEXT: s_addc_u32 s1, s1, 05171; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s05172; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s15173; GFX10-NEXT: s_add_i32 s2, s2, 0xffe85174; GFX10-NEXT: scratch_load_dword v2, off, s25175; GFX10-NEXT: s_waitcnt vmcnt(0)5176; GFX10-NEXT: global_store_dword v[0:1], v2, off5177; GFX10-NEXT: s_endpgm5178;5179; GFX11-LABEL: sgpr_base_large_offset:5180; GFX11: ; %bb.0: ; %entry5181; GFX11-NEXT: s_add_i32 s0, s0, 0xffe85182; GFX11-NEXT: scratch_load_b32 v2, off, s05183; GFX11-NEXT: s_waitcnt vmcnt(0)5184; GFX11-NEXT: global_store_b32 v[0:1], v2, off5185; GFX11-NEXT: s_endpgm5186;5187; GFX12-LABEL: sgpr_base_large_offset:5188; GFX12: ; %bb.0: ; %entry5189; GFX12-NEXT: scratch_load_b32 v2, off, s0 offset:655125190; GFX12-NEXT: s_wait_loadcnt 0x05191; GFX12-NEXT: global_store_b32 v[0:1], v2, off5192; GFX12-NEXT: s_endpgm5193;5194; GFX9-PAL-LABEL: sgpr_base_large_offset:5195; GFX9-PAL: ; %bb.0: ; %entry5196; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]5197; GFX9-PAL-NEXT: s_mov_b32 s2, s85198; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05199; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)5200; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff5201; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s55202; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 05203; GFX9-PAL-NEXT: s_add_i32 s0, s0, 0xffe85204; GFX9-PAL-NEXT: scratch_load_dword v2, off, s05205; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5206; GFX9-PAL-NEXT: global_store_dword v[0:1], v2, off5207; GFX9-PAL-NEXT: s_endpgm5208;5209; GFX942-LABEL: sgpr_base_large_offset:5210; GFX942: ; %bb.0: ; %entry5211; GFX942-NEXT: s_add_i32 s0, s0, 0xffe85212; GFX942-NEXT: scratch_load_dword v2, off, s05213; GFX942-NEXT: s_waitcnt vmcnt(0)5214; GFX942-NEXT: global_store_dword v[0:1], v2, off5215; GFX942-NEXT: s_endpgm5216;5217; GFX10-PAL-LABEL: sgpr_base_large_offset:5218; GFX10-PAL: ; %bb.0: ; %entry5219; GFX10-PAL-NEXT: s_getpc_b64 s[2:3]5220; GFX10-PAL-NEXT: s_mov_b32 s2, s85221; GFX10-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05222; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)5223; GFX10-PAL-NEXT: s_and_b32 s3, s3, 0xffff5224; GFX10-PAL-NEXT: s_add_u32 s2, s2, s55225; GFX10-PAL-NEXT: s_addc_u32 s3, s3, 05226; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25227; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35228; GFX10-PAL-NEXT: s_add_i32 s0, s0, 0xffe85229; GFX10-PAL-NEXT: scratch_load_dword v2, off, s05230; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)5231; GFX10-PAL-NEXT: global_store_dword v[0:1], v2, off5232; GFX10-PAL-NEXT: s_endpgm5233;5234; GFX11-PAL-LABEL: sgpr_base_large_offset:5235; GFX11-PAL: ; %bb.0: ; %entry5236; GFX11-PAL-NEXT: s_add_i32 s0, s0, 0xffe85237; GFX11-PAL-NEXT: scratch_load_b32 v2, off, s05238; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)5239; GFX11-PAL-NEXT: global_store_b32 v[0:1], v2, off5240; GFX11-PAL-NEXT: s_endpgm5241;5242; GFX12-PAL-LABEL: sgpr_base_large_offset:5243; GFX12-PAL: ; %bb.0: ; %entry5244; GFX12-PAL-NEXT: scratch_load_b32 v2, off, s0 offset:655125245; GFX12-PAL-NEXT: s_wait_loadcnt 0x05246; GFX12-PAL-NEXT: global_store_b32 v[0:1], v2, off5247; GFX12-PAL-NEXT: s_endpgm5248entry:5249 %large_offset = getelementptr i8, ptr addrspace(5) %sgpr_base, i32 655125250 %load = load i32, ptr addrspace(5) %large_offset, align 45251 store i32 %load, ptr addrspace(1) %out5252 ret void5253}5254 5255define amdgpu_gs void @sgpr_base_large_offset_split(ptr addrspace(1) %out, ptr addrspace(5) inreg %sgpr_base) {5256; GFX9-LABEL: sgpr_base_large_offset_split:5257; GFX9: ; %bb.0: ; %entry5258; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s55259; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 05260; GFX9-NEXT: s_and_b32 s0, s2, -45261; GFX9-NEXT: s_add_i32 s0, s0, 0x100f0005262; GFX9-NEXT: scratch_load_dword v2, off, s0 offset:4072 glc5263; GFX9-NEXT: s_waitcnt vmcnt(0)5264; GFX9-NEXT: global_store_dword v[0:1], v2, off5265; GFX9-NEXT: s_endpgm5266;5267; GFX10-LABEL: sgpr_base_large_offset_split:5268; GFX10: ; %bb.0: ; %entry5269; GFX10-NEXT: s_add_u32 s0, s0, s55270; GFX10-NEXT: s_addc_u32 s1, s1, 05271; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s05272; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s15273; GFX10-NEXT: s_and_b32 s0, s2, -45274; GFX10-NEXT: s_add_i32 s0, s0, 0x100f8005275; GFX10-NEXT: scratch_load_dword v2, off, s0 offset:2024 glc dlc5276; GFX10-NEXT: s_waitcnt vmcnt(0)5277; GFX10-NEXT: global_store_dword v[0:1], v2, off5278; GFX10-NEXT: s_endpgm5279;5280; GFX11-LABEL: sgpr_base_large_offset_split:5281; GFX11: ; %bb.0: ; %entry5282; GFX11-NEXT: v_mov_b32_e32 v2, 0x100f0005283; GFX11-NEXT: s_and_b32 s0, s0, -45284; GFX11-NEXT: scratch_load_b32 v2, v2, s0 offset:4072 glc dlc5285; GFX11-NEXT: s_waitcnt vmcnt(0)5286; GFX11-NEXT: global_store_b32 v[0:1], v2, off5287; GFX11-NEXT: s_endpgm5288;5289; GFX12-LABEL: sgpr_base_large_offset_split:5290; GFX12: ; %bb.0: ; %entry5291; GFX12-NEXT: v_mov_b32_e32 v2, 0x10000005292; GFX12-NEXT: s_and_b32 s0, s0, -45293; GFX12-NEXT: scratch_load_b32 v2, v2, s0 offset:65512 scope:SCOPE_SYS5294; GFX12-NEXT: s_wait_loadcnt 0x05295; GFX12-NEXT: global_store_b32 v[0:1], v2, off5296; GFX12-NEXT: s_endpgm5297;5298; GFX9-PAL-LABEL: sgpr_base_large_offset_split:5299; GFX9-PAL: ; %bb.0: ; %entry5300; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]5301; GFX9-PAL-NEXT: s_mov_b32 s2, s85302; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05303; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)5304; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff5305; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s55306; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 05307; GFX9-PAL-NEXT: s_and_b32 s0, s0, -45308; GFX9-PAL-NEXT: s_add_i32 s0, s0, 0x100f0005309; GFX9-PAL-NEXT: scratch_load_dword v2, off, s0 offset:4072 glc5310; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5311; GFX9-PAL-NEXT: global_store_dword v[0:1], v2, off5312; GFX9-PAL-NEXT: s_endpgm5313;5314; GFX942-LABEL: sgpr_base_large_offset_split:5315; GFX942: ; %bb.0: ; %entry5316; GFX942-NEXT: s_and_b32 s0, s0, -45317; GFX942-NEXT: v_mov_b32_e32 v2, 0x100f0005318; GFX942-NEXT: scratch_load_dword v2, v2, s0 offset:4072 sc0 sc15319; GFX942-NEXT: s_waitcnt vmcnt(0)5320; GFX942-NEXT: global_store_dword v[0:1], v2, off5321; GFX942-NEXT: s_endpgm5322;5323; GFX10-PAL-LABEL: sgpr_base_large_offset_split:5324; GFX10-PAL: ; %bb.0: ; %entry5325; GFX10-PAL-NEXT: s_getpc_b64 s[2:3]5326; GFX10-PAL-NEXT: s_mov_b32 s2, s85327; GFX10-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05328; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)5329; GFX10-PAL-NEXT: s_and_b32 s3, s3, 0xffff5330; GFX10-PAL-NEXT: s_add_u32 s2, s2, s55331; GFX10-PAL-NEXT: s_addc_u32 s3, s3, 05332; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25333; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35334; GFX10-PAL-NEXT: s_and_b32 s0, s0, -45335; GFX10-PAL-NEXT: s_add_i32 s0, s0, 0x100f8005336; GFX10-PAL-NEXT: scratch_load_dword v2, off, s0 offset:2024 glc dlc5337; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)5338; GFX10-PAL-NEXT: global_store_dword v[0:1], v2, off5339; GFX10-PAL-NEXT: s_endpgm5340;5341; GFX11-PAL-LABEL: sgpr_base_large_offset_split:5342; GFX11-PAL: ; %bb.0: ; %entry5343; GFX11-PAL-NEXT: v_mov_b32_e32 v2, 0x100f0005344; GFX11-PAL-NEXT: s_and_b32 s0, s0, -45345; GFX11-PAL-NEXT: scratch_load_b32 v2, v2, s0 offset:4072 glc dlc5346; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)5347; GFX11-PAL-NEXT: global_store_b32 v[0:1], v2, off5348; GFX11-PAL-NEXT: s_endpgm5349;5350; GFX12-PAL-LABEL: sgpr_base_large_offset_split:5351; GFX12-PAL: ; %bb.0: ; %entry5352; GFX12-PAL-NEXT: v_mov_b32_e32 v2, 0x10000005353; GFX12-PAL-NEXT: s_and_b32 s0, s0, -45354; GFX12-PAL-NEXT: scratch_load_b32 v2, v2, s0 offset:65512 scope:SCOPE_SYS5355; GFX12-PAL-NEXT: s_wait_loadcnt 0x05356; GFX12-PAL-NEXT: global_store_b32 v[0:1], v2, off5357; GFX12-PAL-NEXT: s_endpgm5358entry:5359 ;%allignedBase = alloca [33554432 x i8], align 4, addrspace(5)5360 %sgpr_base_i32 = ptrtoint ptr addrspace(5) %sgpr_base to i325361 %sgpr_base_i32_align4 = and i32 %sgpr_base_i32, 42949672925362 %sgpr_base_align4 = inttoptr i32 %sgpr_base_i32_align4 to ptr addrspace(5)5363 %split_offset = getelementptr inbounds [33554432 x i8], ptr addrspace(5) %sgpr_base_align4, i32 0, i32 168427285364 %load = load volatile i32, ptr addrspace(5) %split_offset, align 45365 store i32 %load, ptr addrspace(1) %out5366 ret void5367}5368 5369define amdgpu_gs void @sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset(ptr addrspace(5) inreg %sgpr_base, i32 inreg %sidx, i32 %vidx) {5370; GFX9-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5371; GFX9: ; %bb.0: ; %bb5372; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s55373; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 05374; GFX9-NEXT: s_add_i32 s2, s2, s35375; GFX9-NEXT: v_add_u32_e32 v0, s2, v05376; GFX9-NEXT: v_add_u32_e32 v0, 0xffe8, v05377; GFX9-NEXT: v_mov_b32_e32 v1, 155378; GFX9-NEXT: scratch_store_dword v0, v1, off5379; GFX9-NEXT: s_waitcnt vmcnt(0)5380; GFX9-NEXT: s_endpgm5381;5382; GFX10-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5383; GFX10: ; %bb.0: ; %bb5384; GFX10-NEXT: s_add_u32 s0, s0, s55385; GFX10-NEXT: s_addc_u32 s1, s1, 05386; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s05387; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s15388; GFX10-NEXT: s_add_i32 s2, s2, s35389; GFX10-NEXT: v_mov_b32_e32 v1, 155390; GFX10-NEXT: v_add3_u32 v0, s2, v0, 0xffe85391; GFX10-NEXT: scratch_store_dword v0, v1, off5392; GFX10-NEXT: s_waitcnt_vscnt null, 0x05393; GFX10-NEXT: s_endpgm5394;5395; GFX11-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5396; GFX11: ; %bb.0: ; %bb5397; GFX11-NEXT: s_add_i32 s0, s0, s15398; GFX11-NEXT: v_mov_b32_e32 v1, 155399; GFX11-NEXT: v_add3_u32 v0, s0, v0, 0xffe85400; GFX11-NEXT: scratch_store_b32 v0, v1, off dlc5401; GFX11-NEXT: s_waitcnt_vscnt null, 0x05402; GFX11-NEXT: s_endpgm5403;5404; GFX12-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5405; GFX12: ; %bb.0: ; %bb5406; GFX12-NEXT: v_mov_b32_e32 v1, 155407; GFX12-NEXT: s_add_co_i32 s0, s0, s15408; GFX12-NEXT: scratch_store_b32 v0, v1, s0 offset:65512 scope:SCOPE_SYS5409; GFX12-NEXT: s_wait_storecnt 0x05410; GFX12-NEXT: s_endpgm5411;5412; GFX9-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5413; GFX9-PAL: ; %bb.0: ; %bb5414; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]5415; GFX9-PAL-NEXT: s_mov_b32 s2, s85416; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05417; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 155418; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)5419; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff5420; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s55421; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 05422; GFX9-PAL-NEXT: s_add_i32 s0, s0, s15423; GFX9-PAL-NEXT: v_add_u32_e32 v0, s0, v05424; GFX9-PAL-NEXT: v_add_u32_e32 v0, 0xffe8, v05425; GFX9-PAL-NEXT: scratch_store_dword v0, v1, off5426; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5427; GFX9-PAL-NEXT: s_endpgm5428;5429; GFX942-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5430; GFX942: ; %bb.0: ; %bb5431; GFX942-NEXT: s_add_i32 s0, s0, s15432; GFX942-NEXT: v_add_u32_e32 v0, s0, v05433; GFX942-NEXT: v_add_u32_e32 v0, 0xffe8, v05434; GFX942-NEXT: v_mov_b32_e32 v1, 155435; GFX942-NEXT: scratch_store_dword v0, v1, off sc0 sc15436; GFX942-NEXT: s_waitcnt vmcnt(0)5437; GFX942-NEXT: s_endpgm5438;5439; GFX10-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5440; GFX10-PAL: ; %bb.0: ; %bb5441; GFX10-PAL-NEXT: s_getpc_b64 s[2:3]5442; GFX10-PAL-NEXT: s_mov_b32 s2, s85443; GFX10-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05444; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)5445; GFX10-PAL-NEXT: s_and_b32 s3, s3, 0xffff5446; GFX10-PAL-NEXT: s_add_u32 s2, s2, s55447; GFX10-PAL-NEXT: s_addc_u32 s3, s3, 05448; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25449; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35450; GFX10-PAL-NEXT: s_add_i32 s0, s0, s15451; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 155452; GFX10-PAL-NEXT: v_add3_u32 v0, s0, v0, 0xffe85453; GFX10-PAL-NEXT: scratch_store_dword v0, v1, off5454; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x05455; GFX10-PAL-NEXT: s_endpgm5456;5457; GFX11-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5458; GFX11-PAL: ; %bb.0: ; %bb5459; GFX11-PAL-NEXT: s_add_i32 s0, s0, s15460; GFX11-PAL-NEXT: v_mov_b32_e32 v1, 155461; GFX11-PAL-NEXT: v_add3_u32 v0, s0, v0, 0xffe85462; GFX11-PAL-NEXT: scratch_store_b32 v0, v1, off dlc5463; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x05464; GFX11-PAL-NEXT: s_endpgm5465;5466; GFX12-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_large_imm_offset:5467; GFX12-PAL: ; %bb.0: ; %bb5468; GFX12-PAL-NEXT: v_mov_b32_e32 v1, 155469; GFX12-PAL-NEXT: s_add_co_i32 s0, s0, s15470; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, s0 offset:65512 scope:SCOPE_SYS5471; GFX12-PAL-NEXT: s_wait_storecnt 0x05472; GFX12-PAL-NEXT: s_endpgm5473bb:5474 %add1 = add nsw i32 %sidx, %vidx5475 %add2 = add nsw i32 %add1, 655125476 %gep = getelementptr inbounds [33554432 x i8], ptr addrspace(5) %sgpr_base, i32 0, i32 %add25477 store volatile i32 15, ptr addrspace(5) %gep, align 45478 ret void5479}5480 5481define amdgpu_gs void @sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset(ptr addrspace(5) inreg %sgpr_base, i32 inreg %sidx, i32 %vidx) {5482; GFX9-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5483; GFX9: ; %bb.0: ; %bb5484; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s55485; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 05486; GFX9-NEXT: s_add_i32 s2, s2, s35487; GFX9-NEXT: v_add_u32_e32 v0, s2, v05488; GFX9-NEXT: v_add_u32_e32 v0, -16, v05489; GFX9-NEXT: v_mov_b32_e32 v1, 155490; GFX9-NEXT: scratch_store_dword v0, v1, off5491; GFX9-NEXT: s_waitcnt vmcnt(0)5492; GFX9-NEXT: s_endpgm5493;5494; GFX10-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5495; GFX10: ; %bb.0: ; %bb5496; GFX10-NEXT: s_add_u32 s0, s0, s55497; GFX10-NEXT: s_addc_u32 s1, s1, 05498; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s05499; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s15500; GFX10-NEXT: v_add3_u32 v0, s2, s3, v05501; GFX10-NEXT: v_mov_b32_e32 v1, 155502; GFX10-NEXT: scratch_store_dword v0, v1, off offset:-165503; GFX10-NEXT: s_waitcnt_vscnt null, 0x05504; GFX10-NEXT: s_endpgm5505;5506; GFX11-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5507; GFX11: ; %bb.0: ; %bb5508; GFX11-NEXT: v_add3_u32 v0, s0, s1, v05509; GFX11-NEXT: v_mov_b32_e32 v1, 155510; GFX11-NEXT: scratch_store_b32 v0, v1, off offset:-16 dlc5511; GFX11-NEXT: s_waitcnt_vscnt null, 0x05512; GFX11-NEXT: s_endpgm5513;5514; GFX12-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5515; GFX12: ; %bb.0: ; %bb5516; GFX12-NEXT: v_mov_b32_e32 v1, 155517; GFX12-NEXT: s_add_co_i32 s0, s0, s15518; GFX12-NEXT: scratch_store_b32 v0, v1, s0 offset:-16 scope:SCOPE_SYS5519; GFX12-NEXT: s_wait_storecnt 0x05520; GFX12-NEXT: s_endpgm5521;5522; GFX9-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5523; GFX9-PAL: ; %bb.0: ; %bb5524; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]5525; GFX9-PAL-NEXT: s_mov_b32 s2, s85526; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05527; GFX9-PAL-NEXT: v_mov_b32_e32 v1, 155528; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)5529; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff5530; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s55531; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 05532; GFX9-PAL-NEXT: s_add_i32 s0, s0, s15533; GFX9-PAL-NEXT: v_add_u32_e32 v0, s0, v05534; GFX9-PAL-NEXT: v_add_u32_e32 v0, -16, v05535; GFX9-PAL-NEXT: scratch_store_dword v0, v1, off5536; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5537; GFX9-PAL-NEXT: s_endpgm5538;5539; GFX942-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5540; GFX942: ; %bb.0: ; %bb5541; GFX942-NEXT: s_add_i32 s0, s0, s15542; GFX942-NEXT: v_add_u32_e32 v0, s0, v05543; GFX942-NEXT: v_add_u32_e32 v0, -16, v05544; GFX942-NEXT: v_mov_b32_e32 v1, 155545; GFX942-NEXT: scratch_store_dword v0, v1, off sc0 sc15546; GFX942-NEXT: s_waitcnt vmcnt(0)5547; GFX942-NEXT: s_endpgm5548;5549; GFX10-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5550; GFX10-PAL: ; %bb.0: ; %bb5551; GFX10-PAL-NEXT: s_getpc_b64 s[2:3]5552; GFX10-PAL-NEXT: s_mov_b32 s2, s85553; GFX10-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05554; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)5555; GFX10-PAL-NEXT: s_and_b32 s3, s3, 0xffff5556; GFX10-PAL-NEXT: s_add_u32 s2, s2, s55557; GFX10-PAL-NEXT: s_addc_u32 s3, s3, 05558; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25559; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35560; GFX10-PAL-NEXT: v_add3_u32 v0, s0, s1, v05561; GFX10-PAL-NEXT: v_mov_b32_e32 v1, 155562; GFX10-PAL-NEXT: scratch_store_dword v0, v1, off offset:-165563; GFX10-PAL-NEXT: s_waitcnt_vscnt null, 0x05564; GFX10-PAL-NEXT: s_endpgm5565;5566; GFX11-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5567; GFX11-PAL: ; %bb.0: ; %bb5568; GFX11-PAL-NEXT: v_add3_u32 v0, s0, s1, v05569; GFX11-PAL-NEXT: v_mov_b32_e32 v1, 155570; GFX11-PAL-NEXT: scratch_store_b32 v0, v1, off offset:-16 dlc5571; GFX11-PAL-NEXT: s_waitcnt_vscnt null, 0x05572; GFX11-PAL-NEXT: s_endpgm5573;5574; GFX12-PAL-LABEL: sgpr_base_plus_sgpr_plus_vgpr_plus_negative_imm_offset:5575; GFX12-PAL: ; %bb.0: ; %bb5576; GFX12-PAL-NEXT: v_mov_b32_e32 v1, 155577; GFX12-PAL-NEXT: s_add_co_i32 s0, s0, s15578; GFX12-PAL-NEXT: scratch_store_b32 v0, v1, s0 offset:-16 scope:SCOPE_SYS5579; GFX12-PAL-NEXT: s_wait_storecnt 0x05580; GFX12-PAL-NEXT: s_endpgm5581bb:5582 %add1 = add nsw i32 %sidx, %vidx5583 %add2 = add nsw i32 %add1, -165584 %gep = getelementptr inbounds [16 x i8], ptr addrspace(5) %sgpr_base, i32 0, i32 %add25585 store volatile i32 15, ptr addrspace(5) %gep, align 45586 ret void5587}5588 5589define amdgpu_gs void @sgpr_base_negative_offset(ptr addrspace(1) %out, ptr addrspace(5) inreg %scevgep) {5590; GFX9-LABEL: sgpr_base_negative_offset:5591; GFX9: ; %bb.0: ; %entry5592; GFX9-NEXT: s_add_u32 flat_scratch_lo, s0, s55593; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s1, 05594; GFX9-NEXT: s_addk_i32 s2, 0xffe85595; GFX9-NEXT: scratch_load_dword v2, off, s25596; GFX9-NEXT: s_waitcnt vmcnt(0)5597; GFX9-NEXT: global_store_dword v[0:1], v2, off5598; GFX9-NEXT: s_endpgm5599;5600; GFX10-LABEL: sgpr_base_negative_offset:5601; GFX10: ; %bb.0: ; %entry5602; GFX10-NEXT: s_add_u32 s0, s0, s55603; GFX10-NEXT: s_addc_u32 s1, s1, 05604; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s05605; GFX10-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s15606; GFX10-NEXT: scratch_load_dword v2, off, s2 offset:-245607; GFX10-NEXT: s_waitcnt vmcnt(0)5608; GFX10-NEXT: global_store_dword v[0:1], v2, off5609; GFX10-NEXT: s_endpgm5610;5611; GFX11-LABEL: sgpr_base_negative_offset:5612; GFX11: ; %bb.0: ; %entry5613; GFX11-NEXT: scratch_load_b32 v2, off, s0 offset:-245614; GFX11-NEXT: s_waitcnt vmcnt(0)5615; GFX11-NEXT: global_store_b32 v[0:1], v2, off5616; GFX11-NEXT: s_endpgm5617;5618; GFX12-LABEL: sgpr_base_negative_offset:5619; GFX12: ; %bb.0: ; %entry5620; GFX12-NEXT: scratch_load_b32 v2, off, s0 offset:-245621; GFX12-NEXT: s_wait_loadcnt 0x05622; GFX12-NEXT: global_store_b32 v[0:1], v2, off5623; GFX12-NEXT: s_endpgm5624;5625; GFX9-PAL-LABEL: sgpr_base_negative_offset:5626; GFX9-PAL: ; %bb.0: ; %entry5627; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]5628; GFX9-PAL-NEXT: s_mov_b32 s2, s85629; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05630; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)5631; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff5632; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s55633; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 05634; GFX9-PAL-NEXT: s_addk_i32 s0, 0xffe85635; GFX9-PAL-NEXT: scratch_load_dword v2, off, s05636; GFX9-PAL-NEXT: s_waitcnt vmcnt(0)5637; GFX9-PAL-NEXT: global_store_dword v[0:1], v2, off5638; GFX9-PAL-NEXT: s_endpgm5639;5640; GFX942-LABEL: sgpr_base_negative_offset:5641; GFX942: ; %bb.0: ; %entry5642; GFX942-NEXT: s_addk_i32 s0, 0xffe85643; GFX942-NEXT: scratch_load_dword v2, off, s05644; GFX942-NEXT: s_waitcnt vmcnt(0)5645; GFX942-NEXT: global_store_dword v[0:1], v2, off5646; GFX942-NEXT: s_endpgm5647;5648; GFX10-PAL-LABEL: sgpr_base_negative_offset:5649; GFX10-PAL: ; %bb.0: ; %entry5650; GFX10-PAL-NEXT: s_getpc_b64 s[2:3]5651; GFX10-PAL-NEXT: s_mov_b32 s2, s85652; GFX10-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x05653; GFX10-PAL-NEXT: s_waitcnt lgkmcnt(0)5654; GFX10-PAL-NEXT: s_and_b32 s3, s3, 0xffff5655; GFX10-PAL-NEXT: s_add_u32 s2, s2, s55656; GFX10-PAL-NEXT: s_addc_u32 s3, s3, 05657; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s25658; GFX10-PAL-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s35659; GFX10-PAL-NEXT: scratch_load_dword v2, off, s0 offset:-245660; GFX10-PAL-NEXT: s_waitcnt vmcnt(0)5661; GFX10-PAL-NEXT: global_store_dword v[0:1], v2, off5662; GFX10-PAL-NEXT: s_endpgm5663;5664; GFX11-PAL-LABEL: sgpr_base_negative_offset:5665; GFX11-PAL: ; %bb.0: ; %entry5666; GFX11-PAL-NEXT: scratch_load_b32 v2, off, s0 offset:-245667; GFX11-PAL-NEXT: s_waitcnt vmcnt(0)5668; GFX11-PAL-NEXT: global_store_b32 v[0:1], v2, off5669; GFX11-PAL-NEXT: s_endpgm5670;5671; GFX12-PAL-LABEL: sgpr_base_negative_offset:5672; GFX12-PAL: ; %bb.0: ; %entry5673; GFX12-PAL-NEXT: scratch_load_b32 v2, off, s0 offset:-245674; GFX12-PAL-NEXT: s_wait_loadcnt 0x05675; GFX12-PAL-NEXT: global_store_b32 v[0:1], v2, off5676; GFX12-PAL-NEXT: s_endpgm5677entry:5678 %scevgep28 = getelementptr i8, ptr addrspace(5) %scevgep, i32 -245679 %0 = load i32, ptr addrspace(5) %scevgep28, align 45680 store i32 %0, ptr addrspace(1) %out5681 ret void5682}5683 5684declare void @llvm.memset.p5.i64(ptr addrspace(5) nocapture writeonly, i8, i64, i1 immarg)5685declare i32 @llvm.amdgcn.workitem.id.x()5686