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1;RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck %s2 3;CHECK: MULADD_IEEE * {{T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}4 5define amdgpu_ps void @test(<4 x float> inreg %reg0) {6 %r0 = extractelement <4 x float> %reg0, i32 07 %r1 = extractelement <4 x float> %reg0, i32 18 %r2 = extractelement <4 x float> %reg0, i32 29 %r3 = fmul float %r0, %r110 %r4 = fadd float %r3, %r211 %vec = insertelement <4 x float> poison, float %r4, i32 012 call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)13 ret void14}15 16declare float @fabs(float ) readnone17declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)18