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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX6,GFX6-SDAG %s3; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s4; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s5; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-SDAG,GFX900-SDAG %s6; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-SDAG,GFX950-SDAG %s7; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s8; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s9; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s10; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-TRUE16 %s11; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-FAKE16 %s12 13; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX6,GFX6-GISEL %s14; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s15; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s16; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX900-GISEL %s17; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX950-GISEL %s18; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s19; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL %s20; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s21 22define float @v_max3_f32_maximumnum_maximumnum__v_v_v_0(float %a, float %b, float %c) {23; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:24; GFX6: ; %bb.0:25; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; GFX6-NEXT: v_max3_f32 v0, v0, v1, v227; GFX6-NEXT: s_setpc_b64 s[30:31]28;29; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:30; GFX7: ; %bb.0:31; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)32; GFX7-NEXT: v_max3_f32 v0, v0, v1, v233; GFX7-NEXT: s_setpc_b64 s[30:31]34;35; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:36; GFX8: ; %bb.0:37; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; GFX8-NEXT: v_max3_f32 v0, v0, v1, v239; GFX8-NEXT: s_setpc_b64 s[30:31]40;41; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:42; GFX9: ; %bb.0:43; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)44; GFX9-NEXT: v_max3_f32 v0, v0, v1, v245; GFX9-NEXT: s_setpc_b64 s[30:31]46;47; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:48; GFX10: ; %bb.0:49; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; GFX10-NEXT: v_max3_f32 v0, v0, v1, v251; GFX10-NEXT: s_setpc_b64 s[30:31]52;53; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:54; GFX11: ; %bb.0:55; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX11-NEXT: v_max3_f32 v0, v0, v1, v257; GFX11-NEXT: s_setpc_b64 s[30:31]58;59; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0:60; GFX12: ; %bb.0:61; GFX12-NEXT: s_wait_loadcnt_dscnt 0x062; GFX12-NEXT: s_wait_expcnt 0x063; GFX12-NEXT: s_wait_samplecnt 0x064; GFX12-NEXT: s_wait_bvhcnt 0x065; GFX12-NEXT: s_wait_kmcnt 0x066; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, v267; GFX12-NEXT: s_setpc_b64 s[30:31]68 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)69 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)70 ret float %max371}72 73define float @v_max3_f32_maximumnum_maximumnum__v_v_v_1(float %a, float %b, float %c) {74; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:75; GFX6: ; %bb.0:76; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)77; GFX6-NEXT: v_max3_f32 v0, v2, v0, v178; GFX6-NEXT: s_setpc_b64 s[30:31]79;80; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:81; GFX7: ; %bb.0:82; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)83; GFX7-NEXT: v_max3_f32 v0, v2, v0, v184; GFX7-NEXT: s_setpc_b64 s[30:31]85;86; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:87; GFX8: ; %bb.0:88; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)89; GFX8-NEXT: v_max3_f32 v0, v2, v0, v190; GFX8-NEXT: s_setpc_b64 s[30:31]91;92; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:93; GFX9: ; %bb.0:94; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)95; GFX9-NEXT: v_max3_f32 v0, v2, v0, v196; GFX9-NEXT: s_setpc_b64 s[30:31]97;98; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:99; GFX10: ; %bb.0:100; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)101; GFX10-NEXT: v_max3_f32 v0, v2, v0, v1102; GFX10-NEXT: s_setpc_b64 s[30:31]103;104; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:105; GFX11: ; %bb.0:106; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)107; GFX11-NEXT: v_max3_f32 v0, v2, v0, v1108; GFX11-NEXT: s_setpc_b64 s[30:31]109;110; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_1:111; GFX12: ; %bb.0:112; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0113; GFX12-NEXT: s_wait_expcnt 0x0114; GFX12-NEXT: s_wait_samplecnt 0x0115; GFX12-NEXT: s_wait_bvhcnt 0x0116; GFX12-NEXT: s_wait_kmcnt 0x0117; GFX12-NEXT: v_max3_num_f32 v0, v2, v0, v1118; GFX12-NEXT: s_setpc_b64 s[30:31]119 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)120 %max3 = call float @llvm.maximumnum.f32(float %c, float %tmp0)121 ret float %max3122}123 124define float @v_max3_f32_maximumnum_maximumnum__i_v_v_0(float %b, float %c) {125; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:126; GFX6: ; %bb.0:127; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)128; GFX6-NEXT: v_max3_f32 v0, v0, 1.0, v1129; GFX6-NEXT: s_setpc_b64 s[30:31]130;131; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:132; GFX7: ; %bb.0:133; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)134; GFX7-NEXT: v_max3_f32 v0, v0, 1.0, v1135; GFX7-NEXT: s_setpc_b64 s[30:31]136;137; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:138; GFX8: ; %bb.0:139; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)140; GFX8-NEXT: v_max3_f32 v0, v0, 1.0, v1141; GFX8-NEXT: s_setpc_b64 s[30:31]142;143; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:144; GFX9: ; %bb.0:145; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)146; GFX9-NEXT: v_max3_f32 v0, v0, 1.0, v1147; GFX9-NEXT: s_setpc_b64 s[30:31]148;149; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:150; GFX10: ; %bb.0:151; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)152; GFX10-NEXT: v_max3_f32 v0, v0, 1.0, v1153; GFX10-NEXT: s_setpc_b64 s[30:31]154;155; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:156; GFX11: ; %bb.0:157; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)158; GFX11-NEXT: v_max3_f32 v0, v0, 1.0, v1159; GFX11-NEXT: s_setpc_b64 s[30:31]160;161; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_0:162; GFX12: ; %bb.0:163; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0164; GFX12-NEXT: s_wait_expcnt 0x0165; GFX12-NEXT: s_wait_samplecnt 0x0166; GFX12-NEXT: s_wait_bvhcnt 0x0167; GFX12-NEXT: s_wait_kmcnt 0x0168; GFX12-NEXT: v_max3_num_f32 v0, v0, 1.0, v1169; GFX12-NEXT: s_setpc_b64 s[30:31]170 %tmp0 = call float @llvm.maximumnum.f32(float 1.0, float %b)171 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)172 ret float %max3173}174 175define float @v_max3_f32_maximumnum_maximumnum__i_v_v_1(float %b, float %c) {176; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:177; GFX6: ; %bb.0:178; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)179; GFX6-NEXT: v_max3_f32 v0, v1, v0, 1.0180; GFX6-NEXT: s_setpc_b64 s[30:31]181;182; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:183; GFX7: ; %bb.0:184; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)185; GFX7-NEXT: v_max3_f32 v0, v1, v0, 1.0186; GFX7-NEXT: s_setpc_b64 s[30:31]187;188; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:189; GFX8: ; %bb.0:190; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)191; GFX8-NEXT: v_max3_f32 v0, v1, v0, 1.0192; GFX8-NEXT: s_setpc_b64 s[30:31]193;194; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:195; GFX9: ; %bb.0:196; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)197; GFX9-NEXT: v_max3_f32 v0, v1, v0, 1.0198; GFX9-NEXT: s_setpc_b64 s[30:31]199;200; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:201; GFX10: ; %bb.0:202; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)203; GFX10-NEXT: v_max3_f32 v0, v1, v0, 1.0204; GFX10-NEXT: s_setpc_b64 s[30:31]205;206; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:207; GFX11: ; %bb.0:208; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)209; GFX11-NEXT: v_max3_f32 v0, v1, v0, 1.0210; GFX11-NEXT: s_setpc_b64 s[30:31]211;212; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__i_v_v_1:213; GFX12: ; %bb.0:214; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0215; GFX12-NEXT: s_wait_expcnt 0x0216; GFX12-NEXT: s_wait_samplecnt 0x0217; GFX12-NEXT: s_wait_bvhcnt 0x0218; GFX12-NEXT: s_wait_kmcnt 0x0219; GFX12-NEXT: v_max3_num_f32 v0, v1, v0, 1.0220; GFX12-NEXT: s_setpc_b64 s[30:31]221 %tmp0 = call float @llvm.maximumnum.f32(float 1.0, float %b)222 %max3 = call float @llvm.maximumnum.f32(float %c, float %tmp0)223 ret float %max3224}225 226define float @v_max3_f32_maximumnum_maximumnum__v_i_v_0(float %a, float %c) {227; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:228; GFX6: ; %bb.0:229; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)230; GFX6-NEXT: v_max3_f32 v0, v0, 1.0, v1231; GFX6-NEXT: s_setpc_b64 s[30:31]232;233; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:234; GFX7: ; %bb.0:235; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)236; GFX7-NEXT: v_max3_f32 v0, v0, 1.0, v1237; GFX7-NEXT: s_setpc_b64 s[30:31]238;239; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:240; GFX8: ; %bb.0:241; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)242; GFX8-NEXT: v_max3_f32 v0, v0, 1.0, v1243; GFX8-NEXT: s_setpc_b64 s[30:31]244;245; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:246; GFX9: ; %bb.0:247; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)248; GFX9-NEXT: v_max3_f32 v0, v0, 1.0, v1249; GFX9-NEXT: s_setpc_b64 s[30:31]250;251; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:252; GFX10: ; %bb.0:253; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)254; GFX10-NEXT: v_max3_f32 v0, v0, 1.0, v1255; GFX10-NEXT: s_setpc_b64 s[30:31]256;257; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:258; GFX11: ; %bb.0:259; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)260; GFX11-NEXT: v_max3_f32 v0, v0, 1.0, v1261; GFX11-NEXT: s_setpc_b64 s[30:31]262;263; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_0:264; GFX12: ; %bb.0:265; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0266; GFX12-NEXT: s_wait_expcnt 0x0267; GFX12-NEXT: s_wait_samplecnt 0x0268; GFX12-NEXT: s_wait_bvhcnt 0x0269; GFX12-NEXT: s_wait_kmcnt 0x0270; GFX12-NEXT: v_max3_num_f32 v0, v0, 1.0, v1271; GFX12-NEXT: s_setpc_b64 s[30:31]272 %tmp0 = call float @llvm.maximumnum.f32(float %a, float 1.0)273 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)274 ret float %max3275}276 277define float @v_max3_f32_maximumnum_maximumnum__v_i_v_1(float %a, float %c) {278; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:279; GFX6: ; %bb.0:280; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)281; GFX6-NEXT: v_max3_f32 v0, v1, v0, 1.0282; GFX6-NEXT: s_setpc_b64 s[30:31]283;284; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:285; GFX7: ; %bb.0:286; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)287; GFX7-NEXT: v_max3_f32 v0, v1, v0, 1.0288; GFX7-NEXT: s_setpc_b64 s[30:31]289;290; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:291; GFX8: ; %bb.0:292; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)293; GFX8-NEXT: v_max3_f32 v0, v1, v0, 1.0294; GFX8-NEXT: s_setpc_b64 s[30:31]295;296; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:297; GFX9: ; %bb.0:298; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)299; GFX9-NEXT: v_max3_f32 v0, v1, v0, 1.0300; GFX9-NEXT: s_setpc_b64 s[30:31]301;302; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:303; GFX10: ; %bb.0:304; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)305; GFX10-NEXT: v_max3_f32 v0, v1, v0, 1.0306; GFX10-NEXT: s_setpc_b64 s[30:31]307;308; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:309; GFX11: ; %bb.0:310; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)311; GFX11-NEXT: v_max3_f32 v0, v1, v0, 1.0312; GFX11-NEXT: s_setpc_b64 s[30:31]313;314; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_i_v_1:315; GFX12: ; %bb.0:316; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0317; GFX12-NEXT: s_wait_expcnt 0x0318; GFX12-NEXT: s_wait_samplecnt 0x0319; GFX12-NEXT: s_wait_bvhcnt 0x0320; GFX12-NEXT: s_wait_kmcnt 0x0321; GFX12-NEXT: v_max3_num_f32 v0, v1, v0, 1.0322; GFX12-NEXT: s_setpc_b64 s[30:31]323 %tmp0 = call float @llvm.maximumnum.f32(float %a, float 1.0)324 %max3 = call float @llvm.maximumnum.f32(float %c, float %tmp0)325 ret float %max3326}327 328define float @v_max3_f32_maximumnum_maximumnum__v_v_i(float %a, float %b) {329; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:330; GFX6: ; %bb.0:331; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)332; GFX6-NEXT: v_max3_f32 v0, v0, v1, 1.0333; GFX6-NEXT: s_setpc_b64 s[30:31]334;335; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:336; GFX7: ; %bb.0:337; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)338; GFX7-NEXT: v_max3_f32 v0, v0, v1, 1.0339; GFX7-NEXT: s_setpc_b64 s[30:31]340;341; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:342; GFX8: ; %bb.0:343; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)344; GFX8-NEXT: v_max3_f32 v0, v0, v1, 1.0345; GFX8-NEXT: s_setpc_b64 s[30:31]346;347; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:348; GFX9: ; %bb.0:349; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)350; GFX9-NEXT: v_max3_f32 v0, v0, v1, 1.0351; GFX9-NEXT: s_setpc_b64 s[30:31]352;353; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:354; GFX10: ; %bb.0:355; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)356; GFX10-NEXT: v_max3_f32 v0, v0, v1, 1.0357; GFX10-NEXT: s_setpc_b64 s[30:31]358;359; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:360; GFX11: ; %bb.0:361; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)362; GFX11-NEXT: v_max3_f32 v0, v0, v1, 1.0363; GFX11-NEXT: s_setpc_b64 s[30:31]364;365; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_i:366; GFX12: ; %bb.0:367; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0368; GFX12-NEXT: s_wait_expcnt 0x0369; GFX12-NEXT: s_wait_samplecnt 0x0370; GFX12-NEXT: s_wait_bvhcnt 0x0371; GFX12-NEXT: s_wait_kmcnt 0x0372; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, 1.0373; GFX12-NEXT: s_setpc_b64 s[30:31]374 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)375 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float 1.0)376 ret float %max3377}378 379define float @v_max3_f32_maximumnum_maximumnum__v_k_v(float %a, float %c) {380; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:381; GFX6: ; %bb.0:382; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)383; GFX6-NEXT: s_mov_b32 s4, 0x41000000384; GFX6-NEXT: v_max3_f32 v0, v0, s4, v1385; GFX6-NEXT: s_setpc_b64 s[30:31]386;387; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:388; GFX7: ; %bb.0:389; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)390; GFX7-NEXT: s_mov_b32 s4, 0x41000000391; GFX7-NEXT: v_max3_f32 v0, v0, s4, v1392; GFX7-NEXT: s_setpc_b64 s[30:31]393;394; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:395; GFX8: ; %bb.0:396; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)397; GFX8-NEXT: s_mov_b32 s4, 0x41000000398; GFX8-NEXT: v_max3_f32 v0, v0, s4, v1399; GFX8-NEXT: s_setpc_b64 s[30:31]400;401; GFX900-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:402; GFX900-SDAG: ; %bb.0:403; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)404; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x41000000405; GFX900-SDAG-NEXT: v_max3_f32 v0, v0, s4, v1406; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]407;408; GFX950-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:409; GFX950-SDAG: ; %bb.0:410; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)411; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x41000000412; GFX950-SDAG-NEXT: v_max3_f32 v0, v0, s0, v1413; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]414;415; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:416; GFX10: ; %bb.0:417; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)418; GFX10-NEXT: v_max3_f32 v0, v0, 0x41000000, v1419; GFX10-NEXT: s_setpc_b64 s[30:31]420;421; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:422; GFX11: ; %bb.0:423; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)424; GFX11-NEXT: v_max3_f32 v0, v0, 0x41000000, v1425; GFX11-NEXT: s_setpc_b64 s[30:31]426;427; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_k_v:428; GFX12: ; %bb.0:429; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0430; GFX12-NEXT: s_wait_expcnt 0x0431; GFX12-NEXT: s_wait_samplecnt 0x0432; GFX12-NEXT: s_wait_bvhcnt 0x0433; GFX12-NEXT: s_wait_kmcnt 0x0434; GFX12-NEXT: v_max3_num_f32 v0, v0, 0x41000000, v1435; GFX12-NEXT: s_setpc_b64 s[30:31]436 %tmp0 = call float @llvm.maximumnum.f32(float %a, float 8.0)437 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)438 ret float %max3439}440 441define float @v_max3_f32_maximumnum_maximumnum__v_v_k(float %a, float %b) {442; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:443; GFX6: ; %bb.0:444; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)445; GFX6-NEXT: s_mov_b32 s4, 0x41000000446; GFX6-NEXT: v_max3_f32 v0, v0, v1, s4447; GFX6-NEXT: s_setpc_b64 s[30:31]448;449; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:450; GFX7: ; %bb.0:451; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)452; GFX7-NEXT: s_mov_b32 s4, 0x41000000453; GFX7-NEXT: v_max3_f32 v0, v0, v1, s4454; GFX7-NEXT: s_setpc_b64 s[30:31]455;456; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:457; GFX8: ; %bb.0:458; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)459; GFX8-NEXT: s_mov_b32 s4, 0x41000000460; GFX8-NEXT: v_max3_f32 v0, v0, v1, s4461; GFX8-NEXT: s_setpc_b64 s[30:31]462;463; GFX900-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:464; GFX900-SDAG: ; %bb.0:465; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)466; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x41000000467; GFX900-SDAG-NEXT: v_max3_f32 v0, v0, v1, s4468; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]469;470; GFX950-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:471; GFX950-SDAG: ; %bb.0:472; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)473; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x41000000474; GFX950-SDAG-NEXT: v_max3_f32 v0, v0, v1, s0475; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]476;477; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:478; GFX10: ; %bb.0:479; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)480; GFX10-NEXT: v_max3_f32 v0, v0, v1, 0x41000000481; GFX10-NEXT: s_setpc_b64 s[30:31]482;483; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:484; GFX11: ; %bb.0:485; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)486; GFX11-NEXT: v_max3_f32 v0, v0, v1, 0x41000000487; GFX11-NEXT: s_setpc_b64 s[30:31]488;489; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_k:490; GFX12: ; %bb.0:491; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0492; GFX12-NEXT: s_wait_expcnt 0x0493; GFX12-NEXT: s_wait_samplecnt 0x0494; GFX12-NEXT: s_wait_bvhcnt 0x0495; GFX12-NEXT: s_wait_kmcnt 0x0496; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, 0x41000000497; GFX12-NEXT: s_setpc_b64 s[30:31]498 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)499 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float 8.0)500 ret float %max3501}502 503define float @v_max3_f32_maximumnum_maximumnum__s_v_v(float inreg %a, float %b, float %c) {504; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:505; GFX6: ; %bb.0:506; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)507; GFX6-NEXT: v_max3_f32 v0, s16, v0, v1508; GFX6-NEXT: s_setpc_b64 s[30:31]509;510; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:511; GFX7: ; %bb.0:512; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)513; GFX7-NEXT: v_max3_f32 v0, s16, v0, v1514; GFX7-NEXT: s_setpc_b64 s[30:31]515;516; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:517; GFX8: ; %bb.0:518; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)519; GFX8-NEXT: v_max3_f32 v0, s16, v0, v1520; GFX8-NEXT: s_setpc_b64 s[30:31]521;522; GFX900-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:523; GFX900-SDAG: ; %bb.0:524; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)525; GFX900-SDAG-NEXT: v_max3_f32 v0, s16, v0, v1526; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]527;528; GFX950-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:529; GFX950-SDAG: ; %bb.0:530; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)531; GFX950-SDAG-NEXT: v_max3_f32 v0, s0, v0, v1532; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]533;534; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:535; GFX10: ; %bb.0:536; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)537; GFX10-NEXT: v_max3_f32 v0, s16, v0, v1538; GFX10-NEXT: s_setpc_b64 s[30:31]539;540; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:541; GFX11: ; %bb.0:542; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)543; GFX11-NEXT: v_max3_f32 v0, s0, v0, v1544; GFX11-NEXT: s_setpc_b64 s[30:31]545;546; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_v:547; GFX12: ; %bb.0:548; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0549; GFX12-NEXT: s_wait_expcnt 0x0550; GFX12-NEXT: s_wait_samplecnt 0x0551; GFX12-NEXT: s_wait_bvhcnt 0x0552; GFX12-NEXT: s_wait_kmcnt 0x0553; GFX12-NEXT: v_max3_num_f32 v0, s0, v0, v1554; GFX12-NEXT: s_setpc_b64 s[30:31]555 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)556 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)557 ret float %max3558}559 560define float @v_max3_f32_maximumnum_maximumnum__s_s_v(float inreg %a, float inreg %b, float %c) {561; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:562; GFX6: ; %bb.0:563; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)564; GFX6-NEXT: v_mov_b32_e32 v1, s17565; GFX6-NEXT: v_max3_f32 v0, s16, v1, v0566; GFX6-NEXT: s_setpc_b64 s[30:31]567;568; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:569; GFX7: ; %bb.0:570; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)571; GFX7-NEXT: v_mov_b32_e32 v1, s17572; GFX7-NEXT: v_max3_f32 v0, s16, v1, v0573; GFX7-NEXT: s_setpc_b64 s[30:31]574;575; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:576; GFX8: ; %bb.0:577; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)578; GFX8-NEXT: v_mov_b32_e32 v1, s17579; GFX8-NEXT: v_max3_f32 v0, s16, v1, v0580; GFX8-NEXT: s_setpc_b64 s[30:31]581;582; GFX900-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:583; GFX900-SDAG: ; %bb.0:584; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s17586; GFX900-SDAG-NEXT: v_max3_f32 v0, s16, v1, v0587; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]588;589; GFX950-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:590; GFX950-SDAG: ; %bb.0:591; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)592; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s1593; GFX950-SDAG-NEXT: v_max3_f32 v0, s0, v1, v0594; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]595;596; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:597; GFX10: ; %bb.0:598; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)599; GFX10-NEXT: v_max3_f32 v0, s16, s17, v0600; GFX10-NEXT: s_setpc_b64 s[30:31]601;602; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:603; GFX11: ; %bb.0:604; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)605; GFX11-NEXT: v_max3_f32 v0, s0, s1, v0606; GFX11-NEXT: s_setpc_b64 s[30:31]607;608; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_v:609; GFX12: ; %bb.0:610; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0611; GFX12-NEXT: s_wait_expcnt 0x0612; GFX12-NEXT: s_wait_samplecnt 0x0613; GFX12-NEXT: s_wait_bvhcnt 0x0614; GFX12-NEXT: s_wait_kmcnt 0x0615; GFX12-NEXT: v_max3_num_f32 v0, s0, s1, v0616; GFX12-NEXT: s_setpc_b64 s[30:31]617 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)618 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)619 ret float %max3620}621 622define float @v_max3_f32_maximumnum_maximumnum__s_v_s(float inreg %a, float %b, float inreg %c) {623; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:624; GFX6: ; %bb.0:625; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)626; GFX6-NEXT: v_mov_b32_e32 v1, s17627; GFX6-NEXT: v_max3_f32 v0, s16, v0, v1628; GFX6-NEXT: s_setpc_b64 s[30:31]629;630; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:631; GFX7: ; %bb.0:632; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)633; GFX7-NEXT: v_mov_b32_e32 v1, s17634; GFX7-NEXT: v_max3_f32 v0, s16, v0, v1635; GFX7-NEXT: s_setpc_b64 s[30:31]636;637; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:638; GFX8: ; %bb.0:639; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)640; GFX8-NEXT: v_mov_b32_e32 v1, s17641; GFX8-NEXT: v_max3_f32 v0, s16, v0, v1642; GFX8-NEXT: s_setpc_b64 s[30:31]643;644; GFX900-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:645; GFX900-SDAG: ; %bb.0:646; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)647; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s17648; GFX900-SDAG-NEXT: v_max3_f32 v0, s16, v0, v1649; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]650;651; GFX950-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:652; GFX950-SDAG: ; %bb.0:653; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)654; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s1655; GFX950-SDAG-NEXT: v_max3_f32 v0, s0, v0, v1656; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]657;658; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:659; GFX10: ; %bb.0:660; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)661; GFX10-NEXT: v_max3_f32 v0, s16, v0, s17662; GFX10-NEXT: s_setpc_b64 s[30:31]663;664; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:665; GFX11: ; %bb.0:666; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)667; GFX11-NEXT: v_max3_f32 v0, s0, v0, s1668; GFX11-NEXT: s_setpc_b64 s[30:31]669;670; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__s_v_s:671; GFX12: ; %bb.0:672; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0673; GFX12-NEXT: s_wait_expcnt 0x0674; GFX12-NEXT: s_wait_samplecnt 0x0675; GFX12-NEXT: s_wait_bvhcnt 0x0676; GFX12-NEXT: s_wait_kmcnt 0x0677; GFX12-NEXT: v_max3_num_f32 v0, s0, v0, s1678; GFX12-NEXT: s_setpc_b64 s[30:31]679 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)680 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)681 ret float %max3682}683 684define float @v_max3_f32_maximumnum_maximumnum__s_s_s(float inreg %a, float inreg %b, float inreg %c) {685; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:686; GFX6: ; %bb.0:687; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)688; GFX6-NEXT: v_mov_b32_e32 v0, s17689; GFX6-NEXT: v_mov_b32_e32 v1, s18690; GFX6-NEXT: v_max3_f32 v0, s16, v0, v1691; GFX6-NEXT: s_setpc_b64 s[30:31]692;693; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:694; GFX7: ; %bb.0:695; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)696; GFX7-NEXT: v_mov_b32_e32 v0, s17697; GFX7-NEXT: v_mov_b32_e32 v1, s18698; GFX7-NEXT: v_max3_f32 v0, s16, v0, v1699; GFX7-NEXT: s_setpc_b64 s[30:31]700;701; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:702; GFX8: ; %bb.0:703; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)704; GFX8-NEXT: v_mov_b32_e32 v0, s17705; GFX8-NEXT: v_mov_b32_e32 v1, s18706; GFX8-NEXT: v_max3_f32 v0, s16, v0, v1707; GFX8-NEXT: s_setpc_b64 s[30:31]708;709; GFX900-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:710; GFX900-SDAG: ; %bb.0:711; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)712; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, s17713; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s18714; GFX900-SDAG-NEXT: v_max3_f32 v0, s16, v0, v1715; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]716;717; GFX950-SDAG-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:718; GFX950-SDAG: ; %bb.0:719; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)720; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s1721; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s2722; GFX950-SDAG-NEXT: v_max3_f32 v0, s0, v0, v1723; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]724;725; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:726; GFX10: ; %bb.0:727; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)728; GFX10-NEXT: v_mov_b32_e32 v0, s18729; GFX10-NEXT: v_max3_f32 v0, s16, s17, v0730; GFX10-NEXT: s_setpc_b64 s[30:31]731;732; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:733; GFX11: ; %bb.0:734; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)735; GFX11-NEXT: v_mov_b32_e32 v0, s2736; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)737; GFX11-NEXT: v_max3_f32 v0, s0, s1, v0738; GFX11-NEXT: s_setpc_b64 s[30:31]739;740; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__s_s_s:741; GFX12: ; %bb.0:742; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0743; GFX12-NEXT: s_wait_expcnt 0x0744; GFX12-NEXT: s_wait_samplecnt 0x0745; GFX12-NEXT: s_wait_bvhcnt 0x0746; GFX12-NEXT: s_wait_kmcnt 0x0747; GFX12-NEXT: v_mov_b32_e32 v0, s2748; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)749; GFX12-NEXT: v_max3_num_f32 v0, s0, s1, v0750; GFX12-NEXT: s_setpc_b64 s[30:31]751 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)752 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)753 ret float %max3754}755 756define amdgpu_ps i32 @s_max3_f32_maximumnum_maximumnum__s_s_s(float inreg %a, float inreg %b, float inreg %c) {757; GFX6-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:758; GFX6: ; %bb.0:759; GFX6-NEXT: v_mov_b32_e32 v0, s1760; GFX6-NEXT: v_mov_b32_e32 v1, s2761; GFX6-NEXT: v_max3_f32 v0, s0, v0, v1762; GFX6-NEXT: v_readfirstlane_b32 s0, v0763; GFX6-NEXT: ; return to shader part epilog764;765; GFX7-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:766; GFX7: ; %bb.0:767; GFX7-NEXT: v_mov_b32_e32 v0, s1768; GFX7-NEXT: v_mov_b32_e32 v1, s2769; GFX7-NEXT: v_max3_f32 v0, s0, v0, v1770; GFX7-NEXT: v_readfirstlane_b32 s0, v0771; GFX7-NEXT: ; return to shader part epilog772;773; GFX8-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:774; GFX8: ; %bb.0:775; GFX8-NEXT: v_mov_b32_e32 v0, s1776; GFX8-NEXT: v_mov_b32_e32 v1, s2777; GFX8-NEXT: v_max3_f32 v0, s0, v0, v1778; GFX8-NEXT: v_readfirstlane_b32 s0, v0779; GFX8-NEXT: ; return to shader part epilog780;781; GFX900-SDAG-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:782; GFX900-SDAG: ; %bb.0:783; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, s1784; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s2785; GFX900-SDAG-NEXT: v_max3_f32 v0, s0, v0, v1786; GFX900-SDAG-NEXT: v_readfirstlane_b32 s0, v0787; GFX900-SDAG-NEXT: ; return to shader part epilog788;789; GFX950-SDAG-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:790; GFX950-SDAG: ; %bb.0:791; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s1792; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s2793; GFX950-SDAG-NEXT: v_max3_f32 v0, s0, v0, v1794; GFX950-SDAG-NEXT: s_nop 0795; GFX950-SDAG-NEXT: v_readfirstlane_b32 s0, v0796; GFX950-SDAG-NEXT: ; return to shader part epilog797;798; GFX10-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:799; GFX10: ; %bb.0:800; GFX10-NEXT: v_mov_b32_e32 v0, s2801; GFX10-NEXT: v_max3_f32 v0, s0, s1, v0802; GFX10-NEXT: v_readfirstlane_b32 s0, v0803; GFX10-NEXT: ; return to shader part epilog804;805; GFX11-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:806; GFX11: ; %bb.0:807; GFX11-NEXT: v_mov_b32_e32 v0, s2808; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)809; GFX11-NEXT: v_max3_f32 v0, s0, s1, v0810; GFX11-NEXT: v_readfirstlane_b32 s0, v0811; GFX11-NEXT: ; return to shader part epilog812;813; GFX12-LABEL: s_max3_f32_maximumnum_maximumnum__s_s_s:814; GFX12: ; %bb.0:815; GFX12-NEXT: v_mov_b32_e32 v0, s2816; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)817; GFX12-NEXT: v_max3_num_f32 v0, s0, s1, v0818; GFX12-NEXT: v_readfirstlane_b32 s0, v0819; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)820; GFX12-NEXT: ; return to shader part epilog821 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)822 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)823 %max3.bitcast = bitcast float %max3 to i32824 ret i32 %max3.bitcast825}826 827define float @v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan(float %a, float %b, float %c) {828; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:829; GFX6: ; %bb.0:830; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)831; GFX6-NEXT: v_max3_f32 v0, v0, v1, v2832; GFX6-NEXT: s_setpc_b64 s[30:31]833;834; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:835; GFX7: ; %bb.0:836; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)837; GFX7-NEXT: v_max3_f32 v0, v0, v1, v2838; GFX7-NEXT: s_setpc_b64 s[30:31]839;840; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:841; GFX8: ; %bb.0:842; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)843; GFX8-NEXT: v_max3_f32 v0, v0, v1, v2844; GFX8-NEXT: s_setpc_b64 s[30:31]845;846; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:847; GFX9: ; %bb.0:848; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)849; GFX9-NEXT: v_max3_f32 v0, v0, v1, v2850; GFX9-NEXT: s_setpc_b64 s[30:31]851;852; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:853; GFX10: ; %bb.0:854; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)855; GFX10-NEXT: v_max3_f32 v0, v0, v1, v2856; GFX10-NEXT: s_setpc_b64 s[30:31]857;858; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:859; GFX11: ; %bb.0:860; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)861; GFX11-NEXT: v_max3_f32 v0, v0, v1, v2862; GFX11-NEXT: s_setpc_b64 s[30:31]863;864; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan_nnan:865; GFX12: ; %bb.0:866; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0867; GFX12-NEXT: s_wait_expcnt 0x0868; GFX12-NEXT: s_wait_samplecnt 0x0869; GFX12-NEXT: s_wait_bvhcnt 0x0870; GFX12-NEXT: s_wait_kmcnt 0x0871; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, v2872; GFX12-NEXT: s_setpc_b64 s[30:31]873 %tmp0 = call nnan float @llvm.maximumnum.f32(float %a, float %b)874 %max3 = call nnan float @llvm.maximumnum.f32(float %tmp0, float %c)875 ret float %max3876}877 878define float @v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0(float %a, float %b, float %c) {879; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:880; GFX6: ; %bb.0:881; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)882; GFX6-NEXT: v_max3_f32 v0, v0, v1, v2883; GFX6-NEXT: s_setpc_b64 s[30:31]884;885; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:886; GFX7: ; %bb.0:887; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)888; GFX7-NEXT: v_max3_f32 v0, v0, v1, v2889; GFX7-NEXT: s_setpc_b64 s[30:31]890;891; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:892; GFX8: ; %bb.0:893; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)894; GFX8-NEXT: v_max3_f32 v0, v0, v1, v2895; GFX8-NEXT: s_setpc_b64 s[30:31]896;897; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:898; GFX9: ; %bb.0:899; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; GFX9-NEXT: v_max3_f32 v0, v0, v1, v2901; GFX9-NEXT: s_setpc_b64 s[30:31]902;903; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:904; GFX10: ; %bb.0:905; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)906; GFX10-NEXT: v_max3_f32 v0, v0, v1, v2907; GFX10-NEXT: s_setpc_b64 s[30:31]908;909; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:910; GFX11: ; %bb.0:911; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)912; GFX11-NEXT: v_max3_f32 v0, v0, v1, v2913; GFX11-NEXT: s_setpc_b64 s[30:31]914;915; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan0:916; GFX12: ; %bb.0:917; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0918; GFX12-NEXT: s_wait_expcnt 0x0919; GFX12-NEXT: s_wait_samplecnt 0x0920; GFX12-NEXT: s_wait_bvhcnt 0x0921; GFX12-NEXT: s_wait_kmcnt 0x0922; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, v2923; GFX12-NEXT: s_setpc_b64 s[30:31]924 %tmp0 = call nnan float @llvm.maximumnum.f32(float %a, float %b)925 %max3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)926 ret float %max3927}928 929define float @v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1(float %a, float %b, float %c) {930; GFX6-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:931; GFX6: ; %bb.0:932; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)933; GFX6-NEXT: v_max3_f32 v0, v0, v1, v2934; GFX6-NEXT: s_setpc_b64 s[30:31]935;936; GFX7-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:937; GFX7: ; %bb.0:938; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GFX7-NEXT: v_max3_f32 v0, v0, v1, v2940; GFX7-NEXT: s_setpc_b64 s[30:31]941;942; GFX8-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:943; GFX8: ; %bb.0:944; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)945; GFX8-NEXT: v_max3_f32 v0, v0, v1, v2946; GFX8-NEXT: s_setpc_b64 s[30:31]947;948; GFX9-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:949; GFX9: ; %bb.0:950; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)951; GFX9-NEXT: v_max3_f32 v0, v0, v1, v2952; GFX9-NEXT: s_setpc_b64 s[30:31]953;954; GFX10-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:955; GFX10: ; %bb.0:956; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)957; GFX10-NEXT: v_max3_f32 v0, v0, v1, v2958; GFX10-NEXT: s_setpc_b64 s[30:31]959;960; GFX11-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:961; GFX11: ; %bb.0:962; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)963; GFX11-NEXT: v_max3_f32 v0, v0, v1, v2964; GFX11-NEXT: s_setpc_b64 s[30:31]965;966; GFX12-LABEL: v_max3_f32_maximumnum_maximumnum__v_v_v_0__nnan1:967; GFX12: ; %bb.0:968; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0969; GFX12-NEXT: s_wait_expcnt 0x0970; GFX12-NEXT: s_wait_samplecnt 0x0971; GFX12-NEXT: s_wait_bvhcnt 0x0972; GFX12-NEXT: s_wait_kmcnt 0x0973; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, v2974; GFX12-NEXT: s_setpc_b64 s[30:31]975 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)976 %max3 = call nnan float @llvm.maximumnum.f32(float %tmp0, float %c)977 ret float %max3978}979 980define <2 x float> @v_max3_v2f32_maximumnum_maximumnum__v_v_v_0(<2 x float> %a, <2 x float> %b, <2 x float> %c) {981; GFX6-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:982; GFX6: ; %bb.0:983; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)984; GFX6-NEXT: v_max3_f32 v0, v0, v2, v4985; GFX6-NEXT: v_max3_f32 v1, v1, v3, v5986; GFX6-NEXT: s_setpc_b64 s[30:31]987;988; GFX7-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:989; GFX7: ; %bb.0:990; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)991; GFX7-NEXT: v_max3_f32 v0, v0, v2, v4992; GFX7-NEXT: v_max3_f32 v1, v1, v3, v5993; GFX7-NEXT: s_setpc_b64 s[30:31]994;995; GFX8-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:996; GFX8: ; %bb.0:997; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)998; GFX8-NEXT: v_max3_f32 v0, v0, v2, v4999; GFX8-NEXT: v_max3_f32 v1, v1, v3, v51000; GFX8-NEXT: s_setpc_b64 s[30:31]1001;1002; GFX9-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:1003; GFX9: ; %bb.0:1004; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1005; GFX9-NEXT: v_max3_f32 v0, v0, v2, v41006; GFX9-NEXT: v_max3_f32 v1, v1, v3, v51007; GFX9-NEXT: s_setpc_b64 s[30:31]1008;1009; GFX10-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:1010; GFX10: ; %bb.0:1011; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1012; GFX10-NEXT: v_max3_f32 v0, v0, v2, v41013; GFX10-NEXT: v_max3_f32 v1, v1, v3, v51014; GFX10-NEXT: s_setpc_b64 s[30:31]1015;1016; GFX11-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:1017; GFX11: ; %bb.0:1018; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1019; GFX11-NEXT: v_max3_f32 v0, v0, v2, v41020; GFX11-NEXT: v_max3_f32 v1, v1, v3, v51021; GFX11-NEXT: s_setpc_b64 s[30:31]1022;1023; GFX12-LABEL: v_max3_v2f32_maximumnum_maximumnum__v_v_v_0:1024; GFX12: ; %bb.0:1025; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01026; GFX12-NEXT: s_wait_expcnt 0x01027; GFX12-NEXT: s_wait_samplecnt 0x01028; GFX12-NEXT: s_wait_bvhcnt 0x01029; GFX12-NEXT: s_wait_kmcnt 0x01030; GFX12-NEXT: v_max3_num_f32 v0, v0, v2, v41031; GFX12-NEXT: v_max3_num_f32 v1, v1, v3, v51032; GFX12-NEXT: s_setpc_b64 s[30:31]1033 %tmp0 = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %a, <2 x float> %b)1034 %max3 = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %tmp0, <2 x float> %c)1035 ret <2 x float> %max31036}1037 1038define half @v_max3_f16_maximumnum_maximumnum__v_v_v_0(half %a, half %b, half %c) {1039; GFX6-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1040; GFX6: ; %bb.0:1041; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1042; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21043; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11044; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01045; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21046; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11047; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01048; GFX6-NEXT: v_max3_f32 v0, v0, v1, v21049; GFX6-NEXT: s_setpc_b64 s[30:31]1050;1051; GFX7-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1052; GFX7: ; %bb.0:1053; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1054; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21055; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11056; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01057; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21058; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11059; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01060; GFX7-NEXT: v_max3_f32 v0, v0, v1, v21061; GFX7-NEXT: s_setpc_b64 s[30:31]1062;1063; GFX8-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1064; GFX8: ; %bb.0:1065; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1066; GFX8-NEXT: v_max_f16_e32 v1, v1, v11067; GFX8-NEXT: v_max_f16_e32 v0, v0, v01068; GFX8-NEXT: v_max_f16_e32 v0, v0, v11069; GFX8-NEXT: v_max_f16_e32 v1, v2, v21070; GFX8-NEXT: v_max_f16_e32 v0, v0, v11071; GFX8-NEXT: s_setpc_b64 s[30:31]1072;1073; GFX9-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1074; GFX9: ; %bb.0:1075; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1076; GFX9-NEXT: v_max3_f16 v0, v0, v1, v21077; GFX9-NEXT: s_setpc_b64 s[30:31]1078;1079; GFX10-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1080; GFX10: ; %bb.0:1081; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1082; GFX10-NEXT: v_max3_f16 v0, v0, v1, v21083; GFX10-NEXT: s_setpc_b64 s[30:31]1084;1085; GFX11-SDAG-TRUE16-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1086; GFX11-SDAG-TRUE16: ; %bb.0:1087; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1088; GFX11-SDAG-TRUE16-NEXT: v_max3_f16 v0.l, v0.l, v1.l, v2.l1089; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1090;1091; GFX11-SDAG-FAKE16-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1092; GFX11-SDAG-FAKE16: ; %bb.0:1093; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1094; GFX11-SDAG-FAKE16-NEXT: v_max3_f16 v0, v0, v1, v21095; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1096;1097; GFX12-SDAG-TRUE16-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1098; GFX12-SDAG-TRUE16: ; %bb.0:1099; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01100; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x01101; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x01102; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x01103; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x01104; GFX12-SDAG-TRUE16-NEXT: v_max3_num_f16 v0.l, v0.l, v1.l, v2.l1105; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1106;1107; GFX12-SDAG-FAKE16-LABEL: v_max3_f16_maximumnum_maximumnum__v_v_v_0:1108; GFX12-SDAG-FAKE16: ; %bb.0:1109; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01110; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x01111; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x01112; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x01113; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x01114; GFX12-SDAG-FAKE16-NEXT: v_max3_num_f16 v0, v0, v1, v21115; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1116 %tmp0 = call half @llvm.maximumnum.f16(half %a, half %b)1117 %max3 = call half @llvm.maximumnum.f16(half %tmp0, half %c)1118 ret half %max31119}1120 1121define <2 x half> @v_max3_v2f16_maximumnum_maximumnum__v_v_v_0(<2 x half> %a, <2 x half> %b, <2 x half> %c) {1122; GFX6-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1123; GFX6: ; %bb.0:1124; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1125; GFX6-NEXT: v_cvt_f16_f32_e32 v5, v51126; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v31127; GFX6-NEXT: v_cvt_f16_f32_e32 v4, v41128; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21129; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01130; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11131; GFX6-NEXT: v_cvt_f32_f16_e32 v5, v51132; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v31133; GFX6-NEXT: v_cvt_f32_f16_e32 v4, v41134; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21135; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01136; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11137; GFX6-NEXT: v_max3_f32 v0, v0, v2, v41138; GFX6-NEXT: v_max3_f32 v1, v1, v3, v51139; GFX6-NEXT: s_setpc_b64 s[30:31]1140;1141; GFX7-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1142; GFX7: ; %bb.0:1143; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1144; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v51145; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v31146; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v41147; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21148; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01149; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11150; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v51151; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v31152; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v41153; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21154; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01155; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11156; GFX7-NEXT: v_max3_f32 v0, v0, v2, v41157; GFX7-NEXT: v_max3_f32 v1, v1, v3, v51158; GFX7-NEXT: s_setpc_b64 s[30:31]1159;1160; GFX8-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1161; GFX8: ; %bb.0:1162; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1163; GFX8-NEXT: v_max_f16_sdwa v3, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11164; GFX8-NEXT: v_max_f16_sdwa v4, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11165; GFX8-NEXT: v_max_f16_e32 v1, v1, v11166; GFX8-NEXT: v_max_f16_e32 v0, v0, v01167; GFX8-NEXT: v_max_f16_e32 v3, v4, v31168; GFX8-NEXT: v_max_f16_e32 v0, v0, v11169; GFX8-NEXT: v_max_f16_sdwa v1, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11170; GFX8-NEXT: v_max_f16_e32 v2, v2, v21171; GFX8-NEXT: v_max_f16_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1172; GFX8-NEXT: v_max_f16_e32 v0, v0, v21173; GFX8-NEXT: v_or_b32_e32 v0, v0, v11174; GFX8-NEXT: s_setpc_b64 s[30:31]1175;1176; GFX900-SDAG-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1177; GFX900-SDAG: ; %bb.0:1178; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1179; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v11180; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v01181; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v11182; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v2, v21183; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v11184; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1185;1186; GFX950-SDAG-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1187; GFX950-SDAG: ; %bb.0:1188; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1189; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v11190; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v01191; GFX950-SDAG-NEXT: s_nop 01192; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v11193; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v2, v21194; GFX950-SDAG-NEXT: s_nop 01195; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v11196; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1197;1198; GFX10-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1199; GFX10: ; %bb.0:1200; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1201; GFX10-NEXT: v_pk_max_f16 v1, v1, v11202; GFX10-NEXT: v_pk_max_f16 v0, v0, v01203; GFX10-NEXT: v_pk_max_f16 v0, v0, v11204; GFX10-NEXT: v_pk_max_f16 v1, v2, v21205; GFX10-NEXT: v_pk_max_f16 v0, v0, v11206; GFX10-NEXT: s_setpc_b64 s[30:31]1207;1208; GFX11-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1209; GFX11: ; %bb.0:1210; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1211; GFX11-NEXT: v_pk_max_f16 v1, v1, v11212; GFX11-NEXT: v_pk_max_f16 v0, v0, v01213; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1214; GFX11-NEXT: v_pk_max_f16 v0, v0, v11215; GFX11-NEXT: v_pk_max_f16 v1, v2, v21216; GFX11-NEXT: v_pk_max_f16 v0, v0, v11217; GFX11-NEXT: s_setpc_b64 s[30:31]1218;1219; GFX12-LABEL: v_max3_v2f16_maximumnum_maximumnum__v_v_v_0:1220; GFX12: ; %bb.0:1221; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01222; GFX12-NEXT: s_wait_expcnt 0x01223; GFX12-NEXT: s_wait_samplecnt 0x01224; GFX12-NEXT: s_wait_bvhcnt 0x01225; GFX12-NEXT: s_wait_kmcnt 0x01226; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v11227; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v01228; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1229; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v11230; GFX12-NEXT: v_pk_max_num_f16 v1, v2, v21231; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v11232; GFX12-NEXT: s_setpc_b64 s[30:31]1233 %tmp0 = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %a, <2 x half> %b)1234 %max3 = call <2 x half> @llvm.maximumnum.v2f16(<2 x half> %tmp0, <2 x half> %c)1235 ret <2 x half> %max31236}1237 1238define <3 x half> @v_max3_v3f16_maximumnum_maximumnum__v_v_v_0(<3 x half> %a, <3 x half> %b, <3 x half> %c) {1239; GFX6-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1240; GFX6: ; %bb.0:1241; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1242; GFX6-NEXT: v_cvt_f16_f32_e32 v8, v81243; GFX6-NEXT: v_cvt_f16_f32_e32 v5, v51244; GFX6-NEXT: v_cvt_f16_f32_e32 v7, v71245; GFX6-NEXT: v_cvt_f16_f32_e32 v4, v41246; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21247; GFX6-NEXT: v_cvt_f16_f32_e32 v6, v61248; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v31249; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01250; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11251; GFX6-NEXT: v_cvt_f32_f16_e32 v8, v81252; GFX6-NEXT: v_cvt_f32_f16_e32 v5, v51253; GFX6-NEXT: v_cvt_f32_f16_e32 v7, v71254; GFX6-NEXT: v_cvt_f32_f16_e32 v4, v41255; GFX6-NEXT: v_cvt_f32_f16_e32 v6, v61256; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v31257; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01258; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11259; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21260; GFX6-NEXT: v_max3_f32 v0, v0, v3, v61261; GFX6-NEXT: v_max3_f32 v1, v1, v4, v71262; GFX6-NEXT: v_max3_f32 v2, v2, v5, v81263; GFX6-NEXT: s_setpc_b64 s[30:31]1264;1265; GFX7-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1266; GFX7: ; %bb.0:1267; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1268; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v81269; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v51270; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v71271; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v41272; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21273; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v61274; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v31275; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01276; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11277; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v81278; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v51279; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v71280; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v41281; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v61282; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v31283; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01284; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11285; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21286; GFX7-NEXT: v_max3_f32 v0, v0, v3, v61287; GFX7-NEXT: v_max3_f32 v1, v1, v4, v71288; GFX7-NEXT: v_max3_f32 v2, v2, v5, v81289; GFX7-NEXT: s_setpc_b64 s[30:31]1290;1291; GFX8-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1292; GFX8: ; %bb.0:1293; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1294; GFX8-NEXT: v_max_f16_sdwa v6, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11295; GFX8-NEXT: v_max_f16_sdwa v7, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11296; GFX8-NEXT: v_max_f16_e32 v2, v2, v21297; GFX8-NEXT: v_max_f16_e32 v0, v0, v01298; GFX8-NEXT: v_max_f16_e32 v0, v0, v21299; GFX8-NEXT: v_max_f16_e32 v2, v3, v31300; GFX8-NEXT: v_max_f16_e32 v1, v1, v11301; GFX8-NEXT: v_max_f16_e32 v1, v1, v21302; GFX8-NEXT: v_max_f16_e32 v3, v5, v51303; GFX8-NEXT: v_max_f16_e32 v6, v7, v61304; GFX8-NEXT: v_max_f16_sdwa v2, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11305; GFX8-NEXT: v_max_f16_e32 v1, v1, v31306; GFX8-NEXT: v_max_f16_e32 v3, v4, v41307; GFX8-NEXT: v_max_f16_sdwa v2, v6, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1308; GFX8-NEXT: v_max_f16_e32 v0, v0, v31309; GFX8-NEXT: v_or_b32_e32 v0, v0, v21310; GFX8-NEXT: s_setpc_b64 s[30:31]1311;1312; GFX900-SDAG-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1313; GFX900-SDAG: ; %bb.0:1314; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1315; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v21316; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v01317; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v31318; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v11319; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v21320; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v4, v41321; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v31322; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v21323; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v5, v51324; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v21325; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1326;1327; GFX950-SDAG-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1328; GFX950-SDAG: ; %bb.0:1329; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1330; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v21331; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v01332; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v31333; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v11334; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v21335; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v4, v41336; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v31337; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v21338; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v5, v51339; GFX950-SDAG-NEXT: s_nop 01340; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v21341; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1342;1343; GFX10-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1344; GFX10: ; %bb.0:1345; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1346; GFX10-NEXT: v_pk_max_f16 v2, v2, v21347; GFX10-NEXT: v_pk_max_f16 v0, v0, v01348; GFX10-NEXT: v_pk_max_f16 v3, v3, v31349; GFX10-NEXT: v_pk_max_f16 v1, v1, v11350; GFX10-NEXT: v_pk_max_f16 v0, v0, v21351; GFX10-NEXT: v_pk_max_f16 v2, v4, v41352; GFX10-NEXT: v_pk_max_f16 v4, v5, v51353; GFX10-NEXT: v_pk_max_f16 v1, v1, v31354; GFX10-NEXT: v_pk_max_f16 v0, v0, v21355; GFX10-NEXT: v_pk_max_f16 v1, v1, v41356; GFX10-NEXT: s_setpc_b64 s[30:31]1357;1358; GFX11-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1359; GFX11: ; %bb.0:1360; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1361; GFX11-NEXT: v_pk_max_f16 v2, v2, v21362; GFX11-NEXT: v_pk_max_f16 v0, v0, v01363; GFX11-NEXT: v_pk_max_f16 v3, v3, v31364; GFX11-NEXT: v_pk_max_f16 v1, v1, v11365; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1366; GFX11-NEXT: v_pk_max_f16 v0, v0, v21367; GFX11-NEXT: v_pk_max_f16 v2, v4, v41368; GFX11-NEXT: v_pk_max_f16 v4, v5, v51369; GFX11-NEXT: v_pk_max_f16 v1, v1, v31370; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1371; GFX11-NEXT: v_pk_max_f16 v0, v0, v21372; GFX11-NEXT: v_pk_max_f16 v1, v1, v41373; GFX11-NEXT: s_setpc_b64 s[30:31]1374;1375; GFX12-LABEL: v_max3_v3f16_maximumnum_maximumnum__v_v_v_0:1376; GFX12: ; %bb.0:1377; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01378; GFX12-NEXT: s_wait_expcnt 0x01379; GFX12-NEXT: s_wait_samplecnt 0x01380; GFX12-NEXT: s_wait_bvhcnt 0x01381; GFX12-NEXT: s_wait_kmcnt 0x01382; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v21383; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v01384; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v31385; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v11386; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1387; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v21388; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v41389; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v51390; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v31391; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1392; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v21393; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v41394; GFX12-NEXT: s_setpc_b64 s[30:31]1395 %tmp0 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %a, <3 x half> %b)1396 %max3 = call <3 x half> @llvm.maximumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)1397 ret <3 x half> %max31398}1399 1400define <4 x half> @v_max3_v4f16_maximumnum_maximumnum__v_v_v_0(<4 x half> %a, <4 x half> %b, <4 x half> %c) {1401; GFX6-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1402; GFX6: ; %bb.0:1403; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1404; GFX6-NEXT: v_cvt_f16_f32_e32 v11, v111405; GFX6-NEXT: v_cvt_f16_f32_e32 v7, v71406; GFX6-NEXT: v_cvt_f16_f32_e32 v10, v101407; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v31408; GFX6-NEXT: v_cvt_f16_f32_e32 v6, v61409; GFX6-NEXT: v_cvt_f16_f32_e32 v9, v91410; GFX6-NEXT: v_cvt_f16_f32_e32 v5, v51411; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21412; GFX6-NEXT: v_cvt_f16_f32_e32 v8, v81413; GFX6-NEXT: v_cvt_f16_f32_e32 v4, v41414; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01415; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11416; GFX6-NEXT: v_cvt_f32_f16_e32 v11, v111417; GFX6-NEXT: v_cvt_f32_f16_e32 v7, v71418; GFX6-NEXT: v_cvt_f32_f16_e32 v10, v101419; GFX6-NEXT: v_cvt_f32_f16_e32 v6, v61420; GFX6-NEXT: v_cvt_f32_f16_e32 v9, v91421; GFX6-NEXT: v_cvt_f32_f16_e32 v5, v51422; GFX6-NEXT: v_cvt_f32_f16_e32 v8, v81423; GFX6-NEXT: v_cvt_f32_f16_e32 v4, v41424; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01425; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11426; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21427; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v31428; GFX6-NEXT: v_max3_f32 v0, v0, v4, v81429; GFX6-NEXT: v_max3_f32 v1, v1, v5, v91430; GFX6-NEXT: v_max3_f32 v2, v2, v6, v101431; GFX6-NEXT: v_max3_f32 v3, v3, v7, v111432; GFX6-NEXT: s_setpc_b64 s[30:31]1433;1434; GFX7-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1435; GFX7: ; %bb.0:1436; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1437; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v111438; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v71439; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v101440; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v31441; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v61442; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v91443; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v51444; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21445; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v81446; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v41447; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01448; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11449; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v111450; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v71451; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v101452; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v61453; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v91454; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v51455; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v81456; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v41457; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01458; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11459; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21460; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v31461; GFX7-NEXT: v_max3_f32 v0, v0, v4, v81462; GFX7-NEXT: v_max3_f32 v1, v1, v5, v91463; GFX7-NEXT: v_max3_f32 v2, v2, v6, v101464; GFX7-NEXT: v_max3_f32 v3, v3, v7, v111465; GFX7-NEXT: s_setpc_b64 s[30:31]1466;1467; GFX8-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1468; GFX8: ; %bb.0:1469; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1470; GFX8-NEXT: v_max_f16_sdwa v6, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11471; GFX8-NEXT: v_max_f16_sdwa v7, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11472; GFX8-NEXT: v_max_f16_e32 v2, v2, v21473; GFX8-NEXT: v_max_f16_e32 v0, v0, v01474; GFX8-NEXT: v_max_f16_e32 v6, v7, v61475; GFX8-NEXT: v_max_f16_sdwa v7, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11476; GFX8-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11477; GFX8-NEXT: v_max_f16_e32 v0, v0, v21478; GFX8-NEXT: v_max_f16_e32 v2, v3, v31479; GFX8-NEXT: v_max_f16_e32 v1, v1, v11480; GFX8-NEXT: v_max_f16_e32 v7, v8, v71481; GFX8-NEXT: v_max_f16_e32 v1, v1, v21482; GFX8-NEXT: v_max_f16_sdwa v2, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11483; GFX8-NEXT: v_max_f16_sdwa v3, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11484; GFX8-NEXT: v_max_f16_e32 v5, v5, v51485; GFX8-NEXT: v_max_f16_e32 v4, v4, v41486; GFX8-NEXT: v_max_f16_sdwa v2, v7, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1487; GFX8-NEXT: v_max_f16_sdwa v3, v6, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1488; GFX8-NEXT: v_max_f16_e32 v1, v1, v51489; GFX8-NEXT: v_max_f16_e32 v0, v0, v41490; GFX8-NEXT: v_or_b32_e32 v0, v0, v31491; GFX8-NEXT: v_or_b32_e32 v1, v1, v21492; GFX8-NEXT: s_setpc_b64 s[30:31]1493;1494; GFX900-SDAG-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1495; GFX900-SDAG: ; %bb.0:1496; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1497; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v21498; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v01499; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v31500; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v11501; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v21502; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v4, v41503; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v31504; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v21505; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v5, v51506; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v21507; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1508;1509; GFX950-SDAG-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1510; GFX950-SDAG: ; %bb.0:1511; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1512; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v21513; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v01514; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v31515; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v11516; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v21517; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v4, v41518; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v31519; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v21520; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v5, v51521; GFX950-SDAG-NEXT: s_nop 01522; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v21523; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1524;1525; GFX10-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1526; GFX10: ; %bb.0:1527; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1528; GFX10-NEXT: v_pk_max_f16 v2, v2, v21529; GFX10-NEXT: v_pk_max_f16 v0, v0, v01530; GFX10-NEXT: v_pk_max_f16 v3, v3, v31531; GFX10-NEXT: v_pk_max_f16 v1, v1, v11532; GFX10-NEXT: v_pk_max_f16 v0, v0, v21533; GFX10-NEXT: v_pk_max_f16 v2, v4, v41534; GFX10-NEXT: v_pk_max_f16 v4, v5, v51535; GFX10-NEXT: v_pk_max_f16 v1, v1, v31536; GFX10-NEXT: v_pk_max_f16 v0, v0, v21537; GFX10-NEXT: v_pk_max_f16 v1, v1, v41538; GFX10-NEXT: s_setpc_b64 s[30:31]1539;1540; GFX11-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1541; GFX11: ; %bb.0:1542; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1543; GFX11-NEXT: v_pk_max_f16 v2, v2, v21544; GFX11-NEXT: v_pk_max_f16 v0, v0, v01545; GFX11-NEXT: v_pk_max_f16 v3, v3, v31546; GFX11-NEXT: v_pk_max_f16 v1, v1, v11547; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1548; GFX11-NEXT: v_pk_max_f16 v0, v0, v21549; GFX11-NEXT: v_pk_max_f16 v2, v4, v41550; GFX11-NEXT: v_pk_max_f16 v4, v5, v51551; GFX11-NEXT: v_pk_max_f16 v1, v1, v31552; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1553; GFX11-NEXT: v_pk_max_f16 v0, v0, v21554; GFX11-NEXT: v_pk_max_f16 v1, v1, v41555; GFX11-NEXT: s_setpc_b64 s[30:31]1556;1557; GFX12-LABEL: v_max3_v4f16_maximumnum_maximumnum__v_v_v_0:1558; GFX12: ; %bb.0:1559; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01560; GFX12-NEXT: s_wait_expcnt 0x01561; GFX12-NEXT: s_wait_samplecnt 0x01562; GFX12-NEXT: s_wait_bvhcnt 0x01563; GFX12-NEXT: s_wait_kmcnt 0x01564; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v21565; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v01566; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v31567; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v11568; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1569; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v21570; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v41571; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v51572; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v31573; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1574; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v21575; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v41576; GFX12-NEXT: s_setpc_b64 s[30:31]1577 %tmp0 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %a, <4 x half> %b)1578 %max3 = call <4 x half> @llvm.maximumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)1579 ret <4 x half> %max31580}1581 1582define double @v_max3_f64_maximumnum_maximumnum__v_v_v_0(double %a, double %b, double %c) {1583; GFX6-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1584; GFX6: ; %bb.0:1585; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1586; GFX6-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1587; GFX6-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1588; GFX6-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1589; GFX6-NEXT: v_max_f64 v[2:3], v[4:5], v[4:5]1590; GFX6-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1591; GFX6-NEXT: s_setpc_b64 s[30:31]1592;1593; GFX7-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1594; GFX7: ; %bb.0:1595; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1596; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1597; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1598; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1599; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1600; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]1601; GFX7-NEXT: s_setpc_b64 s[30:31]1602;1603; GFX8-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1604; GFX8: ; %bb.0:1605; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1606; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1607; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1608; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1609; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1610; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]1611; GFX8-NEXT: s_setpc_b64 s[30:31]1612;1613; GFX900-SDAG-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1614; GFX900-SDAG: ; %bb.0:1615; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1616; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1617; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1618; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1619; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1620; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]1621; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1622;1623; GFX950-SDAG-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1624; GFX950-SDAG: ; %bb.0:1625; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1626; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1627; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1628; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1629; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[4:5], v[4:5]1630; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1631; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1632;1633; GFX10-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1634; GFX10: ; %bb.0:1635; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1636; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1637; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1638; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1639; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1640; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]1641; GFX10-NEXT: s_setpc_b64 s[30:31]1642;1643; GFX11-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1644; GFX11: ; %bb.0:1645; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1646; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1647; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1648; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1649; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1650; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[2:3]1651; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[4:5]1652; GFX11-NEXT: s_setpc_b64 s[30:31]1653;1654; GFX12-LABEL: v_max3_f64_maximumnum_maximumnum__v_v_v_0:1655; GFX12: ; %bb.0:1656; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01657; GFX12-NEXT: s_wait_expcnt 0x01658; GFX12-NEXT: s_wait_samplecnt 0x01659; GFX12-NEXT: s_wait_bvhcnt 0x01660; GFX12-NEXT: s_wait_kmcnt 0x01661; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]1662; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]1663; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]1664; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1665; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3]1666; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[4:5]1667; GFX12-NEXT: s_setpc_b64 s[30:31]1668 %tmp0 = call double @llvm.maximumnum.f64(double %a, double %b)1669 %max3 = call double @llvm.maximumnum.f64(double %tmp0, double %c)1670 ret double %max31671}1672 1673define bfloat @v_max3_bf16_maximumnum_maximumnum__v_v_v_0(bfloat %a, bfloat %b, bfloat %c) {1674; GFX6-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1675; GFX6: ; %bb.0:1676; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1677; GFX6-NEXT: v_mul_f32_e32 v0, 1.0, v01678; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v11679; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v11680; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v01681; GFX6-NEXT: v_mul_f32_e32 v2, 1.0, v21682; GFX6-NEXT: v_max_f32_e32 v0, v0, v11683; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v01684; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v21685; GFX6-NEXT: v_max_f32_e32 v0, v0, v11686; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v01687; GFX6-NEXT: s_setpc_b64 s[30:31]1688;1689; GFX7-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1690; GFX7: ; %bb.0:1691; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1692; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v01693; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v11694; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v11695; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01696; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v21697; GFX7-NEXT: v_max_f32_e32 v0, v0, v11698; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01699; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v21700; GFX7-NEXT: v_max_f32_e32 v0, v0, v11701; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01702; GFX7-NEXT: s_setpc_b64 s[30:31]1703;1704; GFX8-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1705; GFX8: ; %bb.0:1706; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1707; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v01708; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v31709; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v11710; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1711; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v31712; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1713; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v11714; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v01715; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v4, v31716; GFX8-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc1717; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v01718; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1719; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v11720; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1721; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v31722; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v11723; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1724; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v01725; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v1, v11726; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v21727; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1728; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v31729; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc1730; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v01731; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v21732; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v1, v31733; GFX8-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc1734; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v01735; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1736; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v21737; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1738; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v11739; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v21740; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1741; GFX8-NEXT: s_setpc_b64 s[30:31]1742;1743; GFX900-SDAG-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1744; GFX900-SDAG: ; %bb.0:1745; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1746; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01747; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31748; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11749; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1750; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v41751; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1752; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01753; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11754; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v3, v41755; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc1756; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v01757; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1758; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v11759; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1760; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v31761; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v11762; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1763; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01764; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v11765; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21766; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1767; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31768; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc1769; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01770; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21771; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v1, v31772; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc1773; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v01774; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1775; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v21776; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1777; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v11778; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v21779; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1780; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1781;1782; GFX950-SDAG-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1783; GFX950-SDAG: ; %bb.0:1784; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1785; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01786; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31787; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11788; GFX950-SDAG-NEXT: s_nop 01789; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1790; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v41791; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01792; GFX950-SDAG-NEXT: s_nop 01793; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1794; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11795; GFX950-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v3, v41796; GFX950-SDAG-NEXT: s_nop 11797; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc1798; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v01799; GFX950-SDAG-NEXT: s_nop 11800; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1801; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v11802; GFX950-SDAG-NEXT: s_nop 11803; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1804; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v31805; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v11806; GFX950-SDAG-NEXT: s_nop 11807; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1808; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01809; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v11810; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21811; GFX950-SDAG-NEXT: s_nop 01812; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1813; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31814; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01815; GFX950-SDAG-NEXT: s_nop 01816; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc1817; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21818; GFX950-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v1, v31819; GFX950-SDAG-NEXT: s_nop 11820; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc1821; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v01822; GFX950-SDAG-NEXT: s_nop 11823; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1824; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v21825; GFX950-SDAG-NEXT: s_nop 11826; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1827; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v11828; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v21829; GFX950-SDAG-NEXT: s_nop 11830; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1831; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1832;1833; GFX10-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1834; GFX10: ; %bb.0:1835; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1836; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v01837; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v11838; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31839; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1840; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v41841; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v01842; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo1843; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v11844; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v41845; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc_lo1846; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v01847; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v31848; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo1849; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v11850; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1851; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v41852; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo1853; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v21854; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v01855; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11856; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1857; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31858; GFX10-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc_lo1859; GFX10-NEXT: v_lshlrev_b32_e32 v2, 16, v01860; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v11861; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v31862; GFX10-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc_lo1863; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v01864; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v21865; GFX10-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1866; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v11867; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1868; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31869; GFX10-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1870; GFX10-NEXT: s_setpc_b64 s[30:31]1871;1872; GFX11-SDAG-TRUE16-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1873; GFX11-SDAG-TRUE16: ; %bb.0:1874; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1875; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 01876; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1877; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l1878; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)1879; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31880; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l1881; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l1882; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v0.h, vcc_lo1883; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1884; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31885; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.h1886; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.h, v1.h, vcc_lo1887; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1888; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v1, v31889; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.h, v1.h, vcc_lo1890; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v3.h1891; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v1.h, s01892; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l1893; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)1894; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, vcc_lo1895; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1896; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v1, v11897; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1898; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31899; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.l, v0.h, vcc_lo1900; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l1901; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1902; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31903; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v3.h, v0.l, vcc_lo1904; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1905; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v3.h, s01906; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.h1907; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v11908; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v3.h, vcc_lo1909; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.h1910; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1911; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v3.h, s01912; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1913; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v1.h, vcc_lo1914; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1915; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31916; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo1917; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1918;1919; GFX11-SDAG-FAKE16-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1920; GFX11-SDAG-FAKE16: ; %bb.0:1921; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1922; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v01923; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1924; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31925; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1926; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11927; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v41928; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1929; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo1930; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v01931; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11932; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1933; GFX11-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v41934; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc_lo1935; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v01936; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v31937; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo1938; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v11939; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1940; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1941; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v41942; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1943; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v3, v0 :: v_dual_lshlrev_b32 v3, 16, v21944; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v01945; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)1946; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11947; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1948; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31949; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1950; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc_lo1951; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v01952; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v11953; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1954; GFX11-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v31955; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc_lo1956; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v01957; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v21958; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v11959; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)1960; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1961; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31962; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1963; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1964; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1965;1966; GFX12-SDAG-TRUE16-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:1967; GFX12-SDAG-TRUE16: ; %bb.0:1968; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01969; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x01970; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x01971; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x01972; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x01973; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 01974; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1975; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l1976; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)1977; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31978; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l1979; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l1980; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1981; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v0.h, vcc_lo1982; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31983; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1984; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v1.h1985; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1986; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.h, v1.h, vcc_lo1987; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v1, v31988; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1989; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.h, v1.h, vcc_lo1990; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v3.h1991; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)1992; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)1993; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v1.h, s01994; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l1995; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1996; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, vcc_lo1997; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1998; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1999; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v1, v12000; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v32001; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2002; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.l, v0.h, vcc_lo2003; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l2004; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2005; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32006; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2007; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v3.h, v0.l, vcc_lo2008; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2009; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2010; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v3.h, s02011; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.h2012; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v12013; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2014; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v3.h, vcc_lo2015; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v1.h2016; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2017; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2018; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v3.h, s02019; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l2020; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2021; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v1.h, vcc_lo2022; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2023; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v32024; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2025; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo2026; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2027;2028; GFX12-SDAG-FAKE16-LABEL: v_max3_bf16_maximumnum_maximumnum__v_v_v_0:2029; GFX12-SDAG-FAKE16: ; %bb.0:2030; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x02031; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x02032; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x02033; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x02034; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x02035; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v02036; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)2037; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32038; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2039; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2040; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v12041; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42042; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2043; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2044; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2045; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v02046; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v12047; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)2048; GFX12-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v42049; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2050; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc_lo2051; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02052; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v32053; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2054; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo2055; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12056; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2057; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2058; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2059; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v42060; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2061; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v3, v0 :: v_dual_lshlrev_b32 v3, 16, v22062; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2063; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v02064; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12065; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2066; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2067; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32068; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2069; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2070; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc_lo2071; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v02072; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v12073; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)2074; GFX12-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v2, v32075; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2076; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc_lo2077; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02078; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2079; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v22080; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12081; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2082; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)2083; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2084; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v32085; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2086; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2087; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo2088; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2089 %tmp0 = call bfloat @llvm.maximumnum.bf16(bfloat %a, bfloat %b)2090 %max3 = call bfloat @llvm.maximumnum.bf16(bfloat %tmp0, bfloat %c)2091 ret bfloat %max32092}2093 2094define <2 x bfloat> @v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0(<2 x bfloat> %a, <2 x bfloat> %b, <2 x bfloat> %c) {2095; GFX6-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2096; GFX6: ; %bb.0:2097; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2098; GFX6-NEXT: v_mul_f32_e32 v0, 1.0, v02099; GFX6-NEXT: v_mul_f32_e32 v2, 1.0, v22100; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v12101; GFX6-NEXT: v_mul_f32_e32 v3, 1.0, v32102; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v22103; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v02104; GFX6-NEXT: v_max_f32_e32 v0, v0, v22105; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v32106; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v12107; GFX6-NEXT: v_mul_f32_e32 v5, 1.0, v52108; GFX6-NEXT: v_max_f32_e32 v1, v1, v22109; GFX6-NEXT: v_mul_f32_e32 v4, 1.0, v42110; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v12111; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v52112; GFX6-NEXT: v_max_f32_e32 v1, v1, v22113; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v02114; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v42115; GFX6-NEXT: v_max_f32_e32 v0, v0, v22116; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v02117; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v12118; GFX6-NEXT: s_setpc_b64 s[30:31]2119;2120; GFX7-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2121; GFX7: ; %bb.0:2122; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2123; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v02124; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v22125; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v12126; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v32127; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v22128; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02129; GFX7-NEXT: v_max_f32_e32 v0, v0, v22130; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v32131; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12132; GFX7-NEXT: v_mul_f32_e32 v5, 1.0, v52133; GFX7-NEXT: v_max_f32_e32 v1, v1, v22134; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v42135; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12136; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v52137; GFX7-NEXT: v_max_f32_e32 v1, v1, v22138; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02139; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v42140; GFX7-NEXT: v_max_f32_e32 v0, v0, v22141; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02142; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12143; GFX7-NEXT: s_setpc_b64 s[30:31]2144;2145; GFX8-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2146; GFX8: ; %bb.0:2147; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2148; GFX8-NEXT: v_and_b32_e32 v3, 0xffff0000, v02149; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v32150; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v12151; GFX8-NEXT: v_and_b32_e32 v6, 0xffff0000, v12152; GFX8-NEXT: v_cndmask_b32_sdwa v4, v0, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2153; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v6, v62154; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2155; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v42156; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v32157; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v5, v62158; GFX8-NEXT: v_cndmask_b32_e32 v5, v3, v4, vcc2159; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v42160; GFX8-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc2161; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v32162; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc2163; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v52164; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42165; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v02166; GFX8-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc2167; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v4, v42168; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v12169; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2170; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v4, v42171; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2172; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v12173; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v02174; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v5, v42175; GFX8-NEXT: v_cndmask_b32_e32 v4, v1, v0, vcc2176; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v02177; GFX8-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2178; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v12179; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2180; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v42181; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v12182; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v32183; GFX8-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2184; GFX8-NEXT: v_lshrrev_b32_e32 v4, 16, v22185; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v1, v12186; GFX8-NEXT: v_and_b32_e32 v5, 0xffff0000, v22187; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2188; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v5, v52189; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc2190; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v12191; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v42192; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v3, v52193; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2194; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v12195; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2196; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v42197; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2198; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v32199; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42200; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2201; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v02202; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v32203; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v22204; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2205; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v4, v42206; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc2207; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v02208; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v22209; GFX8-NEXT: v_cmp_gt_f32_e32 vcc, v3, v42210; GFX8-NEXT: v_cndmask_b32_e32 v3, v2, v0, vcc2211; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v02212; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2213; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, 0, v22214; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2215; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v32216; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v22217; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v12218; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2219; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2220; GFX8-NEXT: s_setpc_b64 s[30:31]2221;2222; GFX900-SDAG-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2223; GFX900-SDAG: ; %bb.0:2224; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2225; GFX900-SDAG-NEXT: v_and_b32_e32 v3, 0xffff0000, v02226; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32227; GFX900-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v12228; GFX900-SDAG-NEXT: v_and_b32_e32 v6, 0xffff0000, v12229; GFX900-SDAG-NEXT: v_cndmask_b32_sdwa v4, v0, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2230; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v6, v62231; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2232; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42233; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v6, 16, v32234; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v5, v62235; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v5, v3, v4, vcc2236; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v42237; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc2238; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v32239; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc2240; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v52241; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42242; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v02243; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc2244; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42245; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12246; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2247; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42248; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2249; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12250; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v02251; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v5, v42252; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, v1, v0, vcc2253; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v02254; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2255; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v12256; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2257; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v42258; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v12259; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v32260; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2261; GFX900-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v22262; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v12263; GFX900-SDAG-NEXT: v_and_b32_e32 v5, 0xffff0000, v22264; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2265; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v5, v52266; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc2267; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v12268; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42269; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v3, v52270; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2271; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v12272; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2273; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v42274; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2275; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v32276; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42277; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2278; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02279; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32280; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22281; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2282; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42283; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc2284; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02285; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22286; GFX900-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v3, v42287; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v2, v0, vcc2288; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v02289; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2290; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v22291; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2292; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v32293; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v22294; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2295; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x50401002296; GFX900-SDAG-NEXT: v_perm_b32 v0, v1, v0, s42297; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2298;2299; GFX950-SDAG-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2300; GFX950-SDAG: ; %bb.0:2301; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2302; GFX950-SDAG-NEXT: v_and_b32_e32 v3, 0xffff0000, v02303; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32304; GFX950-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v12305; GFX950-SDAG-NEXT: v_and_b32_e32 v6, 0xffff0000, v12306; GFX950-SDAG-NEXT: v_cndmask_b32_sdwa v4, v0, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2307; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v6, v62308; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42309; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x50401002310; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2311; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v6, 16, v32312; GFX950-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v5, v62313; GFX950-SDAG-NEXT: s_nop 12314; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v5, v3, v4, vcc2315; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v42316; GFX950-SDAG-NEXT: s_nop 12317; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc2318; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v32319; GFX950-SDAG-NEXT: s_nop 12320; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc2321; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v52322; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42323; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v02324; GFX950-SDAG-NEXT: s_nop 02325; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc2326; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42327; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12328; GFX950-SDAG-NEXT: s_nop 02329; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2330; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42331; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v02332; GFX950-SDAG-NEXT: s_nop 02333; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2334; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12335; GFX950-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v5, v42336; GFX950-SDAG-NEXT: v_and_b32_e32 v5, 0xffff0000, v22337; GFX950-SDAG-NEXT: s_nop 02338; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v4, v1, v0, vcc2339; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v02340; GFX950-SDAG-NEXT: s_nop 12341; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2342; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v12343; GFX950-SDAG-NEXT: s_nop 12344; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2345; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v42346; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v12347; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v32348; GFX950-SDAG-NEXT: s_nop 02349; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2350; GFX950-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v22351; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v12352; GFX950-SDAG-NEXT: s_nop 12353; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2354; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v5, v52355; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v12356; GFX950-SDAG-NEXT: s_nop 02357; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc2358; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42359; GFX950-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v3, v52360; GFX950-SDAG-NEXT: s_nop 12361; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2362; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v12363; GFX950-SDAG-NEXT: s_nop 12364; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2365; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v42366; GFX950-SDAG-NEXT: s_nop 12367; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2368; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v32369; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42370; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22371; GFX950-SDAG-NEXT: s_nop 02372; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2373; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02374; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32375; GFX950-SDAG-NEXT: s_nop 12376; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2377; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42378; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02379; GFX950-SDAG-NEXT: s_nop 02380; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc2381; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22382; GFX950-SDAG-NEXT: v_cmp_gt_f32_e32 vcc, v3, v42383; GFX950-SDAG-NEXT: s_nop 12384; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v2, v0, vcc2385; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v02386; GFX950-SDAG-NEXT: s_nop 12387; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2388; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, 0, v22389; GFX950-SDAG-NEXT: s_nop 12390; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2391; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v32392; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v22393; GFX950-SDAG-NEXT: s_nop 12394; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2395; GFX950-SDAG-NEXT: v_perm_b32 v0, v1, v0, s02396; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2397;2398; GFX10-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2399; GFX10: ; %bb.0:2400; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2401; GFX10-NEXT: v_and_b32_e32 v3, 0xffff0000, v02402; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v02403; GFX10-NEXT: v_and_b32_e32 v4, 0xffff0000, v12404; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v12405; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32406; GFX10-NEXT: v_lshrrev_b32_e32 v3, 16, v12407; GFX10-NEXT: v_cndmask_b32_sdwa v7, v0, v3, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2408; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52409; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2410; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42411; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v72412; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc_lo2413; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62414; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v02415; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v32416; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2417; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v52418; GFX10-NEXT: v_lshlrev_b32_e32 v8, 16, v12419; GFX10-NEXT: v_cndmask_b32_e32 v4, v3, v7, vcc_lo2420; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v82421; GFX10-NEXT: v_lshlrev_b32_e32 v8, 16, v42422; GFX10-NEXT: v_cndmask_b32_e32 v5, v1, v0, vcc_lo2423; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v72424; GFX10-NEXT: v_cndmask_b32_e32 v6, v4, v7, vcc_lo2425; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02426; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v52427; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2428; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v32429; GFX10-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc_lo2430; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12431; GFX10-NEXT: v_and_b32_e32 v6, 0xffff0000, v22432; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2433; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v82434; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc_lo2435; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72436; GFX10-NEXT: v_lshrrev_b32_e32 v4, 16, v22437; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v22438; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v12439; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2440; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32441; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v02442; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2443; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52444; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2445; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62446; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v02447; GFX10-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc_lo2448; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72449; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v12450; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v32451; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc_lo2452; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v4, v52453; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v22454; GFX10-NEXT: v_cndmask_b32_e32 v4, v3, v1, vcc_lo2455; GFX10-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v72456; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v42457; GFX10-NEXT: v_cndmask_b32_e32 v5, v2, v0, vcc_lo2458; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12459; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v52460; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo2461; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02462; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2463; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v32464; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo2465; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v22466; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2467; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72468; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo2469; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v62470; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2471; GFX10-NEXT: v_perm_b32 v0, v1, v0, 0x50401002472; GFX10-NEXT: s_setpc_b64 s[30:31]2473;2474; GFX11-SDAG-TRUE16-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2475; GFX11-SDAG-TRUE16: ; %bb.0:2476; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2477; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02478; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12479; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, 02480; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v12481; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2482; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32483; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v42484; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)2485; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2486; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v02487; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v62488; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.h, v1.h, vcc_lo2489; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v1.h, v5.h, s02490; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v5.h2491; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)2492; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v32493; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, vcc_lo2494; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42495; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.l2496; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s02497; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2498; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.h, v0.l, v1.l, vcc_lo2499; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2500; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52501; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v1.l, v4.h, s12502; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v4.h2503; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2504; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v4, v52505; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v5.h2506; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v5.h, v4.h, s02507; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.h2508; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2509; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v4.h, s12510; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02511; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v22512; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2513; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.h, s22514; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2515; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.h, vcc_lo2516; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)2517; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v4, v42518; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52519; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2520; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2521; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo2522; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52523; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v22524; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2525; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v3.l, v2.h, s02526; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2527; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.h, v5.h, s12528; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.h2529; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2530; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v32531; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, s02532; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)2533; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s12534; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2535; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v1, v12536; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.l2537; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52538; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2539; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2540; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52541; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.l, v2.l, s02542; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2543; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v2.l, v5.h, s12544; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.h2545; GFX11-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v12546; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v1.h2547; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2548; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v5.h, s02549; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.h2550; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v5.h, s12551; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2552; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2553; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02554; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v1.h, s22555; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2556; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52557; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v0.h, vcc_lo2558; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2559; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s02560; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2561;2562; GFX11-SDAG-FAKE16-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2563; GFX11-SDAG-FAKE16: ; %bb.0:2564; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2565; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02566; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v12567; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v02568; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2569; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32570; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc_lo2571; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v02572; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v12573; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)2574; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62575; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2576; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12577; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72578; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v3, vcc_lo2579; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)2580; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52581; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2582; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v02583; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v12584; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v32585; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v42586; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)2587; GFX11-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v62588; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc_lo2589; GFX11-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v7, v82590; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v6, v1, v0, vcc_lo2591; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v32592; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc_lo2593; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02594; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2595; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc_lo2596; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v42597; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v4 :: v_dual_lshlrev_b32 v4, 16, v62598; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12599; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)2600; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2601; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52602; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72603; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo2604; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v42605; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v22606; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2607; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v6, v0 :: v_dual_lshlrev_b32 v3, 16, v12608; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v22609; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32610; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2611; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2612; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v02613; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)2614; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52615; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2616; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v22617; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62618; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo2619; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32620; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2621; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v42622; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v12623; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v22624; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2625; GFX11-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v52626; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v4, v1 :: v_dual_lshlrev_b32 v6, 16, v02627; GFX11-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v72628; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2629; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v5, v2, v0 :: v_dual_lshlrev_b32 v6, 16, v32630; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12631; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52632; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2633; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02634; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2635; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v42636; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2637; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2638; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v22639; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2640; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v62641; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2642; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2643; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72644; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2645; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2646; GFX11-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x50401002647; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2648;2649; GFX12-SDAG-TRUE16-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2650; GFX12-SDAG-TRUE16: ; %bb.0:2651; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x02652; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x02653; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x02654; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x02655; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x02656; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02657; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12658; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, 02659; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v12660; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2661; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32662; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v42663; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2664; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2665; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v02666; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v62667; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2668; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.h, v1.h, vcc_lo2669; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2670; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2671; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v1.h, v5.h, s02672; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v5.h2673; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v32674; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2675; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, vcc_lo2676; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42677; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.l2678; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2679; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)2680; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s02681; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2682; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2683; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.h, v0.l, v1.l, vcc_lo2684; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52685; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2686; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v1.l, v4.h, s12687; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v4.h2688; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v4, v52689; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v5.h2690; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2691; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2692; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v5.h, v4.h, s02693; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.h2694; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v4.h, s12695; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2696; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2697; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02698; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v22699; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.h, s22700; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2701; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2702; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.h, vcc_lo2703; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v4, v42704; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2705; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52706; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2707; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2708; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo2709; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2710; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52711; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v22712; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2713; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v3.l, v2.h, s02714; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2715; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2716; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.h, v5.h, s12717; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.h2718; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v32719; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2720; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2721; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, s02722; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s12723; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2724; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v1, v12725; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.l2726; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2727; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52728; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2729; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52730; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2731; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2732; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.l, v2.l, s02733; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v2.l, v5.h, s12734; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0, v5.h2735; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2736; GFX12-SDAG-TRUE16-NEXT: v_cmp_gt_f32_e64 s0, v5, v12737; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0, v1.h2738; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2739; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v5.h, s02740; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0, v3.h2741; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2742; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v5.h, s12743; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2744; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2745; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02746; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2747; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v1.h, s22748; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52749; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2750; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2751; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v0.h, vcc_lo2752; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2753; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s02754; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2755;2756; GFX12-SDAG-FAKE16-LABEL: v_max3_v2bf16_maximumnum_maximumnum__v_v_v_0:2757; GFX12-SDAG-FAKE16: ; %bb.0:2758; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x02759; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x02760; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x02761; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x02762; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x02763; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02764; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v12765; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v02766; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2767; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32768; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2769; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc_lo2770; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v02771; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v12772; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2773; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62774; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2775; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2776; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12777; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72778; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2779; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v3, vcc_lo2780; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)2781; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52782; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2783; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2784; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v02785; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v12786; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v32787; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v42788; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2789; GFX12-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v5, v62790; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2791; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc_lo2792; GFX12-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v7, v82793; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2794; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v6, v1, v0, vcc_lo2795; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v32796; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2797; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc_lo2798; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02799; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2800; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc_lo2801; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v42802; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2803; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v4 :: v_dual_lshlrev_b32 v4, 16, v62804; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12805; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2806; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2807; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52808; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2809; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72810; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2811; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo2812; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v42813; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v22814; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2815; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2816; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v6, v0 :: v_dual_lshlrev_b32 v3, 16, v12817; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v22818; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32819; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2820; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2821; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v02822; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2823; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52824; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2825; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2826; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v22827; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62828; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2829; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo2830; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2831; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32832; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v42833; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2834; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v12835; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)2836; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v22837; GFX12-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v3, v52838; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2839; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v4, v1 :: v_dual_lshlrev_b32 v6, 16, v02840; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2841; GFX12-SDAG-FAKE16-NEXT: v_cmp_gt_f32_e32 vcc_lo, v6, v72842; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2843; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v5, v2, v0 :: v_dual_lshlrev_b32 v6, 16, v32844; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v12845; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2846; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52847; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2848; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2849; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v02850; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2851; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2852; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v42853; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2854; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2855; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0, v22856; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2857; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2858; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v62859; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2860; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2861; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72862; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2863; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2864; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2865; GFX12-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x50401002866; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2867 %tmp0 = call <2 x bfloat> @llvm.maximumnum.v2bf16(<2 x bfloat> %a, <2 x bfloat> %b)2868 %max3 = call <2 x bfloat> @llvm.maximumnum.v2bf16(<2 x bfloat> %tmp0, <2 x bfloat> %c)2869 ret <2 x bfloat> %max32870}2871 2872define float @v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0(float %a, float %b, float %c) {2873; GFX6-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2874; GFX6: ; %bb.0:2875; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2876; GFX6-NEXT: v_max3_f32 v0, -v0, v1, v22877; GFX6-NEXT: s_setpc_b64 s[30:31]2878;2879; GFX7-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2880; GFX7: ; %bb.0:2881; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2882; GFX7-NEXT: v_max3_f32 v0, -v0, v1, v22883; GFX7-NEXT: s_setpc_b64 s[30:31]2884;2885; GFX8-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2886; GFX8: ; %bb.0:2887; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2888; GFX8-NEXT: v_max3_f32 v0, -v0, v1, v22889; GFX8-NEXT: s_setpc_b64 s[30:31]2890;2891; GFX9-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2892; GFX9: ; %bb.0:2893; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2894; GFX9-NEXT: v_max3_f32 v0, -v0, v1, v22895; GFX9-NEXT: s_setpc_b64 s[30:31]2896;2897; GFX10-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2898; GFX10: ; %bb.0:2899; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2900; GFX10-NEXT: v_max3_f32 v0, -v0, v1, v22901; GFX10-NEXT: s_setpc_b64 s[30:31]2902;2903; GFX11-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2904; GFX11: ; %bb.0:2905; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2906; GFX11-NEXT: v_max3_f32 v0, -v0, v1, v22907; GFX11-NEXT: s_setpc_b64 s[30:31]2908;2909; GFX12-LABEL: v_min3_f32_maximumnum_maximumnum__neg_v_v_v_0:2910; GFX12: ; %bb.0:2911; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02912; GFX12-NEXT: s_wait_expcnt 0x02913; GFX12-NEXT: s_wait_samplecnt 0x02914; GFX12-NEXT: s_wait_bvhcnt 0x02915; GFX12-NEXT: s_wait_kmcnt 0x02916; GFX12-NEXT: v_max3_num_f32 v0, -v0, v1, v22917; GFX12-NEXT: s_setpc_b64 s[30:31]2918 %neg.a = fneg float %a2919 %tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)2920 %min3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)2921 ret float %min32922}2923 2924define float @v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0(float %a, float %b, float %c) {2925; GFX6-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2926; GFX6: ; %bb.0:2927; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2928; GFX6-NEXT: v_max3_f32 v0, v0, -v1, v22929; GFX6-NEXT: s_setpc_b64 s[30:31]2930;2931; GFX7-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2932; GFX7: ; %bb.0:2933; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2934; GFX7-NEXT: v_max3_f32 v0, v0, -v1, v22935; GFX7-NEXT: s_setpc_b64 s[30:31]2936;2937; GFX8-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2938; GFX8: ; %bb.0:2939; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2940; GFX8-NEXT: v_max3_f32 v0, v0, -v1, v22941; GFX8-NEXT: s_setpc_b64 s[30:31]2942;2943; GFX9-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2944; GFX9: ; %bb.0:2945; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2946; GFX9-NEXT: v_max3_f32 v0, v0, -v1, v22947; GFX9-NEXT: s_setpc_b64 s[30:31]2948;2949; GFX10-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2950; GFX10: ; %bb.0:2951; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2952; GFX10-NEXT: v_max3_f32 v0, v0, -v1, v22953; GFX10-NEXT: s_setpc_b64 s[30:31]2954;2955; GFX11-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2956; GFX11: ; %bb.0:2957; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2958; GFX11-NEXT: v_max3_f32 v0, v0, -v1, v22959; GFX11-NEXT: s_setpc_b64 s[30:31]2960;2961; GFX12-LABEL: v_min3_f32_maximumnum_maximumnum__v_neg_v_v_0:2962; GFX12: ; %bb.0:2963; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02964; GFX12-NEXT: s_wait_expcnt 0x02965; GFX12-NEXT: s_wait_samplecnt 0x02966; GFX12-NEXT: s_wait_bvhcnt 0x02967; GFX12-NEXT: s_wait_kmcnt 0x02968; GFX12-NEXT: v_max3_num_f32 v0, v0, -v1, v22969; GFX12-NEXT: s_setpc_b64 s[30:31]2970 %neg.b = fneg float %b2971 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %neg.b)2972 %min3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)2973 ret float %min32974}2975 2976define float @v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0(float %a, float %b, float %c) {2977; GFX6-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:2978; GFX6: ; %bb.0:2979; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2980; GFX6-NEXT: v_max3_f32 v0, v0, v1, -v22981; GFX6-NEXT: s_setpc_b64 s[30:31]2982;2983; GFX7-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:2984; GFX7: ; %bb.0:2985; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2986; GFX7-NEXT: v_max3_f32 v0, v0, v1, -v22987; GFX7-NEXT: s_setpc_b64 s[30:31]2988;2989; GFX8-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:2990; GFX8: ; %bb.0:2991; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2992; GFX8-NEXT: v_max3_f32 v0, v0, v1, -v22993; GFX8-NEXT: s_setpc_b64 s[30:31]2994;2995; GFX9-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:2996; GFX9: ; %bb.0:2997; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2998; GFX9-NEXT: v_max3_f32 v0, v0, v1, -v22999; GFX9-NEXT: s_setpc_b64 s[30:31]3000;3001; GFX10-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:3002; GFX10: ; %bb.0:3003; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3004; GFX10-NEXT: v_max3_f32 v0, v0, v1, -v23005; GFX10-NEXT: s_setpc_b64 s[30:31]3006;3007; GFX11-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:3008; GFX11: ; %bb.0:3009; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3010; GFX11-NEXT: v_max3_f32 v0, v0, v1, -v23011; GFX11-NEXT: s_setpc_b64 s[30:31]3012;3013; GFX12-LABEL: v_min3_f32_maximumnum_maximumnum__v_v_neg_v_0:3014; GFX12: ; %bb.0:3015; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03016; GFX12-NEXT: s_wait_expcnt 0x03017; GFX12-NEXT: s_wait_samplecnt 0x03018; GFX12-NEXT: s_wait_bvhcnt 0x03019; GFX12-NEXT: s_wait_kmcnt 0x03020; GFX12-NEXT: v_max3_num_f32 v0, v0, v1, -v23021; GFX12-NEXT: s_setpc_b64 s[30:31]3022 %neg.c = fneg float %c3023 %tmp0 = call float @llvm.maximumnum.f32(float %a, float %b)3024 %min3 = call float @llvm.maximumnum.f32(float %tmp0, float %neg.c)3025 ret float %min33026}3027 3028define float @v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0(float %a, float %b, float %c) {3029; GFX6-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3030; GFX6: ; %bb.0:3031; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3032; GFX6-NEXT: v_max3_f32 v0, -|v0|, v1, v23033; GFX6-NEXT: s_setpc_b64 s[30:31]3034;3035; GFX7-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3036; GFX7: ; %bb.0:3037; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3038; GFX7-NEXT: v_max3_f32 v0, -|v0|, v1, v23039; GFX7-NEXT: s_setpc_b64 s[30:31]3040;3041; GFX8-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3042; GFX8: ; %bb.0:3043; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3044; GFX8-NEXT: v_max3_f32 v0, -|v0|, v1, v23045; GFX8-NEXT: s_setpc_b64 s[30:31]3046;3047; GFX9-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3048; GFX9: ; %bb.0:3049; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3050; GFX9-NEXT: v_max3_f32 v0, -|v0|, v1, v23051; GFX9-NEXT: s_setpc_b64 s[30:31]3052;3053; GFX10-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3054; GFX10: ; %bb.0:3055; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3056; GFX10-NEXT: v_max3_f32 v0, -|v0|, v1, v23057; GFX10-NEXT: s_setpc_b64 s[30:31]3058;3059; GFX11-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3060; GFX11: ; %bb.0:3061; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3062; GFX11-NEXT: v_max3_f32 v0, -|v0|, v1, v23063; GFX11-NEXT: s_setpc_b64 s[30:31]3064;3065; GFX12-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_v_v_0:3066; GFX12: ; %bb.0:3067; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03068; GFX12-NEXT: s_wait_expcnt 0x03069; GFX12-NEXT: s_wait_samplecnt 0x03070; GFX12-NEXT: s_wait_bvhcnt 0x03071; GFX12-NEXT: s_wait_kmcnt 0x03072; GFX12-NEXT: v_max3_num_f32 v0, -|v0|, v1, v23073; GFX12-NEXT: s_setpc_b64 s[30:31]3074 %fabs.a = call float @llvm.fabs.f32(float %a)3075 %neg.fabs.a = fneg float %fabs.a3076 %tmp0 = call float @llvm.maximumnum.f32(float %neg.fabs.a, float %b)3077 %min3 = call float @llvm.maximumnum.f32(float %tmp0, float %c)3078 ret float %min33079}3080 3081define float @v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0(float %a, float %b, float %c) {3082; GFX6-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3083; GFX6: ; %bb.0:3084; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3085; GFX6-NEXT: v_max3_f32 v0, -|v0|, -|v1|, -|v2|3086; GFX6-NEXT: s_setpc_b64 s[30:31]3087;3088; GFX7-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3089; GFX7: ; %bb.0:3090; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3091; GFX7-NEXT: v_max3_f32 v0, -|v0|, -|v1|, -|v2|3092; GFX7-NEXT: s_setpc_b64 s[30:31]3093;3094; GFX8-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3095; GFX8: ; %bb.0:3096; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3097; GFX8-NEXT: v_max3_f32 v0, -|v0|, -|v1|, -|v2|3098; GFX8-NEXT: s_setpc_b64 s[30:31]3099;3100; GFX9-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3101; GFX9: ; %bb.0:3102; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3103; GFX9-NEXT: v_max3_f32 v0, -|v0|, -|v1|, -|v2|3104; GFX9-NEXT: s_setpc_b64 s[30:31]3105;3106; GFX10-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3107; GFX10: ; %bb.0:3108; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3109; GFX10-NEXT: v_max3_f32 v0, -|v0|, -|v1|, -|v2|3110; GFX10-NEXT: s_setpc_b64 s[30:31]3111;3112; GFX11-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3113; GFX11: ; %bb.0:3114; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3115; GFX11-NEXT: v_max3_f32 v0, -|v0|, -|v1|, -|v2|3116; GFX11-NEXT: s_setpc_b64 s[30:31]3117;3118; GFX12-LABEL: v_min3_f32_maximumnum_maximumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3119; GFX12: ; %bb.0:3120; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03121; GFX12-NEXT: s_wait_expcnt 0x03122; GFX12-NEXT: s_wait_samplecnt 0x03123; GFX12-NEXT: s_wait_bvhcnt 0x03124; GFX12-NEXT: s_wait_kmcnt 0x03125; GFX12-NEXT: v_max3_num_f32 v0, -|v0|, -|v1|, -|v2|3126; GFX12-NEXT: s_setpc_b64 s[30:31]3127 %fabs.a = call float @llvm.fabs.f32(float %a)3128 %neg.fabs.a = fneg float %fabs.a3129 %fabs.b = call float @llvm.fabs.f32(float %b)3130 %neg.fabs.b = fneg float %fabs.b3131 %fabs.c = call float @llvm.fabs.f32(float %c)3132 %neg.fabs.c = fneg float %fabs.c3133 3134 %tmp0 = call float @llvm.maximumnum.f32(float %neg.fabs.a, float %neg.fabs.b)3135 %min3 = call float @llvm.maximumnum.f32(float %tmp0, float %neg.fabs.c)3136 ret float %min33137}3138 3139define float @v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0(float %a, float %b, float %c) {3140; GFX6-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3141; GFX6: ; %bb.0:3142; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3143; GFX6-NEXT: v_mul_f32_e32 v1, -1.0, v13144; GFX6-NEXT: v_mul_f32_e32 v0, 1.0, v03145; GFX6-NEXT: v_min_f32_e32 v0, v0, v13146; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v23147; GFX6-NEXT: v_max_f32_e32 v0, v0, v13148; GFX6-NEXT: s_setpc_b64 s[30:31]3149;3150; GFX7-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3151; GFX7: ; %bb.0:3152; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3153; GFX7-NEXT: v_mul_f32_e32 v1, -1.0, v13154; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03155; GFX7-NEXT: v_min_f32_e32 v0, v0, v13156; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v23157; GFX7-NEXT: v_max_f32_e32 v0, v0, v13158; GFX7-NEXT: s_setpc_b64 s[30:31]3159;3160; GFX8-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3161; GFX8: ; %bb.0:3162; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3163; GFX8-NEXT: v_mul_f32_e32 v1, -1.0, v13164; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v03165; GFX8-NEXT: v_min_f32_e32 v0, v0, v13166; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v23167; GFX8-NEXT: v_max_f32_e32 v0, v0, v13168; GFX8-NEXT: s_setpc_b64 s[30:31]3169;3170; GFX9-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3171; GFX9: ; %bb.0:3172; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3173; GFX9-NEXT: v_max_f32_e64 v1, -v1, -v13174; GFX9-NEXT: v_max_f32_e32 v0, v0, v03175; GFX9-NEXT: v_min_f32_e32 v0, v0, v13176; GFX9-NEXT: v_max_f32_e32 v1, v2, v23177; GFX9-NEXT: v_max_f32_e32 v0, v0, v13178; GFX9-NEXT: s_setpc_b64 s[30:31]3179;3180; GFX10-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3181; GFX10: ; %bb.0:3182; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3183; GFX10-NEXT: v_max_f32_e64 v1, -v1, -v13184; GFX10-NEXT: v_max_f32_e32 v0, v0, v03185; GFX10-NEXT: v_min_f32_e32 v0, v0, v13186; GFX10-NEXT: v_max_f32_e32 v1, v2, v23187; GFX10-NEXT: v_max_f32_e32 v0, v0, v13188; GFX10-NEXT: s_setpc_b64 s[30:31]3189;3190; GFX11-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3191; GFX11: ; %bb.0:3192; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3193; GFX11-NEXT: v_max_f32_e64 v1, -v1, -v13194; GFX11-NEXT: v_max_f32_e32 v0, v0, v03195; GFX11-NEXT: v_max_f32_e32 v2, v2, v23196; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3197; GFX11-NEXT: v_minmax_f32 v0, v0, v1, v23198; GFX11-NEXT: s_setpc_b64 s[30:31]3199;3200; GFX12-LABEL: v_min3_f32_maximumnum_neg_maximumnum__v_v_v_0:3201; GFX12: ; %bb.0:3202; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03203; GFX12-NEXT: s_wait_expcnt 0x03204; GFX12-NEXT: s_wait_samplecnt 0x03205; GFX12-NEXT: s_wait_bvhcnt 0x03206; GFX12-NEXT: s_wait_kmcnt 0x03207; GFX12-NEXT: v_max_num_f32_e64 v1, -v1, -v13208; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v03209; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v23210; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3211; GFX12-NEXT: v_minmax_num_f32 v0, v0, v1, v23212; GFX12-NEXT: s_setpc_b64 s[30:31]3213 %neg.a = fneg float %a3214 %tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)3215 %neg.tmp0 = fneg float %tmp03216 %min3 = call float @llvm.maximumnum.f32(float %neg.tmp0, float %c)3217 ret float %min33218}3219 3220define float @v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0(float %a, float %b, float %c) {3221; GFX6-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3222; GFX6: ; %bb.0:3223; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3224; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v13225; GFX6-NEXT: v_mul_f32_e32 v0, -1.0, v03226; GFX6-NEXT: v_max_f32_e32 v0, v0, v13227; GFX6-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03228; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v23229; GFX6-NEXT: v_max_f32_e32 v0, v0, v13230; GFX6-NEXT: s_setpc_b64 s[30:31]3231;3232; GFX7-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3233; GFX7: ; %bb.0:3234; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3235; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v13236; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v03237; GFX7-NEXT: v_max_f32_e32 v0, v0, v13238; GFX7-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03239; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v23240; GFX7-NEXT: v_max_f32_e32 v0, v0, v13241; GFX7-NEXT: s_setpc_b64 s[30:31]3242;3243; GFX8-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3244; GFX8: ; %bb.0:3245; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3246; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v13247; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v03248; GFX8-NEXT: v_max_f32_e32 v0, v0, v13249; GFX8-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03250; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v23251; GFX8-NEXT: v_max_f32_e32 v0, v0, v13252; GFX8-NEXT: s_setpc_b64 s[30:31]3253;3254; GFX9-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3255; GFX9: ; %bb.0:3256; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3257; GFX9-NEXT: v_max_f32_e32 v1, v1, v13258; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v03259; GFX9-NEXT: v_max_f32_e32 v0, v0, v13260; GFX9-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03261; GFX9-NEXT: v_max_f32_e32 v1, v2, v23262; GFX9-NEXT: v_max_f32_e32 v0, v0, v13263; GFX9-NEXT: s_setpc_b64 s[30:31]3264;3265; GFX10-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3266; GFX10: ; %bb.0:3267; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3268; GFX10-NEXT: v_max_f32_e32 v1, v1, v13269; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v03270; GFX10-NEXT: v_max_f32_e32 v0, v0, v13271; GFX10-NEXT: v_max_f32_e32 v1, v2, v23272; GFX10-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03273; GFX10-NEXT: v_max_f32_e32 v0, v0, v13274; GFX10-NEXT: s_setpc_b64 s[30:31]3275;3276; GFX11-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3277; GFX11: ; %bb.0:3278; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3279; GFX11-NEXT: v_max_f32_e32 v1, v1, v13280; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v03281; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3282; GFX11-NEXT: v_dual_max_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v23283; GFX11-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03284; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3285; GFX11-NEXT: v_max_f32_e32 v0, v0, v13286; GFX11-NEXT: s_setpc_b64 s[30:31]3287;3288; GFX12-LABEL: v_min3_f32_maximumnum_fabs_maximumnum__v_v_v_0:3289; GFX12: ; %bb.0:3290; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03291; GFX12-NEXT: s_wait_expcnt 0x03292; GFX12-NEXT: s_wait_samplecnt 0x03293; GFX12-NEXT: s_wait_bvhcnt 0x03294; GFX12-NEXT: s_wait_kmcnt 0x03295; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v13296; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v03297; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3298; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v23299; GFX12-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03300; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3301; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v13302; GFX12-NEXT: s_setpc_b64 s[30:31]3303 %neg.a = fneg float %a3304 %tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)3305 %abs.tmp0 = call float @llvm.fabs.f32(float %tmp0)3306 %min3 = call float @llvm.maximumnum.f32(float %abs.tmp0, float %c)3307 ret float %min33308}3309 3310define float @v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0(float %a, float %b, float %c) {3311; GFX6-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3312; GFX6: ; %bb.0:3313; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3314; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v13315; GFX6-NEXT: v_mul_f32_e32 v0, -1.0, v03316; GFX6-NEXT: v_max_f32_e32 v0, v0, v13317; GFX6-NEXT: v_or_b32_e32 v0, 0x80000000, v03318; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v23319; GFX6-NEXT: v_max_f32_e32 v0, v0, v13320; GFX6-NEXT: s_setpc_b64 s[30:31]3321;3322; GFX7-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3323; GFX7: ; %bb.0:3324; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3325; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v13326; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v03327; GFX7-NEXT: v_max_f32_e32 v0, v0, v13328; GFX7-NEXT: v_or_b32_e32 v0, 0x80000000, v03329; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v23330; GFX7-NEXT: v_max_f32_e32 v0, v0, v13331; GFX7-NEXT: s_setpc_b64 s[30:31]3332;3333; GFX8-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3334; GFX8: ; %bb.0:3335; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3336; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v13337; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v03338; GFX8-NEXT: v_max_f32_e32 v0, v0, v13339; GFX8-NEXT: v_or_b32_e32 v0, 0x80000000, v03340; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v23341; GFX8-NEXT: v_max_f32_e32 v0, v0, v13342; GFX8-NEXT: s_setpc_b64 s[30:31]3343;3344; GFX9-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3345; GFX9: ; %bb.0:3346; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3347; GFX9-NEXT: v_max_f32_e32 v1, v1, v13348; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v03349; GFX9-NEXT: v_max_f32_e32 v0, v0, v13350; GFX9-NEXT: v_or_b32_e32 v0, 0x80000000, v03351; GFX9-NEXT: v_max_f32_e32 v1, v2, v23352; GFX9-NEXT: v_max_f32_e32 v0, v0, v13353; GFX9-NEXT: s_setpc_b64 s[30:31]3354;3355; GFX10-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3356; GFX10: ; %bb.0:3357; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3358; GFX10-NEXT: v_max_f32_e32 v1, v1, v13359; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v03360; GFX10-NEXT: v_max_f32_e32 v0, v0, v13361; GFX10-NEXT: v_max_f32_e32 v1, v2, v23362; GFX10-NEXT: v_or_b32_e32 v0, 0x80000000, v03363; GFX10-NEXT: v_max_f32_e32 v0, v0, v13364; GFX10-NEXT: s_setpc_b64 s[30:31]3365;3366; GFX11-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3367; GFX11: ; %bb.0:3368; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3369; GFX11-NEXT: v_max_f32_e32 v1, v1, v13370; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v03371; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3372; GFX11-NEXT: v_dual_max_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v23373; GFX11-NEXT: v_or_b32_e32 v0, 0x80000000, v03374; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3375; GFX11-NEXT: v_max_f32_e32 v0, v0, v13376; GFX11-NEXT: s_setpc_b64 s[30:31]3377;3378; GFX12-LABEL: v_min3_f32_maximumnum_fneg_fabs_maximumnum__v_v_v_0:3379; GFX12: ; %bb.0:3380; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03381; GFX12-NEXT: s_wait_expcnt 0x03382; GFX12-NEXT: s_wait_samplecnt 0x03383; GFX12-NEXT: s_wait_bvhcnt 0x03384; GFX12-NEXT: s_wait_kmcnt 0x03385; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v13386; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v03387; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3388; GFX12-NEXT: v_dual_max_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v23389; GFX12-NEXT: v_or_b32_e32 v0, 0x80000000, v03390; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3391; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v13392; GFX12-NEXT: s_setpc_b64 s[30:31]3393 %neg.a = fneg float %a3394 %tmp0 = call float @llvm.maximumnum.f32(float %neg.a, float %b)3395 %abs.tmp0 = call float @llvm.fabs.f32(float %tmp0)3396 %neg.abs.tmp0 = fneg float %abs.tmp03397 %min3 = call float @llvm.maximumnum.f32(float %neg.abs.tmp0, float %c)3398 ret float %min33399}3400 3401define <2 x float> @v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0(<2 x float> %a, <2 x float> %b, <2 x float> %c) {3402; GFX6-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3403; GFX6: ; %bb.0:3404; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3405; GFX6-NEXT: v_max3_f32 v0, -v0, -v2, -v43406; GFX6-NEXT: v_max3_f32 v1, -v1, -v3, -v53407; GFX6-NEXT: s_setpc_b64 s[30:31]3408;3409; GFX7-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3410; GFX7: ; %bb.0:3411; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3412; GFX7-NEXT: v_max3_f32 v0, -v0, -v2, -v43413; GFX7-NEXT: v_max3_f32 v1, -v1, -v3, -v53414; GFX7-NEXT: s_setpc_b64 s[30:31]3415;3416; GFX8-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3417; GFX8: ; %bb.0:3418; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3419; GFX8-NEXT: v_max3_f32 v0, -v0, -v2, -v43420; GFX8-NEXT: v_max3_f32 v1, -v1, -v3, -v53421; GFX8-NEXT: s_setpc_b64 s[30:31]3422;3423; GFX9-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3424; GFX9: ; %bb.0:3425; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3426; GFX9-NEXT: v_max3_f32 v0, -v0, -v2, -v43427; GFX9-NEXT: v_max3_f32 v1, -v1, -v3, -v53428; GFX9-NEXT: s_setpc_b64 s[30:31]3429;3430; GFX10-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3431; GFX10: ; %bb.0:3432; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3433; GFX10-NEXT: v_max3_f32 v0, -v0, -v2, -v43434; GFX10-NEXT: v_max3_f32 v1, -v1, -v3, -v53435; GFX10-NEXT: s_setpc_b64 s[30:31]3436;3437; GFX11-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3438; GFX11: ; %bb.0:3439; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3440; GFX11-NEXT: v_max3_f32 v0, -v0, -v2, -v43441; GFX11-NEXT: v_max3_f32 v1, -v1, -v3, -v53442; GFX11-NEXT: s_setpc_b64 s[30:31]3443;3444; GFX12-LABEL: v_min3_v2f32_maximumnum_maximumnum__neg_v_neg_v_neg_v_0:3445; GFX12: ; %bb.0:3446; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03447; GFX12-NEXT: s_wait_expcnt 0x03448; GFX12-NEXT: s_wait_samplecnt 0x03449; GFX12-NEXT: s_wait_bvhcnt 0x03450; GFX12-NEXT: s_wait_kmcnt 0x03451; GFX12-NEXT: v_max3_num_f32 v0, -v0, -v2, -v43452; GFX12-NEXT: v_max3_num_f32 v1, -v1, -v3, -v53453; GFX12-NEXT: s_setpc_b64 s[30:31]3454 %neg.a = fneg <2 x float> %a3455 %neg.b = fneg <2 x float> %b3456 %neg.c = fneg <2 x float> %c3457 %tmp0 = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %neg.a, <2 x float> %neg.b)3458 %min3 = call <2 x float> @llvm.maximumnum.v2f32(<2 x float> %tmp0, <2 x float> %neg.c)3459 ret <2 x float> %min33460}3461 3462;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3463; GFX10-SDAG: {{.*}}3464; GFX11-SDAG: {{.*}}3465; GFX12-SDAG: {{.*}}3466; GFX6-SDAG: {{.*}}3467; GFX7-SDAG: {{.*}}3468; GFX8-SDAG: {{.*}}3469; GFX9-SDAG: {{.*}}3470; GFX950: {{.*}}3471