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1; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI %s3 4declare double @llvm.maxnum.f64(double, double) nounwind readnone5 6; SI-LABEL: {{^}}test_fmax3_f64:7; SI: buffer_load_dwordx2 [[REGA:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+:[0-9]+}}], 0 glc{{$}}8; SI: buffer_load_dwordx2 [[REGB:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+:[0-9]+}}], 0 offset:89; SI: buffer_load_dwordx2 [[REGC:v\[[0-9]+:[0-9]+\]]], off, s[{{[0-9]+:[0-9]+}}], 0 offset:1610; SI: v_max_f64 [[QUIET_A:v\[[0-9]+:[0-9]+\]]], [[REGA]], [[REGA]]11; SI: v_max_f64 [[QUIET_B:v\[[0-9]+:[0-9]+\]]], [[REGB]], [[REGB]]12; SI: v_max_f64 [[MAX0:v\[[0-9]+:[0-9]+\]]], [[QUIET_A]], [[QUIET_B]]13; SI: v_max_f64 [[QUIET_C:v\[[0-9]+:[0-9]+\]]], [[REGC]], [[REGC]]14; SI: v_max_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[MAX0]], [[QUIET_C]]15; SI: buffer_store_dwordx2 [[RESULT]],16; SI: s_endpgm17define amdgpu_kernel void @test_fmax3_f64(ptr addrspace(1) %out, ptr addrspace(1) %aptr) nounwind {18 %bptr = getelementptr double, ptr addrspace(1) %aptr, i32 119 %cptr = getelementptr double, ptr addrspace(1) %aptr, i32 220 %a = load volatile double, ptr addrspace(1) %aptr, align 821 %b = load volatile double, ptr addrspace(1) %bptr, align 822 %c = load volatile double, ptr addrspace(1) %cptr, align 823 %f0 = call double @llvm.maxnum.f64(double %a, double %b) nounwind readnone24 %f1 = call double @llvm.maxnum.f64(double %f0, double %c) nounwind readnone25 store double %f1, ptr addrspace(1) %out, align 826 ret void27}28