3476 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX6,GFX6-SDAG %s3; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-SDAG %s4; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-SDAG %s5; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-SDAG,GFX900-SDAG %s6; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-SDAG,GFX950-SDAG %s7; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-SDAG %s8; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s9; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s10; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-TRUE16 %s11; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-SDAG,GFX12-SDAG-FAKE16 %s12 13; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx600 < %s | FileCheck -check-prefixes=GFX6,GFX6-GISEL %s14; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 < %s | FileCheck -check-prefixes=GFX7,GFX7-GISEL %s15; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx803 < %s | FileCheck -check-prefixes=GFX8,GFX8-GISEL %s16; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX900-GISEL %s17; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950,GFX9-GISEL,GFX950-GISEL %s18; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10,GFX10-GISEL %s19; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-GISEL %s20; xUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-GISEL %s21 22define float @v_min3_f32_minimumnum_minimumnum__v_v_v_0(float %a, float %b, float %c) {23; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:24; GFX6: ; %bb.0:25; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; GFX6-NEXT: v_min3_f32 v0, v0, v1, v227; GFX6-NEXT: s_setpc_b64 s[30:31]28;29; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:30; GFX7: ; %bb.0:31; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)32; GFX7-NEXT: v_min3_f32 v0, v0, v1, v233; GFX7-NEXT: s_setpc_b64 s[30:31]34;35; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:36; GFX8: ; %bb.0:37; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; GFX8-NEXT: v_min3_f32 v0, v0, v1, v239; GFX8-NEXT: s_setpc_b64 s[30:31]40;41; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:42; GFX9: ; %bb.0:43; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)44; GFX9-NEXT: v_min3_f32 v0, v0, v1, v245; GFX9-NEXT: s_setpc_b64 s[30:31]46;47; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:48; GFX10: ; %bb.0:49; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; GFX10-NEXT: v_min3_f32 v0, v0, v1, v251; GFX10-NEXT: s_setpc_b64 s[30:31]52;53; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:54; GFX11: ; %bb.0:55; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX11-NEXT: v_min3_f32 v0, v0, v1, v257; GFX11-NEXT: s_setpc_b64 s[30:31]58;59; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0:60; GFX12: ; %bb.0:61; GFX12-NEXT: s_wait_loadcnt_dscnt 0x062; GFX12-NEXT: s_wait_expcnt 0x063; GFX12-NEXT: s_wait_samplecnt 0x064; GFX12-NEXT: s_wait_bvhcnt 0x065; GFX12-NEXT: s_wait_kmcnt 0x066; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, v267; GFX12-NEXT: s_setpc_b64 s[30:31]68 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)69 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)70 ret float %min371}72 73define float @v_min3_f32_minimumnum_minimumnum__v_v_v_1(float %a, float %b, float %c) {74; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:75; GFX6: ; %bb.0:76; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)77; GFX6-NEXT: v_min3_f32 v0, v2, v0, v178; GFX6-NEXT: s_setpc_b64 s[30:31]79;80; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:81; GFX7: ; %bb.0:82; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)83; GFX7-NEXT: v_min3_f32 v0, v2, v0, v184; GFX7-NEXT: s_setpc_b64 s[30:31]85;86; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:87; GFX8: ; %bb.0:88; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)89; GFX8-NEXT: v_min3_f32 v0, v2, v0, v190; GFX8-NEXT: s_setpc_b64 s[30:31]91;92; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:93; GFX9: ; %bb.0:94; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)95; GFX9-NEXT: v_min3_f32 v0, v2, v0, v196; GFX9-NEXT: s_setpc_b64 s[30:31]97;98; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:99; GFX10: ; %bb.0:100; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)101; GFX10-NEXT: v_min3_f32 v0, v2, v0, v1102; GFX10-NEXT: s_setpc_b64 s[30:31]103;104; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:105; GFX11: ; %bb.0:106; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)107; GFX11-NEXT: v_min3_f32 v0, v2, v0, v1108; GFX11-NEXT: s_setpc_b64 s[30:31]109;110; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_1:111; GFX12: ; %bb.0:112; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0113; GFX12-NEXT: s_wait_expcnt 0x0114; GFX12-NEXT: s_wait_samplecnt 0x0115; GFX12-NEXT: s_wait_bvhcnt 0x0116; GFX12-NEXT: s_wait_kmcnt 0x0117; GFX12-NEXT: v_min3_num_f32 v0, v2, v0, v1118; GFX12-NEXT: s_setpc_b64 s[30:31]119 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)120 %min3 = call float @llvm.minimumnum.f32(float %c, float %tmp0)121 ret float %min3122}123 124define float @v_min3_f32_minimumnum_minimumnum__i_v_v_0(float %b, float %c) {125; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:126; GFX6: ; %bb.0:127; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)128; GFX6-NEXT: v_min3_f32 v0, v0, 1.0, v1129; GFX6-NEXT: s_setpc_b64 s[30:31]130;131; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:132; GFX7: ; %bb.0:133; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)134; GFX7-NEXT: v_min3_f32 v0, v0, 1.0, v1135; GFX7-NEXT: s_setpc_b64 s[30:31]136;137; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:138; GFX8: ; %bb.0:139; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)140; GFX8-NEXT: v_min3_f32 v0, v0, 1.0, v1141; GFX8-NEXT: s_setpc_b64 s[30:31]142;143; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:144; GFX9: ; %bb.0:145; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)146; GFX9-NEXT: v_min3_f32 v0, v0, 1.0, v1147; GFX9-NEXT: s_setpc_b64 s[30:31]148;149; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:150; GFX10: ; %bb.0:151; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)152; GFX10-NEXT: v_min3_f32 v0, v0, 1.0, v1153; GFX10-NEXT: s_setpc_b64 s[30:31]154;155; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:156; GFX11: ; %bb.0:157; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)158; GFX11-NEXT: v_min3_f32 v0, v0, 1.0, v1159; GFX11-NEXT: s_setpc_b64 s[30:31]160;161; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_0:162; GFX12: ; %bb.0:163; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0164; GFX12-NEXT: s_wait_expcnt 0x0165; GFX12-NEXT: s_wait_samplecnt 0x0166; GFX12-NEXT: s_wait_bvhcnt 0x0167; GFX12-NEXT: s_wait_kmcnt 0x0168; GFX12-NEXT: v_min3_num_f32 v0, v0, 1.0, v1169; GFX12-NEXT: s_setpc_b64 s[30:31]170 %tmp0 = call float @llvm.minimumnum.f32(float 1.0, float %b)171 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)172 ret float %min3173}174 175define float @v_min3_f32_minimumnum_minimumnum__i_v_v_1(float %b, float %c) {176; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:177; GFX6: ; %bb.0:178; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)179; GFX6-NEXT: v_min3_f32 v0, v1, v0, 1.0180; GFX6-NEXT: s_setpc_b64 s[30:31]181;182; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:183; GFX7: ; %bb.0:184; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)185; GFX7-NEXT: v_min3_f32 v0, v1, v0, 1.0186; GFX7-NEXT: s_setpc_b64 s[30:31]187;188; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:189; GFX8: ; %bb.0:190; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)191; GFX8-NEXT: v_min3_f32 v0, v1, v0, 1.0192; GFX8-NEXT: s_setpc_b64 s[30:31]193;194; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:195; GFX9: ; %bb.0:196; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)197; GFX9-NEXT: v_min3_f32 v0, v1, v0, 1.0198; GFX9-NEXT: s_setpc_b64 s[30:31]199;200; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:201; GFX10: ; %bb.0:202; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)203; GFX10-NEXT: v_min3_f32 v0, v1, v0, 1.0204; GFX10-NEXT: s_setpc_b64 s[30:31]205;206; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:207; GFX11: ; %bb.0:208; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)209; GFX11-NEXT: v_min3_f32 v0, v1, v0, 1.0210; GFX11-NEXT: s_setpc_b64 s[30:31]211;212; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__i_v_v_1:213; GFX12: ; %bb.0:214; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0215; GFX12-NEXT: s_wait_expcnt 0x0216; GFX12-NEXT: s_wait_samplecnt 0x0217; GFX12-NEXT: s_wait_bvhcnt 0x0218; GFX12-NEXT: s_wait_kmcnt 0x0219; GFX12-NEXT: v_min3_num_f32 v0, v1, v0, 1.0220; GFX12-NEXT: s_setpc_b64 s[30:31]221 %tmp0 = call float @llvm.minimumnum.f32(float 1.0, float %b)222 %min3 = call float @llvm.minimumnum.f32(float %c, float %tmp0)223 ret float %min3224}225 226define float @v_min3_f32_minimumnum_minimumnum__v_i_v_0(float %a, float %c) {227; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:228; GFX6: ; %bb.0:229; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)230; GFX6-NEXT: v_min3_f32 v0, v0, 1.0, v1231; GFX6-NEXT: s_setpc_b64 s[30:31]232;233; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:234; GFX7: ; %bb.0:235; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)236; GFX7-NEXT: v_min3_f32 v0, v0, 1.0, v1237; GFX7-NEXT: s_setpc_b64 s[30:31]238;239; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:240; GFX8: ; %bb.0:241; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)242; GFX8-NEXT: v_min3_f32 v0, v0, 1.0, v1243; GFX8-NEXT: s_setpc_b64 s[30:31]244;245; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:246; GFX9: ; %bb.0:247; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)248; GFX9-NEXT: v_min3_f32 v0, v0, 1.0, v1249; GFX9-NEXT: s_setpc_b64 s[30:31]250;251; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:252; GFX10: ; %bb.0:253; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)254; GFX10-NEXT: v_min3_f32 v0, v0, 1.0, v1255; GFX10-NEXT: s_setpc_b64 s[30:31]256;257; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:258; GFX11: ; %bb.0:259; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)260; GFX11-NEXT: v_min3_f32 v0, v0, 1.0, v1261; GFX11-NEXT: s_setpc_b64 s[30:31]262;263; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_0:264; GFX12: ; %bb.0:265; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0266; GFX12-NEXT: s_wait_expcnt 0x0267; GFX12-NEXT: s_wait_samplecnt 0x0268; GFX12-NEXT: s_wait_bvhcnt 0x0269; GFX12-NEXT: s_wait_kmcnt 0x0270; GFX12-NEXT: v_min3_num_f32 v0, v0, 1.0, v1271; GFX12-NEXT: s_setpc_b64 s[30:31]272 %tmp0 = call float @llvm.minimumnum.f32(float %a, float 1.0)273 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)274 ret float %min3275}276 277define float @v_min3_f32_minimumnum_minimumnum__v_i_v_1(float %a, float %c) {278; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:279; GFX6: ; %bb.0:280; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)281; GFX6-NEXT: v_min3_f32 v0, v1, v0, 1.0282; GFX6-NEXT: s_setpc_b64 s[30:31]283;284; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:285; GFX7: ; %bb.0:286; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)287; GFX7-NEXT: v_min3_f32 v0, v1, v0, 1.0288; GFX7-NEXT: s_setpc_b64 s[30:31]289;290; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:291; GFX8: ; %bb.0:292; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)293; GFX8-NEXT: v_min3_f32 v0, v1, v0, 1.0294; GFX8-NEXT: s_setpc_b64 s[30:31]295;296; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:297; GFX9: ; %bb.0:298; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)299; GFX9-NEXT: v_min3_f32 v0, v1, v0, 1.0300; GFX9-NEXT: s_setpc_b64 s[30:31]301;302; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:303; GFX10: ; %bb.0:304; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)305; GFX10-NEXT: v_min3_f32 v0, v1, v0, 1.0306; GFX10-NEXT: s_setpc_b64 s[30:31]307;308; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:309; GFX11: ; %bb.0:310; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)311; GFX11-NEXT: v_min3_f32 v0, v1, v0, 1.0312; GFX11-NEXT: s_setpc_b64 s[30:31]313;314; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_i_v_1:315; GFX12: ; %bb.0:316; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0317; GFX12-NEXT: s_wait_expcnt 0x0318; GFX12-NEXT: s_wait_samplecnt 0x0319; GFX12-NEXT: s_wait_bvhcnt 0x0320; GFX12-NEXT: s_wait_kmcnt 0x0321; GFX12-NEXT: v_min3_num_f32 v0, v1, v0, 1.0322; GFX12-NEXT: s_setpc_b64 s[30:31]323 %tmp0 = call float @llvm.minimumnum.f32(float %a, float 1.0)324 %min3 = call float @llvm.minimumnum.f32(float %c, float %tmp0)325 ret float %min3326}327 328define float @v_min3_f32_minimumnum_minimumnum__v_v_i(float %a, float %b) {329; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:330; GFX6: ; %bb.0:331; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)332; GFX6-NEXT: v_min3_f32 v0, v0, v1, 1.0333; GFX6-NEXT: s_setpc_b64 s[30:31]334;335; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:336; GFX7: ; %bb.0:337; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)338; GFX7-NEXT: v_min3_f32 v0, v0, v1, 1.0339; GFX7-NEXT: s_setpc_b64 s[30:31]340;341; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:342; GFX8: ; %bb.0:343; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)344; GFX8-NEXT: v_min3_f32 v0, v0, v1, 1.0345; GFX8-NEXT: s_setpc_b64 s[30:31]346;347; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:348; GFX9: ; %bb.0:349; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)350; GFX9-NEXT: v_min3_f32 v0, v0, v1, 1.0351; GFX9-NEXT: s_setpc_b64 s[30:31]352;353; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:354; GFX10: ; %bb.0:355; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)356; GFX10-NEXT: v_min3_f32 v0, v0, v1, 1.0357; GFX10-NEXT: s_setpc_b64 s[30:31]358;359; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:360; GFX11: ; %bb.0:361; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)362; GFX11-NEXT: v_min3_f32 v0, v0, v1, 1.0363; GFX11-NEXT: s_setpc_b64 s[30:31]364;365; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_i:366; GFX12: ; %bb.0:367; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0368; GFX12-NEXT: s_wait_expcnt 0x0369; GFX12-NEXT: s_wait_samplecnt 0x0370; GFX12-NEXT: s_wait_bvhcnt 0x0371; GFX12-NEXT: s_wait_kmcnt 0x0372; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, 1.0373; GFX12-NEXT: s_setpc_b64 s[30:31]374 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)375 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float 1.0)376 ret float %min3377}378 379define float @v_min3_f32_minimumnum_minimumnum__v_k_v(float %a, float %c) {380; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:381; GFX6: ; %bb.0:382; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)383; GFX6-NEXT: s_mov_b32 s4, 0x41000000384; GFX6-NEXT: v_min3_f32 v0, v0, s4, v1385; GFX6-NEXT: s_setpc_b64 s[30:31]386;387; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:388; GFX7: ; %bb.0:389; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)390; GFX7-NEXT: s_mov_b32 s4, 0x41000000391; GFX7-NEXT: v_min3_f32 v0, v0, s4, v1392; GFX7-NEXT: s_setpc_b64 s[30:31]393;394; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:395; GFX8: ; %bb.0:396; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)397; GFX8-NEXT: s_mov_b32 s4, 0x41000000398; GFX8-NEXT: v_min3_f32 v0, v0, s4, v1399; GFX8-NEXT: s_setpc_b64 s[30:31]400;401; GFX900-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:402; GFX900-SDAG: ; %bb.0:403; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)404; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x41000000405; GFX900-SDAG-NEXT: v_min3_f32 v0, v0, s4, v1406; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]407;408; GFX950-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:409; GFX950-SDAG: ; %bb.0:410; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)411; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x41000000412; GFX950-SDAG-NEXT: v_min3_f32 v0, v0, s0, v1413; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]414;415; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:416; GFX10: ; %bb.0:417; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)418; GFX10-NEXT: v_min3_f32 v0, v0, 0x41000000, v1419; GFX10-NEXT: s_setpc_b64 s[30:31]420;421; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:422; GFX11: ; %bb.0:423; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)424; GFX11-NEXT: v_min3_f32 v0, v0, 0x41000000, v1425; GFX11-NEXT: s_setpc_b64 s[30:31]426;427; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_k_v:428; GFX12: ; %bb.0:429; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0430; GFX12-NEXT: s_wait_expcnt 0x0431; GFX12-NEXT: s_wait_samplecnt 0x0432; GFX12-NEXT: s_wait_bvhcnt 0x0433; GFX12-NEXT: s_wait_kmcnt 0x0434; GFX12-NEXT: v_min3_num_f32 v0, v0, 0x41000000, v1435; GFX12-NEXT: s_setpc_b64 s[30:31]436 %tmp0 = call float @llvm.minimumnum.f32(float %a, float 8.0)437 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)438 ret float %min3439}440 441define float @v_min3_f32_minimumnum_minimumnum__v_v_k(float %a, float %b) {442; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:443; GFX6: ; %bb.0:444; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)445; GFX6-NEXT: s_mov_b32 s4, 0x41000000446; GFX6-NEXT: v_min3_f32 v0, v0, v1, s4447; GFX6-NEXT: s_setpc_b64 s[30:31]448;449; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:450; GFX7: ; %bb.0:451; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)452; GFX7-NEXT: s_mov_b32 s4, 0x41000000453; GFX7-NEXT: v_min3_f32 v0, v0, v1, s4454; GFX7-NEXT: s_setpc_b64 s[30:31]455;456; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:457; GFX8: ; %bb.0:458; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)459; GFX8-NEXT: s_mov_b32 s4, 0x41000000460; GFX8-NEXT: v_min3_f32 v0, v0, v1, s4461; GFX8-NEXT: s_setpc_b64 s[30:31]462;463; GFX900-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:464; GFX900-SDAG: ; %bb.0:465; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)466; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x41000000467; GFX900-SDAG-NEXT: v_min3_f32 v0, v0, v1, s4468; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]469;470; GFX950-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:471; GFX950-SDAG: ; %bb.0:472; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)473; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x41000000474; GFX950-SDAG-NEXT: v_min3_f32 v0, v0, v1, s0475; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]476;477; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:478; GFX10: ; %bb.0:479; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)480; GFX10-NEXT: v_min3_f32 v0, v0, v1, 0x41000000481; GFX10-NEXT: s_setpc_b64 s[30:31]482;483; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:484; GFX11: ; %bb.0:485; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)486; GFX11-NEXT: v_min3_f32 v0, v0, v1, 0x41000000487; GFX11-NEXT: s_setpc_b64 s[30:31]488;489; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_k:490; GFX12: ; %bb.0:491; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0492; GFX12-NEXT: s_wait_expcnt 0x0493; GFX12-NEXT: s_wait_samplecnt 0x0494; GFX12-NEXT: s_wait_bvhcnt 0x0495; GFX12-NEXT: s_wait_kmcnt 0x0496; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, 0x41000000497; GFX12-NEXT: s_setpc_b64 s[30:31]498 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)499 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float 8.0)500 ret float %min3501}502 503define float @v_min3_f32_minimumnum_minimumnum__s_v_v(float inreg %a, float %b, float %c) {504; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:505; GFX6: ; %bb.0:506; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)507; GFX6-NEXT: v_min3_f32 v0, s16, v0, v1508; GFX6-NEXT: s_setpc_b64 s[30:31]509;510; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:511; GFX7: ; %bb.0:512; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)513; GFX7-NEXT: v_min3_f32 v0, s16, v0, v1514; GFX7-NEXT: s_setpc_b64 s[30:31]515;516; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:517; GFX8: ; %bb.0:518; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)519; GFX8-NEXT: v_min3_f32 v0, s16, v0, v1520; GFX8-NEXT: s_setpc_b64 s[30:31]521;522; GFX900-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:523; GFX900-SDAG: ; %bb.0:524; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)525; GFX900-SDAG-NEXT: v_min3_f32 v0, s16, v0, v1526; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]527;528; GFX950-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:529; GFX950-SDAG: ; %bb.0:530; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)531; GFX950-SDAG-NEXT: v_min3_f32 v0, s0, v0, v1532; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]533;534; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:535; GFX10: ; %bb.0:536; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)537; GFX10-NEXT: v_min3_f32 v0, s16, v0, v1538; GFX10-NEXT: s_setpc_b64 s[30:31]539;540; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:541; GFX11: ; %bb.0:542; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)543; GFX11-NEXT: v_min3_f32 v0, s0, v0, v1544; GFX11-NEXT: s_setpc_b64 s[30:31]545;546; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_v:547; GFX12: ; %bb.0:548; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0549; GFX12-NEXT: s_wait_expcnt 0x0550; GFX12-NEXT: s_wait_samplecnt 0x0551; GFX12-NEXT: s_wait_bvhcnt 0x0552; GFX12-NEXT: s_wait_kmcnt 0x0553; GFX12-NEXT: v_min3_num_f32 v0, s0, v0, v1554; GFX12-NEXT: s_setpc_b64 s[30:31]555 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)556 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)557 ret float %min3558}559 560define float @v_min3_f32_minimumnum_minimumnum__s_s_v(float inreg %a, float inreg %b, float %c) {561; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:562; GFX6: ; %bb.0:563; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)564; GFX6-NEXT: v_mov_b32_e32 v1, s17565; GFX6-NEXT: v_min3_f32 v0, s16, v1, v0566; GFX6-NEXT: s_setpc_b64 s[30:31]567;568; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:569; GFX7: ; %bb.0:570; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)571; GFX7-NEXT: v_mov_b32_e32 v1, s17572; GFX7-NEXT: v_min3_f32 v0, s16, v1, v0573; GFX7-NEXT: s_setpc_b64 s[30:31]574;575; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:576; GFX8: ; %bb.0:577; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)578; GFX8-NEXT: v_mov_b32_e32 v1, s17579; GFX8-NEXT: v_min3_f32 v0, s16, v1, v0580; GFX8-NEXT: s_setpc_b64 s[30:31]581;582; GFX900-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:583; GFX900-SDAG: ; %bb.0:584; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s17586; GFX900-SDAG-NEXT: v_min3_f32 v0, s16, v1, v0587; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]588;589; GFX950-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:590; GFX950-SDAG: ; %bb.0:591; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)592; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s1593; GFX950-SDAG-NEXT: v_min3_f32 v0, s0, v1, v0594; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]595;596; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:597; GFX10: ; %bb.0:598; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)599; GFX10-NEXT: v_min3_f32 v0, s16, s17, v0600; GFX10-NEXT: s_setpc_b64 s[30:31]601;602; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:603; GFX11: ; %bb.0:604; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)605; GFX11-NEXT: v_min3_f32 v0, s0, s1, v0606; GFX11-NEXT: s_setpc_b64 s[30:31]607;608; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_v:609; GFX12: ; %bb.0:610; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0611; GFX12-NEXT: s_wait_expcnt 0x0612; GFX12-NEXT: s_wait_samplecnt 0x0613; GFX12-NEXT: s_wait_bvhcnt 0x0614; GFX12-NEXT: s_wait_kmcnt 0x0615; GFX12-NEXT: v_min3_num_f32 v0, s0, s1, v0616; GFX12-NEXT: s_setpc_b64 s[30:31]617 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)618 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)619 ret float %min3620}621 622define float @v_min3_f32_minimumnum_minimumnum__s_v_s(float inreg %a, float %b, float inreg %c) {623; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:624; GFX6: ; %bb.0:625; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)626; GFX6-NEXT: v_mov_b32_e32 v1, s17627; GFX6-NEXT: v_min3_f32 v0, s16, v0, v1628; GFX6-NEXT: s_setpc_b64 s[30:31]629;630; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:631; GFX7: ; %bb.0:632; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)633; GFX7-NEXT: v_mov_b32_e32 v1, s17634; GFX7-NEXT: v_min3_f32 v0, s16, v0, v1635; GFX7-NEXT: s_setpc_b64 s[30:31]636;637; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:638; GFX8: ; %bb.0:639; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)640; GFX8-NEXT: v_mov_b32_e32 v1, s17641; GFX8-NEXT: v_min3_f32 v0, s16, v0, v1642; GFX8-NEXT: s_setpc_b64 s[30:31]643;644; GFX900-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:645; GFX900-SDAG: ; %bb.0:646; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)647; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s17648; GFX900-SDAG-NEXT: v_min3_f32 v0, s16, v0, v1649; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]650;651; GFX950-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:652; GFX950-SDAG: ; %bb.0:653; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)654; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s1655; GFX950-SDAG-NEXT: v_min3_f32 v0, s0, v0, v1656; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]657;658; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:659; GFX10: ; %bb.0:660; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)661; GFX10-NEXT: v_min3_f32 v0, s16, v0, s17662; GFX10-NEXT: s_setpc_b64 s[30:31]663;664; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:665; GFX11: ; %bb.0:666; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)667; GFX11-NEXT: v_min3_f32 v0, s0, v0, s1668; GFX11-NEXT: s_setpc_b64 s[30:31]669;670; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__s_v_s:671; GFX12: ; %bb.0:672; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0673; GFX12-NEXT: s_wait_expcnt 0x0674; GFX12-NEXT: s_wait_samplecnt 0x0675; GFX12-NEXT: s_wait_bvhcnt 0x0676; GFX12-NEXT: s_wait_kmcnt 0x0677; GFX12-NEXT: v_min3_num_f32 v0, s0, v0, s1678; GFX12-NEXT: s_setpc_b64 s[30:31]679 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)680 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)681 ret float %min3682}683 684define float @v_min3_f32_minimumnum_minimumnum__s_s_s(float inreg %a, float inreg %b, float inreg %c) {685; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:686; GFX6: ; %bb.0:687; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)688; GFX6-NEXT: v_mov_b32_e32 v0, s17689; GFX6-NEXT: v_mov_b32_e32 v1, s18690; GFX6-NEXT: v_min3_f32 v0, s16, v0, v1691; GFX6-NEXT: s_setpc_b64 s[30:31]692;693; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:694; GFX7: ; %bb.0:695; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)696; GFX7-NEXT: v_mov_b32_e32 v0, s17697; GFX7-NEXT: v_mov_b32_e32 v1, s18698; GFX7-NEXT: v_min3_f32 v0, s16, v0, v1699; GFX7-NEXT: s_setpc_b64 s[30:31]700;701; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:702; GFX8: ; %bb.0:703; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)704; GFX8-NEXT: v_mov_b32_e32 v0, s17705; GFX8-NEXT: v_mov_b32_e32 v1, s18706; GFX8-NEXT: v_min3_f32 v0, s16, v0, v1707; GFX8-NEXT: s_setpc_b64 s[30:31]708;709; GFX900-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:710; GFX900-SDAG: ; %bb.0:711; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)712; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, s17713; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s18714; GFX900-SDAG-NEXT: v_min3_f32 v0, s16, v0, v1715; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]716;717; GFX950-SDAG-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:718; GFX950-SDAG: ; %bb.0:719; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)720; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s1721; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s2722; GFX950-SDAG-NEXT: v_min3_f32 v0, s0, v0, v1723; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]724;725; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:726; GFX10: ; %bb.0:727; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)728; GFX10-NEXT: v_mov_b32_e32 v0, s18729; GFX10-NEXT: v_min3_f32 v0, s16, s17, v0730; GFX10-NEXT: s_setpc_b64 s[30:31]731;732; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:733; GFX11: ; %bb.0:734; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)735; GFX11-NEXT: v_mov_b32_e32 v0, s2736; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)737; GFX11-NEXT: v_min3_f32 v0, s0, s1, v0738; GFX11-NEXT: s_setpc_b64 s[30:31]739;740; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__s_s_s:741; GFX12: ; %bb.0:742; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0743; GFX12-NEXT: s_wait_expcnt 0x0744; GFX12-NEXT: s_wait_samplecnt 0x0745; GFX12-NEXT: s_wait_bvhcnt 0x0746; GFX12-NEXT: s_wait_kmcnt 0x0747; GFX12-NEXT: v_mov_b32_e32 v0, s2748; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)749; GFX12-NEXT: v_min3_num_f32 v0, s0, s1, v0750; GFX12-NEXT: s_setpc_b64 s[30:31]751 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)752 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)753 ret float %min3754}755 756define amdgpu_ps i32 @s_min3_f32_minimumnum_minimumnum__s_s_s(float inreg %a, float inreg %b, float inreg %c) {757; GFX6-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:758; GFX6: ; %bb.0:759; GFX6-NEXT: v_mov_b32_e32 v0, s1760; GFX6-NEXT: v_mov_b32_e32 v1, s2761; GFX6-NEXT: v_min3_f32 v0, s0, v0, v1762; GFX6-NEXT: v_readfirstlane_b32 s0, v0763; GFX6-NEXT: ; return to shader part epilog764;765; GFX7-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:766; GFX7: ; %bb.0:767; GFX7-NEXT: v_mov_b32_e32 v0, s1768; GFX7-NEXT: v_mov_b32_e32 v1, s2769; GFX7-NEXT: v_min3_f32 v0, s0, v0, v1770; GFX7-NEXT: v_readfirstlane_b32 s0, v0771; GFX7-NEXT: ; return to shader part epilog772;773; GFX8-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:774; GFX8: ; %bb.0:775; GFX8-NEXT: v_mov_b32_e32 v0, s1776; GFX8-NEXT: v_mov_b32_e32 v1, s2777; GFX8-NEXT: v_min3_f32 v0, s0, v0, v1778; GFX8-NEXT: v_readfirstlane_b32 s0, v0779; GFX8-NEXT: ; return to shader part epilog780;781; GFX900-SDAG-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:782; GFX900-SDAG: ; %bb.0:783; GFX900-SDAG-NEXT: v_mov_b32_e32 v0, s1784; GFX900-SDAG-NEXT: v_mov_b32_e32 v1, s2785; GFX900-SDAG-NEXT: v_min3_f32 v0, s0, v0, v1786; GFX900-SDAG-NEXT: v_readfirstlane_b32 s0, v0787; GFX900-SDAG-NEXT: ; return to shader part epilog788;789; GFX950-SDAG-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:790; GFX950-SDAG: ; %bb.0:791; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, s1792; GFX950-SDAG-NEXT: v_mov_b32_e32 v1, s2793; GFX950-SDAG-NEXT: v_min3_f32 v0, s0, v0, v1794; GFX950-SDAG-NEXT: s_nop 0795; GFX950-SDAG-NEXT: v_readfirstlane_b32 s0, v0796; GFX950-SDAG-NEXT: ; return to shader part epilog797;798; GFX10-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:799; GFX10: ; %bb.0:800; GFX10-NEXT: v_mov_b32_e32 v0, s2801; GFX10-NEXT: v_min3_f32 v0, s0, s1, v0802; GFX10-NEXT: v_readfirstlane_b32 s0, v0803; GFX10-NEXT: ; return to shader part epilog804;805; GFX11-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:806; GFX11: ; %bb.0:807; GFX11-NEXT: v_mov_b32_e32 v0, s2808; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)809; GFX11-NEXT: v_min3_f32 v0, s0, s1, v0810; GFX11-NEXT: v_readfirstlane_b32 s0, v0811; GFX11-NEXT: ; return to shader part epilog812;813; GFX12-LABEL: s_min3_f32_minimumnum_minimumnum__s_s_s:814; GFX12: ; %bb.0:815; GFX12-NEXT: v_mov_b32_e32 v0, s2816; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)817; GFX12-NEXT: v_min3_num_f32 v0, s0, s1, v0818; GFX12-NEXT: v_readfirstlane_b32 s0, v0819; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)820; GFX12-NEXT: ; return to shader part epilog821 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)822 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)823 %min3.bitcast = bitcast float %min3 to i32824 ret i32 %min3.bitcast825}826 827define float @v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan(float %a, float %b, float %c) {828; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:829; GFX6: ; %bb.0:830; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)831; GFX6-NEXT: v_min3_f32 v0, v0, v1, v2832; GFX6-NEXT: s_setpc_b64 s[30:31]833;834; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:835; GFX7: ; %bb.0:836; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)837; GFX7-NEXT: v_min3_f32 v0, v0, v1, v2838; GFX7-NEXT: s_setpc_b64 s[30:31]839;840; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:841; GFX8: ; %bb.0:842; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)843; GFX8-NEXT: v_min3_f32 v0, v0, v1, v2844; GFX8-NEXT: s_setpc_b64 s[30:31]845;846; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:847; GFX9: ; %bb.0:848; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)849; GFX9-NEXT: v_min3_f32 v0, v0, v1, v2850; GFX9-NEXT: s_setpc_b64 s[30:31]851;852; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:853; GFX10: ; %bb.0:854; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)855; GFX10-NEXT: v_min3_f32 v0, v0, v1, v2856; GFX10-NEXT: s_setpc_b64 s[30:31]857;858; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:859; GFX11: ; %bb.0:860; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)861; GFX11-NEXT: v_min3_f32 v0, v0, v1, v2862; GFX11-NEXT: s_setpc_b64 s[30:31]863;864; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan_nnan:865; GFX12: ; %bb.0:866; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0867; GFX12-NEXT: s_wait_expcnt 0x0868; GFX12-NEXT: s_wait_samplecnt 0x0869; GFX12-NEXT: s_wait_bvhcnt 0x0870; GFX12-NEXT: s_wait_kmcnt 0x0871; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, v2872; GFX12-NEXT: s_setpc_b64 s[30:31]873 %tmp0 = call nnan float @llvm.minimumnum.f32(float %a, float %b)874 %min3 = call nnan float @llvm.minimumnum.f32(float %tmp0, float %c)875 ret float %min3876}877 878define float @v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0(float %a, float %b, float %c) {879; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:880; GFX6: ; %bb.0:881; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)882; GFX6-NEXT: v_min3_f32 v0, v0, v1, v2883; GFX6-NEXT: s_setpc_b64 s[30:31]884;885; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:886; GFX7: ; %bb.0:887; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)888; GFX7-NEXT: v_min3_f32 v0, v0, v1, v2889; GFX7-NEXT: s_setpc_b64 s[30:31]890;891; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:892; GFX8: ; %bb.0:893; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)894; GFX8-NEXT: v_min3_f32 v0, v0, v1, v2895; GFX8-NEXT: s_setpc_b64 s[30:31]896;897; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:898; GFX9: ; %bb.0:899; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; GFX9-NEXT: v_min3_f32 v0, v0, v1, v2901; GFX9-NEXT: s_setpc_b64 s[30:31]902;903; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:904; GFX10: ; %bb.0:905; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)906; GFX10-NEXT: v_min3_f32 v0, v0, v1, v2907; GFX10-NEXT: s_setpc_b64 s[30:31]908;909; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:910; GFX11: ; %bb.0:911; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)912; GFX11-NEXT: v_min3_f32 v0, v0, v1, v2913; GFX11-NEXT: s_setpc_b64 s[30:31]914;915; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan0:916; GFX12: ; %bb.0:917; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0918; GFX12-NEXT: s_wait_expcnt 0x0919; GFX12-NEXT: s_wait_samplecnt 0x0920; GFX12-NEXT: s_wait_bvhcnt 0x0921; GFX12-NEXT: s_wait_kmcnt 0x0922; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, v2923; GFX12-NEXT: s_setpc_b64 s[30:31]924 %tmp0 = call nnan float @llvm.minimumnum.f32(float %a, float %b)925 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)926 ret float %min3927}928 929define float @v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1(float %a, float %b, float %c) {930; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:931; GFX6: ; %bb.0:932; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)933; GFX6-NEXT: v_min3_f32 v0, v0, v1, v2934; GFX6-NEXT: s_setpc_b64 s[30:31]935;936; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:937; GFX7: ; %bb.0:938; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GFX7-NEXT: v_min3_f32 v0, v0, v1, v2940; GFX7-NEXT: s_setpc_b64 s[30:31]941;942; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:943; GFX8: ; %bb.0:944; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)945; GFX8-NEXT: v_min3_f32 v0, v0, v1, v2946; GFX8-NEXT: s_setpc_b64 s[30:31]947;948; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:949; GFX9: ; %bb.0:950; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)951; GFX9-NEXT: v_min3_f32 v0, v0, v1, v2952; GFX9-NEXT: s_setpc_b64 s[30:31]953;954; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:955; GFX10: ; %bb.0:956; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)957; GFX10-NEXT: v_min3_f32 v0, v0, v1, v2958; GFX10-NEXT: s_setpc_b64 s[30:31]959;960; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:961; GFX11: ; %bb.0:962; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)963; GFX11-NEXT: v_min3_f32 v0, v0, v1, v2964; GFX11-NEXT: s_setpc_b64 s[30:31]965;966; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_v_0__nnan1:967; GFX12: ; %bb.0:968; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0969; GFX12-NEXT: s_wait_expcnt 0x0970; GFX12-NEXT: s_wait_samplecnt 0x0971; GFX12-NEXT: s_wait_bvhcnt 0x0972; GFX12-NEXT: s_wait_kmcnt 0x0973; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, v2974; GFX12-NEXT: s_setpc_b64 s[30:31]975 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)976 %min3 = call nnan float @llvm.minimumnum.f32(float %tmp0, float %c)977 ret float %min3978}979 980define <2 x float> @v_min3_v2f32_minimumnum_minimumnum__v_v_v_0(<2 x float> %a, <2 x float> %b, <2 x float> %c) {981; GFX6-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:982; GFX6: ; %bb.0:983; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)984; GFX6-NEXT: v_min3_f32 v0, v0, v2, v4985; GFX6-NEXT: v_min3_f32 v1, v1, v3, v5986; GFX6-NEXT: s_setpc_b64 s[30:31]987;988; GFX7-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:989; GFX7: ; %bb.0:990; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)991; GFX7-NEXT: v_min3_f32 v0, v0, v2, v4992; GFX7-NEXT: v_min3_f32 v1, v1, v3, v5993; GFX7-NEXT: s_setpc_b64 s[30:31]994;995; GFX8-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:996; GFX8: ; %bb.0:997; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)998; GFX8-NEXT: v_min3_f32 v0, v0, v2, v4999; GFX8-NEXT: v_min3_f32 v1, v1, v3, v51000; GFX8-NEXT: s_setpc_b64 s[30:31]1001;1002; GFX9-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:1003; GFX9: ; %bb.0:1004; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1005; GFX9-NEXT: v_min3_f32 v0, v0, v2, v41006; GFX9-NEXT: v_min3_f32 v1, v1, v3, v51007; GFX9-NEXT: s_setpc_b64 s[30:31]1008;1009; GFX10-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:1010; GFX10: ; %bb.0:1011; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1012; GFX10-NEXT: v_min3_f32 v0, v0, v2, v41013; GFX10-NEXT: v_min3_f32 v1, v1, v3, v51014; GFX10-NEXT: s_setpc_b64 s[30:31]1015;1016; GFX11-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:1017; GFX11: ; %bb.0:1018; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1019; GFX11-NEXT: v_min3_f32 v0, v0, v2, v41020; GFX11-NEXT: v_min3_f32 v1, v1, v3, v51021; GFX11-NEXT: s_setpc_b64 s[30:31]1022;1023; GFX12-LABEL: v_min3_v2f32_minimumnum_minimumnum__v_v_v_0:1024; GFX12: ; %bb.0:1025; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01026; GFX12-NEXT: s_wait_expcnt 0x01027; GFX12-NEXT: s_wait_samplecnt 0x01028; GFX12-NEXT: s_wait_bvhcnt 0x01029; GFX12-NEXT: s_wait_kmcnt 0x01030; GFX12-NEXT: v_min3_num_f32 v0, v0, v2, v41031; GFX12-NEXT: v_min3_num_f32 v1, v1, v3, v51032; GFX12-NEXT: s_setpc_b64 s[30:31]1033 %tmp0 = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %a, <2 x float> %b)1034 %min3 = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %tmp0, <2 x float> %c)1035 ret <2 x float> %min31036}1037 1038define half @v_min3_f16_minimumnum_minimumnum__v_v_v_0(half %a, half %b, half %c) {1039; GFX6-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1040; GFX6: ; %bb.0:1041; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1042; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21043; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11044; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01045; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21046; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11047; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01048; GFX6-NEXT: v_min3_f32 v0, v0, v1, v21049; GFX6-NEXT: s_setpc_b64 s[30:31]1050;1051; GFX7-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1052; GFX7: ; %bb.0:1053; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1054; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21055; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11056; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01057; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21058; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11059; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01060; GFX7-NEXT: v_min3_f32 v0, v0, v1, v21061; GFX7-NEXT: s_setpc_b64 s[30:31]1062;1063; GFX8-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1064; GFX8: ; %bb.0:1065; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1066; GFX8-NEXT: v_max_f16_e32 v1, v1, v11067; GFX8-NEXT: v_max_f16_e32 v0, v0, v01068; GFX8-NEXT: v_min_f16_e32 v0, v0, v11069; GFX8-NEXT: v_max_f16_e32 v1, v2, v21070; GFX8-NEXT: v_min_f16_e32 v0, v0, v11071; GFX8-NEXT: s_setpc_b64 s[30:31]1072;1073; GFX9-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1074; GFX9: ; %bb.0:1075; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1076; GFX9-NEXT: v_min3_f16 v0, v0, v1, v21077; GFX9-NEXT: s_setpc_b64 s[30:31]1078;1079; GFX10-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1080; GFX10: ; %bb.0:1081; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1082; GFX10-NEXT: v_min3_f16 v0, v0, v1, v21083; GFX10-NEXT: s_setpc_b64 s[30:31]1084;1085; GFX11-SDAG-TRUE16-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1086; GFX11-SDAG-TRUE16: ; %bb.0:1087; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1088; GFX11-SDAG-TRUE16-NEXT: v_min3_f16 v0.l, v0.l, v1.l, v2.l1089; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1090;1091; GFX11-SDAG-FAKE16-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1092; GFX11-SDAG-FAKE16: ; %bb.0:1093; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1094; GFX11-SDAG-FAKE16-NEXT: v_min3_f16 v0, v0, v1, v21095; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1096;1097; GFX12-SDAG-TRUE16-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1098; GFX12-SDAG-TRUE16: ; %bb.0:1099; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01100; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x01101; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x01102; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x01103; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x01104; GFX12-SDAG-TRUE16-NEXT: v_min3_num_f16 v0.l, v0.l, v1.l, v2.l1105; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1106;1107; GFX12-SDAG-FAKE16-LABEL: v_min3_f16_minimumnum_minimumnum__v_v_v_0:1108; GFX12-SDAG-FAKE16: ; %bb.0:1109; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01110; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x01111; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x01112; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x01113; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x01114; GFX12-SDAG-FAKE16-NEXT: v_min3_num_f16 v0, v0, v1, v21115; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1116 %tmp0 = call half @llvm.minimumnum.f16(half %a, half %b)1117 %min3 = call half @llvm.minimumnum.f16(half %tmp0, half %c)1118 ret half %min31119}1120 1121define <2 x half> @v_min3_v2f16_minimumnum_minimumnum__v_v_v_0(<2 x half> %a, <2 x half> %b, <2 x half> %c) {1122; GFX6-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1123; GFX6: ; %bb.0:1124; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1125; GFX6-NEXT: v_cvt_f16_f32_e32 v5, v51126; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v31127; GFX6-NEXT: v_cvt_f16_f32_e32 v4, v41128; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21129; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01130; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11131; GFX6-NEXT: v_cvt_f32_f16_e32 v5, v51132; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v31133; GFX6-NEXT: v_cvt_f32_f16_e32 v4, v41134; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21135; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01136; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11137; GFX6-NEXT: v_min3_f32 v0, v0, v2, v41138; GFX6-NEXT: v_min3_f32 v1, v1, v3, v51139; GFX6-NEXT: s_setpc_b64 s[30:31]1140;1141; GFX7-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1142; GFX7: ; %bb.0:1143; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1144; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v51145; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v31146; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v41147; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21148; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01149; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11150; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v51151; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v31152; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v41153; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21154; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01155; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11156; GFX7-NEXT: v_min3_f32 v0, v0, v2, v41157; GFX7-NEXT: v_min3_f32 v1, v1, v3, v51158; GFX7-NEXT: s_setpc_b64 s[30:31]1159;1160; GFX8-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1161; GFX8: ; %bb.0:1162; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1163; GFX8-NEXT: v_max_f16_sdwa v3, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11164; GFX8-NEXT: v_max_f16_sdwa v4, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11165; GFX8-NEXT: v_max_f16_e32 v1, v1, v11166; GFX8-NEXT: v_max_f16_e32 v0, v0, v01167; GFX8-NEXT: v_min_f16_e32 v3, v4, v31168; GFX8-NEXT: v_min_f16_e32 v0, v0, v11169; GFX8-NEXT: v_max_f16_sdwa v1, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11170; GFX8-NEXT: v_max_f16_e32 v2, v2, v21171; GFX8-NEXT: v_min_f16_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1172; GFX8-NEXT: v_min_f16_e32 v0, v0, v21173; GFX8-NEXT: v_or_b32_e32 v0, v0, v11174; GFX8-NEXT: s_setpc_b64 s[30:31]1175;1176; GFX900-SDAG-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1177; GFX900-SDAG: ; %bb.0:1178; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1179; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v11180; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v01181; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v11182; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v2, v21183; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v11184; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1185;1186; GFX950-SDAG-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1187; GFX950-SDAG: ; %bb.0:1188; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1189; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v11190; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v01191; GFX950-SDAG-NEXT: s_nop 01192; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v11193; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v2, v21194; GFX950-SDAG-NEXT: s_nop 01195; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v11196; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1197;1198; GFX10-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1199; GFX10: ; %bb.0:1200; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1201; GFX10-NEXT: v_pk_max_f16 v1, v1, v11202; GFX10-NEXT: v_pk_max_f16 v0, v0, v01203; GFX10-NEXT: v_pk_min_f16 v0, v0, v11204; GFX10-NEXT: v_pk_max_f16 v1, v2, v21205; GFX10-NEXT: v_pk_min_f16 v0, v0, v11206; GFX10-NEXT: s_setpc_b64 s[30:31]1207;1208; GFX11-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1209; GFX11: ; %bb.0:1210; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1211; GFX11-NEXT: v_pk_max_f16 v1, v1, v11212; GFX11-NEXT: v_pk_max_f16 v0, v0, v01213; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1214; GFX11-NEXT: v_pk_min_f16 v0, v0, v11215; GFX11-NEXT: v_pk_max_f16 v1, v2, v21216; GFX11-NEXT: v_pk_min_f16 v0, v0, v11217; GFX11-NEXT: s_setpc_b64 s[30:31]1218;1219; GFX12-LABEL: v_min3_v2f16_minimumnum_minimumnum__v_v_v_0:1220; GFX12: ; %bb.0:1221; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01222; GFX12-NEXT: s_wait_expcnt 0x01223; GFX12-NEXT: s_wait_samplecnt 0x01224; GFX12-NEXT: s_wait_bvhcnt 0x01225; GFX12-NEXT: s_wait_kmcnt 0x01226; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v11227; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v01228; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)1229; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v11230; GFX12-NEXT: v_pk_max_num_f16 v1, v2, v21231; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v11232; GFX12-NEXT: s_setpc_b64 s[30:31]1233 %tmp0 = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %a, <2 x half> %b)1234 %min3 = call <2 x half> @llvm.minimumnum.v2f16(<2 x half> %tmp0, <2 x half> %c)1235 ret <2 x half> %min31236}1237 1238define <3 x half> @v_min3_v3f16_minimumnum_minimumnum__v_v_v_0(<3 x half> %a, <3 x half> %b, <3 x half> %c) {1239; GFX6-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1240; GFX6: ; %bb.0:1241; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1242; GFX6-NEXT: v_cvt_f16_f32_e32 v8, v81243; GFX6-NEXT: v_cvt_f16_f32_e32 v5, v51244; GFX6-NEXT: v_cvt_f16_f32_e32 v7, v71245; GFX6-NEXT: v_cvt_f16_f32_e32 v4, v41246; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21247; GFX6-NEXT: v_cvt_f16_f32_e32 v6, v61248; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v31249; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01250; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11251; GFX6-NEXT: v_cvt_f32_f16_e32 v8, v81252; GFX6-NEXT: v_cvt_f32_f16_e32 v5, v51253; GFX6-NEXT: v_cvt_f32_f16_e32 v7, v71254; GFX6-NEXT: v_cvt_f32_f16_e32 v4, v41255; GFX6-NEXT: v_cvt_f32_f16_e32 v6, v61256; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v31257; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01258; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11259; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21260; GFX6-NEXT: v_min3_f32 v0, v0, v3, v61261; GFX6-NEXT: v_min3_f32 v1, v1, v4, v71262; GFX6-NEXT: v_min3_f32 v2, v2, v5, v81263; GFX6-NEXT: s_setpc_b64 s[30:31]1264;1265; GFX7-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1266; GFX7: ; %bb.0:1267; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1268; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v81269; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v51270; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v71271; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v41272; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21273; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v61274; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v31275; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01276; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11277; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v81278; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v51279; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v71280; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v41281; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v61282; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v31283; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01284; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11285; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21286; GFX7-NEXT: v_min3_f32 v0, v0, v3, v61287; GFX7-NEXT: v_min3_f32 v1, v1, v4, v71288; GFX7-NEXT: v_min3_f32 v2, v2, v5, v81289; GFX7-NEXT: s_setpc_b64 s[30:31]1290;1291; GFX8-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1292; GFX8: ; %bb.0:1293; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1294; GFX8-NEXT: v_max_f16_sdwa v6, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11295; GFX8-NEXT: v_max_f16_sdwa v7, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11296; GFX8-NEXT: v_max_f16_e32 v2, v2, v21297; GFX8-NEXT: v_max_f16_e32 v0, v0, v01298; GFX8-NEXT: v_min_f16_e32 v0, v0, v21299; GFX8-NEXT: v_max_f16_e32 v2, v3, v31300; GFX8-NEXT: v_max_f16_e32 v1, v1, v11301; GFX8-NEXT: v_min_f16_e32 v1, v1, v21302; GFX8-NEXT: v_max_f16_e32 v3, v5, v51303; GFX8-NEXT: v_min_f16_e32 v6, v7, v61304; GFX8-NEXT: v_max_f16_sdwa v2, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11305; GFX8-NEXT: v_min_f16_e32 v1, v1, v31306; GFX8-NEXT: v_max_f16_e32 v3, v4, v41307; GFX8-NEXT: v_min_f16_sdwa v2, v6, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1308; GFX8-NEXT: v_min_f16_e32 v0, v0, v31309; GFX8-NEXT: v_or_b32_e32 v0, v0, v21310; GFX8-NEXT: s_setpc_b64 s[30:31]1311;1312; GFX900-SDAG-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1313; GFX900-SDAG: ; %bb.0:1314; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1315; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v21316; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v01317; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v31318; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v11319; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v21320; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v4, v41321; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v31322; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v21323; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v5, v51324; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v21325; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1326;1327; GFX950-SDAG-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1328; GFX950-SDAG: ; %bb.0:1329; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1330; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v21331; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v01332; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v31333; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v11334; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v21335; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v4, v41336; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v31337; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v21338; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v5, v51339; GFX950-SDAG-NEXT: s_nop 01340; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v21341; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1342;1343; GFX10-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1344; GFX10: ; %bb.0:1345; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1346; GFX10-NEXT: v_pk_max_f16 v2, v2, v21347; GFX10-NEXT: v_pk_max_f16 v0, v0, v01348; GFX10-NEXT: v_pk_max_f16 v3, v3, v31349; GFX10-NEXT: v_pk_max_f16 v1, v1, v11350; GFX10-NEXT: v_pk_min_f16 v0, v0, v21351; GFX10-NEXT: v_pk_max_f16 v2, v4, v41352; GFX10-NEXT: v_pk_max_f16 v4, v5, v51353; GFX10-NEXT: v_pk_min_f16 v1, v1, v31354; GFX10-NEXT: v_pk_min_f16 v0, v0, v21355; GFX10-NEXT: v_pk_min_f16 v1, v1, v41356; GFX10-NEXT: s_setpc_b64 s[30:31]1357;1358; GFX11-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1359; GFX11: ; %bb.0:1360; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1361; GFX11-NEXT: v_pk_max_f16 v2, v2, v21362; GFX11-NEXT: v_pk_max_f16 v0, v0, v01363; GFX11-NEXT: v_pk_max_f16 v3, v3, v31364; GFX11-NEXT: v_pk_max_f16 v1, v1, v11365; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1366; GFX11-NEXT: v_pk_min_f16 v0, v0, v21367; GFX11-NEXT: v_pk_max_f16 v2, v4, v41368; GFX11-NEXT: v_pk_max_f16 v4, v5, v51369; GFX11-NEXT: v_pk_min_f16 v1, v1, v31370; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1371; GFX11-NEXT: v_pk_min_f16 v0, v0, v21372; GFX11-NEXT: v_pk_min_f16 v1, v1, v41373; GFX11-NEXT: s_setpc_b64 s[30:31]1374;1375; GFX12-LABEL: v_min3_v3f16_minimumnum_minimumnum__v_v_v_0:1376; GFX12: ; %bb.0:1377; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01378; GFX12-NEXT: s_wait_expcnt 0x01379; GFX12-NEXT: s_wait_samplecnt 0x01380; GFX12-NEXT: s_wait_bvhcnt 0x01381; GFX12-NEXT: s_wait_kmcnt 0x01382; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v21383; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v01384; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v31385; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v11386; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1387; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v21388; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v41389; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v51390; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v31391; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1392; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v21393; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v41394; GFX12-NEXT: s_setpc_b64 s[30:31]1395 %tmp0 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %a, <3 x half> %b)1396 %min3 = call <3 x half> @llvm.minimumnum.v3f16(<3 x half> %tmp0, <3 x half> %c)1397 ret <3 x half> %min31398}1399 1400define <4 x half> @v_min3_v4f16_minimumnum_minimumnum__v_v_v_0(<4 x half> %a, <4 x half> %b, <4 x half> %c) {1401; GFX6-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1402; GFX6: ; %bb.0:1403; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1404; GFX6-NEXT: v_cvt_f16_f32_e32 v11, v111405; GFX6-NEXT: v_cvt_f16_f32_e32 v7, v71406; GFX6-NEXT: v_cvt_f16_f32_e32 v10, v101407; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v31408; GFX6-NEXT: v_cvt_f16_f32_e32 v6, v61409; GFX6-NEXT: v_cvt_f16_f32_e32 v9, v91410; GFX6-NEXT: v_cvt_f16_f32_e32 v5, v51411; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v21412; GFX6-NEXT: v_cvt_f16_f32_e32 v8, v81413; GFX6-NEXT: v_cvt_f16_f32_e32 v4, v41414; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v01415; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v11416; GFX6-NEXT: v_cvt_f32_f16_e32 v11, v111417; GFX6-NEXT: v_cvt_f32_f16_e32 v7, v71418; GFX6-NEXT: v_cvt_f32_f16_e32 v10, v101419; GFX6-NEXT: v_cvt_f32_f16_e32 v6, v61420; GFX6-NEXT: v_cvt_f32_f16_e32 v9, v91421; GFX6-NEXT: v_cvt_f32_f16_e32 v5, v51422; GFX6-NEXT: v_cvt_f32_f16_e32 v8, v81423; GFX6-NEXT: v_cvt_f32_f16_e32 v4, v41424; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v01425; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v11426; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v21427; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v31428; GFX6-NEXT: v_min3_f32 v0, v0, v4, v81429; GFX6-NEXT: v_min3_f32 v1, v1, v5, v91430; GFX6-NEXT: v_min3_f32 v2, v2, v6, v101431; GFX6-NEXT: v_min3_f32 v3, v3, v7, v111432; GFX6-NEXT: s_setpc_b64 s[30:31]1433;1434; GFX7-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1435; GFX7: ; %bb.0:1436; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1437; GFX7-NEXT: v_cvt_f16_f32_e32 v11, v111438; GFX7-NEXT: v_cvt_f16_f32_e32 v7, v71439; GFX7-NEXT: v_cvt_f16_f32_e32 v10, v101440; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v31441; GFX7-NEXT: v_cvt_f16_f32_e32 v6, v61442; GFX7-NEXT: v_cvt_f16_f32_e32 v9, v91443; GFX7-NEXT: v_cvt_f16_f32_e32 v5, v51444; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v21445; GFX7-NEXT: v_cvt_f16_f32_e32 v8, v81446; GFX7-NEXT: v_cvt_f16_f32_e32 v4, v41447; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v01448; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v11449; GFX7-NEXT: v_cvt_f32_f16_e32 v11, v111450; GFX7-NEXT: v_cvt_f32_f16_e32 v7, v71451; GFX7-NEXT: v_cvt_f32_f16_e32 v10, v101452; GFX7-NEXT: v_cvt_f32_f16_e32 v6, v61453; GFX7-NEXT: v_cvt_f32_f16_e32 v9, v91454; GFX7-NEXT: v_cvt_f32_f16_e32 v5, v51455; GFX7-NEXT: v_cvt_f32_f16_e32 v8, v81456; GFX7-NEXT: v_cvt_f32_f16_e32 v4, v41457; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v01458; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v11459; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v21460; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v31461; GFX7-NEXT: v_min3_f32 v0, v0, v4, v81462; GFX7-NEXT: v_min3_f32 v1, v1, v5, v91463; GFX7-NEXT: v_min3_f32 v2, v2, v6, v101464; GFX7-NEXT: v_min3_f32 v3, v3, v7, v111465; GFX7-NEXT: s_setpc_b64 s[30:31]1466;1467; GFX8-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1468; GFX8: ; %bb.0:1469; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1470; GFX8-NEXT: v_max_f16_sdwa v6, v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11471; GFX8-NEXT: v_max_f16_sdwa v7, v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11472; GFX8-NEXT: v_max_f16_e32 v2, v2, v21473; GFX8-NEXT: v_max_f16_e32 v0, v0, v01474; GFX8-NEXT: v_min_f16_e32 v6, v7, v61475; GFX8-NEXT: v_max_f16_sdwa v7, v3, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11476; GFX8-NEXT: v_max_f16_sdwa v8, v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11477; GFX8-NEXT: v_min_f16_e32 v0, v0, v21478; GFX8-NEXT: v_max_f16_e32 v2, v3, v31479; GFX8-NEXT: v_max_f16_e32 v1, v1, v11480; GFX8-NEXT: v_min_f16_e32 v7, v8, v71481; GFX8-NEXT: v_min_f16_e32 v1, v1, v21482; GFX8-NEXT: v_max_f16_sdwa v2, v5, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11483; GFX8-NEXT: v_max_f16_sdwa v3, v4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11484; GFX8-NEXT: v_max_f16_e32 v5, v5, v51485; GFX8-NEXT: v_max_f16_e32 v4, v4, v41486; GFX8-NEXT: v_min_f16_sdwa v2, v7, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1487; GFX8-NEXT: v_min_f16_sdwa v3, v6, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD1488; GFX8-NEXT: v_min_f16_e32 v1, v1, v51489; GFX8-NEXT: v_min_f16_e32 v0, v0, v41490; GFX8-NEXT: v_or_b32_e32 v0, v0, v31491; GFX8-NEXT: v_or_b32_e32 v1, v1, v21492; GFX8-NEXT: s_setpc_b64 s[30:31]1493;1494; GFX900-SDAG-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1495; GFX900-SDAG: ; %bb.0:1496; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1497; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v2, v21498; GFX900-SDAG-NEXT: v_pk_max_f16 v0, v0, v01499; GFX900-SDAG-NEXT: v_pk_max_f16 v3, v3, v31500; GFX900-SDAG-NEXT: v_pk_max_f16 v1, v1, v11501; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v21502; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v4, v41503; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v31504; GFX900-SDAG-NEXT: v_pk_min_f16 v0, v0, v21505; GFX900-SDAG-NEXT: v_pk_max_f16 v2, v5, v51506; GFX900-SDAG-NEXT: v_pk_min_f16 v1, v1, v21507; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1508;1509; GFX950-SDAG-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1510; GFX950-SDAG: ; %bb.0:1511; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1512; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v2, v21513; GFX950-SDAG-NEXT: v_pk_max_f16 v0, v0, v01514; GFX950-SDAG-NEXT: v_pk_max_f16 v3, v3, v31515; GFX950-SDAG-NEXT: v_pk_max_f16 v1, v1, v11516; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v21517; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v4, v41518; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v31519; GFX950-SDAG-NEXT: v_pk_min_f16 v0, v0, v21520; GFX950-SDAG-NEXT: v_pk_max_f16 v2, v5, v51521; GFX950-SDAG-NEXT: s_nop 01522; GFX950-SDAG-NEXT: v_pk_min_f16 v1, v1, v21523; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1524;1525; GFX10-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1526; GFX10: ; %bb.0:1527; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1528; GFX10-NEXT: v_pk_max_f16 v2, v2, v21529; GFX10-NEXT: v_pk_max_f16 v0, v0, v01530; GFX10-NEXT: v_pk_max_f16 v3, v3, v31531; GFX10-NEXT: v_pk_max_f16 v1, v1, v11532; GFX10-NEXT: v_pk_min_f16 v0, v0, v21533; GFX10-NEXT: v_pk_max_f16 v2, v4, v41534; GFX10-NEXT: v_pk_max_f16 v4, v5, v51535; GFX10-NEXT: v_pk_min_f16 v1, v1, v31536; GFX10-NEXT: v_pk_min_f16 v0, v0, v21537; GFX10-NEXT: v_pk_min_f16 v1, v1, v41538; GFX10-NEXT: s_setpc_b64 s[30:31]1539;1540; GFX11-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1541; GFX11: ; %bb.0:1542; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1543; GFX11-NEXT: v_pk_max_f16 v2, v2, v21544; GFX11-NEXT: v_pk_max_f16 v0, v0, v01545; GFX11-NEXT: v_pk_max_f16 v3, v3, v31546; GFX11-NEXT: v_pk_max_f16 v1, v1, v11547; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1548; GFX11-NEXT: v_pk_min_f16 v0, v0, v21549; GFX11-NEXT: v_pk_max_f16 v2, v4, v41550; GFX11-NEXT: v_pk_max_f16 v4, v5, v51551; GFX11-NEXT: v_pk_min_f16 v1, v1, v31552; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1553; GFX11-NEXT: v_pk_min_f16 v0, v0, v21554; GFX11-NEXT: v_pk_min_f16 v1, v1, v41555; GFX11-NEXT: s_setpc_b64 s[30:31]1556;1557; GFX12-LABEL: v_min3_v4f16_minimumnum_minimumnum__v_v_v_0:1558; GFX12: ; %bb.0:1559; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01560; GFX12-NEXT: s_wait_expcnt 0x01561; GFX12-NEXT: s_wait_samplecnt 0x01562; GFX12-NEXT: s_wait_bvhcnt 0x01563; GFX12-NEXT: s_wait_kmcnt 0x01564; GFX12-NEXT: v_pk_max_num_f16 v2, v2, v21565; GFX12-NEXT: v_pk_max_num_f16 v0, v0, v01566; GFX12-NEXT: v_pk_max_num_f16 v3, v3, v31567; GFX12-NEXT: v_pk_max_num_f16 v1, v1, v11568; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)1569; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v21570; GFX12-NEXT: v_pk_max_num_f16 v2, v4, v41571; GFX12-NEXT: v_pk_max_num_f16 v4, v5, v51572; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v31573; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1574; GFX12-NEXT: v_pk_min_num_f16 v0, v0, v21575; GFX12-NEXT: v_pk_min_num_f16 v1, v1, v41576; GFX12-NEXT: s_setpc_b64 s[30:31]1577 %tmp0 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %a, <4 x half> %b)1578 %min3 = call <4 x half> @llvm.minimumnum.v4f16(<4 x half> %tmp0, <4 x half> %c)1579 ret <4 x half> %min31580}1581 1582define double @v_min3_f64_minimumnum_minimumnum__v_v_v_0(double %a, double %b, double %c) {1583; GFX6-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1584; GFX6: ; %bb.0:1585; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1586; GFX6-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1587; GFX6-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1588; GFX6-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1589; GFX6-NEXT: v_max_f64 v[2:3], v[4:5], v[4:5]1590; GFX6-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1591; GFX6-NEXT: s_setpc_b64 s[30:31]1592;1593; GFX7-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1594; GFX7: ; %bb.0:1595; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1596; GFX7-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1597; GFX7-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1598; GFX7-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1599; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1600; GFX7-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]1601; GFX7-NEXT: s_setpc_b64 s[30:31]1602;1603; GFX8-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1604; GFX8: ; %bb.0:1605; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1606; GFX8-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1607; GFX8-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1608; GFX8-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1609; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1610; GFX8-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]1611; GFX8-NEXT: s_setpc_b64 s[30:31]1612;1613; GFX900-SDAG-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1614; GFX900-SDAG: ; %bb.0:1615; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1616; GFX900-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1617; GFX900-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1618; GFX900-SDAG-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1619; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1620; GFX900-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]1621; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1622;1623; GFX950-SDAG-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1624; GFX950-SDAG: ; %bb.0:1625; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1626; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1627; GFX950-SDAG-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1628; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1629; GFX950-SDAG-NEXT: v_max_f64 v[2:3], v[4:5], v[4:5]1630; GFX950-SDAG-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1631; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1632;1633; GFX10-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1634; GFX10: ; %bb.0:1635; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1636; GFX10-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1637; GFX10-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1638; GFX10-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1639; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1640; GFX10-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]1641; GFX10-NEXT: s_setpc_b64 s[30:31]1642;1643; GFX11-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1644; GFX11: ; %bb.0:1645; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1646; GFX11-NEXT: v_max_f64 v[2:3], v[2:3], v[2:3]1647; GFX11-NEXT: v_max_f64 v[0:1], v[0:1], v[0:1]1648; GFX11-NEXT: v_max_f64 v[4:5], v[4:5], v[4:5]1649; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1650; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[2:3]1651; GFX11-NEXT: v_min_f64 v[0:1], v[0:1], v[4:5]1652; GFX11-NEXT: s_setpc_b64 s[30:31]1653;1654; GFX12-LABEL: v_min3_f64_minimumnum_minimumnum__v_v_v_0:1655; GFX12: ; %bb.0:1656; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01657; GFX12-NEXT: s_wait_expcnt 0x01658; GFX12-NEXT: s_wait_samplecnt 0x01659; GFX12-NEXT: s_wait_bvhcnt 0x01660; GFX12-NEXT: s_wait_kmcnt 0x01661; GFX12-NEXT: v_max_num_f64_e32 v[2:3], v[2:3], v[2:3]1662; GFX12-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[0:1]1663; GFX12-NEXT: v_max_num_f64_e32 v[4:5], v[4:5], v[4:5]1664; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1665; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3]1666; GFX12-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[4:5]1667; GFX12-NEXT: s_setpc_b64 s[30:31]1668 %tmp0 = call double @llvm.minimumnum.f64(double %a, double %b)1669 %min3 = call double @llvm.minimumnum.f64(double %tmp0, double %c)1670 ret double %min31671}1672 1673define bfloat @v_min3_bf16_minimumnum_minimumnum__v_v_v_0(bfloat %a, bfloat %b, bfloat %c) {1674; GFX6-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1675; GFX6: ; %bb.0:1676; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1677; GFX6-NEXT: v_mul_f32_e32 v0, 1.0, v01678; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v11679; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v11680; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v01681; GFX6-NEXT: v_mul_f32_e32 v2, 1.0, v21682; GFX6-NEXT: v_min_f32_e32 v0, v0, v11683; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v01684; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v21685; GFX6-NEXT: v_min_f32_e32 v0, v0, v11686; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v01687; GFX6-NEXT: s_setpc_b64 s[30:31]1688;1689; GFX7-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1690; GFX7: ; %bb.0:1691; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1692; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v01693; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v11694; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v11695; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01696; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v21697; GFX7-NEXT: v_min_f32_e32 v0, v0, v11698; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01699; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v21700; GFX7-NEXT: v_min_f32_e32 v0, v0, v11701; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v01702; GFX7-NEXT: s_setpc_b64 s[30:31]1703;1704; GFX8-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1705; GFX8: ; %bb.0:1706; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1707; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v01708; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v31709; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v11710; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1711; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v31712; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1713; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v11714; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v01715; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v4, v31716; GFX8-NEXT: s_movk_i32 s4, 0x80001717; GFX8-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc1718; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v01719; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1720; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v11721; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1722; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v31723; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v11724; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1725; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v01726; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v1, v11727; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v21728; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1729; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v31730; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc1731; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v01732; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v21733; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v1, v31734; GFX8-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc1735; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v01736; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1737; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v21738; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1739; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v11740; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v21741; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1742; GFX8-NEXT: s_setpc_b64 s[30:31]1743;1744; GFX900-SDAG-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1745; GFX900-SDAG: ; %bb.0:1746; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1747; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01748; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31749; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11750; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1751; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v41752; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1753; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01754; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11755; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v3, v41756; GFX900-SDAG-NEXT: s_movk_i32 s4, 0x80001757; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc1758; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v01759; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1760; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v11761; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1762; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v31763; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v11764; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1765; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01766; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v11767; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21768; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1769; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31770; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc1771; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01772; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21773; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v1, v31774; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc1775; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v01776; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1777; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v21778; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1779; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v11780; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v21781; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1782; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]1783;1784; GFX950-SDAG-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1785; GFX950-SDAG: ; %bb.0:1786; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1787; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01788; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31789; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11790; GFX950-SDAG-NEXT: s_movk_i32 s0, 0x80001791; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1792; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v41793; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v01794; GFX950-SDAG-NEXT: s_nop 01795; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1796; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v11797; GFX950-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v3, v41798; GFX950-SDAG-NEXT: s_nop 11799; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc1800; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v01801; GFX950-SDAG-NEXT: s_nop 11802; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1803; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v11804; GFX950-SDAG-NEXT: s_nop 11805; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1806; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v31807; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v11808; GFX950-SDAG-NEXT: s_nop 11809; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc1810; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01811; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v11812; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21813; GFX950-SDAG-NEXT: s_nop 01814; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1815; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v31816; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v01817; GFX950-SDAG-NEXT: s_nop 01818; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc1819; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v21820; GFX950-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v1, v31821; GFX950-SDAG-NEXT: s_nop 11822; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc1823; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v01824; GFX950-SDAG-NEXT: s_nop 11825; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1826; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v21827; GFX950-SDAG-NEXT: s_nop 11828; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1829; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v11830; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v21831; GFX950-SDAG-NEXT: s_nop 11832; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1833; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]1834;1835; GFX10-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1836; GFX10: ; %bb.0:1837; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1838; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v01839; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v11840; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31841; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1842; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v41843; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v01844; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo1845; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v11846; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v41847; GFX10-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc_lo1848; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v01849; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v31850; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo1851; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v11852; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1853; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v41854; GFX10-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo1855; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v21856; GFX10-NEXT: v_lshlrev_b32_e32 v1, 16, v01857; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11858; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1859; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31860; GFX10-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc_lo1861; GFX10-NEXT: v_lshlrev_b32_e32 v2, 16, v01862; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v11863; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v31864; GFX10-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc_lo1865; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v01866; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v21867; GFX10-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1868; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v11869; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1870; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31871; GFX10-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1872; GFX10-NEXT: s_setpc_b64 s[30:31]1873;1874; GFX11-SDAG-TRUE16-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1875; GFX11-SDAG-TRUE16: ; %bb.0:1876; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1877; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 01878; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1879; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l1880; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)1881; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31882; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l1883; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l1884; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v0.h, vcc_lo1885; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1886; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31887; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.h1888; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.h, v1.h, vcc_lo1889; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1890; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v1, v31891; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.h, v1.h, vcc_lo1892; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v3.h1893; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v1.h, s01894; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l1895; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)1896; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, vcc_lo1897; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1898; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v1, v11899; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1900; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31901; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.l, v0.h, vcc_lo1902; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l1903; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1904; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31905; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v3.h, v0.l, vcc_lo1906; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)1907; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v3.h, s01908; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.h1909; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v11910; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v3.h, vcc_lo1911; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.h1912; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1913; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v3.h, s01914; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1915; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v1.h, vcc_lo1916; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1917; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31918; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo1919; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]1920;1921; GFX11-SDAG-FAKE16-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1922; GFX11-SDAG-FAKE16: ; %bb.0:1923; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1924; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v01925; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)1926; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31927; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1928; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11929; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v41930; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1931; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo1932; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v01933; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v11934; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1935; GFX11-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v41936; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc_lo1937; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v01938; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v31939; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo1940; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v11941; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1942; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1943; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v41944; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1945; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v3, v0 :: v_dual_lshlrev_b32 v3, 16, v21946; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v01947; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)1948; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v11949; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo1950; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31951; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)1952; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc_lo1953; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v01954; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v11955; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)1956; GFX11-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v31957; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc_lo1958; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v01959; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v21960; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v11961; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)1962; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo1963; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v31964; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1965; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1966; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]1967;1968; GFX12-SDAG-TRUE16-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:1969; GFX12-SDAG-TRUE16: ; %bb.0:1970; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01971; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x01972; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x01973; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x01974; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x01975; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 01976; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l1977; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l1978; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)1979; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31980; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v1.l1981; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v3.l1982; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1983; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v0.h, vcc_lo1984; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v31985; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1986; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v1.h1987; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1988; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.h, v1.h, vcc_lo1989; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v1, v31990; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1991; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.h, v1.h, vcc_lo1992; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v3.h1993; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)1994; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)1995; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v1.h, s01996; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.h, v2.l1997; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)1998; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, vcc_lo1999; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l2000; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2001; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v1, v12002; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v32003; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2004; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v0.l, v0.h, vcc_lo2005; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l2006; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2007; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32008; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2009; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v3.h, v0.l, vcc_lo2010; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2011; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2012; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v0.l, v3.h, s02013; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.h2014; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v12015; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2016; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v3.h, vcc_lo2017; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v1.h2018; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2019; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2020; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.l, v3.h, s02021; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.h, v0.l2022; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2023; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v1.h, vcc_lo2024; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2025; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v32026; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2027; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v0.h, vcc_lo2028; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2029;2030; GFX12-SDAG-FAKE16-LABEL: v_min3_bf16_minimumnum_minimumnum__v_v_v_0:2031; GFX12-SDAG-FAKE16: ; %bb.0:2032; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x02033; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x02034; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x02035; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x02036; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x02037; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v02038; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)2039; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32040; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2041; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2042; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v12043; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42044; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2045; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2046; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2047; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v02048; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v12049; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)2050; GFX12-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v42051; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2052; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v1, v0, vcc_lo2053; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02054; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v32055; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2056; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc_lo2057; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12058; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2059; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2060; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2061; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v42062; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2063; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v3, v0 :: v_dual_lshlrev_b32 v3, 16, v22064; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2065; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 16, v02066; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v12067; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2068; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2069; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32070; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2071; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2072; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v0, vcc_lo2073; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v02074; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v12075; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)2076; GFX12-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v2, v32077; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2078; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v2, v1, v0, vcc_lo2079; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02080; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2081; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v22082; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12083; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2084; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)2085; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2086; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v32087; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2088; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2089; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo2090; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2091 %tmp0 = call bfloat @llvm.minimumnum.bf16(bfloat %a, bfloat %b)2092 %min3 = call bfloat @llvm.minimumnum.bf16(bfloat %tmp0, bfloat %c)2093 ret bfloat %min32094}2095 2096define <2 x bfloat> @v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0(<2 x bfloat> %a, <2 x bfloat> %b, <2 x bfloat> %c) {2097; GFX6-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2098; GFX6: ; %bb.0:2099; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2100; GFX6-NEXT: v_mul_f32_e32 v0, 1.0, v02101; GFX6-NEXT: v_mul_f32_e32 v2, 1.0, v22102; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v12103; GFX6-NEXT: v_mul_f32_e32 v3, 1.0, v32104; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v22105; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v02106; GFX6-NEXT: v_min_f32_e32 v0, v0, v22107; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v32108; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v12109; GFX6-NEXT: v_mul_f32_e32 v5, 1.0, v52110; GFX6-NEXT: v_min_f32_e32 v1, v1, v22111; GFX6-NEXT: v_mul_f32_e32 v4, 1.0, v42112; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v12113; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v52114; GFX6-NEXT: v_min_f32_e32 v1, v1, v22115; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v02116; GFX6-NEXT: v_and_b32_e32 v2, 0xffff0000, v42117; GFX6-NEXT: v_min_f32_e32 v0, v0, v22118; GFX6-NEXT: v_and_b32_e32 v0, 0xffff0000, v02119; GFX6-NEXT: v_and_b32_e32 v1, 0xffff0000, v12120; GFX6-NEXT: s_setpc_b64 s[30:31]2121;2122; GFX7-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2123; GFX7: ; %bb.0:2124; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2125; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v02126; GFX7-NEXT: v_mul_f32_e32 v2, 1.0, v22127; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v12128; GFX7-NEXT: v_mul_f32_e32 v3, 1.0, v32129; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v22130; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02131; GFX7-NEXT: v_min_f32_e32 v0, v0, v22132; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v32133; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12134; GFX7-NEXT: v_mul_f32_e32 v5, 1.0, v52135; GFX7-NEXT: v_min_f32_e32 v1, v1, v22136; GFX7-NEXT: v_mul_f32_e32 v4, 1.0, v42137; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12138; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v52139; GFX7-NEXT: v_min_f32_e32 v1, v1, v22140; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02141; GFX7-NEXT: v_and_b32_e32 v2, 0xffff0000, v42142; GFX7-NEXT: v_min_f32_e32 v0, v0, v22143; GFX7-NEXT: v_and_b32_e32 v0, 0xffff0000, v02144; GFX7-NEXT: v_and_b32_e32 v1, 0xffff0000, v12145; GFX7-NEXT: s_setpc_b64 s[30:31]2146;2147; GFX8-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2148; GFX8: ; %bb.0:2149; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2150; GFX8-NEXT: v_and_b32_e32 v3, 0xffff0000, v02151; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v32152; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v12153; GFX8-NEXT: v_and_b32_e32 v6, 0xffff0000, v12154; GFX8-NEXT: v_cndmask_b32_sdwa v4, v0, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2155; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v6, v62156; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2157; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v42158; GFX8-NEXT: v_lshlrev_b32_e32 v6, 16, v32159; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v5, v62160; GFX8-NEXT: s_movk_i32 s4, 0x80002161; GFX8-NEXT: v_cndmask_b32_e32 v5, v3, v4, vcc2162; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v42163; GFX8-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc2164; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v32165; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc2166; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v52167; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42168; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v02169; GFX8-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc2170; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v4, v42171; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v12172; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2173; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v4, v42174; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2175; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v12176; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v02177; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v5, v42178; GFX8-NEXT: v_cndmask_b32_e32 v4, v1, v0, vcc2179; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v02180; GFX8-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2181; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v12182; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2183; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v42184; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v12185; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v32186; GFX8-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2187; GFX8-NEXT: v_lshrrev_b32_e32 v4, 16, v22188; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v1, v12189; GFX8-NEXT: v_and_b32_e32 v5, 0xffff0000, v22190; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2191; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v5, v52192; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc2193; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v12194; GFX8-NEXT: v_lshlrev_b32_e32 v5, 16, v42195; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v3, v52196; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2197; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v12198; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2199; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v42200; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2201; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v32202; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42203; GFX8-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2204; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v02205; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v3, v32206; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v22207; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2208; GFX8-NEXT: v_cmp_u_f32_e32 vcc, v4, v42209; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc2210; GFX8-NEXT: v_lshlrev_b32_e32 v3, 16, v02211; GFX8-NEXT: v_lshlrev_b32_e32 v4, 16, v22212; GFX8-NEXT: v_cmp_lt_f32_e32 vcc, v3, v42213; GFX8-NEXT: v_cndmask_b32_e32 v3, v2, v0, vcc2214; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v02215; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2216; GFX8-NEXT: v_cmp_eq_u16_e32 vcc, s4, v22217; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2218; GFX8-NEXT: v_lshlrev_b32_e32 v2, 16, v32219; GFX8-NEXT: v_cmp_eq_f32_e32 vcc, 0, v22220; GFX8-NEXT: v_lshlrev_b32_e32 v1, 16, v12221; GFX8-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2222; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2223; GFX8-NEXT: s_setpc_b64 s[30:31]2224;2225; GFX900-SDAG-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2226; GFX900-SDAG: ; %bb.0:2227; GFX900-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2228; GFX900-SDAG-NEXT: v_and_b32_e32 v3, 0xffff0000, v02229; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32230; GFX900-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v12231; GFX900-SDAG-NEXT: v_and_b32_e32 v6, 0xffff0000, v12232; GFX900-SDAG-NEXT: v_cndmask_b32_sdwa v4, v0, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2233; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v6, v62234; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2235; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42236; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v6, 16, v32237; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v5, v62238; GFX900-SDAG-NEXT: s_movk_i32 s4, 0x80002239; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v5, v3, v4, vcc2240; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v42241; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc2242; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v32243; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc2244; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v52245; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42246; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v02247; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc2248; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42249; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12250; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2251; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42252; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2253; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12254; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v02255; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v5, v42256; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, v1, v0, vcc2257; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v02258; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2259; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v12260; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2261; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v42262; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v12263; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v32264; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2265; GFX900-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v22266; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v12267; GFX900-SDAG-NEXT: v_and_b32_e32 v5, 0xffff0000, v22268; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2269; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v5, v52270; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc2271; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v12272; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42273; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v3, v52274; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2275; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v12276; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2277; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v42278; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2279; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v32280; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42281; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2282; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02283; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32284; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22285; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2286; GFX900-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42287; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc2288; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02289; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22290; GFX900-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v3, v42291; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v3, v2, v0, vcc2292; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v02293; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2294; GFX900-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s4, v22295; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2296; GFX900-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v32297; GFX900-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v22298; GFX900-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2299; GFX900-SDAG-NEXT: s_mov_b32 s4, 0x50401002300; GFX900-SDAG-NEXT: v_perm_b32 v0, v1, v0, s42301; GFX900-SDAG-NEXT: s_setpc_b64 s[30:31]2302;2303; GFX950-SDAG-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2304; GFX950-SDAG: ; %bb.0:2305; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2306; GFX950-SDAG-NEXT: v_and_b32_e32 v3, 0xffff0000, v02307; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32308; GFX950-SDAG-NEXT: v_lshrrev_b32_e32 v3, 16, v12309; GFX950-SDAG-NEXT: v_and_b32_e32 v6, 0xffff0000, v12310; GFX950-SDAG-NEXT: v_cndmask_b32_sdwa v4, v0, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2311; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v6, v62312; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42313; GFX950-SDAG-NEXT: s_movk_i32 s0, 0x80002314; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2315; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v6, 16, v32316; GFX950-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v5, v62317; GFX950-SDAG-NEXT: s_nop 12318; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v5, v3, v4, vcc2319; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v42320; GFX950-SDAG-NEXT: s_nop 12321; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v4, v5, v4, vcc2322; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v32323; GFX950-SDAG-NEXT: s_nop 12324; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v3, vcc2325; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v52326; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42327; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v02328; GFX950-SDAG-NEXT: s_nop 02329; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc2330; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42331; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12332; GFX950-SDAG-NEXT: s_nop 02333; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2334; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42335; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v02336; GFX950-SDAG-NEXT: s_nop 02337; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2338; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v12339; GFX950-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v5, v42340; GFX950-SDAG-NEXT: v_and_b32_e32 v5, 0xffff0000, v22341; GFX950-SDAG-NEXT: s_nop 02342; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v4, v1, v0, vcc2343; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v02344; GFX950-SDAG-NEXT: s_nop 12345; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2346; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v12347; GFX950-SDAG-NEXT: s_nop 12348; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc2349; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v42350; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v12351; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v1, 16, v32352; GFX950-SDAG-NEXT: s_nop 02353; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc2354; GFX950-SDAG-NEXT: v_lshrrev_b32_e32 v4, 16, v22355; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v1, v12356; GFX950-SDAG-NEXT: s_nop 12357; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc2358; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v5, v52359; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v12360; GFX950-SDAG-NEXT: s_nop 02361; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc2362; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v5, 16, v42363; GFX950-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v3, v52364; GFX950-SDAG-NEXT: s_nop 12365; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2366; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v12367; GFX950-SDAG-NEXT: s_nop 12368; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2369; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v42370; GFX950-SDAG-NEXT: s_nop 12371; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc2372; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v32373; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v42374; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22375; GFX950-SDAG-NEXT: s_nop 02376; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc2377; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02378; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v3, v32379; GFX950-SDAG-NEXT: s_nop 12380; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2381; GFX950-SDAG-NEXT: v_cmp_u_f32_e32 vcc, v4, v42382; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v3, 16, v02383; GFX950-SDAG-NEXT: s_nop 02384; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc2385; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v4, 16, v22386; GFX950-SDAG-NEXT: v_cmp_lt_f32_e32 vcc, v3, v42387; GFX950-SDAG-NEXT: s_nop 12388; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v3, v2, v0, vcc2389; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v02390; GFX950-SDAG-NEXT: s_nop 12391; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2392; GFX950-SDAG-NEXT: v_cmp_eq_u16_e32 vcc, s0, v22393; GFX950-SDAG-NEXT: s_mov_b32 s0, 0x50401002394; GFX950-SDAG-NEXT: s_nop 02395; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc2396; GFX950-SDAG-NEXT: v_lshlrev_b32_e32 v2, 16, v32397; GFX950-SDAG-NEXT: v_cmp_eq_f32_e32 vcc, 0, v22398; GFX950-SDAG-NEXT: s_nop 12399; GFX950-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v0, vcc2400; GFX950-SDAG-NEXT: v_perm_b32 v0, v1, v0, s02401; GFX950-SDAG-NEXT: s_setpc_b64 s[30:31]2402;2403; GFX10-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2404; GFX10: ; %bb.0:2405; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2406; GFX10-NEXT: v_and_b32_e32 v3, 0xffff0000, v02407; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v02408; GFX10-NEXT: v_and_b32_e32 v4, 0xffff0000, v12409; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v12410; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32411; GFX10-NEXT: v_lshrrev_b32_e32 v3, 16, v12412; GFX10-NEXT: v_cndmask_b32_sdwa v7, v0, v3, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2413; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52414; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2415; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42416; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v72417; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc_lo2418; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62419; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v02420; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v32421; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2422; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v52423; GFX10-NEXT: v_lshlrev_b32_e32 v8, 16, v12424; GFX10-NEXT: v_cndmask_b32_e32 v4, v3, v7, vcc_lo2425; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v82426; GFX10-NEXT: v_lshlrev_b32_e32 v8, 16, v42427; GFX10-NEXT: v_cndmask_b32_e32 v5, v1, v0, vcc_lo2428; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v72429; GFX10-NEXT: v_cndmask_b32_e32 v6, v4, v7, vcc_lo2430; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02431; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v52432; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2433; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v32434; GFX10-NEXT: v_cndmask_b32_e32 v3, v6, v3, vcc_lo2435; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12436; GFX10-NEXT: v_and_b32_e32 v6, 0xffff0000, v22437; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2438; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v82439; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc_lo2440; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72441; GFX10-NEXT: v_lshrrev_b32_e32 v4, 16, v22442; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v22443; GFX10-NEXT: v_lshlrev_b32_e32 v3, 16, v12444; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2445; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32446; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v02447; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2448; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52449; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2450; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62451; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v02452; GFX10-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc_lo2453; GFX10-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72454; GFX10-NEXT: v_lshlrev_b32_e32 v4, 16, v12455; GFX10-NEXT: v_lshlrev_b32_e32 v5, 16, v32456; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc_lo2457; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, v4, v52458; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v22459; GFX10-NEXT: v_cndmask_b32_e32 v4, v3, v1, vcc_lo2460; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v72461; GFX10-NEXT: v_lshlrev_b32_e32 v7, 16, v42462; GFX10-NEXT: v_cndmask_b32_e32 v5, v2, v0, vcc_lo2463; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12464; GFX10-NEXT: v_lshlrev_b32_e32 v6, 16, v52465; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo2466; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02467; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2468; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v32469; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc_lo2470; GFX10-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v22471; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2472; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72473; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc_lo2474; GFX10-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v62475; GFX10-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2476; GFX10-NEXT: v_perm_b32 v0, v1, v0, 0x50401002477; GFX10-NEXT: s_setpc_b64 s[30:31]2478;2479; GFX11-SDAG-TRUE16-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2480; GFX11-SDAG-TRUE16: ; %bb.0:2481; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2482; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02483; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12484; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, 02485; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v12486; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2487; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32488; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v42489; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)2490; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2491; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v02492; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v62493; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.h, v1.h, vcc_lo2494; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v1.h, v5.h, s02495; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v5.h2496; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)2497; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v32498; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, vcc_lo2499; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42500; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.l2501; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s02502; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2503; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.h, v0.l, v1.l, vcc_lo2504; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2505; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52506; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v1.l, v4.h, s12507; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v4.h2508; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2509; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v4, v52510; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v5.h2511; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v5.h, v4.h, s02512; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.h2513; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2514; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v4.h, s12515; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02516; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v22517; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)2518; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.h, s22519; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2520; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.h, vcc_lo2521; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)2522; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v4, v42523; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52524; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2525; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2526; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo2527; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52528; GFX11-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v22529; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2530; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v3.l, v2.h, s02531; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2532; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.h, v5.h, s12533; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.h2534; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2535; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v32536; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, s02537; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)2538; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s12539; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2540; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v1, v12541; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.l2542; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52543; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2544; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2545; GFX11-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52546; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.l, v2.l, s02547; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2548; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v2.l, v5.h, s12549; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.h2550; GFX11-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v12551; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v1.h2552; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2553; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v5.h, s02554; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.h2555; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v5.h, s12556; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2557; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2558; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02559; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v1.h, s22560; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2561; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52562; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v0.h, vcc_lo2563; GFX11-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2564; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s02565; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2566;2567; GFX11-SDAG-FAKE16-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2568; GFX11-SDAG-FAKE16: ; %bb.0:2569; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2570; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02571; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v12572; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v02573; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2574; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32575; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc_lo2576; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v02577; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v12578; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)2579; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62580; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2581; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12582; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72583; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v3, vcc_lo2584; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)2585; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52586; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2587; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v02588; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v12589; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v32590; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v42591; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)2592; GFX11-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v62593; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc_lo2594; GFX11-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v7, v82595; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v6, v1, v0, vcc_lo2596; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v32597; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc_lo2598; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02599; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2600; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc_lo2601; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v42602; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v4 :: v_dual_lshlrev_b32 v4, 16, v62603; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12604; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)2605; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2606; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52607; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72608; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo2609; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v42610; GFX11-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v22611; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2612; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v6, v0 :: v_dual_lshlrev_b32 v3, 16, v12613; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v22614; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32615; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2616; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2617; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v02618; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)2619; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52620; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2621; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v22622; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62623; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo2624; GFX11-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32625; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2626; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v42627; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v12628; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v22629; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2630; GFX11-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v52631; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v4, v1 :: v_dual_lshlrev_b32 v6, 16, v02632; GFX11-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v72633; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2634; GFX11-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v5, v2, v0 :: v_dual_lshlrev_b32 v6, 16, v32635; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12636; GFX11-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52637; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2638; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02639; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2640; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v42641; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2642; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2643; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v22644; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2645; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v62646; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)2647; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2648; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72649; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2650; GFX11-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2651; GFX11-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x50401002652; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2653;2654; GFX12-SDAG-TRUE16-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2655; GFX12-SDAG-TRUE16: ; %bb.0:2656; GFX12-SDAG-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x02657; GFX12-SDAG-TRUE16-NEXT: s_wait_expcnt 0x02658; GFX12-SDAG-TRUE16-NEXT: s_wait_samplecnt 0x02659; GFX12-SDAG-TRUE16-NEXT: s_wait_bvhcnt 0x02660; GFX12-SDAG-TRUE16-NEXT: s_wait_kmcnt 0x02661; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02662; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v12663; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.l, 02664; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 16, v12665; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2666; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32667; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v4, v42668; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)2669; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2670; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 16, v02671; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v6, v62672; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2673; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.h, v1.h, vcc_lo2674; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2675; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2676; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v1.h, v5.h, s02677; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v5.h2678; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v32679; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2680; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, vcc_lo2681; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v42682; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, v5.l2683; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2684; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)2685; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s02686; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2687; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2688; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v4.h, v0.l, v1.l, vcc_lo2689; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52690; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2691; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v1.l, v4.h, s12692; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v4.h2693; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v4, v52694; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v5.h2695; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2696; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2697; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v5.h, v4.h, s02698; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.h2699; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v4.h, s12700; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2701; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)2702; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02703; GFX12-SDAG-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff0000, v22704; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v5.h, s22705; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2706; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2707; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.l, v0.h, vcc_lo2708; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v4, v42709; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2710; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52711; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2712; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2713; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, vcc_lo2714; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2715; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52716; GFX12-SDAG-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v22717; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2718; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v3.l, v2.h, s02719; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, v5.l2720; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)2721; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.h, v2.h, v5.h, s12722; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.h2723; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v32724; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2725; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2726; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v3.l, v3.h, v5.h, s02727; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v5.h, s12728; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v3.l2729; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s1, v1, v12730; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v5.l2731; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)2732; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v52733; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2734; GFX12-SDAG-TRUE16-NEXT: v_cmp_u_f32_e64 s0, v5, v52735; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2736; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2737; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v5.h, v0.l, v2.l, s02738; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.h, v2.l, v5.h, s12739; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s1, 0x8000, v5.h2740; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2741; GFX12-SDAG-TRUE16-NEXT: v_cmp_lt_f32_e64 s0, v5, v12742; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s2, 0x8000, v1.h2743; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2744; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.h, v5.h, s02745; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_u16_e64 s0, 0x8000, v3.h2746; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2747; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v0.l, v5.h, s12748; GFX12-SDAG-TRUE16-NEXT: v_mov_b16_e32 v5.h, v0.l2749; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2750; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v0.h, v3.h, s02751; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2752; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v1.l, v1.l, v1.h, s22753; GFX12-SDAG-TRUE16-NEXT: v_cmp_eq_f32_e64 s0, 0, v52754; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_vcc(0)2755; GFX12-SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2756; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, v0.h, vcc_lo2757; GFX12-SDAG-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)2758; GFX12-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v0.l, v1.l, s02759; GFX12-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2760;2761; GFX12-SDAG-FAKE16-LABEL: v_min3_v2bf16_minimumnum_minimumnum__v_v_v_0:2762; GFX12-SDAG-FAKE16: ; %bb.0:2763; GFX12-SDAG-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x02764; GFX12-SDAG-FAKE16-NEXT: s_wait_expcnt 0x02765; GFX12-SDAG-FAKE16-NEXT: s_wait_samplecnt 0x02766; GFX12-SDAG-FAKE16-NEXT: s_wait_bvhcnt 0x02767; GFX12-SDAG-FAKE16-NEXT: s_wait_kmcnt 0x02768; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff0000, v02769; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v12770; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v02771; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2772; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32773; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2774; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc_lo2775; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v02776; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v7, 0xffff0000, v12777; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2778; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62779; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2780; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2781; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v12782; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v72783; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2784; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v3, vcc_lo2785; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)2786; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52787; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2788; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc_lo2789; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v02790; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v12791; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v32792; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v6, 16, v42793; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2794; GFX12-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v5, v62795; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2796; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc_lo2797; GFX12-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v7, v82798; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2799; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v6, v1, v0, vcc_lo2800; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v32801; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2802; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc_lo2803; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02804; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2805; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v6, v0, vcc_lo2806; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v42807; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2808; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v3, v4 :: v_dual_lshlrev_b32 v4, 16, v62809; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12810; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2811; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc_lo2812; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52813; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2814; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72815; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2816; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo2817; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v42818; GFX12-SDAG-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v22819; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2820; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)2821; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v0, v6, v0 :: v_dual_lshlrev_b32 v3, 16, v12822; GFX12-SDAG-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff0000, v22823; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32824; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2825; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2826; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v02827; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2828; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v52829; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2830; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2831; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v22832; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v62833; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2834; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo2835; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2836; GFX12-SDAG-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v32837; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v42838; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2839; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v2, v2, v0 :: v_dual_lshlrev_b32 v3, 16, v12840; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)2841; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v22842; GFX12-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v3, v52843; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2844; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v3, v4, v1 :: v_dual_lshlrev_b32 v6, 16, v02845; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)2846; GFX12-SDAG-FAKE16-NEXT: v_cmp_lt_f32_e32 vcc_lo, v6, v72847; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2848; GFX12-SDAG-FAKE16-NEXT: v_dual_cndmask_b32 v5, v2, v0 :: v_dual_lshlrev_b32 v6, 16, v32849; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v12850; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2851; GFX12-SDAG-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v52852; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2853; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2854; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v02855; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2856; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2857; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v42858; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2859; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo2860; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_u16_e32 vcc_lo, 0x8000, v22861; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2862; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc_lo2863; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v62864; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2865; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo2866; GFX12-SDAG-FAKE16-NEXT: v_cmp_eq_f32_e32 vcc_lo, 0, v72867; GFX12-SDAG-FAKE16-NEXT: s_wait_alu depctr_va_vcc(0)2868; GFX12-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc_lo2869; GFX12-SDAG-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2870; GFX12-SDAG-FAKE16-NEXT: v_perm_b32 v0, v1, v0, 0x50401002871; GFX12-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2872 %tmp0 = call <2 x bfloat> @llvm.minimumnum.v2bf16(<2 x bfloat> %a, <2 x bfloat> %b)2873 %min3 = call <2 x bfloat> @llvm.minimumnum.v2bf16(<2 x bfloat> %tmp0, <2 x bfloat> %c)2874 ret <2 x bfloat> %min32875}2876 2877define float @v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0(float %a, float %b, float %c) {2878; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2879; GFX6: ; %bb.0:2880; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2881; GFX6-NEXT: v_min3_f32 v0, -v0, v1, v22882; GFX6-NEXT: s_setpc_b64 s[30:31]2883;2884; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2885; GFX7: ; %bb.0:2886; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2887; GFX7-NEXT: v_min3_f32 v0, -v0, v1, v22888; GFX7-NEXT: s_setpc_b64 s[30:31]2889;2890; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2891; GFX8: ; %bb.0:2892; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2893; GFX8-NEXT: v_min3_f32 v0, -v0, v1, v22894; GFX8-NEXT: s_setpc_b64 s[30:31]2895;2896; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2897; GFX9: ; %bb.0:2898; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2899; GFX9-NEXT: v_min3_f32 v0, -v0, v1, v22900; GFX9-NEXT: s_setpc_b64 s[30:31]2901;2902; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2903; GFX10: ; %bb.0:2904; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2905; GFX10-NEXT: v_min3_f32 v0, -v0, v1, v22906; GFX10-NEXT: s_setpc_b64 s[30:31]2907;2908; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2909; GFX11: ; %bb.0:2910; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2911; GFX11-NEXT: v_min3_f32 v0, -v0, v1, v22912; GFX11-NEXT: s_setpc_b64 s[30:31]2913;2914; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__neg_v_v_v_0:2915; GFX12: ; %bb.0:2916; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02917; GFX12-NEXT: s_wait_expcnt 0x02918; GFX12-NEXT: s_wait_samplecnt 0x02919; GFX12-NEXT: s_wait_bvhcnt 0x02920; GFX12-NEXT: s_wait_kmcnt 0x02921; GFX12-NEXT: v_min3_num_f32 v0, -v0, v1, v22922; GFX12-NEXT: s_setpc_b64 s[30:31]2923 %neg.a = fneg float %a2924 %tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)2925 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)2926 ret float %min32927}2928 2929define float @v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0(float %a, float %b, float %c) {2930; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2931; GFX6: ; %bb.0:2932; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2933; GFX6-NEXT: v_min3_f32 v0, v0, -v1, v22934; GFX6-NEXT: s_setpc_b64 s[30:31]2935;2936; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2937; GFX7: ; %bb.0:2938; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2939; GFX7-NEXT: v_min3_f32 v0, v0, -v1, v22940; GFX7-NEXT: s_setpc_b64 s[30:31]2941;2942; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2943; GFX8: ; %bb.0:2944; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2945; GFX8-NEXT: v_min3_f32 v0, v0, -v1, v22946; GFX8-NEXT: s_setpc_b64 s[30:31]2947;2948; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2949; GFX9: ; %bb.0:2950; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2951; GFX9-NEXT: v_min3_f32 v0, v0, -v1, v22952; GFX9-NEXT: s_setpc_b64 s[30:31]2953;2954; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2955; GFX10: ; %bb.0:2956; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2957; GFX10-NEXT: v_min3_f32 v0, v0, -v1, v22958; GFX10-NEXT: s_setpc_b64 s[30:31]2959;2960; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2961; GFX11: ; %bb.0:2962; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2963; GFX11-NEXT: v_min3_f32 v0, v0, -v1, v22964; GFX11-NEXT: s_setpc_b64 s[30:31]2965;2966; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_neg_v_v_0:2967; GFX12: ; %bb.0:2968; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02969; GFX12-NEXT: s_wait_expcnt 0x02970; GFX12-NEXT: s_wait_samplecnt 0x02971; GFX12-NEXT: s_wait_bvhcnt 0x02972; GFX12-NEXT: s_wait_kmcnt 0x02973; GFX12-NEXT: v_min3_num_f32 v0, v0, -v1, v22974; GFX12-NEXT: s_setpc_b64 s[30:31]2975 %neg.b = fneg float %b2976 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %neg.b)2977 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)2978 ret float %min32979}2980 2981define float @v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0(float %a, float %b, float %c) {2982; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:2983; GFX6: ; %bb.0:2984; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2985; GFX6-NEXT: v_min3_f32 v0, v0, v1, -v22986; GFX6-NEXT: s_setpc_b64 s[30:31]2987;2988; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:2989; GFX7: ; %bb.0:2990; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2991; GFX7-NEXT: v_min3_f32 v0, v0, v1, -v22992; GFX7-NEXT: s_setpc_b64 s[30:31]2993;2994; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:2995; GFX8: ; %bb.0:2996; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2997; GFX8-NEXT: v_min3_f32 v0, v0, v1, -v22998; GFX8-NEXT: s_setpc_b64 s[30:31]2999;3000; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:3001; GFX9: ; %bb.0:3002; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3003; GFX9-NEXT: v_min3_f32 v0, v0, v1, -v23004; GFX9-NEXT: s_setpc_b64 s[30:31]3005;3006; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:3007; GFX10: ; %bb.0:3008; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3009; GFX10-NEXT: v_min3_f32 v0, v0, v1, -v23010; GFX10-NEXT: s_setpc_b64 s[30:31]3011;3012; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:3013; GFX11: ; %bb.0:3014; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3015; GFX11-NEXT: v_min3_f32 v0, v0, v1, -v23016; GFX11-NEXT: s_setpc_b64 s[30:31]3017;3018; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__v_v_neg_v_0:3019; GFX12: ; %bb.0:3020; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03021; GFX12-NEXT: s_wait_expcnt 0x03022; GFX12-NEXT: s_wait_samplecnt 0x03023; GFX12-NEXT: s_wait_bvhcnt 0x03024; GFX12-NEXT: s_wait_kmcnt 0x03025; GFX12-NEXT: v_min3_num_f32 v0, v0, v1, -v23026; GFX12-NEXT: s_setpc_b64 s[30:31]3027 %neg.c = fneg float %c3028 %tmp0 = call float @llvm.minimumnum.f32(float %a, float %b)3029 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %neg.c)3030 ret float %min33031}3032 3033define float @v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0(float %a, float %b, float %c) {3034; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3035; GFX6: ; %bb.0:3036; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3037; GFX6-NEXT: v_min3_f32 v0, -|v0|, v1, v23038; GFX6-NEXT: s_setpc_b64 s[30:31]3039;3040; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3041; GFX7: ; %bb.0:3042; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3043; GFX7-NEXT: v_min3_f32 v0, -|v0|, v1, v23044; GFX7-NEXT: s_setpc_b64 s[30:31]3045;3046; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3047; GFX8: ; %bb.0:3048; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3049; GFX8-NEXT: v_min3_f32 v0, -|v0|, v1, v23050; GFX8-NEXT: s_setpc_b64 s[30:31]3051;3052; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3053; GFX9: ; %bb.0:3054; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3055; GFX9-NEXT: v_min3_f32 v0, -|v0|, v1, v23056; GFX9-NEXT: s_setpc_b64 s[30:31]3057;3058; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3059; GFX10: ; %bb.0:3060; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3061; GFX10-NEXT: v_min3_f32 v0, -|v0|, v1, v23062; GFX10-NEXT: s_setpc_b64 s[30:31]3063;3064; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3065; GFX11: ; %bb.0:3066; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3067; GFX11-NEXT: v_min3_f32 v0, -|v0|, v1, v23068; GFX11-NEXT: s_setpc_b64 s[30:31]3069;3070; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_v_v_0:3071; GFX12: ; %bb.0:3072; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03073; GFX12-NEXT: s_wait_expcnt 0x03074; GFX12-NEXT: s_wait_samplecnt 0x03075; GFX12-NEXT: s_wait_bvhcnt 0x03076; GFX12-NEXT: s_wait_kmcnt 0x03077; GFX12-NEXT: v_min3_num_f32 v0, -|v0|, v1, v23078; GFX12-NEXT: s_setpc_b64 s[30:31]3079 %fabs.a = call float @llvm.fabs.f32(float %a)3080 %neg.fabs.a = fneg float %fabs.a3081 %tmp0 = call float @llvm.minimumnum.f32(float %neg.fabs.a, float %b)3082 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %c)3083 ret float %min33084}3085 3086define float @v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0(float %a, float %b, float %c) {3087; GFX6-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3088; GFX6: ; %bb.0:3089; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3090; GFX6-NEXT: v_min3_f32 v0, -|v0|, -|v1|, -|v2|3091; GFX6-NEXT: s_setpc_b64 s[30:31]3092;3093; GFX7-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3094; GFX7: ; %bb.0:3095; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3096; GFX7-NEXT: v_min3_f32 v0, -|v0|, -|v1|, -|v2|3097; GFX7-NEXT: s_setpc_b64 s[30:31]3098;3099; GFX8-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3100; GFX8: ; %bb.0:3101; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3102; GFX8-NEXT: v_min3_f32 v0, -|v0|, -|v1|, -|v2|3103; GFX8-NEXT: s_setpc_b64 s[30:31]3104;3105; GFX9-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3106; GFX9: ; %bb.0:3107; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3108; GFX9-NEXT: v_min3_f32 v0, -|v0|, -|v1|, -|v2|3109; GFX9-NEXT: s_setpc_b64 s[30:31]3110;3111; GFX10-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3112; GFX10: ; %bb.0:3113; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3114; GFX10-NEXT: v_min3_f32 v0, -|v0|, -|v1|, -|v2|3115; GFX10-NEXT: s_setpc_b64 s[30:31]3116;3117; GFX11-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3118; GFX11: ; %bb.0:3119; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3120; GFX11-NEXT: v_min3_f32 v0, -|v0|, -|v1|, -|v2|3121; GFX11-NEXT: s_setpc_b64 s[30:31]3122;3123; GFX12-LABEL: v_min3_f32_minimumnum_minimumnum__neg_fabs_v_neg_fabs_v_neg_fabs_v_0:3124; GFX12: ; %bb.0:3125; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03126; GFX12-NEXT: s_wait_expcnt 0x03127; GFX12-NEXT: s_wait_samplecnt 0x03128; GFX12-NEXT: s_wait_bvhcnt 0x03129; GFX12-NEXT: s_wait_kmcnt 0x03130; GFX12-NEXT: v_min3_num_f32 v0, -|v0|, -|v1|, -|v2|3131; GFX12-NEXT: s_setpc_b64 s[30:31]3132 %fabs.a = call float @llvm.fabs.f32(float %a)3133 %neg.fabs.a = fneg float %fabs.a3134 %fabs.b = call float @llvm.fabs.f32(float %b)3135 %neg.fabs.b = fneg float %fabs.b3136 %fabs.c = call float @llvm.fabs.f32(float %c)3137 %neg.fabs.c = fneg float %fabs.c3138 3139 %tmp0 = call float @llvm.minimumnum.f32(float %neg.fabs.a, float %neg.fabs.b)3140 %min3 = call float @llvm.minimumnum.f32(float %tmp0, float %neg.fabs.c)3141 ret float %min33142}3143 3144define float @v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0(float %a, float %b, float %c) {3145; GFX6-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3146; GFX6: ; %bb.0:3147; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3148; GFX6-NEXT: v_mul_f32_e32 v1, -1.0, v13149; GFX6-NEXT: v_mul_f32_e32 v0, 1.0, v03150; GFX6-NEXT: v_max_f32_e32 v0, v0, v13151; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v23152; GFX6-NEXT: v_min_f32_e32 v0, v0, v13153; GFX6-NEXT: s_setpc_b64 s[30:31]3154;3155; GFX7-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3156; GFX7: ; %bb.0:3157; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3158; GFX7-NEXT: v_mul_f32_e32 v1, -1.0, v13159; GFX7-NEXT: v_mul_f32_e32 v0, 1.0, v03160; GFX7-NEXT: v_max_f32_e32 v0, v0, v13161; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v23162; GFX7-NEXT: v_min_f32_e32 v0, v0, v13163; GFX7-NEXT: s_setpc_b64 s[30:31]3164;3165; GFX8-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3166; GFX8: ; %bb.0:3167; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3168; GFX8-NEXT: v_mul_f32_e32 v1, -1.0, v13169; GFX8-NEXT: v_mul_f32_e32 v0, 1.0, v03170; GFX8-NEXT: v_max_f32_e32 v0, v0, v13171; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v23172; GFX8-NEXT: v_min_f32_e32 v0, v0, v13173; GFX8-NEXT: s_setpc_b64 s[30:31]3174;3175; GFX9-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3176; GFX9: ; %bb.0:3177; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3178; GFX9-NEXT: v_max_f32_e64 v1, -v1, -v13179; GFX9-NEXT: v_max_f32_e32 v0, v0, v03180; GFX9-NEXT: v_max_f32_e32 v0, v0, v13181; GFX9-NEXT: v_max_f32_e32 v1, v2, v23182; GFX9-NEXT: v_min_f32_e32 v0, v0, v13183; GFX9-NEXT: s_setpc_b64 s[30:31]3184;3185; GFX10-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3186; GFX10: ; %bb.0:3187; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3188; GFX10-NEXT: v_max_f32_e64 v1, -v1, -v13189; GFX10-NEXT: v_max_f32_e32 v0, v0, v03190; GFX10-NEXT: v_max_f32_e32 v0, v0, v13191; GFX10-NEXT: v_max_f32_e32 v1, v2, v23192; GFX10-NEXT: v_min_f32_e32 v0, v0, v13193; GFX10-NEXT: s_setpc_b64 s[30:31]3194;3195; GFX11-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3196; GFX11: ; %bb.0:3197; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3198; GFX11-NEXT: v_max_f32_e64 v1, -v1, -v13199; GFX11-NEXT: v_max_f32_e32 v0, v0, v03200; GFX11-NEXT: v_max_f32_e32 v2, v2, v23201; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3202; GFX11-NEXT: v_maxmin_f32 v0, v0, v1, v23203; GFX11-NEXT: s_setpc_b64 s[30:31]3204;3205; GFX12-LABEL: v_min3_f32_minimumnum_neg_minimumnum__v_v_v_0:3206; GFX12: ; %bb.0:3207; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03208; GFX12-NEXT: s_wait_expcnt 0x03209; GFX12-NEXT: s_wait_samplecnt 0x03210; GFX12-NEXT: s_wait_bvhcnt 0x03211; GFX12-NEXT: s_wait_kmcnt 0x03212; GFX12-NEXT: v_max_num_f32_e64 v1, -v1, -v13213; GFX12-NEXT: v_max_num_f32_e32 v0, v0, v03214; GFX12-NEXT: v_max_num_f32_e32 v2, v2, v23215; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3216; GFX12-NEXT: v_maxmin_num_f32 v0, v0, v1, v23217; GFX12-NEXT: s_setpc_b64 s[30:31]3218 %neg.a = fneg float %a3219 %tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)3220 %neg.tmp0 = fneg float %tmp03221 %min3 = call float @llvm.minimumnum.f32(float %neg.tmp0, float %c)3222 ret float %min33223}3224 3225define float @v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0(float %a, float %b, float %c) {3226; GFX6-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3227; GFX6: ; %bb.0:3228; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3229; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v13230; GFX6-NEXT: v_mul_f32_e32 v0, -1.0, v03231; GFX6-NEXT: v_min_f32_e32 v0, v0, v13232; GFX6-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03233; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v23234; GFX6-NEXT: v_min_f32_e32 v0, v0, v13235; GFX6-NEXT: s_setpc_b64 s[30:31]3236;3237; GFX7-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3238; GFX7: ; %bb.0:3239; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3240; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v13241; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v03242; GFX7-NEXT: v_min_f32_e32 v0, v0, v13243; GFX7-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03244; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v23245; GFX7-NEXT: v_min_f32_e32 v0, v0, v13246; GFX7-NEXT: s_setpc_b64 s[30:31]3247;3248; GFX8-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3249; GFX8: ; %bb.0:3250; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3251; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v13252; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v03253; GFX8-NEXT: v_min_f32_e32 v0, v0, v13254; GFX8-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03255; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v23256; GFX8-NEXT: v_min_f32_e32 v0, v0, v13257; GFX8-NEXT: s_setpc_b64 s[30:31]3258;3259; GFX9-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3260; GFX9: ; %bb.0:3261; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3262; GFX9-NEXT: v_max_f32_e32 v1, v1, v13263; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v03264; GFX9-NEXT: v_min_f32_e32 v0, v0, v13265; GFX9-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03266; GFX9-NEXT: v_max_f32_e32 v1, v2, v23267; GFX9-NEXT: v_min_f32_e32 v0, v0, v13268; GFX9-NEXT: s_setpc_b64 s[30:31]3269;3270; GFX10-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3271; GFX10: ; %bb.0:3272; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3273; GFX10-NEXT: v_max_f32_e32 v1, v1, v13274; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v03275; GFX10-NEXT: v_min_f32_e32 v0, v0, v13276; GFX10-NEXT: v_max_f32_e32 v1, v2, v23277; GFX10-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03278; GFX10-NEXT: v_min_f32_e32 v0, v0, v13279; GFX10-NEXT: s_setpc_b64 s[30:31]3280;3281; GFX11-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3282; GFX11: ; %bb.0:3283; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3284; GFX11-NEXT: v_max_f32_e32 v1, v1, v13285; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v03286; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3287; GFX11-NEXT: v_dual_min_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v23288; GFX11-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03289; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3290; GFX11-NEXT: v_min_f32_e32 v0, v0, v13291; GFX11-NEXT: s_setpc_b64 s[30:31]3292;3293; GFX12-LABEL: v_min3_f32_minimumnum_fabs_minimumnum__v_v_v_0:3294; GFX12: ; %bb.0:3295; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03296; GFX12-NEXT: s_wait_expcnt 0x03297; GFX12-NEXT: s_wait_samplecnt 0x03298; GFX12-NEXT: s_wait_bvhcnt 0x03299; GFX12-NEXT: s_wait_kmcnt 0x03300; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v13301; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v03302; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3303; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v23304; GFX12-NEXT: v_and_b32_e32 v0, 0x7fffffff, v03305; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3306; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v13307; GFX12-NEXT: s_setpc_b64 s[30:31]3308 %neg.a = fneg float %a3309 %tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)3310 %abs.tmp0 = call float @llvm.fabs.f32(float %tmp0)3311 %min3 = call float @llvm.minimumnum.f32(float %abs.tmp0, float %c)3312 ret float %min33313}3314 3315define float @v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0(float %a, float %b, float %c) {3316; GFX6-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3317; GFX6: ; %bb.0:3318; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3319; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v13320; GFX6-NEXT: v_mul_f32_e32 v0, -1.0, v03321; GFX6-NEXT: v_min_f32_e32 v0, v0, v13322; GFX6-NEXT: v_or_b32_e32 v0, 0x80000000, v03323; GFX6-NEXT: v_mul_f32_e32 v1, 1.0, v23324; GFX6-NEXT: v_min_f32_e32 v0, v0, v13325; GFX6-NEXT: s_setpc_b64 s[30:31]3326;3327; GFX7-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3328; GFX7: ; %bb.0:3329; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3330; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v13331; GFX7-NEXT: v_mul_f32_e32 v0, -1.0, v03332; GFX7-NEXT: v_min_f32_e32 v0, v0, v13333; GFX7-NEXT: v_or_b32_e32 v0, 0x80000000, v03334; GFX7-NEXT: v_mul_f32_e32 v1, 1.0, v23335; GFX7-NEXT: v_min_f32_e32 v0, v0, v13336; GFX7-NEXT: s_setpc_b64 s[30:31]3337;3338; GFX8-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3339; GFX8: ; %bb.0:3340; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3341; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v13342; GFX8-NEXT: v_mul_f32_e32 v0, -1.0, v03343; GFX8-NEXT: v_min_f32_e32 v0, v0, v13344; GFX8-NEXT: v_or_b32_e32 v0, 0x80000000, v03345; GFX8-NEXT: v_mul_f32_e32 v1, 1.0, v23346; GFX8-NEXT: v_min_f32_e32 v0, v0, v13347; GFX8-NEXT: s_setpc_b64 s[30:31]3348;3349; GFX9-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3350; GFX9: ; %bb.0:3351; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3352; GFX9-NEXT: v_max_f32_e32 v1, v1, v13353; GFX9-NEXT: v_max_f32_e64 v0, -v0, -v03354; GFX9-NEXT: v_min_f32_e32 v0, v0, v13355; GFX9-NEXT: v_or_b32_e32 v0, 0x80000000, v03356; GFX9-NEXT: v_max_f32_e32 v1, v2, v23357; GFX9-NEXT: v_min_f32_e32 v0, v0, v13358; GFX9-NEXT: s_setpc_b64 s[30:31]3359;3360; GFX10-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3361; GFX10: ; %bb.0:3362; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3363; GFX10-NEXT: v_max_f32_e32 v1, v1, v13364; GFX10-NEXT: v_max_f32_e64 v0, -v0, -v03365; GFX10-NEXT: v_min_f32_e32 v0, v0, v13366; GFX10-NEXT: v_max_f32_e32 v1, v2, v23367; GFX10-NEXT: v_or_b32_e32 v0, 0x80000000, v03368; GFX10-NEXT: v_min_f32_e32 v0, v0, v13369; GFX10-NEXT: s_setpc_b64 s[30:31]3370;3371; GFX11-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3372; GFX11: ; %bb.0:3373; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3374; GFX11-NEXT: v_max_f32_e32 v1, v1, v13375; GFX11-NEXT: v_max_f32_e64 v0, -v0, -v03376; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3377; GFX11-NEXT: v_dual_min_f32 v0, v0, v1 :: v_dual_max_f32 v1, v2, v23378; GFX11-NEXT: v_or_b32_e32 v0, 0x80000000, v03379; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)3380; GFX11-NEXT: v_min_f32_e32 v0, v0, v13381; GFX11-NEXT: s_setpc_b64 s[30:31]3382;3383; GFX12-LABEL: v_min3_f32_minimumnum_fneg_fabs_minimumnum__v_v_v_0:3384; GFX12: ; %bb.0:3385; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03386; GFX12-NEXT: s_wait_expcnt 0x03387; GFX12-NEXT: s_wait_samplecnt 0x03388; GFX12-NEXT: s_wait_bvhcnt 0x03389; GFX12-NEXT: s_wait_kmcnt 0x03390; GFX12-NEXT: v_max_num_f32_e32 v1, v1, v13391; GFX12-NEXT: v_max_num_f32_e64 v0, -v0, -v03392; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3393; GFX12-NEXT: v_dual_min_num_f32 v0, v0, v1 :: v_dual_max_num_f32 v1, v2, v23394; GFX12-NEXT: v_or_b32_e32 v0, 0x80000000, v03395; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3396; GFX12-NEXT: v_min_num_f32_e32 v0, v0, v13397; GFX12-NEXT: s_setpc_b64 s[30:31]3398 %neg.a = fneg float %a3399 %tmp0 = call float @llvm.minimumnum.f32(float %neg.a, float %b)3400 %abs.tmp0 = call float @llvm.fabs.f32(float %tmp0)3401 %neg.abs.tmp0 = fneg float %abs.tmp03402 %min3 = call float @llvm.minimumnum.f32(float %neg.abs.tmp0, float %c)3403 ret float %min33404}3405 3406define <2 x float> @v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0(<2 x float> %a, <2 x float> %b, <2 x float> %c) {3407; GFX6-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3408; GFX6: ; %bb.0:3409; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3410; GFX6-NEXT: v_min3_f32 v0, -v0, -v2, -v43411; GFX6-NEXT: v_min3_f32 v1, -v1, -v3, -v53412; GFX6-NEXT: s_setpc_b64 s[30:31]3413;3414; GFX7-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3415; GFX7: ; %bb.0:3416; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3417; GFX7-NEXT: v_min3_f32 v0, -v0, -v2, -v43418; GFX7-NEXT: v_min3_f32 v1, -v1, -v3, -v53419; GFX7-NEXT: s_setpc_b64 s[30:31]3420;3421; GFX8-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3422; GFX8: ; %bb.0:3423; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3424; GFX8-NEXT: v_min3_f32 v0, -v0, -v2, -v43425; GFX8-NEXT: v_min3_f32 v1, -v1, -v3, -v53426; GFX8-NEXT: s_setpc_b64 s[30:31]3427;3428; GFX9-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3429; GFX9: ; %bb.0:3430; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3431; GFX9-NEXT: v_min3_f32 v0, -v0, -v2, -v43432; GFX9-NEXT: v_min3_f32 v1, -v1, -v3, -v53433; GFX9-NEXT: s_setpc_b64 s[30:31]3434;3435; GFX10-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3436; GFX10: ; %bb.0:3437; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3438; GFX10-NEXT: v_min3_f32 v0, -v0, -v2, -v43439; GFX10-NEXT: v_min3_f32 v1, -v1, -v3, -v53440; GFX10-NEXT: s_setpc_b64 s[30:31]3441;3442; GFX11-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3443; GFX11: ; %bb.0:3444; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3445; GFX11-NEXT: v_min3_f32 v0, -v0, -v2, -v43446; GFX11-NEXT: v_min3_f32 v1, -v1, -v3, -v53447; GFX11-NEXT: s_setpc_b64 s[30:31]3448;3449; GFX12-LABEL: v_min3_v2f32_minimumnum_minimumnum__neg_v_neg_v_neg_v_0:3450; GFX12: ; %bb.0:3451; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03452; GFX12-NEXT: s_wait_expcnt 0x03453; GFX12-NEXT: s_wait_samplecnt 0x03454; GFX12-NEXT: s_wait_bvhcnt 0x03455; GFX12-NEXT: s_wait_kmcnt 0x03456; GFX12-NEXT: v_min3_num_f32 v0, -v0, -v2, -v43457; GFX12-NEXT: v_min3_num_f32 v1, -v1, -v3, -v53458; GFX12-NEXT: s_setpc_b64 s[30:31]3459 %neg.a = fneg <2 x float> %a3460 %neg.b = fneg <2 x float> %b3461 %neg.c = fneg <2 x float> %c3462 %tmp0 = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %neg.a, <2 x float> %neg.b)3463 %min3 = call <2 x float> @llvm.minimumnum.v2f32(<2 x float> %tmp0, <2 x float> %neg.c)3464 ret <2 x float> %min33465}3466 3467;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3468; GFX10-SDAG: {{.*}}3469; GFX11-SDAG: {{.*}}3470; GFX12-SDAG: {{.*}}3471; GFX6-SDAG: {{.*}}3472; GFX7-SDAG: {{.*}}3473; GFX8-SDAG: {{.*}}3474; GFX9-SDAG: {{.*}}3475; GFX950: {{.*}}3476