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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx942 < %s | FileCheck -check-prefixes=GFX9,GFX942 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx950 < %s | FileCheck -check-prefixes=GFX9,GFX950 %s6 7define float @v_fminimum3_f32(float %a, float %b, float %c) {8; GFX12-LABEL: v_fminimum3_f32:9; GFX12: ; %bb.0:10; GFX12-NEXT: s_wait_loadcnt_dscnt 0x011; GFX12-NEXT: s_wait_expcnt 0x012; GFX12-NEXT: s_wait_samplecnt 0x013; GFX12-NEXT: s_wait_bvhcnt 0x014; GFX12-NEXT: s_wait_kmcnt 0x015; GFX12-NEXT: v_minimum3_f32 v0, v0, v1, v216; GFX12-NEXT: s_setpc_b64 s[30:31]17;18; GFX942-LABEL: v_fminimum3_f32:19; GFX942: ; %bb.0:20; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)21; GFX942-NEXT: v_min_f32_e32 v3, v0, v122; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc0000023; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v124; GFX942-NEXT: s_nop 125; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc26; GFX942-NEXT: v_min_f32_e32 v1, v0, v227; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v228; GFX942-NEXT: s_nop 129; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc30; GFX942-NEXT: s_setpc_b64 s[30:31]31;32; GFX950-LABEL: v_fminimum3_f32:33; GFX950: ; %bb.0:34; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; GFX950-NEXT: v_minimum3_f32 v0, v0, v1, v236; GFX950-NEXT: s_setpc_b64 s[30:31]37 %max0 = call float @llvm.minimum.f32(float %a, float %b)38 %max1 = call float @llvm.minimum.f32(float %max0, float %c)39 ret float %max140}41 42define float @v_fminimum3_f32_commute(float %a, float %b, float %c) {43; GFX12-LABEL: v_fminimum3_f32_commute:44; GFX12: ; %bb.0:45; GFX12-NEXT: s_wait_loadcnt_dscnt 0x046; GFX12-NEXT: s_wait_expcnt 0x047; GFX12-NEXT: s_wait_samplecnt 0x048; GFX12-NEXT: s_wait_bvhcnt 0x049; GFX12-NEXT: s_wait_kmcnt 0x050; GFX12-NEXT: v_minimum3_f32 v0, v2, v0, v151; GFX12-NEXT: s_setpc_b64 s[30:31]52;53; GFX942-LABEL: v_fminimum3_f32_commute:54; GFX942: ; %bb.0:55; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)56; GFX942-NEXT: v_min_f32_e32 v3, v0, v157; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc0000058; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v159; GFX942-NEXT: s_nop 160; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc61; GFX942-NEXT: v_min_f32_e32 v1, v2, v062; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v063; GFX942-NEXT: s_nop 164; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc65; GFX942-NEXT: s_setpc_b64 s[30:31]66;67; GFX950-LABEL: v_fminimum3_f32_commute:68; GFX950: ; %bb.0:69; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)70; GFX950-NEXT: v_minimum3_f32 v0, v2, v0, v171; GFX950-NEXT: s_setpc_b64 s[30:31]72 %max0 = call float @llvm.minimum.f32(float %a, float %b)73 %max1 = call float @llvm.minimum.f32(float %c, float %max0)74 ret float %max175}76 77define amdgpu_ps i32 @s_fminimum3_f32(float inreg %a, float inreg %b, float inreg %c) {78; GFX12-LABEL: s_fminimum3_f32:79; GFX12: ; %bb.0:80; GFX12-NEXT: v_mov_b32_e32 v0, s281; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)82; GFX12-NEXT: v_minimum3_f32 v0, s0, s1, v083; GFX12-NEXT: v_readfirstlane_b32 s0, v084; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)85; GFX12-NEXT: ; return to shader part epilog86;87; GFX942-LABEL: s_fminimum3_f32:88; GFX942: ; %bb.0:89; GFX942-NEXT: v_mov_b32_e32 v0, s190; GFX942-NEXT: v_min_f32_e32 v1, s0, v091; GFX942-NEXT: v_mov_b32_e32 v2, 0x7fc0000092; GFX942-NEXT: v_cmp_o_f32_e32 vcc, s0, v093; GFX942-NEXT: s_nop 194; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc95; GFX942-NEXT: v_min_f32_e32 v1, s2, v096; GFX942-NEXT: v_cmp_o_f32_e32 vcc, s2, v097; GFX942-NEXT: s_nop 198; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc99; GFX942-NEXT: s_nop 0100; GFX942-NEXT: v_readfirstlane_b32 s0, v0101; GFX942-NEXT: ; return to shader part epilog102;103; GFX950-LABEL: s_fminimum3_f32:104; GFX950: ; %bb.0:105; GFX950-NEXT: v_mov_b32_e32 v0, s1106; GFX950-NEXT: v_mov_b32_e32 v1, s2107; GFX950-NEXT: v_minimum3_f32 v0, s0, v0, v1108; GFX950-NEXT: s_nop 0109; GFX950-NEXT: v_readfirstlane_b32 s0, v0110; GFX950-NEXT: ; return to shader part epilog111 %max0 = call float @llvm.minimum.f32(float %a, float %b)112 %max1 = call float @llvm.minimum.f32(float %max0, float %c)113 %cast = bitcast float %max1 to i32114 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)115 ret i32 %readfirstlane116}117 118define float @v_fminimum3_f32_fabs0(float %a, float %b, float %c) {119; GFX12-LABEL: v_fminimum3_f32_fabs0:120; GFX12: ; %bb.0:121; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0122; GFX12-NEXT: s_wait_expcnt 0x0123; GFX12-NEXT: s_wait_samplecnt 0x0124; GFX12-NEXT: s_wait_bvhcnt 0x0125; GFX12-NEXT: s_wait_kmcnt 0x0126; GFX12-NEXT: v_minimum3_f32 v0, |v0|, v1, v2127; GFX12-NEXT: s_setpc_b64 s[30:31]128;129; GFX942-LABEL: v_fminimum3_f32_fabs0:130; GFX942: ; %bb.0:131; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)132; GFX942-NEXT: v_min_f32_e64 v3, |v0|, v1133; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000134; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v0|, v1135; GFX942-NEXT: s_nop 1136; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc137; GFX942-NEXT: v_min_f32_e32 v1, v0, v2138; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2139; GFX942-NEXT: s_nop 1140; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc141; GFX942-NEXT: s_setpc_b64 s[30:31]142;143; GFX950-LABEL: v_fminimum3_f32_fabs0:144; GFX950: ; %bb.0:145; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)146; GFX950-NEXT: v_minimum3_f32 v0, |v0|, v1, v2147; GFX950-NEXT: s_setpc_b64 s[30:31]148 %a.fabs = call float @llvm.fabs.f32(float %a)149 %max0 = call float @llvm.minimum.f32(float %a.fabs, float %b)150 %max1 = call float @llvm.minimum.f32(float %max0, float %c)151 ret float %max1152}153 154define float @v_fminimum3_f32_fabs1(float %a, float %b, float %c) {155; GFX12-LABEL: v_fminimum3_f32_fabs1:156; GFX12: ; %bb.0:157; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0158; GFX12-NEXT: s_wait_expcnt 0x0159; GFX12-NEXT: s_wait_samplecnt 0x0160; GFX12-NEXT: s_wait_bvhcnt 0x0161; GFX12-NEXT: s_wait_kmcnt 0x0162; GFX12-NEXT: v_minimum3_f32 v0, v0, |v1|, v2163; GFX12-NEXT: s_setpc_b64 s[30:31]164;165; GFX942-LABEL: v_fminimum3_f32_fabs1:166; GFX942: ; %bb.0:167; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)168; GFX942-NEXT: v_min_f32_e64 v3, v0, |v1|169; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000170; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, |v1|171; GFX942-NEXT: s_nop 1172; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc173; GFX942-NEXT: v_min_f32_e32 v1, v0, v2174; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2175; GFX942-NEXT: s_nop 1176; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc177; GFX942-NEXT: s_setpc_b64 s[30:31]178;179; GFX950-LABEL: v_fminimum3_f32_fabs1:180; GFX950: ; %bb.0:181; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)182; GFX950-NEXT: v_minimum3_f32 v0, v0, |v1|, v2183; GFX950-NEXT: s_setpc_b64 s[30:31]184 %b.fabs = call float @llvm.fabs.f32(float %b)185 %max0 = call float @llvm.minimum.f32(float %a, float %b.fabs)186 %max1 = call float @llvm.minimum.f32(float %max0, float %c)187 ret float %max1188}189 190define float @v_fminimum3_f32_fabs2(float %a, float %b, float %c) {191; GFX12-LABEL: v_fminimum3_f32_fabs2:192; GFX12: ; %bb.0:193; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0194; GFX12-NEXT: s_wait_expcnt 0x0195; GFX12-NEXT: s_wait_samplecnt 0x0196; GFX12-NEXT: s_wait_bvhcnt 0x0197; GFX12-NEXT: s_wait_kmcnt 0x0198; GFX12-NEXT: v_minimum3_f32 v0, v0, v1, |v2|199; GFX12-NEXT: s_setpc_b64 s[30:31]200;201; GFX942-LABEL: v_fminimum3_f32_fabs2:202; GFX942: ; %bb.0:203; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)204; GFX942-NEXT: v_min_f32_e32 v3, v0, v1205; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000206; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v1207; GFX942-NEXT: s_nop 1208; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc209; GFX942-NEXT: v_min_f32_e64 v1, v0, |v2|210; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, |v2|211; GFX942-NEXT: s_nop 1212; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc213; GFX942-NEXT: s_setpc_b64 s[30:31]214;215; GFX950-LABEL: v_fminimum3_f32_fabs2:216; GFX950: ; %bb.0:217; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)218; GFX950-NEXT: v_minimum3_f32 v0, v0, v1, |v2|219; GFX950-NEXT: s_setpc_b64 s[30:31]220 %c.fabs = call float @llvm.fabs.f32(float %c)221 %max0 = call float @llvm.minimum.f32(float %a, float %b)222 %max1 = call float @llvm.minimum.f32(float %max0, float %c.fabs)223 ret float %max1224}225 226define float @v_fminimum3_f32_fabs_all(float %a, float %b, float %c) {227; GFX12-LABEL: v_fminimum3_f32_fabs_all:228; GFX12: ; %bb.0:229; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0230; GFX12-NEXT: s_wait_expcnt 0x0231; GFX12-NEXT: s_wait_samplecnt 0x0232; GFX12-NEXT: s_wait_bvhcnt 0x0233; GFX12-NEXT: s_wait_kmcnt 0x0234; GFX12-NEXT: v_minimum3_f32 v0, |v0|, |v1|, |v2|235; GFX12-NEXT: s_setpc_b64 s[30:31]236;237; GFX942-LABEL: v_fminimum3_f32_fabs_all:238; GFX942: ; %bb.0:239; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)240; GFX942-NEXT: v_min_f32_e64 v3, |v0|, |v1|241; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000242; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v0|, |v1|243; GFX942-NEXT: s_nop 1244; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc245; GFX942-NEXT: v_min_f32_e64 v1, v0, |v2|246; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, |v2|247; GFX942-NEXT: s_nop 1248; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc249; GFX942-NEXT: s_setpc_b64 s[30:31]250;251; GFX950-LABEL: v_fminimum3_f32_fabs_all:252; GFX950: ; %bb.0:253; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)254; GFX950-NEXT: v_minimum3_f32 v0, |v0|, |v1|, |v2|255; GFX950-NEXT: s_setpc_b64 s[30:31]256 %a.fabs = call float @llvm.fabs.f32(float %a)257 %b.fabs = call float @llvm.fabs.f32(float %b)258 %c.fabs = call float @llvm.fabs.f32(float %c)259 %max0 = call float @llvm.minimum.f32(float %a.fabs, float %b.fabs)260 %max1 = call float @llvm.minimum.f32(float %max0, float %c.fabs)261 ret float %max1262}263 264define float @v_fminimum3_f32_fneg_all(float %a, float %b, float %c) {265; GFX12-LABEL: v_fminimum3_f32_fneg_all:266; GFX12: ; %bb.0:267; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0268; GFX12-NEXT: s_wait_expcnt 0x0269; GFX12-NEXT: s_wait_samplecnt 0x0270; GFX12-NEXT: s_wait_bvhcnt 0x0271; GFX12-NEXT: s_wait_kmcnt 0x0272; GFX12-NEXT: v_minimum3_f32 v0, -v0, -v1, -v2273; GFX12-NEXT: s_setpc_b64 s[30:31]274;275; GFX942-LABEL: v_fminimum3_f32_fneg_all:276; GFX942: ; %bb.0:277; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)278; GFX942-NEXT: v_min_f32_e64 v3, -v0, -v1279; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000280; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v0, -v1281; GFX942-NEXT: s_nop 1282; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc283; GFX942-NEXT: v_min_f32_e64 v1, v0, -v2284; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, -v2285; GFX942-NEXT: s_nop 1286; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc287; GFX942-NEXT: s_setpc_b64 s[30:31]288;289; GFX950-LABEL: v_fminimum3_f32_fneg_all:290; GFX950: ; %bb.0:291; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)292; GFX950-NEXT: v_minimum3_f32 v0, -v0, -v1, -v2293; GFX950-NEXT: s_setpc_b64 s[30:31]294 %a.fneg = fneg float %a295 %b.fneg = fneg float %b296 %c.fneg = fneg float %c297 %max0 = call float @llvm.minimum.f32(float %a.fneg, float %b.fneg)298 %max1 = call float @llvm.minimum.f32(float %max0, float %c.fneg)299 ret float %max1300}301 302define float @v_fminimum3_f32_fneg_fabs_all(float %a, float %b, float %c) {303; GFX12-LABEL: v_fminimum3_f32_fneg_fabs_all:304; GFX12: ; %bb.0:305; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0306; GFX12-NEXT: s_wait_expcnt 0x0307; GFX12-NEXT: s_wait_samplecnt 0x0308; GFX12-NEXT: s_wait_bvhcnt 0x0309; GFX12-NEXT: s_wait_kmcnt 0x0310; GFX12-NEXT: v_minimum3_f32 v0, -|v0|, -|v1|, -|v2|311; GFX12-NEXT: s_setpc_b64 s[30:31]312;313; GFX942-LABEL: v_fminimum3_f32_fneg_fabs_all:314; GFX942: ; %bb.0:315; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)316; GFX942-NEXT: v_min_f32_e64 v3, -|v0|, -|v1|317; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000318; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -|v0|, -|v1|319; GFX942-NEXT: s_nop 1320; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc321; GFX942-NEXT: v_min_f32_e64 v1, v0, -|v2|322; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, -|v2|323; GFX942-NEXT: s_nop 1324; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc325; GFX942-NEXT: s_setpc_b64 s[30:31]326;327; GFX950-LABEL: v_fminimum3_f32_fneg_fabs_all:328; GFX950: ; %bb.0:329; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)330; GFX950-NEXT: v_minimum3_f32 v0, -|v0|, -|v1|, -|v2|331; GFX950-NEXT: s_setpc_b64 s[30:31]332 %a.fabs = call float @llvm.fabs.f32(float %a)333 %b.fabs = call float @llvm.fabs.f32(float %b)334 %c.fabs = call float @llvm.fabs.f32(float %c)335 %a.fneg.fabs = fneg float %a.fabs336 %b.fneg.fabs = fneg float %b.fabs337 %c.fneg.fabs = fneg float %c.fabs338 %max0 = call float @llvm.minimum.f32(float %a.fneg.fabs, float %b.fneg.fabs)339 %max1 = call float @llvm.minimum.f32(float %max0, float %c.fneg.fabs)340 ret float %max1341}342 343define float @v_fminimum3_f32_fneg0(float %a, float %b, float %c) {344; GFX12-LABEL: v_fminimum3_f32_fneg0:345; GFX12: ; %bb.0:346; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0347; GFX12-NEXT: s_wait_expcnt 0x0348; GFX12-NEXT: s_wait_samplecnt 0x0349; GFX12-NEXT: s_wait_bvhcnt 0x0350; GFX12-NEXT: s_wait_kmcnt 0x0351; GFX12-NEXT: v_minimum3_f32 v0, -v0, v1, v2352; GFX12-NEXT: s_setpc_b64 s[30:31]353;354; GFX942-LABEL: v_fminimum3_f32_fneg0:355; GFX942: ; %bb.0:356; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)357; GFX942-NEXT: v_min_f32_e64 v3, -v0, v1358; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000359; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v0, v1360; GFX942-NEXT: s_nop 1361; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc362; GFX942-NEXT: v_min_f32_e32 v1, v0, v2363; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2364; GFX942-NEXT: s_nop 1365; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc366; GFX942-NEXT: s_setpc_b64 s[30:31]367;368; GFX950-LABEL: v_fminimum3_f32_fneg0:369; GFX950: ; %bb.0:370; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)371; GFX950-NEXT: v_minimum3_f32 v0, -v0, v1, v2372; GFX950-NEXT: s_setpc_b64 s[30:31]373 %a.fneg = fneg float %a374 %max0 = call float @llvm.minimum.f32(float %a.fneg, float %b)375 %max1 = call float @llvm.minimum.f32(float %max0, float %c)376 ret float %max1377}378 379define float @v_fminimum3_f32_fneg1(float %a, float %b, float %c) {380; GFX12-LABEL: v_fminimum3_f32_fneg1:381; GFX12: ; %bb.0:382; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0383; GFX12-NEXT: s_wait_expcnt 0x0384; GFX12-NEXT: s_wait_samplecnt 0x0385; GFX12-NEXT: s_wait_bvhcnt 0x0386; GFX12-NEXT: s_wait_kmcnt 0x0387; GFX12-NEXT: v_minimum3_f32 v0, v0, -v1, v2388; GFX12-NEXT: s_setpc_b64 s[30:31]389;390; GFX942-LABEL: v_fminimum3_f32_fneg1:391; GFX942: ; %bb.0:392; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)393; GFX942-NEXT: v_min_f32_e64 v3, v0, -v1394; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000395; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, -v1396; GFX942-NEXT: s_nop 1397; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc398; GFX942-NEXT: v_min_f32_e32 v1, v0, v2399; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2400; GFX942-NEXT: s_nop 1401; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc402; GFX942-NEXT: s_setpc_b64 s[30:31]403;404; GFX950-LABEL: v_fminimum3_f32_fneg1:405; GFX950: ; %bb.0:406; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)407; GFX950-NEXT: v_minimum3_f32 v0, v0, -v1, v2408; GFX950-NEXT: s_setpc_b64 s[30:31]409 %b.fneg = fneg float %b410 %max0 = call float @llvm.minimum.f32(float %a, float %b.fneg)411 %max1 = call float @llvm.minimum.f32(float %max0, float %c)412 ret float %max1413}414 415define float @v_fminimum3_f32_fneg2(float %a, float %b, float %c) {416; GFX12-LABEL: v_fminimum3_f32_fneg2:417; GFX12: ; %bb.0:418; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0419; GFX12-NEXT: s_wait_expcnt 0x0420; GFX12-NEXT: s_wait_samplecnt 0x0421; GFX12-NEXT: s_wait_bvhcnt 0x0422; GFX12-NEXT: s_wait_kmcnt 0x0423; GFX12-NEXT: v_minimum3_f32 v0, v0, v1, -v2424; GFX12-NEXT: s_setpc_b64 s[30:31]425;426; GFX942-LABEL: v_fminimum3_f32_fneg2:427; GFX942: ; %bb.0:428; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)429; GFX942-NEXT: v_min_f32_e32 v3, v0, v1430; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc00000431; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v1432; GFX942-NEXT: s_nop 1433; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc434; GFX942-NEXT: v_min_f32_e64 v1, v0, -v2435; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, -v2436; GFX942-NEXT: s_nop 1437; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc438; GFX942-NEXT: s_setpc_b64 s[30:31]439;440; GFX950-LABEL: v_fminimum3_f32_fneg2:441; GFX950: ; %bb.0:442; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)443; GFX950-NEXT: v_minimum3_f32 v0, v0, v1, -v2444; GFX950-NEXT: s_setpc_b64 s[30:31]445 %c.fneg = fneg float %c446 %max0 = call float @llvm.minimum.f32(float %a, float %b)447 %max1 = call float @llvm.minimum.f32(float %max0, float %c.fneg)448 ret float %max1449}450 451define float @v_fminimum3_f32_const0(float %b, float %c) {452; GFX12-LABEL: v_fminimum3_f32_const0:453; GFX12: ; %bb.0:454; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0455; GFX12-NEXT: s_wait_expcnt 0x0456; GFX12-NEXT: s_wait_samplecnt 0x0457; GFX12-NEXT: s_wait_bvhcnt 0x0458; GFX12-NEXT: s_wait_kmcnt 0x0459; GFX12-NEXT: v_minimum3_f32 v0, v0, 0x41000000, v1460; GFX12-NEXT: s_setpc_b64 s[30:31]461;462; GFX942-LABEL: v_fminimum3_f32_const0:463; GFX942: ; %bb.0:464; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)465; GFX942-NEXT: v_min_f32_e32 v2, 0x41000000, v0466; GFX942-NEXT: v_mov_b32_e32 v3, 0x7fc00000467; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0468; GFX942-NEXT: s_nop 1469; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc470; GFX942-NEXT: v_min_f32_e32 v2, v0, v1471; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v1472; GFX942-NEXT: s_nop 1473; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc474; GFX942-NEXT: s_setpc_b64 s[30:31]475;476; GFX950-LABEL: v_fminimum3_f32_const0:477; GFX950: ; %bb.0:478; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)479; GFX950-NEXT: s_mov_b32 s0, 0x41000000480; GFX950-NEXT: v_minimum3_f32 v0, v0, s0, v1481; GFX950-NEXT: s_setpc_b64 s[30:31]482 %max0 = call float @llvm.minimum.f32(float 8.0, float %b)483 %max1 = call float @llvm.minimum.f32(float %max0, float %c)484 ret float %max1485}486 487define float @v_fminimum3_f32__const2(float %a, float %b) {488; GFX12-LABEL: v_fminimum3_f32__const2:489; GFX12: ; %bb.0:490; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0491; GFX12-NEXT: s_wait_expcnt 0x0492; GFX12-NEXT: s_wait_samplecnt 0x0493; GFX12-NEXT: s_wait_bvhcnt 0x0494; GFX12-NEXT: s_wait_kmcnt 0x0495; GFX12-NEXT: v_minimum3_f32 v0, v0, v1, 0x41000000496; GFX12-NEXT: s_setpc_b64 s[30:31]497;498; GFX942-LABEL: v_fminimum3_f32__const2:499; GFX942: ; %bb.0:500; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)501; GFX942-NEXT: v_min_f32_e32 v2, v0, v1502; GFX942-NEXT: v_mov_b32_e32 v3, 0x7fc00000503; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v1504; GFX942-NEXT: s_nop 1505; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc506; GFX942-NEXT: v_min_f32_e32 v1, 0x41000000, v0507; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0508; GFX942-NEXT: s_nop 1509; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v1, vcc510; GFX942-NEXT: s_setpc_b64 s[30:31]511;512; GFX950-LABEL: v_fminimum3_f32__const2:513; GFX950: ; %bb.0:514; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)515; GFX950-NEXT: s_mov_b32 s0, 0x41000000516; GFX950-NEXT: v_minimum3_f32 v0, v0, v1, s0517; GFX950-NEXT: s_setpc_b64 s[30:31]518 %max0 = call float @llvm.minimum.f32(float %a, float %b)519 %max1 = call float @llvm.minimum.f32(float %max0, float 8.0)520 ret float %max1521}522 523define float @v_fminimum3_f32_inlineimm0(float %b, float %c) {524; GFX12-LABEL: v_fminimum3_f32_inlineimm0:525; GFX12: ; %bb.0:526; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0527; GFX12-NEXT: s_wait_expcnt 0x0528; GFX12-NEXT: s_wait_samplecnt 0x0529; GFX12-NEXT: s_wait_bvhcnt 0x0530; GFX12-NEXT: s_wait_kmcnt 0x0531; GFX12-NEXT: v_minimum3_f32 v0, v0, 4.0, v1532; GFX12-NEXT: s_setpc_b64 s[30:31]533;534; GFX942-LABEL: v_fminimum3_f32_inlineimm0:535; GFX942: ; %bb.0:536; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)537; GFX942-NEXT: v_min_f32_e32 v2, 4.0, v0538; GFX942-NEXT: v_mov_b32_e32 v3, 0x7fc00000539; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0540; GFX942-NEXT: s_nop 1541; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc542; GFX942-NEXT: v_min_f32_e32 v2, v0, v1543; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v1544; GFX942-NEXT: s_nop 1545; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc546; GFX942-NEXT: s_setpc_b64 s[30:31]547;548; GFX950-LABEL: v_fminimum3_f32_inlineimm0:549; GFX950: ; %bb.0:550; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)551; GFX950-NEXT: v_minimum3_f32 v0, v0, 4.0, v1552; GFX950-NEXT: s_setpc_b64 s[30:31]553 %max0 = call float @llvm.minimum.f32(float 4.0, float %b)554 %max1 = call float @llvm.minimum.f32(float %max0, float %c)555 ret float %max1556}557 558define float @v_fminimum3_f32__inlineimm(float %a, float %b) {559; GFX12-LABEL: v_fminimum3_f32__inlineimm:560; GFX12: ; %bb.0:561; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0562; GFX12-NEXT: s_wait_expcnt 0x0563; GFX12-NEXT: s_wait_samplecnt 0x0564; GFX12-NEXT: s_wait_bvhcnt 0x0565; GFX12-NEXT: s_wait_kmcnt 0x0566; GFX12-NEXT: v_minimum3_f32 v0, v0, v1, 4.0567; GFX12-NEXT: s_setpc_b64 s[30:31]568;569; GFX942-LABEL: v_fminimum3_f32__inlineimm:570; GFX942: ; %bb.0:571; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)572; GFX942-NEXT: v_min_f32_e32 v2, v0, v1573; GFX942-NEXT: v_mov_b32_e32 v3, 0x7fc00000574; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v1575; GFX942-NEXT: s_nop 1576; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc577; GFX942-NEXT: v_min_f32_e32 v1, 4.0, v0578; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0579; GFX942-NEXT: s_nop 1580; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v1, vcc581; GFX942-NEXT: s_setpc_b64 s[30:31]582;583; GFX950-LABEL: v_fminimum3_f32__inlineimm:584; GFX950: ; %bb.0:585; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)586; GFX950-NEXT: v_minimum3_f32 v0, v0, v1, 4.0587; GFX950-NEXT: s_setpc_b64 s[30:31]588 %max0 = call float @llvm.minimum.f32(float %a, float %b)589 %max1 = call float @llvm.minimum.f32(float %max0, float 4.0)590 ret float %max1591}592 593define float @v_fminimum3_f32_const1_const2(float %a) {594; GFX12-LABEL: v_fminimum3_f32_const1_const2:595; GFX12: ; %bb.0:596; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0597; GFX12-NEXT: s_wait_expcnt 0x0598; GFX12-NEXT: s_wait_samplecnt 0x0599; GFX12-NEXT: s_wait_bvhcnt 0x0600; GFX12-NEXT: s_wait_kmcnt 0x0601; GFX12-NEXT: s_mov_b32 s0, 0x41000000602; GFX12-NEXT: s_wait_alu depctr_sa_sdst(0)603; GFX12-NEXT: v_minimum3_f32 v0, v0, s0, 0x41800000604; GFX12-NEXT: s_setpc_b64 s[30:31]605;606; GFX942-LABEL: v_fminimum3_f32_const1_const2:607; GFX942: ; %bb.0:608; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)609; GFX942-NEXT: v_min_f32_e32 v1, 0x41000000, v0610; GFX942-NEXT: v_mov_b32_e32 v2, 0x7fc00000611; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0612; GFX942-NEXT: s_nop 1613; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc614; GFX942-NEXT: v_min_f32_e32 v1, 0x41800000, v0615; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0616; GFX942-NEXT: s_nop 1617; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc618; GFX942-NEXT: s_setpc_b64 s[30:31]619;620; GFX950-LABEL: v_fminimum3_f32_const1_const2:621; GFX950: ; %bb.0:622; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)623; GFX950-NEXT: s_mov_b32 s0, 0x41000000624; GFX950-NEXT: v_mov_b32_e32 v1, 0x41800000625; GFX950-NEXT: v_minimum3_f32 v0, v0, s0, v1626; GFX950-NEXT: s_setpc_b64 s[30:31]627 %max0 = call float @llvm.minimum.f32(float %a, float 8.0)628 %max1 = call float @llvm.minimum.f32(float %max0, float 16.0)629 ret float %max1630}631 632define <2 x float> @v_fminimum3_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) {633; GFX12-LABEL: v_fminimum3_v2f32:634; GFX12: ; %bb.0:635; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0636; GFX12-NEXT: s_wait_expcnt 0x0637; GFX12-NEXT: s_wait_samplecnt 0x0638; GFX12-NEXT: s_wait_bvhcnt 0x0639; GFX12-NEXT: s_wait_kmcnt 0x0640; GFX12-NEXT: v_minimum3_f32 v0, v4, v0, v2641; GFX12-NEXT: v_minimum3_f32 v1, v5, v1, v3642; GFX12-NEXT: s_setpc_b64 s[30:31]643;644; GFX942-LABEL: v_fminimum3_v2f32:645; GFX942: ; %bb.0:646; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)647; GFX942-NEXT: v_min_f32_e32 v6, v1, v3648; GFX942-NEXT: v_mov_b32_e32 v7, 0x7fc00000649; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v3650; GFX942-NEXT: v_min_f32_e32 v3, v0, v2651; GFX942-NEXT: s_nop 0652; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc653; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2654; GFX942-NEXT: s_nop 1655; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v3, vcc656; GFX942-NEXT: v_min_f32_e32 v2, v4, v0657; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v4, v0658; GFX942-NEXT: s_nop 1659; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v2, vcc660; GFX942-NEXT: v_min_f32_e32 v2, v5, v1661; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v5, v1662; GFX942-NEXT: s_nop 1663; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v2, vcc664; GFX942-NEXT: s_setpc_b64 s[30:31]665;666; GFX950-LABEL: v_fminimum3_v2f32:667; GFX950: ; %bb.0:668; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)669; GFX950-NEXT: v_minimum3_f32 v0, v4, v0, v2670; GFX950-NEXT: v_minimum3_f32 v1, v5, v1, v3671; GFX950-NEXT: s_setpc_b64 s[30:31]672 %max0 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %a, <2 x float> %b)673 %max1 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %c, <2 x float> %max0)674 ret <2 x float> %max1675}676 677define <2 x float> @v_fminimum3_v2f32_commute(<2 x float> %a, <2 x float> %b, <2 x float> %c) {678; GFX12-LABEL: v_fminimum3_v2f32_commute:679; GFX12: ; %bb.0:680; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0681; GFX12-NEXT: s_wait_expcnt 0x0682; GFX12-NEXT: s_wait_samplecnt 0x0683; GFX12-NEXT: s_wait_bvhcnt 0x0684; GFX12-NEXT: s_wait_kmcnt 0x0685; GFX12-NEXT: v_minimum3_f32 v0, v0, v2, v4686; GFX12-NEXT: v_minimum3_f32 v1, v1, v3, v5687; GFX12-NEXT: s_setpc_b64 s[30:31]688;689; GFX942-LABEL: v_fminimum3_v2f32_commute:690; GFX942: ; %bb.0:691; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)692; GFX942-NEXT: v_min_f32_e32 v6, v1, v3693; GFX942-NEXT: v_mov_b32_e32 v7, 0x7fc00000694; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v3695; GFX942-NEXT: v_min_f32_e32 v3, v0, v2696; GFX942-NEXT: s_nop 0697; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc698; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2699; GFX942-NEXT: s_nop 1700; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v3, vcc701; GFX942-NEXT: v_min_f32_e32 v2, v0, v4702; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v4703; GFX942-NEXT: s_nop 1704; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v2, vcc705; GFX942-NEXT: v_min_f32_e32 v2, v1, v5706; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v5707; GFX942-NEXT: s_nop 1708; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v2, vcc709; GFX942-NEXT: s_setpc_b64 s[30:31]710;711; GFX950-LABEL: v_fminimum3_v2f32_commute:712; GFX950: ; %bb.0:713; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)714; GFX950-NEXT: v_minimum3_f32 v0, v0, v2, v4715; GFX950-NEXT: v_minimum3_f32 v1, v1, v3, v5716; GFX950-NEXT: s_setpc_b64 s[30:31]717 %max0 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %a, <2 x float> %b)718 %max1 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %max0, <2 x float> %c)719 ret <2 x float> %max1720}721 722define <2 x float> @v_fminimum3_v2f32__fabs_all(<2 x float> %a, <2 x float> %b, <2 x float> %c) {723; GFX12-LABEL: v_fminimum3_v2f32__fabs_all:724; GFX12: ; %bb.0:725; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0726; GFX12-NEXT: s_wait_expcnt 0x0727; GFX12-NEXT: s_wait_samplecnt 0x0728; GFX12-NEXT: s_wait_bvhcnt 0x0729; GFX12-NEXT: s_wait_kmcnt 0x0730; GFX12-NEXT: v_minimum3_f32 v0, |v0|, |v2|, |v4|731; GFX12-NEXT: v_minimum3_f32 v1, |v1|, |v3|, |v5|732; GFX12-NEXT: s_setpc_b64 s[30:31]733;734; GFX942-LABEL: v_fminimum3_v2f32__fabs_all:735; GFX942: ; %bb.0:736; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)737; GFX942-NEXT: v_min_f32_e64 v6, |v1|, |v3|738; GFX942-NEXT: v_mov_b32_e32 v7, 0x7fc00000739; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v1|, |v3|740; GFX942-NEXT: v_min_f32_e64 v3, |v0|, |v2|741; GFX942-NEXT: s_nop 0742; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc743; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v0|, |v2|744; GFX942-NEXT: s_nop 1745; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v3, vcc746; GFX942-NEXT: v_min_f32_e64 v2, v0, |v4|747; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, |v4|748; GFX942-NEXT: s_nop 1749; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v2, vcc750; GFX942-NEXT: v_min_f32_e64 v2, v1, |v5|751; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v1, |v5|752; GFX942-NEXT: s_nop 1753; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v2, vcc754; GFX942-NEXT: s_setpc_b64 s[30:31]755;756; GFX950-LABEL: v_fminimum3_v2f32__fabs_all:757; GFX950: ; %bb.0:758; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)759; GFX950-NEXT: v_minimum3_f32 v0, |v0|, |v2|, |v4|760; GFX950-NEXT: v_minimum3_f32 v1, |v1|, |v3|, |v5|761; GFX950-NEXT: s_setpc_b64 s[30:31]762 %a.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %a)763 %b.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %b)764 %c.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %c)765 %max0 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %a.fabs, <2 x float> %b.fabs)766 %max1 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %max0, <2 x float> %c.fabs)767 ret <2 x float> %max1768}769 770define <2 x float> @v_fminimum3_v2f32__fneg_all(<2 x float> %a, <2 x float> %b, <2 x float> %c) {771; GFX12-LABEL: v_fminimum3_v2f32__fneg_all:772; GFX12: ; %bb.0:773; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0774; GFX12-NEXT: s_wait_expcnt 0x0775; GFX12-NEXT: s_wait_samplecnt 0x0776; GFX12-NEXT: s_wait_bvhcnt 0x0777; GFX12-NEXT: s_wait_kmcnt 0x0778; GFX12-NEXT: v_minimum3_f32 v0, -v0, -v2, -v4779; GFX12-NEXT: v_minimum3_f32 v1, -v1, -v3, -v5780; GFX12-NEXT: s_setpc_b64 s[30:31]781;782; GFX942-LABEL: v_fminimum3_v2f32__fneg_all:783; GFX942: ; %bb.0:784; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)785; GFX942-NEXT: v_min_f32_e64 v6, -v1, -v3786; GFX942-NEXT: v_mov_b32_e32 v7, 0x7fc00000787; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v1, -v3788; GFX942-NEXT: v_min_f32_e64 v3, -v0, -v2789; GFX942-NEXT: s_nop 0790; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc791; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v0, -v2792; GFX942-NEXT: s_nop 1793; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v3, vcc794; GFX942-NEXT: v_min_f32_e64 v2, v0, -v4795; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, -v4796; GFX942-NEXT: s_nop 1797; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v2, vcc798; GFX942-NEXT: v_min_f32_e64 v2, v1, -v5799; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v1, -v5800; GFX942-NEXT: s_nop 1801; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v2, vcc802; GFX942-NEXT: s_setpc_b64 s[30:31]803;804; GFX950-LABEL: v_fminimum3_v2f32__fneg_all:805; GFX950: ; %bb.0:806; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)807; GFX950-NEXT: v_minimum3_f32 v0, -v0, -v2, -v4808; GFX950-NEXT: v_minimum3_f32 v1, -v1, -v3, -v5809; GFX950-NEXT: s_setpc_b64 s[30:31]810 %a.fneg = fneg <2 x float> %a811 %b.fneg = fneg <2 x float> %b812 %c.fneg = fneg <2 x float> %c813 %max0 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %a.fneg, <2 x float> %b.fneg)814 %max1 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %max0, <2 x float> %c.fneg)815 ret <2 x float> %max1816}817 818define <2 x float> @v_fminimum3_v2f32__inlineimm1(<2 x float> %a, <2 x float> %c) {819; GFX12-LABEL: v_fminimum3_v2f32__inlineimm1:820; GFX12: ; %bb.0:821; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0822; GFX12-NEXT: s_wait_expcnt 0x0823; GFX12-NEXT: s_wait_samplecnt 0x0824; GFX12-NEXT: s_wait_bvhcnt 0x0825; GFX12-NEXT: s_wait_kmcnt 0x0826; GFX12-NEXT: v_minimum3_f32 v0, v0, 2.0, v2827; GFX12-NEXT: v_minimum3_f32 v1, v1, 2.0, v3828; GFX12-NEXT: s_setpc_b64 s[30:31]829;830; GFX942-LABEL: v_fminimum3_v2f32__inlineimm1:831; GFX942: ; %bb.0:832; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)833; GFX942-NEXT: v_min_f32_e32 v4, 2.0, v1834; GFX942-NEXT: v_mov_b32_e32 v5, 0x7fc00000835; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v1836; GFX942-NEXT: s_nop 1837; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc838; GFX942-NEXT: v_min_f32_e32 v4, 2.0, v0839; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0840; GFX942-NEXT: s_nop 1841; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc842; GFX942-NEXT: v_min_f32_e32 v4, v0, v2843; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2844; GFX942-NEXT: v_min_f32_e32 v2, v1, v3845; GFX942-NEXT: s_nop 0846; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc847; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v3848; GFX942-NEXT: s_nop 1849; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v2, vcc850; GFX942-NEXT: s_setpc_b64 s[30:31]851;852; GFX950-LABEL: v_fminimum3_v2f32__inlineimm1:853; GFX950: ; %bb.0:854; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)855; GFX950-NEXT: v_minimum3_f32 v0, v0, 2.0, v2856; GFX950-NEXT: v_minimum3_f32 v1, v1, 2.0, v3857; GFX950-NEXT: s_setpc_b64 s[30:31]858 %max0 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %a, <2 x float> <float 2.0, float 2.0>)859 %max1 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %max0, <2 x float> %c)860 ret <2 x float> %max1861}862 863define <2 x float> @v_fminimum3_v2f32__inlineimm2(<2 x float> %a, <2 x float> %b) {864; GFX12-LABEL: v_fminimum3_v2f32__inlineimm2:865; GFX12: ; %bb.0:866; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0867; GFX12-NEXT: s_wait_expcnt 0x0868; GFX12-NEXT: s_wait_samplecnt 0x0869; GFX12-NEXT: s_wait_bvhcnt 0x0870; GFX12-NEXT: s_wait_kmcnt 0x0871; GFX12-NEXT: v_minimum3_f32 v0, v0, v2, 4.0872; GFX12-NEXT: v_minimum3_f32 v1, v1, v3, 4.0873; GFX12-NEXT: s_setpc_b64 s[30:31]874;875; GFX942-LABEL: v_fminimum3_v2f32__inlineimm2:876; GFX942: ; %bb.0:877; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)878; GFX942-NEXT: v_min_f32_e32 v4, v1, v3879; GFX942-NEXT: v_mov_b32_e32 v5, 0x7fc00000880; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v3881; GFX942-NEXT: v_min_f32_e32 v3, v0, v2882; GFX942-NEXT: s_nop 0883; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc884; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v2885; GFX942-NEXT: s_nop 1886; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v3, vcc887; GFX942-NEXT: v_min_f32_e32 v2, 4.0, v0888; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v0889; GFX942-NEXT: s_nop 1890; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v2, vcc891; GFX942-NEXT: v_min_f32_e32 v2, 4.0, v1892; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v1893; GFX942-NEXT: s_nop 1894; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v2, vcc895; GFX942-NEXT: s_setpc_b64 s[30:31]896;897; GFX950-LABEL: v_fminimum3_v2f32__inlineimm2:898; GFX950: ; %bb.0:899; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; GFX950-NEXT: v_minimum3_f32 v0, v0, v2, 4.0901; GFX950-NEXT: v_minimum3_f32 v1, v1, v3, 4.0902; GFX950-NEXT: s_setpc_b64 s[30:31]903 %max0 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %a, <2 x float> %b)904 %max1 = call <2 x float> @llvm.minimum.v2f32(<2 x float> %max0, <2 x float> <float 4.0, float 4.0>)905 ret <2 x float> %max1906}907 908define <3 x float> @v_fminimum3_v3f32(<3 x float> %a, <3 x float> %b, <3 x float> %c) {909; GFX12-LABEL: v_fminimum3_v3f32:910; GFX12: ; %bb.0:911; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0912; GFX12-NEXT: s_wait_expcnt 0x0913; GFX12-NEXT: s_wait_samplecnt 0x0914; GFX12-NEXT: s_wait_bvhcnt 0x0915; GFX12-NEXT: s_wait_kmcnt 0x0916; GFX12-NEXT: v_minimum3_f32 v0, v6, v0, v3917; GFX12-NEXT: v_minimum3_f32 v1, v7, v1, v4918; GFX12-NEXT: v_minimum3_f32 v2, v8, v2, v5919; GFX12-NEXT: s_setpc_b64 s[30:31]920;921; GFX942-LABEL: v_fminimum3_v3f32:922; GFX942: ; %bb.0:923; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)924; GFX942-NEXT: v_min_f32_e32 v9, v2, v5925; GFX942-NEXT: v_mov_b32_e32 v10, 0x7fc00000926; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v5927; GFX942-NEXT: v_min_f32_e32 v5, v1, v4928; GFX942-NEXT: s_nop 0929; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v9, vcc930; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v4931; GFX942-NEXT: v_min_f32_e32 v4, v0, v3932; GFX942-NEXT: s_nop 0933; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v5, vcc934; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v3935; GFX942-NEXT: s_nop 1936; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v4, vcc937; GFX942-NEXT: v_min_f32_e32 v3, v6, v0938; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v6, v0939; GFX942-NEXT: s_nop 1940; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v3, vcc941; GFX942-NEXT: v_min_f32_e32 v3, v7, v1942; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v7, v1943; GFX942-NEXT: s_nop 1944; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v3, vcc945; GFX942-NEXT: v_min_f32_e32 v3, v8, v2946; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v8, v2947; GFX942-NEXT: s_nop 1948; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v3, vcc949; GFX942-NEXT: s_setpc_b64 s[30:31]950;951; GFX950-LABEL: v_fminimum3_v3f32:952; GFX950: ; %bb.0:953; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)954; GFX950-NEXT: v_minimum3_f32 v0, v6, v0, v3955; GFX950-NEXT: v_minimum3_f32 v1, v7, v1, v4956; GFX950-NEXT: v_minimum3_f32 v2, v8, v2, v5957; GFX950-NEXT: s_setpc_b64 s[30:31]958 %max0 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %a, <3 x float> %b)959 %max1 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %c, <3 x float> %max0)960 ret <3 x float> %max1961}962 963define <3 x float> @v_fminimum3_v3f32_commute(<3 x float> %a, <3 x float> %b, <3 x float> %c) {964; GFX12-LABEL: v_fminimum3_v3f32_commute:965; GFX12: ; %bb.0:966; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0967; GFX12-NEXT: s_wait_expcnt 0x0968; GFX12-NEXT: s_wait_samplecnt 0x0969; GFX12-NEXT: s_wait_bvhcnt 0x0970; GFX12-NEXT: s_wait_kmcnt 0x0971; GFX12-NEXT: v_minimum3_f32 v0, v0, v3, v6972; GFX12-NEXT: v_minimum3_f32 v1, v1, v4, v7973; GFX12-NEXT: v_minimum3_f32 v2, v2, v5, v8974; GFX12-NEXT: s_setpc_b64 s[30:31]975;976; GFX942-LABEL: v_fminimum3_v3f32_commute:977; GFX942: ; %bb.0:978; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)979; GFX942-NEXT: v_min_f32_e32 v9, v2, v5980; GFX942-NEXT: v_mov_b32_e32 v10, 0x7fc00000981; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v5982; GFX942-NEXT: v_min_f32_e32 v5, v1, v4983; GFX942-NEXT: s_nop 0984; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v9, vcc985; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v4986; GFX942-NEXT: v_min_f32_e32 v4, v0, v3987; GFX942-NEXT: s_nop 0988; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v5, vcc989; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v3990; GFX942-NEXT: s_nop 1991; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v4, vcc992; GFX942-NEXT: v_min_f32_e32 v3, v0, v6993; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v6994; GFX942-NEXT: s_nop 1995; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v3, vcc996; GFX942-NEXT: v_min_f32_e32 v3, v1, v7997; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v7998; GFX942-NEXT: s_nop 1999; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v3, vcc1000; GFX942-NEXT: v_min_f32_e32 v3, v2, v81001; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v81002; GFX942-NEXT: s_nop 11003; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v3, vcc1004; GFX942-NEXT: s_setpc_b64 s[30:31]1005;1006; GFX950-LABEL: v_fminimum3_v3f32_commute:1007; GFX950: ; %bb.0:1008; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1009; GFX950-NEXT: v_minimum3_f32 v0, v0, v3, v61010; GFX950-NEXT: v_minimum3_f32 v1, v1, v4, v71011; GFX950-NEXT: v_minimum3_f32 v2, v2, v5, v81012; GFX950-NEXT: s_setpc_b64 s[30:31]1013 %max0 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %a, <3 x float> %b)1014 %max1 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %max0, <3 x float> %c)1015 ret <3 x float> %max11016}1017 1018define <3 x float> @v_fminimum3_v3f32__fabs_all(<3 x float> %a, <3 x float> %b, <3 x float> %c) {1019; GFX12-LABEL: v_fminimum3_v3f32__fabs_all:1020; GFX12: ; %bb.0:1021; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01022; GFX12-NEXT: s_wait_expcnt 0x01023; GFX12-NEXT: s_wait_samplecnt 0x01024; GFX12-NEXT: s_wait_bvhcnt 0x01025; GFX12-NEXT: s_wait_kmcnt 0x01026; GFX12-NEXT: v_minimum3_f32 v0, |v0|, |v3|, |v6|1027; GFX12-NEXT: v_minimum3_f32 v1, |v1|, |v4|, |v7|1028; GFX12-NEXT: v_minimum3_f32 v2, |v2|, |v5|, |v8|1029; GFX12-NEXT: s_setpc_b64 s[30:31]1030;1031; GFX942-LABEL: v_fminimum3_v3f32__fabs_all:1032; GFX942: ; %bb.0:1033; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1034; GFX942-NEXT: v_min_f32_e64 v9, |v2|, |v5|1035; GFX942-NEXT: v_mov_b32_e32 v10, 0x7fc000001036; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v2|, |v5|1037; GFX942-NEXT: v_min_f32_e64 v5, |v1|, |v4|1038; GFX942-NEXT: s_nop 01039; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v9, vcc1040; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v1|, |v4|1041; GFX942-NEXT: v_min_f32_e64 v4, |v0|, |v3|1042; GFX942-NEXT: s_nop 01043; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v5, vcc1044; GFX942-NEXT: v_cmp_o_f32_e64 vcc, |v0|, |v3|1045; GFX942-NEXT: s_nop 11046; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v4, vcc1047; GFX942-NEXT: v_min_f32_e64 v3, v0, |v6|1048; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, |v6|1049; GFX942-NEXT: s_nop 11050; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v3, vcc1051; GFX942-NEXT: v_min_f32_e64 v3, v1, |v7|1052; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v1, |v7|1053; GFX942-NEXT: s_nop 11054; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v3, vcc1055; GFX942-NEXT: v_min_f32_e64 v3, v2, |v8|1056; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v2, |v8|1057; GFX942-NEXT: s_nop 11058; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v3, vcc1059; GFX942-NEXT: s_setpc_b64 s[30:31]1060;1061; GFX950-LABEL: v_fminimum3_v3f32__fabs_all:1062; GFX950: ; %bb.0:1063; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1064; GFX950-NEXT: v_minimum3_f32 v0, |v0|, |v3|, |v6|1065; GFX950-NEXT: v_minimum3_f32 v1, |v1|, |v4|, |v7|1066; GFX950-NEXT: v_minimum3_f32 v2, |v2|, |v5|, |v8|1067; GFX950-NEXT: s_setpc_b64 s[30:31]1068 %a.fabs = call <3 x float> @llvm.fabs.v3f32(<3 x float> %a)1069 %b.fabs = call <3 x float> @llvm.fabs.v3f32(<3 x float> %b)1070 %c.fabs = call <3 x float> @llvm.fabs.v3f32(<3 x float> %c)1071 %max0 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %a.fabs, <3 x float> %b.fabs)1072 %max1 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %max0, <3 x float> %c.fabs)1073 ret <3 x float> %max11074}1075 1076define <3 x float> @v_fminimum3_v3f32__fneg_all(<3 x float> %a, <3 x float> %b, <3 x float> %c) {1077; GFX12-LABEL: v_fminimum3_v3f32__fneg_all:1078; GFX12: ; %bb.0:1079; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01080; GFX12-NEXT: s_wait_expcnt 0x01081; GFX12-NEXT: s_wait_samplecnt 0x01082; GFX12-NEXT: s_wait_bvhcnt 0x01083; GFX12-NEXT: s_wait_kmcnt 0x01084; GFX12-NEXT: v_minimum3_f32 v0, -v0, -v3, -v61085; GFX12-NEXT: v_minimum3_f32 v1, -v1, -v4, -v71086; GFX12-NEXT: v_minimum3_f32 v2, -v2, -v5, -v81087; GFX12-NEXT: s_setpc_b64 s[30:31]1088;1089; GFX942-LABEL: v_fminimum3_v3f32__fneg_all:1090; GFX942: ; %bb.0:1091; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1092; GFX942-NEXT: v_min_f32_e64 v9, -v2, -v51093; GFX942-NEXT: v_mov_b32_e32 v10, 0x7fc000001094; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v2, -v51095; GFX942-NEXT: v_min_f32_e64 v5, -v1, -v41096; GFX942-NEXT: s_nop 01097; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v9, vcc1098; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v1, -v41099; GFX942-NEXT: v_min_f32_e64 v4, -v0, -v31100; GFX942-NEXT: s_nop 01101; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v5, vcc1102; GFX942-NEXT: v_cmp_o_f32_e64 vcc, -v0, -v31103; GFX942-NEXT: s_nop 11104; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v4, vcc1105; GFX942-NEXT: v_min_f32_e64 v3, v0, -v61106; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v0, -v61107; GFX942-NEXT: s_nop 11108; GFX942-NEXT: v_cndmask_b32_e32 v0, v10, v3, vcc1109; GFX942-NEXT: v_min_f32_e64 v3, v1, -v71110; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v1, -v71111; GFX942-NEXT: s_nop 11112; GFX942-NEXT: v_cndmask_b32_e32 v1, v10, v3, vcc1113; GFX942-NEXT: v_min_f32_e64 v3, v2, -v81114; GFX942-NEXT: v_cmp_o_f32_e64 vcc, v2, -v81115; GFX942-NEXT: s_nop 11116; GFX942-NEXT: v_cndmask_b32_e32 v2, v10, v3, vcc1117; GFX942-NEXT: s_setpc_b64 s[30:31]1118;1119; GFX950-LABEL: v_fminimum3_v3f32__fneg_all:1120; GFX950: ; %bb.0:1121; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1122; GFX950-NEXT: v_minimum3_f32 v0, -v0, -v3, -v61123; GFX950-NEXT: v_minimum3_f32 v1, -v1, -v4, -v71124; GFX950-NEXT: v_minimum3_f32 v2, -v2, -v5, -v81125; GFX950-NEXT: s_setpc_b64 s[30:31]1126 %a.fneg = fneg <3 x float> %a1127 %b.fneg = fneg <3 x float> %b1128 %c.fneg = fneg <3 x float> %c1129 %max0 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %a.fneg, <3 x float> %b.fneg)1130 %max1 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %max0, <3 x float> %c.fneg)1131 ret <3 x float> %max11132}1133 1134define <3 x float> @v_fminimum3_v3f32__inlineimm1(<3 x float> %a, <3 x float> %c) {1135; GFX12-LABEL: v_fminimum3_v3f32__inlineimm1:1136; GFX12: ; %bb.0:1137; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01138; GFX12-NEXT: s_wait_expcnt 0x01139; GFX12-NEXT: s_wait_samplecnt 0x01140; GFX12-NEXT: s_wait_bvhcnt 0x01141; GFX12-NEXT: s_wait_kmcnt 0x01142; GFX12-NEXT: v_minimum3_f32 v0, v0, 2.0, v31143; GFX12-NEXT: v_minimum3_f32 v1, v1, 2.0, v41144; GFX12-NEXT: v_minimum3_f32 v2, v2, 2.0, v51145; GFX12-NEXT: s_setpc_b64 s[30:31]1146;1147; GFX942-LABEL: v_fminimum3_v3f32__inlineimm1:1148; GFX942: ; %bb.0:1149; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1150; GFX942-NEXT: v_min_f32_e32 v6, 2.0, v21151; GFX942-NEXT: v_mov_b32_e32 v7, 0x7fc000001152; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v21153; GFX942-NEXT: s_nop 11154; GFX942-NEXT: v_cndmask_b32_e32 v2, v7, v6, vcc1155; GFX942-NEXT: v_min_f32_e32 v6, 2.0, v11156; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v11157; GFX942-NEXT: s_nop 11158; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc1159; GFX942-NEXT: v_min_f32_e32 v6, 2.0, v01160; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v01161; GFX942-NEXT: s_nop 11162; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc1163; GFX942-NEXT: v_min_f32_e32 v6, v0, v31164; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v31165; GFX942-NEXT: v_min_f32_e32 v3, v1, v41166; GFX942-NEXT: s_nop 01167; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc1168; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v41169; GFX942-NEXT: s_nop 11170; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v3, vcc1171; GFX942-NEXT: v_min_f32_e32 v3, v2, v51172; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v51173; GFX942-NEXT: s_nop 11174; GFX942-NEXT: v_cndmask_b32_e32 v2, v7, v3, vcc1175; GFX942-NEXT: s_setpc_b64 s[30:31]1176;1177; GFX950-LABEL: v_fminimum3_v3f32__inlineimm1:1178; GFX950: ; %bb.0:1179; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1180; GFX950-NEXT: v_minimum3_f32 v0, v0, 2.0, v31181; GFX950-NEXT: v_minimum3_f32 v1, v1, 2.0, v41182; GFX950-NEXT: v_minimum3_f32 v2, v2, 2.0, v51183; GFX950-NEXT: s_setpc_b64 s[30:31]1184 %max0 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %a, <3 x float> <float 2.0, float 2.0, float 2.0>)1185 %max1 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %max0, <3 x float> %c)1186 ret <3 x float> %max11187}1188 1189define <3 x float> @v_fminimum3_v3f32__inlineimm2(<3 x float> %a, <3 x float> %b) {1190; GFX12-LABEL: v_fminimum3_v3f32__inlineimm2:1191; GFX12: ; %bb.0:1192; GFX12-NEXT: s_wait_loadcnt_dscnt 0x01193; GFX12-NEXT: s_wait_expcnt 0x01194; GFX12-NEXT: s_wait_samplecnt 0x01195; GFX12-NEXT: s_wait_bvhcnt 0x01196; GFX12-NEXT: s_wait_kmcnt 0x01197; GFX12-NEXT: v_minimum3_f32 v0, v0, v3, 4.01198; GFX12-NEXT: v_minimum3_f32 v1, v1, v4, 4.01199; GFX12-NEXT: v_minimum3_f32 v2, v2, v5, 4.01200; GFX12-NEXT: s_setpc_b64 s[30:31]1201;1202; GFX942-LABEL: v_fminimum3_v3f32__inlineimm2:1203; GFX942: ; %bb.0:1204; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1205; GFX942-NEXT: v_min_f32_e32 v6, v2, v51206; GFX942-NEXT: v_mov_b32_e32 v7, 0x7fc000001207; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v51208; GFX942-NEXT: v_min_f32_e32 v5, v1, v41209; GFX942-NEXT: s_nop 01210; GFX942-NEXT: v_cndmask_b32_e32 v2, v7, v6, vcc1211; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v41212; GFX942-NEXT: v_min_f32_e32 v4, v0, v31213; GFX942-NEXT: s_nop 01214; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v5, vcc1215; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v31216; GFX942-NEXT: s_nop 11217; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v4, vcc1218; GFX942-NEXT: v_min_f32_e32 v3, 4.0, v01219; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v01220; GFX942-NEXT: s_nop 11221; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v3, vcc1222; GFX942-NEXT: v_min_f32_e32 v3, 4.0, v11223; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v1, v11224; GFX942-NEXT: s_nop 11225; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v3, vcc1226; GFX942-NEXT: v_min_f32_e32 v3, 4.0, v21227; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v2, v21228; GFX942-NEXT: s_nop 11229; GFX942-NEXT: v_cndmask_b32_e32 v2, v7, v3, vcc1230; GFX942-NEXT: s_setpc_b64 s[30:31]1231;1232; GFX950-LABEL: v_fminimum3_v3f32__inlineimm2:1233; GFX950: ; %bb.0:1234; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1235; GFX950-NEXT: v_minimum3_f32 v0, v0, v3, 4.01236; GFX950-NEXT: v_minimum3_f32 v1, v1, v4, 4.01237; GFX950-NEXT: v_minimum3_f32 v2, v2, v5, 4.01238; GFX950-NEXT: s_setpc_b64 s[30:31]1239 %max0 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %a, <3 x float> %b)1240 %max1 = call <3 x float> @llvm.minimum.v3f32(<3 x float> %max0, <3 x float> <float 4.0, float 4.0, float 4.0>)1241 ret <3 x float> %max11242}1243 1244 1245define half @v_fminimum3_f16(half %a, half %b, half %c) {1246; GFX12-TRUE16-LABEL: v_fminimum3_f16:1247; GFX12-TRUE16: ; %bb.0:1248; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01249; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01250; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01251; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01252; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01253; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, v1.l, v2.l1254; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1255;1256; GFX12-FAKE16-LABEL: v_fminimum3_f16:1257; GFX12-FAKE16: ; %bb.0:1258; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01259; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01260; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01261; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01262; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01263; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, v1, v21264; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1265;1266; GFX942-LABEL: v_fminimum3_f16:1267; GFX942: ; %bb.0:1268; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1269; GFX942-NEXT: v_min_f16_e32 v3, v0, v11270; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001271; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11272; GFX942-NEXT: s_nop 11273; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1274; GFX942-NEXT: v_min_f16_e32 v1, v0, v21275; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v21276; GFX942-NEXT: s_nop 11277; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1278; GFX942-NEXT: s_setpc_b64 s[30:31]1279;1280; GFX950-LABEL: v_fminimum3_f16:1281; GFX950: ; %bb.0:1282; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1283; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21284; GFX950-NEXT: s_setpc_b64 s[30:31]1285 %max0 = call half @llvm.minimum.f16(half %a, half %b)1286 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1287 ret half %max11288}1289 1290define half @v_fminimum3_f16_commute(half %a, half %b, half %c) {1291; GFX12-TRUE16-LABEL: v_fminimum3_f16_commute:1292; GFX12-TRUE16: ; %bb.0:1293; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01294; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01295; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01296; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01297; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01298; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v2.l, v0.l, v1.l1299; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1300;1301; GFX12-FAKE16-LABEL: v_fminimum3_f16_commute:1302; GFX12-FAKE16: ; %bb.0:1303; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01304; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01305; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01306; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01307; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01308; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v2, v0, v11309; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1310;1311; GFX942-LABEL: v_fminimum3_f16_commute:1312; GFX942: ; %bb.0:1313; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1314; GFX942-NEXT: v_min_f16_e32 v3, v0, v11315; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001316; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11317; GFX942-NEXT: s_nop 11318; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1319; GFX942-NEXT: v_min_f16_e32 v1, v2, v01320; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v2, v01321; GFX942-NEXT: s_nop 11322; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1323; GFX942-NEXT: s_setpc_b64 s[30:31]1324;1325; GFX950-LABEL: v_fminimum3_f16_commute:1326; GFX950: ; %bb.0:1327; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1328; GFX950-NEXT: v_pk_minimum3_f16 v0, v2, v0, v11329; GFX950-NEXT: s_setpc_b64 s[30:31]1330 %max0 = call half @llvm.minimum.f16(half %a, half %b)1331 %max1 = call half @llvm.minimum.f16(half %c, half %max0)1332 ret half %max11333}1334 1335define amdgpu_ps i32 @s_fminimum3_f16(half inreg %a, half inreg %b, half inreg %c) {1336; GFX12-TRUE16-LABEL: s_fminimum3_f16:1337; GFX12-TRUE16: ; %bb.0:1338; GFX12-TRUE16-NEXT: v_mov_b16_e32 v0.l, s21339; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1340; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, s0, s1, v0.l1341; GFX12-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v01342; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1343; GFX12-TRUE16-NEXT: v_readfirstlane_b32 s0, v01344; GFX12-TRUE16-NEXT: s_wait_alu depctr_va_sdst(0)1345; GFX12-TRUE16-NEXT: ; return to shader part epilog1346;1347; GFX12-FAKE16-LABEL: s_fminimum3_f16:1348; GFX12-FAKE16: ; %bb.0:1349; GFX12-FAKE16-NEXT: v_mov_b32_e32 v0, s21350; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1351; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, s0, s1, v01352; GFX12-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01353; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1354; GFX12-FAKE16-NEXT: v_readfirstlane_b32 s0, v01355; GFX12-FAKE16-NEXT: s_wait_alu depctr_va_sdst(0)1356; GFX12-FAKE16-NEXT: ; return to shader part epilog1357;1358; GFX942-LABEL: s_fminimum3_f16:1359; GFX942: ; %bb.0:1360; GFX942-NEXT: v_mov_b32_e32 v0, s11361; GFX942-NEXT: v_min_f16_e32 v1, s0, v01362; GFX942-NEXT: v_mov_b32_e32 v2, 0x7e001363; GFX942-NEXT: v_cmp_o_f16_e32 vcc, s0, v01364; GFX942-NEXT: s_nop 11365; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc1366; GFX942-NEXT: v_min_f16_e32 v1, s2, v01367; GFX942-NEXT: v_cmp_o_f16_e32 vcc, s2, v01368; GFX942-NEXT: s_nop 11369; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc1370; GFX942-NEXT: v_and_b32_e32 v0, 0xffff, v01371; GFX942-NEXT: s_nop 01372; GFX942-NEXT: v_readfirstlane_b32 s0, v01373; GFX942-NEXT: ; return to shader part epilog1374;1375; GFX950-LABEL: s_fminimum3_f16:1376; GFX950: ; %bb.0:1377; GFX950-NEXT: v_mov_b32_e32 v0, s11378; GFX950-NEXT: v_mov_b32_e32 v1, s21379; GFX950-NEXT: v_pk_minimum3_f16 v0, s0, v0, v11380; GFX950-NEXT: s_nop 01381; GFX950-NEXT: v_and_b32_e32 v0, 0xffff, v01382; GFX950-NEXT: s_nop 01383; GFX950-NEXT: v_readfirstlane_b32 s0, v01384; GFX950-NEXT: ; return to shader part epilog1385 %max0 = call half @llvm.minimum.f16(half %a, half %b)1386 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1387 %cast = bitcast half %max1 to i161388 %zext = zext i16 %cast to i321389 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %zext)1390 ret i32 %readfirstlane1391}1392 1393define half @v_fminimum3_f16_fabs0(half %a, half %b, half %c) {1394; GFX12-TRUE16-LABEL: v_fminimum3_f16_fabs0:1395; GFX12-TRUE16: ; %bb.0:1396; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01397; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01398; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01399; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01400; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01401; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, |v0.l|, v1.l, v2.l1402; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1403;1404; GFX12-FAKE16-LABEL: v_fminimum3_f16_fabs0:1405; GFX12-FAKE16: ; %bb.0:1406; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01407; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01408; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01409; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01410; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01411; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, |v0|, v1, v21412; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1413;1414; GFX942-LABEL: v_fminimum3_f16_fabs0:1415; GFX942: ; %bb.0:1416; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1417; GFX942-NEXT: v_min_f16_e64 v3, |v0|, v11418; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001419; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v0|, v11420; GFX942-NEXT: s_nop 11421; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1422; GFX942-NEXT: v_min_f16_e32 v1, v0, v21423; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v21424; GFX942-NEXT: s_nop 11425; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1426; GFX942-NEXT: s_setpc_b64 s[30:31]1427;1428; GFX950-LABEL: v_fminimum3_f16_fabs0:1429; GFX950: ; %bb.0:1430; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1431; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff, v01432; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21433; GFX950-NEXT: s_setpc_b64 s[30:31]1434 %a.fabs = call half @llvm.fabs.f16(half %a)1435 %max0 = call half @llvm.minimum.f16(half %a.fabs, half %b)1436 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1437 ret half %max11438}1439 1440define half @v_fminimum3_f16_fabs1(half %a, half %b, half %c) {1441; GFX12-TRUE16-LABEL: v_fminimum3_f16_fabs1:1442; GFX12-TRUE16: ; %bb.0:1443; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01444; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01445; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01446; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01447; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01448; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, |v1.l|, v2.l1449; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1450;1451; GFX12-FAKE16-LABEL: v_fminimum3_f16_fabs1:1452; GFX12-FAKE16: ; %bb.0:1453; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01454; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01455; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01456; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01457; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01458; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, |v1|, v21459; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1460;1461; GFX942-LABEL: v_fminimum3_f16_fabs1:1462; GFX942: ; %bb.0:1463; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1464; GFX942-NEXT: v_min_f16_e64 v3, v0, |v1|1465; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001466; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, |v1|1467; GFX942-NEXT: s_nop 11468; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1469; GFX942-NEXT: v_min_f16_e32 v1, v0, v21470; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v21471; GFX942-NEXT: s_nop 11472; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1473; GFX942-NEXT: s_setpc_b64 s[30:31]1474;1475; GFX950-LABEL: v_fminimum3_f16_fabs1:1476; GFX950: ; %bb.0:1477; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1478; GFX950-NEXT: v_and_b32_e32 v1, 0x7fff, v11479; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21480; GFX950-NEXT: s_setpc_b64 s[30:31]1481 %b.fabs = call half @llvm.fabs.f16(half %b)1482 %max0 = call half @llvm.minimum.f16(half %a, half %b.fabs)1483 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1484 ret half %max11485}1486 1487define half @v_fminimum3_f16_fabs2(half %a, half %b, half %c) {1488; GFX12-TRUE16-LABEL: v_fminimum3_f16_fabs2:1489; GFX12-TRUE16: ; %bb.0:1490; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01491; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01492; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01493; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01494; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01495; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, v1.l, |v2.l|1496; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1497;1498; GFX12-FAKE16-LABEL: v_fminimum3_f16_fabs2:1499; GFX12-FAKE16: ; %bb.0:1500; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01501; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01502; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01503; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01504; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01505; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, v1, |v2|1506; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1507;1508; GFX942-LABEL: v_fminimum3_f16_fabs2:1509; GFX942: ; %bb.0:1510; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1511; GFX942-NEXT: v_min_f16_e32 v3, v0, v11512; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001513; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11514; GFX942-NEXT: s_nop 11515; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1516; GFX942-NEXT: v_min_f16_e64 v1, v0, |v2|1517; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, |v2|1518; GFX942-NEXT: s_nop 11519; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1520; GFX942-NEXT: s_setpc_b64 s[30:31]1521;1522; GFX950-LABEL: v_fminimum3_f16_fabs2:1523; GFX950: ; %bb.0:1524; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1525; GFX950-NEXT: v_and_b32_e32 v2, 0x7fff, v21526; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21527; GFX950-NEXT: s_setpc_b64 s[30:31]1528 %c.fabs = call half @llvm.fabs.f16(half %c)1529 %max0 = call half @llvm.minimum.f16(half %a, half %b)1530 %max1 = call half @llvm.minimum.f16(half %max0, half %c.fabs)1531 ret half %max11532}1533 1534define half @v_fminimum3_f16_fabs_all(half %a, half %b, half %c) {1535; GFX12-TRUE16-LABEL: v_fminimum3_f16_fabs_all:1536; GFX12-TRUE16: ; %bb.0:1537; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01538; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01539; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01540; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01541; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01542; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, |v0.l|, |v1.l|, |v2.l|1543; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1544;1545; GFX12-FAKE16-LABEL: v_fminimum3_f16_fabs_all:1546; GFX12-FAKE16: ; %bb.0:1547; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01548; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01549; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01550; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01551; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01552; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, |v0|, |v1|, |v2|1553; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1554;1555; GFX942-LABEL: v_fminimum3_f16_fabs_all:1556; GFX942: ; %bb.0:1557; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1558; GFX942-NEXT: v_min_f16_e64 v3, |v0|, |v1|1559; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001560; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v0|, |v1|1561; GFX942-NEXT: s_nop 11562; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1563; GFX942-NEXT: v_min_f16_e64 v1, v0, |v2|1564; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, |v2|1565; GFX942-NEXT: s_nop 11566; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1567; GFX942-NEXT: s_setpc_b64 s[30:31]1568;1569; GFX950-LABEL: v_fminimum3_f16_fabs_all:1570; GFX950: ; %bb.0:1571; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1572; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff, v01573; GFX950-NEXT: v_and_b32_e32 v1, 0x7fff, v11574; GFX950-NEXT: v_and_b32_e32 v2, 0x7fff, v21575; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21576; GFX950-NEXT: s_setpc_b64 s[30:31]1577 %a.fabs = call half @llvm.fabs.f16(half %a)1578 %b.fabs = call half @llvm.fabs.f16(half %b)1579 %c.fabs = call half @llvm.fabs.f16(half %c)1580 %max0 = call half @llvm.minimum.f16(half %a.fabs, half %b.fabs)1581 %max1 = call half @llvm.minimum.f16(half %max0, half %c.fabs)1582 ret half %max11583}1584 1585define half @v_fminimum3_f16_fneg_all(half %a, half %b, half %c) {1586; GFX12-TRUE16-LABEL: v_fminimum3_f16_fneg_all:1587; GFX12-TRUE16: ; %bb.0:1588; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01589; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01590; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01591; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01592; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01593; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, -v0.l, -v1.l, -v2.l1594; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1595;1596; GFX12-FAKE16-LABEL: v_fminimum3_f16_fneg_all:1597; GFX12-FAKE16: ; %bb.0:1598; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01599; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01600; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01601; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01602; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01603; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, -v0, -v1, -v21604; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1605;1606; GFX942-LABEL: v_fminimum3_f16_fneg_all:1607; GFX942: ; %bb.0:1608; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1609; GFX942-NEXT: v_min_f16_e64 v3, -v0, -v11610; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001611; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v0, -v11612; GFX942-NEXT: s_nop 11613; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1614; GFX942-NEXT: v_min_f16_e64 v1, v0, -v21615; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, -v21616; GFX942-NEXT: s_nop 11617; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1618; GFX942-NEXT: s_setpc_b64 s[30:31]1619;1620; GFX950-LABEL: v_fminimum3_f16_fneg_all:1621; GFX950: ; %bb.0:1622; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1623; GFX950-NEXT: v_xor_b32_e32 v0, 0x8000, v01624; GFX950-NEXT: v_xor_b32_e32 v1, 0x8000, v11625; GFX950-NEXT: v_xor_b32_e32 v2, 0x8000, v21626; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21627; GFX950-NEXT: s_setpc_b64 s[30:31]1628 %a.fneg = fneg half %a1629 %b.fneg = fneg half %b1630 %c.fneg = fneg half %c1631 %max0 = call half @llvm.minimum.f16(half %a.fneg, half %b.fneg)1632 %max1 = call half @llvm.minimum.f16(half %max0, half %c.fneg)1633 ret half %max11634}1635 1636define half @v_fminimum3_f16_fneg_fabs_all(half %a, half %b, half %c) {1637; GFX12-TRUE16-LABEL: v_fminimum3_f16_fneg_fabs_all:1638; GFX12-TRUE16: ; %bb.0:1639; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01640; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01641; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01642; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01643; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01644; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, -|v0.l|, -|v1.l|, -|v2.l|1645; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1646;1647; GFX12-FAKE16-LABEL: v_fminimum3_f16_fneg_fabs_all:1648; GFX12-FAKE16: ; %bb.0:1649; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01650; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01651; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01652; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01653; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01654; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, -|v0|, -|v1|, -|v2|1655; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1656;1657; GFX942-LABEL: v_fminimum3_f16_fneg_fabs_all:1658; GFX942: ; %bb.0:1659; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1660; GFX942-NEXT: v_min_f16_e64 v3, -|v0|, -|v1|1661; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001662; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -|v0|, -|v1|1663; GFX942-NEXT: s_nop 11664; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1665; GFX942-NEXT: v_min_f16_e64 v1, v0, -|v2|1666; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, -|v2|1667; GFX942-NEXT: s_nop 11668; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1669; GFX942-NEXT: s_setpc_b64 s[30:31]1670;1671; GFX950-LABEL: v_fminimum3_f16_fneg_fabs_all:1672; GFX950: ; %bb.0:1673; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1674; GFX950-NEXT: v_or_b32_e32 v0, 0x8000, v01675; GFX950-NEXT: v_or_b32_e32 v1, 0x8000, v11676; GFX950-NEXT: v_or_b32_e32 v2, 0x8000, v21677; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21678; GFX950-NEXT: s_setpc_b64 s[30:31]1679 %a.fabs = call half @llvm.fabs.f16(half %a)1680 %b.fabs = call half @llvm.fabs.f16(half %b)1681 %c.fabs = call half @llvm.fabs.f16(half %c)1682 %a.fneg.fabs = fneg half %a.fabs1683 %b.fneg.fabs = fneg half %b.fabs1684 %c.fneg.fabs = fneg half %c.fabs1685 %max0 = call half @llvm.minimum.f16(half %a.fneg.fabs, half %b.fneg.fabs)1686 %max1 = call half @llvm.minimum.f16(half %max0, half %c.fneg.fabs)1687 ret half %max11688}1689 1690define half @v_fminimum3_f16_fneg0(half %a, half %b, half %c) {1691; GFX12-TRUE16-LABEL: v_fminimum3_f16_fneg0:1692; GFX12-TRUE16: ; %bb.0:1693; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01694; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01695; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01696; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01697; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01698; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, -v0.l, v1.l, v2.l1699; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1700;1701; GFX12-FAKE16-LABEL: v_fminimum3_f16_fneg0:1702; GFX12-FAKE16: ; %bb.0:1703; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01704; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01705; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01706; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01707; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01708; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, -v0, v1, v21709; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1710;1711; GFX942-LABEL: v_fminimum3_f16_fneg0:1712; GFX942: ; %bb.0:1713; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1714; GFX942-NEXT: v_min_f16_e64 v3, -v0, v11715; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001716; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v0, v11717; GFX942-NEXT: s_nop 11718; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1719; GFX942-NEXT: v_min_f16_e32 v1, v0, v21720; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v21721; GFX942-NEXT: s_nop 11722; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1723; GFX942-NEXT: s_setpc_b64 s[30:31]1724;1725; GFX950-LABEL: v_fminimum3_f16_fneg0:1726; GFX950: ; %bb.0:1727; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1728; GFX950-NEXT: v_xor_b32_e32 v0, 0x8000, v01729; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21730; GFX950-NEXT: s_setpc_b64 s[30:31]1731 %a.fneg = fneg half %a1732 %max0 = call half @llvm.minimum.f16(half %a.fneg, half %b)1733 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1734 ret half %max11735}1736 1737define half @v_fminimum3_f16_fneg1(half %a, half %b, half %c) {1738; GFX12-TRUE16-LABEL: v_fminimum3_f16_fneg1:1739; GFX12-TRUE16: ; %bb.0:1740; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01741; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01742; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01743; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01744; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01745; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, -v1.l, v2.l1746; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1747;1748; GFX12-FAKE16-LABEL: v_fminimum3_f16_fneg1:1749; GFX12-FAKE16: ; %bb.0:1750; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01751; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01752; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01753; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01754; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01755; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, -v1, v21756; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1757;1758; GFX942-LABEL: v_fminimum3_f16_fneg1:1759; GFX942: ; %bb.0:1760; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1761; GFX942-NEXT: v_min_f16_e64 v3, v0, -v11762; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001763; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, -v11764; GFX942-NEXT: s_nop 11765; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1766; GFX942-NEXT: v_min_f16_e32 v1, v0, v21767; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v21768; GFX942-NEXT: s_nop 11769; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1770; GFX942-NEXT: s_setpc_b64 s[30:31]1771;1772; GFX950-LABEL: v_fminimum3_f16_fneg1:1773; GFX950: ; %bb.0:1774; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1775; GFX950-NEXT: v_xor_b32_e32 v1, 0x8000, v11776; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21777; GFX950-NEXT: s_setpc_b64 s[30:31]1778 %b.fneg = fneg half %b1779 %max0 = call half @llvm.minimum.f16(half %a, half %b.fneg)1780 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1781 ret half %max11782}1783 1784define half @v_fminimum3_f16_fneg2(half %a, half %b, half %c) {1785; GFX12-TRUE16-LABEL: v_fminimum3_f16_fneg2:1786; GFX12-TRUE16: ; %bb.0:1787; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01788; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01789; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01790; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01791; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01792; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, v1.l, -v2.l1793; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1794;1795; GFX12-FAKE16-LABEL: v_fminimum3_f16_fneg2:1796; GFX12-FAKE16: ; %bb.0:1797; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01798; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01799; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01800; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01801; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01802; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, v1, -v21803; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1804;1805; GFX942-LABEL: v_fminimum3_f16_fneg2:1806; GFX942: ; %bb.0:1807; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1808; GFX942-NEXT: v_min_f16_e32 v3, v0, v11809; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e001810; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11811; GFX942-NEXT: s_nop 11812; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc1813; GFX942-NEXT: v_min_f16_e64 v1, v0, -v21814; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, -v21815; GFX942-NEXT: s_nop 11816; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc1817; GFX942-NEXT: s_setpc_b64 s[30:31]1818;1819; GFX950-LABEL: v_fminimum3_f16_fneg2:1820; GFX950: ; %bb.0:1821; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1822; GFX950-NEXT: v_xor_b32_e32 v2, 0x8000, v21823; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v21824; GFX950-NEXT: s_setpc_b64 s[30:31]1825 %c.fneg = fneg half %c1826 %max0 = call half @llvm.minimum.f16(half %a, half %b)1827 %max1 = call half @llvm.minimum.f16(half %max0, half %c.fneg)1828 ret half %max11829}1830 1831define half @v_fminimum3_f16_const0(half %b, half %c) {1832; GFX12-TRUE16-LABEL: v_fminimum3_f16_const0:1833; GFX12-TRUE16: ; %bb.0:1834; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01835; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01836; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01837; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01838; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01839; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, 0x4800, v1.l1840; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1841;1842; GFX12-FAKE16-LABEL: v_fminimum3_f16_const0:1843; GFX12-FAKE16: ; %bb.0:1844; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01845; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01846; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01847; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01848; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01849; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, 0x4800, v11850; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1851;1852; GFX942-LABEL: v_fminimum3_f16_const0:1853; GFX942: ; %bb.0:1854; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1855; GFX942-NEXT: v_min_f16_e32 v2, 0x4800, v01856; GFX942-NEXT: v_mov_b32_e32 v3, 0x7e001857; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v01858; GFX942-NEXT: s_nop 11859; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1860; GFX942-NEXT: v_min_f16_e32 v2, v0, v11861; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11862; GFX942-NEXT: s_nop 11863; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1864; GFX942-NEXT: s_setpc_b64 s[30:31]1865;1866; GFX950-LABEL: v_fminimum3_f16_const0:1867; GFX950: ; %bb.0:1868; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1869; GFX950-NEXT: s_movk_i32 s0, 0x48001870; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, s0, v11871; GFX950-NEXT: s_setpc_b64 s[30:31]1872 %max0 = call half @llvm.minimum.f16(half 8.0, half %b)1873 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1874 ret half %max11875}1876 1877define half @v_fminimum3_f16__const2(half %a, half %b) {1878; GFX12-TRUE16-LABEL: v_fminimum3_f16__const2:1879; GFX12-TRUE16: ; %bb.0:1880; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01881; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01882; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01883; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01884; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01885; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, v1.l, 0x48001886; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1887;1888; GFX12-FAKE16-LABEL: v_fminimum3_f16__const2:1889; GFX12-FAKE16: ; %bb.0:1890; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01891; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01892; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01893; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01894; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01895; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, v1, 0x48001896; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1897;1898; GFX942-LABEL: v_fminimum3_f16__const2:1899; GFX942: ; %bb.0:1900; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1901; GFX942-NEXT: v_min_f16_e32 v2, v0, v11902; GFX942-NEXT: v_mov_b32_e32 v3, 0x7e001903; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11904; GFX942-NEXT: s_nop 11905; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1906; GFX942-NEXT: v_min_f16_e32 v1, 0x4800, v01907; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v01908; GFX942-NEXT: s_nop 11909; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v1, vcc1910; GFX942-NEXT: s_setpc_b64 s[30:31]1911;1912; GFX950-LABEL: v_fminimum3_f16__const2:1913; GFX950: ; %bb.0:1914; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1915; GFX950-NEXT: s_movk_i32 s0, 0x48001916; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, s01917; GFX950-NEXT: s_setpc_b64 s[30:31]1918 %max0 = call half @llvm.minimum.f16(half %a, half %b)1919 %max1 = call half @llvm.minimum.f16(half %max0, half 8.0)1920 ret half %max11921}1922 1923define half @v_fminimum3_f16_inlineimm0(half %b, half %c) {1924; GFX12-TRUE16-LABEL: v_fminimum3_f16_inlineimm0:1925; GFX12-TRUE16: ; %bb.0:1926; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01927; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01928; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01929; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01930; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01931; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, 4.0, v1.l1932; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1933;1934; GFX12-FAKE16-LABEL: v_fminimum3_f16_inlineimm0:1935; GFX12-FAKE16: ; %bb.0:1936; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01937; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01938; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01939; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01940; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01941; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, 4.0, v11942; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1943;1944; GFX942-LABEL: v_fminimum3_f16_inlineimm0:1945; GFX942: ; %bb.0:1946; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1947; GFX942-NEXT: v_min_f16_e32 v2, 4.0, v01948; GFX942-NEXT: v_mov_b32_e32 v3, 0x7e001949; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v01950; GFX942-NEXT: s_nop 11951; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1952; GFX942-NEXT: v_min_f16_e32 v2, v0, v11953; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11954; GFX942-NEXT: s_nop 11955; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1956; GFX942-NEXT: s_setpc_b64 s[30:31]1957;1958; GFX950-LABEL: v_fminimum3_f16_inlineimm0:1959; GFX950: ; %bb.0:1960; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1961; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, 4.0, v11962; GFX950-NEXT: s_setpc_b64 s[30:31]1963 %max0 = call half @llvm.minimum.f16(half 4.0, half %b)1964 %max1 = call half @llvm.minimum.f16(half %max0, half %c)1965 ret half %max11966}1967 1968define half @v_fminimum3_f16__inlineimm(half %a, half %b) {1969; GFX12-TRUE16-LABEL: v_fminimum3_f16__inlineimm:1970; GFX12-TRUE16: ; %bb.0:1971; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x01972; GFX12-TRUE16-NEXT: s_wait_expcnt 0x01973; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x01974; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x01975; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x01976; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, v1.l, 4.01977; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]1978;1979; GFX12-FAKE16-LABEL: v_fminimum3_f16__inlineimm:1980; GFX12-FAKE16: ; %bb.0:1981; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x01982; GFX12-FAKE16-NEXT: s_wait_expcnt 0x01983; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x01984; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x01985; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x01986; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, v1, 4.01987; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]1988;1989; GFX942-LABEL: v_fminimum3_f16__inlineimm:1990; GFX942: ; %bb.0:1991; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1992; GFX942-NEXT: v_min_f16_e32 v2, v0, v11993; GFX942-NEXT: v_mov_b32_e32 v3, 0x7e001994; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v11995; GFX942-NEXT: s_nop 11996; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1997; GFX942-NEXT: v_min_f16_e32 v1, 4.0, v01998; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v01999; GFX942-NEXT: s_nop 12000; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v1, vcc2001; GFX942-NEXT: s_setpc_b64 s[30:31]2002;2003; GFX950-LABEL: v_fminimum3_f16__inlineimm:2004; GFX950: ; %bb.0:2005; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2006; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, 4.02007; GFX950-NEXT: s_setpc_b64 s[30:31]2008 %max0 = call half @llvm.minimum.f16(half %a, half %b)2009 %max1 = call half @llvm.minimum.f16(half %max0, half 4.0)2010 ret half %max12011}2012 2013define half @v_fminimum3_f16_const1_const2(half %a) {2014; GFX12-TRUE16-LABEL: v_fminimum3_f16_const1_const2:2015; GFX12-TRUE16: ; %bb.0:2016; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x02017; GFX12-TRUE16-NEXT: s_wait_expcnt 0x02018; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x02019; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x02020; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x02021; GFX12-TRUE16-NEXT: v_mov_b16_e32 v1.l, 0x48002022; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2023; GFX12-TRUE16-NEXT: v_minimum3_f16 v0.l, v0.l, v1.l, 0x4c002024; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]2025;2026; GFX12-FAKE16-LABEL: v_fminimum3_f16_const1_const2:2027; GFX12-FAKE16: ; %bb.0:2028; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x02029; GFX12-FAKE16-NEXT: s_wait_expcnt 0x02030; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x02031; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x02032; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x02033; GFX12-FAKE16-NEXT: s_movk_i32 s0, 0x48002034; GFX12-FAKE16-NEXT: s_wait_alu depctr_sa_sdst(0)2035; GFX12-FAKE16-NEXT: v_minimum3_f16 v0, v0, s0, 0x4c002036; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]2037;2038; GFX942-LABEL: v_fminimum3_f16_const1_const2:2039; GFX942: ; %bb.0:2040; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2041; GFX942-NEXT: v_min_f16_e32 v1, 0x4800, v02042; GFX942-NEXT: v_mov_b32_e32 v2, 0x7e002043; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v02044; GFX942-NEXT: s_nop 12045; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc2046; GFX942-NEXT: v_min_f16_e32 v1, 0x4c00, v02047; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v02048; GFX942-NEXT: s_nop 12049; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc2050; GFX942-NEXT: s_setpc_b64 s[30:31]2051;2052; GFX950-LABEL: v_fminimum3_f16_const1_const2:2053; GFX950: ; %bb.0:2054; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2055; GFX950-NEXT: s_movk_i32 s0, 0x48002056; GFX950-NEXT: v_mov_b32_e32 v1, 0x4c002057; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, s0, v12058; GFX950-NEXT: s_setpc_b64 s[30:31]2059 %max0 = call half @llvm.minimum.f16(half %a, half 8.0)2060 %max1 = call half @llvm.minimum.f16(half %max0, half 16.0)2061 ret half %max12062}2063 2064define <2 x half> @v_fminimum3_v2f16(<2 x half> %a, <2 x half> %b, <2 x half> %c) {2065; GFX12-LABEL: v_fminimum3_v2f16:2066; GFX12: ; %bb.0:2067; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02068; GFX12-NEXT: s_wait_expcnt 0x02069; GFX12-NEXT: s_wait_samplecnt 0x02070; GFX12-NEXT: s_wait_bvhcnt 0x02071; GFX12-NEXT: s_wait_kmcnt 0x02072; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v12073; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2074; GFX12-NEXT: v_pk_minimum_f16 v0, v2, v02075; GFX12-NEXT: s_setpc_b64 s[30:31]2076;2077; GFX942-LABEL: v_fminimum3_v2f16:2078; GFX942: ; %bb.0:2079; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2080; GFX942-NEXT: v_pk_min_f16 v3, v0, v12081; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e002082; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v12083; GFX942-NEXT: s_mov_b32 s0, 0x50401002084; GFX942-NEXT: s_nop 02085; GFX942-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc2086; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_12087; GFX942-NEXT: s_nop 12088; GFX942-NEXT: v_cndmask_b32_sdwa v0, v4, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12089; GFX942-NEXT: v_perm_b32 v1, v0, v5, s02090; GFX942-NEXT: v_pk_min_f16 v1, v2, v12091; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v2, v52092; GFX942-NEXT: s_nop 12093; GFX942-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2094; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v2, v0 src0_sel:WORD_1 src1_sel:DWORD2095; GFX942-NEXT: s_nop 12096; GFX942-NEXT: v_cndmask_b32_sdwa v0, v4, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12097; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02098; GFX942-NEXT: s_setpc_b64 s[30:31]2099;2100; GFX950-LABEL: v_fminimum3_v2f16:2101; GFX950: ; %bb.0:2102; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2103; GFX950-NEXT: v_pk_minimum3_f16 v0, v2, v0, v12104; GFX950-NEXT: s_setpc_b64 s[30:31]2105 %max0 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b)2106 %max1 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %c, <2 x half> %max0)2107 ret <2 x half> %max12108}2109 2110define <2 x half> @v_fminimum3_v2f16_commute(<2 x half> %a, <2 x half> %b, <2 x half> %c) {2111; GFX12-LABEL: v_fminimum3_v2f16_commute:2112; GFX12: ; %bb.0:2113; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02114; GFX12-NEXT: s_wait_expcnt 0x02115; GFX12-NEXT: s_wait_samplecnt 0x02116; GFX12-NEXT: s_wait_bvhcnt 0x02117; GFX12-NEXT: s_wait_kmcnt 0x02118; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v12119; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2120; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22121; GFX12-NEXT: s_setpc_b64 s[30:31]2122;2123; GFX942-LABEL: v_fminimum3_v2f16_commute:2124; GFX942: ; %bb.0:2125; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2126; GFX942-NEXT: v_pk_min_f16 v3, v0, v12127; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e002128; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v12129; GFX942-NEXT: s_mov_b32 s0, 0x50401002130; GFX942-NEXT: s_nop 02131; GFX942-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc2132; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_12133; GFX942-NEXT: s_nop 12134; GFX942-NEXT: v_cndmask_b32_sdwa v0, v4, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12135; GFX942-NEXT: v_perm_b32 v1, v0, v5, s02136; GFX942-NEXT: v_pk_min_f16 v1, v1, v22137; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v5, v22138; GFX942-NEXT: s_nop 12139; GFX942-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2140; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:DWORD src1_sel:WORD_12141; GFX942-NEXT: s_nop 12142; GFX942-NEXT: v_cndmask_b32_sdwa v0, v4, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12143; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02144; GFX942-NEXT: s_setpc_b64 s[30:31]2145;2146; GFX950-LABEL: v_fminimum3_v2f16_commute:2147; GFX950: ; %bb.0:2148; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2149; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v22150; GFX950-NEXT: s_setpc_b64 s[30:31]2151 %max0 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b)2152 %max1 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %max0, <2 x half> %c)2153 ret <2 x half> %max12154}2155 2156define <2 x half> @v_fminimum3_v2f16__fabs_all(<2 x half> %a, <2 x half> %b, <2 x half> %c) {2157; GFX12-LABEL: v_fminimum3_v2f16__fabs_all:2158; GFX12: ; %bb.0:2159; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02160; GFX12-NEXT: s_wait_expcnt 0x02161; GFX12-NEXT: s_wait_samplecnt 0x02162; GFX12-NEXT: s_wait_bvhcnt 0x02163; GFX12-NEXT: s_wait_kmcnt 0x02164; GFX12-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02165; GFX12-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v12166; GFX12-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v22167; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2168; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v12169; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22170; GFX12-NEXT: s_setpc_b64 s[30:31]2171;2172; GFX942-LABEL: v_fminimum3_v2f16__fabs_all:2173; GFX942: ; %bb.0:2174; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2175; GFX942-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v02176; GFX942-NEXT: v_and_b32_e32 v4, 0x7fff7fff, v12177; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, |v0|, |v1| src0_sel:WORD_1 src1_sel:WORD_12178; GFX942-NEXT: v_pk_min_f16 v3, v3, v42179; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e002180; GFX942-NEXT: v_cndmask_b32_sdwa v6, v4, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12181; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v0|, |v1|2182; GFX942-NEXT: s_mov_b32 s0, 0x50401002183; GFX942-NEXT: v_and_b32_e32 v5, 0x7fff7fff, v22184; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc2185; GFX942-NEXT: v_perm_b32 v1, v6, v0, s02186; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v6, |v2| src0_sel:DWORD src1_sel:WORD_12187; GFX942-NEXT: v_pk_min_f16 v1, v1, v52188; GFX942-NEXT: s_nop 02189; GFX942-NEXT: v_cndmask_b32_sdwa v3, v4, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12190; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, |v2|2191; GFX942-NEXT: s_nop 12192; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc2193; GFX942-NEXT: v_perm_b32 v0, v3, v0, s02194; GFX942-NEXT: s_setpc_b64 s[30:31]2195;2196; GFX950-LABEL: v_fminimum3_v2f16__fabs_all:2197; GFX950: ; %bb.0:2198; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2199; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02200; GFX950-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v12201; GFX950-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v22202; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v22203; GFX950-NEXT: s_setpc_b64 s[30:31]2204 %a.fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %a)2205 %b.fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %b)2206 %c.fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %c)2207 %max0 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a.fabs, <2 x half> %b.fabs)2208 %max1 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %max0, <2 x half> %c.fabs)2209 ret <2 x half> %max12210}2211 2212define <2 x half> @v_fminimum3_v2f16__fneg_all(<2 x half> %a, <2 x half> %b, <2 x half> %c) {2213; GFX12-LABEL: v_fminimum3_v2f16__fneg_all:2214; GFX12: ; %bb.0:2215; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02216; GFX12-NEXT: s_wait_expcnt 0x02217; GFX12-NEXT: s_wait_samplecnt 0x02218; GFX12-NEXT: s_wait_bvhcnt 0x02219; GFX12-NEXT: s_wait_kmcnt 0x02220; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v1 neg_lo:[1,1] neg_hi:[1,1]2221; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2222; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v2 neg_lo:[0,1] neg_hi:[0,1]2223; GFX12-NEXT: s_setpc_b64 s[30:31]2224;2225; GFX942-LABEL: v_fminimum3_v2f16__fneg_all:2226; GFX942: ; %bb.0:2227; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2228; GFX942-NEXT: v_pk_min_f16 v3, v0, v1 neg_lo:[1,1] neg_hi:[1,1]2229; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e002230; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v0, -v12231; GFX942-NEXT: s_mov_b32 s0, 0x50401002232; GFX942-NEXT: s_nop 02233; GFX942-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc2234; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, -v0, -v1 src0_sel:WORD_1 src1_sel:WORD_12235; GFX942-NEXT: s_nop 12236; GFX942-NEXT: v_cndmask_b32_sdwa v0, v4, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12237; GFX942-NEXT: v_perm_b32 v1, v0, v5, s02238; GFX942-NEXT: v_pk_min_f16 v1, v1, v2 neg_lo:[0,1] neg_hi:[0,1]2239; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v5, -v22240; GFX942-NEXT: s_nop 12241; GFX942-NEXT: v_cndmask_b32_e32 v3, v4, v1, vcc2242; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, -v2 src0_sel:DWORD src1_sel:WORD_12243; GFX942-NEXT: s_nop 12244; GFX942-NEXT: v_cndmask_b32_sdwa v0, v4, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12245; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02246; GFX942-NEXT: s_setpc_b64 s[30:31]2247;2248; GFX950-LABEL: v_fminimum3_v2f16__fneg_all:2249; GFX950: ; %bb.0:2250; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2251; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v2 neg_lo:[1,1,1] neg_hi:[1,1,1]2252; GFX950-NEXT: s_setpc_b64 s[30:31]2253 %a.fneg = fneg <2 x half> %a2254 %b.fneg = fneg <2 x half> %b2255 %c.fneg = fneg <2 x half> %c2256 %max0 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a.fneg, <2 x half> %b.fneg)2257 %max1 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %max0, <2 x half> %c.fneg)2258 ret <2 x half> %max12259}2260 2261define <2 x half> @v_fminimum3_v2f16__inlineimm1(<2 x half> %a, <2 x half> %c) {2262; GFX12-LABEL: v_fminimum3_v2f16__inlineimm1:2263; GFX12: ; %bb.0:2264; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02265; GFX12-NEXT: s_wait_expcnt 0x02266; GFX12-NEXT: s_wait_samplecnt 0x02267; GFX12-NEXT: s_wait_bvhcnt 0x02268; GFX12-NEXT: s_wait_kmcnt 0x02269; GFX12-NEXT: v_pk_minimum_f16 v0, v0, 2.0 op_sel_hi:[1,0]2270; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2271; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v12272; GFX12-NEXT: s_setpc_b64 s[30:31]2273;2274; GFX942-LABEL: v_fminimum3_v2f16__inlineimm1:2275; GFX942: ; %bb.0:2276; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2277; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v0 src0_sel:WORD_1 src1_sel:WORD_12278; GFX942-NEXT: v_pk_min_f16 v2, v0, 2.0 op_sel_hi:[1,0]2279; GFX942-NEXT: v_mov_b32_e32 v3, 0x7e002280; GFX942-NEXT: v_cndmask_b32_sdwa v4, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12281; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v02282; GFX942-NEXT: s_mov_b32 s0, 0x50401002283; GFX942-NEXT: s_nop 02284; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc2285; GFX942-NEXT: v_perm_b32 v2, v4, v0, s02286; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v4, v1 src0_sel:DWORD src1_sel:WORD_12287; GFX942-NEXT: v_pk_min_f16 v2, v2, v12288; GFX942-NEXT: s_nop 02289; GFX942-NEXT: v_cndmask_b32_sdwa v4, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12290; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v12291; GFX942-NEXT: s_nop 12292; GFX942-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc2293; GFX942-NEXT: v_perm_b32 v0, v4, v0, s02294; GFX942-NEXT: s_setpc_b64 s[30:31]2295;2296; GFX950-LABEL: v_fminimum3_v2f16__inlineimm1:2297; GFX950: ; %bb.0:2298; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2299; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, 2.0, v1 op_sel_hi:[1,0,1]2300; GFX950-NEXT: s_setpc_b64 s[30:31]2301 %max0 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> <half 2.0, half 2.0>)2302 %max1 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %max0, <2 x half> %c)2303 ret <2 x half> %max12304}2305 2306define <2 x half> @v_fminimum3_v2f16__inlineimm2(<2 x half> %a, <2 x half> %b) {2307; GFX12-LABEL: v_fminimum3_v2f16__inlineimm2:2308; GFX12: ; %bb.0:2309; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02310; GFX12-NEXT: s_wait_expcnt 0x02311; GFX12-NEXT: s_wait_samplecnt 0x02312; GFX12-NEXT: s_wait_bvhcnt 0x02313; GFX12-NEXT: s_wait_kmcnt 0x02314; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v12315; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)2316; GFX12-NEXT: v_pk_minimum_f16 v0, v0, 4.0 op_sel_hi:[1,0]2317; GFX12-NEXT: s_setpc_b64 s[30:31]2318;2319; GFX942-LABEL: v_fminimum3_v2f16__inlineimm2:2320; GFX942: ; %bb.0:2321; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2322; GFX942-NEXT: v_pk_min_f16 v2, v0, v12323; GFX942-NEXT: v_mov_b32_e32 v3, 0x7e002324; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v12325; GFX942-NEXT: s_mov_b32 s0, 0x50401002326; GFX942-NEXT: s_nop 02327; GFX942-NEXT: v_cndmask_b32_e32 v4, v3, v2, vcc2328; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_12329; GFX942-NEXT: s_nop 12330; GFX942-NEXT: v_cndmask_b32_sdwa v0, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12331; GFX942-NEXT: v_perm_b32 v1, v0, v4, s02332; GFX942-NEXT: v_pk_min_f16 v1, v1, 4.0 op_sel_hi:[1,0]2333; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v4, v42334; GFX942-NEXT: s_nop 12335; GFX942-NEXT: v_cndmask_b32_e32 v2, v3, v1, vcc2336; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v02337; GFX942-NEXT: s_nop 12338; GFX942-NEXT: v_cndmask_b32_sdwa v0, v3, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12339; GFX942-NEXT: v_perm_b32 v0, v0, v2, s02340; GFX942-NEXT: s_setpc_b64 s[30:31]2341;2342; GFX950-LABEL: v_fminimum3_v2f16__inlineimm2:2343; GFX950: ; %bb.0:2344; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2345; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, 4.0 op_sel_hi:[1,1,0]2346; GFX950-NEXT: s_setpc_b64 s[30:31]2347 %max0 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %a, <2 x half> %b)2348 %max1 = call <2 x half> @llvm.minimum.v2f16(<2 x half> %max0, <2 x half> <half 4.0, half 4.0>)2349 ret <2 x half> %max12350}2351 2352define <3 x half> @v_fminimum3_v3f16(<3 x half> %a, <3 x half> %b, <3 x half> %c) {2353; GFX12-LABEL: v_fminimum3_v3f16:2354; GFX12: ; %bb.0:2355; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02356; GFX12-NEXT: s_wait_expcnt 0x02357; GFX12-NEXT: s_wait_samplecnt 0x02358; GFX12-NEXT: s_wait_bvhcnt 0x02359; GFX12-NEXT: s_wait_kmcnt 0x02360; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22361; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32362; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2363; GFX12-NEXT: v_pk_minimum_f16 v0, v4, v02364; GFX12-NEXT: v_pk_minimum_f16 v1, v5, v12365; GFX12-NEXT: s_setpc_b64 s[30:31]2366;2367; GFX942-LABEL: v_fminimum3_v3f16:2368; GFX942: ; %bb.0:2369; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2370; GFX942-NEXT: v_pk_min_f16 v6, v0, v22371; GFX942-NEXT: v_mov_b32_e32 v7, 0x7e002372; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v22373; GFX942-NEXT: s_mov_b32 s0, 0x50401002374; GFX942-NEXT: s_nop 02375; GFX942-NEXT: v_cndmask_b32_e32 v8, v7, v6, vcc2376; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62377; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_12378; GFX942-NEXT: s_nop 12379; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc2380; GFX942-NEXT: v_pk_min_f16 v6, v1, v32381; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v32382; GFX942-NEXT: v_perm_b32 v2, v0, v8, s02383; GFX942-NEXT: v_pk_min_f16 v2, v4, v22384; GFX942-NEXT: v_cndmask_b32_e32 v9, v7, v6, vcc2385; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62386; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_12387; GFX942-NEXT: s_nop 12388; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc2389; GFX942-NEXT: v_perm_b32 v1, v1, v9, s02390; GFX942-NEXT: v_pk_min_f16 v1, v5, v12391; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v5, v92392; GFX942-NEXT: s_nop 12393; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc2394; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v4, v82395; GFX942-NEXT: s_nop 12396; GFX942-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc2397; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v4, v0 src0_sel:WORD_1 src1_sel:DWORD2398; GFX942-NEXT: s_nop 12399; GFX942-NEXT: v_cndmask_b32_sdwa v0, v7, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12400; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02401; GFX942-NEXT: s_setpc_b64 s[30:31]2402;2403; GFX950-LABEL: v_fminimum3_v3f16:2404; GFX950: ; %bb.0:2405; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2406; GFX950-NEXT: v_pk_minimum3_f16 v0, v4, v0, v22407; GFX950-NEXT: v_pk_minimum3_f16 v1, v5, v1, v32408; GFX950-NEXT: s_setpc_b64 s[30:31]2409 %max0 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a, <3 x half> %b)2410 %max1 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %c, <3 x half> %max0)2411 ret <3 x half> %max12412}2413 2414define <3 x half> @v_fminimum3_v3f16_commute(<3 x half> %a, <3 x half> %b, <3 x half> %c) {2415; GFX12-LABEL: v_fminimum3_v3f16_commute:2416; GFX12: ; %bb.0:2417; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02418; GFX12-NEXT: s_wait_expcnt 0x02419; GFX12-NEXT: s_wait_samplecnt 0x02420; GFX12-NEXT: s_wait_bvhcnt 0x02421; GFX12-NEXT: s_wait_kmcnt 0x02422; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22423; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32424; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2425; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v42426; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v52427; GFX12-NEXT: s_setpc_b64 s[30:31]2428;2429; GFX942-LABEL: v_fminimum3_v3f16_commute:2430; GFX942: ; %bb.0:2431; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2432; GFX942-NEXT: v_pk_min_f16 v6, v0, v22433; GFX942-NEXT: v_mov_b32_e32 v7, 0x7e002434; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v22435; GFX942-NEXT: s_mov_b32 s0, 0x50401002436; GFX942-NEXT: s_nop 02437; GFX942-NEXT: v_cndmask_b32_e32 v8, v7, v6, vcc2438; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62439; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_12440; GFX942-NEXT: s_nop 12441; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc2442; GFX942-NEXT: v_pk_min_f16 v6, v1, v32443; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v32444; GFX942-NEXT: v_perm_b32 v2, v0, v8, s02445; GFX942-NEXT: v_pk_min_f16 v2, v2, v42446; GFX942-NEXT: v_cndmask_b32_e32 v9, v7, v6, vcc2447; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62448; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_12449; GFX942-NEXT: s_nop 12450; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc2451; GFX942-NEXT: v_perm_b32 v1, v1, v9, s02452; GFX942-NEXT: v_pk_min_f16 v1, v1, v52453; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v9, v52454; GFX942-NEXT: s_nop 12455; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc2456; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v8, v42457; GFX942-NEXT: s_nop 12458; GFX942-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc2459; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v4 src0_sel:DWORD src1_sel:WORD_12460; GFX942-NEXT: s_nop 12461; GFX942-NEXT: v_cndmask_b32_sdwa v0, v7, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12462; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02463; GFX942-NEXT: s_setpc_b64 s[30:31]2464;2465; GFX950-LABEL: v_fminimum3_v3f16_commute:2466; GFX950: ; %bb.0:2467; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2468; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v42469; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v52470; GFX950-NEXT: s_setpc_b64 s[30:31]2471 %max0 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a, <3 x half> %b)2472 %max1 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %max0, <3 x half> %c)2473 ret <3 x half> %max12474}2475 2476define <3 x half> @v_fminimum3_v3f16__fabs_all(<3 x half> %a, <3 x half> %b, <3 x half> %c) {2477; GFX12-LABEL: v_fminimum3_v3f16__fabs_all:2478; GFX12: ; %bb.0:2479; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02480; GFX12-NEXT: s_wait_expcnt 0x02481; GFX12-NEXT: s_wait_samplecnt 0x02482; GFX12-NEXT: s_wait_bvhcnt 0x02483; GFX12-NEXT: s_wait_kmcnt 0x02484; GFX12-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02485; GFX12-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v12486; GFX12-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v22487; GFX12-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v32488; GFX12-NEXT: v_and_b32_e32 v5, 0x7fff7fff, v52489; GFX12-NEXT: v_and_b32_e32 v4, 0x7fff7fff, v42490; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2491; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22492; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32493; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2494; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v42495; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v52496; GFX12-NEXT: s_setpc_b64 s[30:31]2497;2498; GFX942-LABEL: v_fminimum3_v3f16__fabs_all:2499; GFX942: ; %bb.0:2500; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2501; GFX942-NEXT: v_and_b32_e32 v7, 0x7fff7fff, v12502; GFX942-NEXT: v_and_b32_e32 v9, 0x7fff7fff, v32503; GFX942-NEXT: v_pk_min_f16 v7, v7, v92504; GFX942-NEXT: v_and_b32_e32 v6, 0x7fff7fff, v02505; GFX942-NEXT: v_and_b32_e32 v8, 0x7fff7fff, v22506; GFX942-NEXT: v_lshrrev_b32_e32 v9, 16, v72507; GFX942-NEXT: v_mov_b32_e32 v12, 0x7e002508; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, |v1|, |v3| src0_sel:WORD_1 src1_sel:WORD_12509; GFX942-NEXT: v_pk_min_f16 v6, v6, v82510; GFX942-NEXT: s_mov_b32 s0, 0x50401002511; GFX942-NEXT: v_cndmask_b32_e32 v9, v12, v9, vcc2512; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v1|, |v3|2513; GFX942-NEXT: v_and_b32_e32 v11, 0x7fff7fff, v42514; GFX942-NEXT: v_and_b32_e32 v10, 0x7fff7fff, v52515; GFX942-NEXT: v_cndmask_b32_e32 v1, v12, v7, vcc2516; GFX942-NEXT: v_lshrrev_b32_e32 v7, 16, v62517; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, |v0|, |v2| src0_sel:WORD_1 src1_sel:WORD_12518; GFX942-NEXT: v_perm_b32 v3, v9, v1, s02519; GFX942-NEXT: v_pk_min_f16 v3, v3, v102520; GFX942-NEXT: v_cndmask_b32_e32 v7, v12, v7, vcc2521; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v0|, |v2|2522; GFX942-NEXT: s_nop 12523; GFX942-NEXT: v_cndmask_b32_e32 v0, v12, v6, vcc2524; GFX942-NEXT: v_perm_b32 v2, v7, v0, s02525; GFX942-NEXT: v_pk_min_f16 v2, v2, v112526; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v7, |v4| src0_sel:DWORD src1_sel:WORD_12527; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v22528; GFX942-NEXT: s_nop 02529; GFX942-NEXT: v_cndmask_b32_e32 v6, v12, v6, vcc2530; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v1, |v5|2531; GFX942-NEXT: s_nop 12532; GFX942-NEXT: v_cndmask_b32_e32 v1, v12, v3, vcc2533; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, |v4|2534; GFX942-NEXT: s_nop 12535; GFX942-NEXT: v_cndmask_b32_e32 v0, v12, v2, vcc2536; GFX942-NEXT: v_perm_b32 v0, v6, v0, s02537; GFX942-NEXT: s_setpc_b64 s[30:31]2538;2539; GFX950-LABEL: v_fminimum3_v3f16__fabs_all:2540; GFX950: ; %bb.0:2541; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2542; GFX950-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v12543; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02544; GFX950-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v32545; GFX950-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v22546; GFX950-NEXT: v_and_b32_e32 v5, 0x7fff7fff, v52547; GFX950-NEXT: v_and_b32_e32 v4, 0x7fff7fff, v42548; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v42549; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v52550; GFX950-NEXT: s_setpc_b64 s[30:31]2551 %a.fabs = call <3 x half> @llvm.fabs.v3f16(<3 x half> %a)2552 %b.fabs = call <3 x half> @llvm.fabs.v3f16(<3 x half> %b)2553 %c.fabs = call <3 x half> @llvm.fabs.v3f16(<3 x half> %c)2554 %max0 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a.fabs, <3 x half> %b.fabs)2555 %max1 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %max0, <3 x half> %c.fabs)2556 ret <3 x half> %max12557}2558 2559define <3 x half> @v_fminimum3_v3f16__fneg_all(<3 x half> %a, <3 x half> %b, <3 x half> %c) {2560; GFX12-LABEL: v_fminimum3_v3f16__fneg_all:2561; GFX12: ; %bb.0:2562; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02563; GFX12-NEXT: s_wait_expcnt 0x02564; GFX12-NEXT: s_wait_samplecnt 0x02565; GFX12-NEXT: s_wait_bvhcnt 0x02566; GFX12-NEXT: s_wait_kmcnt 0x02567; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v2 neg_lo:[1,1] neg_hi:[1,1]2568; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v3 neg_lo:[1,1] neg_hi:[1,1]2569; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2570; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]2571; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]2572; GFX12-NEXT: s_setpc_b64 s[30:31]2573;2574; GFX942-LABEL: v_fminimum3_v3f16__fneg_all:2575; GFX942: ; %bb.0:2576; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2577; GFX942-NEXT: v_pk_min_f16 v6, v0, v2 neg_lo:[1,1] neg_hi:[1,1]2578; GFX942-NEXT: v_mov_b32_e32 v7, 0x7e002579; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v0, -v22580; GFX942-NEXT: s_mov_b32 s0, 0x50401002581; GFX942-NEXT: s_nop 02582; GFX942-NEXT: v_cndmask_b32_e32 v8, v7, v6, vcc2583; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62584; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, -v0, -v2 src0_sel:WORD_1 src1_sel:WORD_12585; GFX942-NEXT: s_nop 12586; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc2587; GFX942-NEXT: v_pk_min_f16 v6, v1, v3 neg_lo:[1,1] neg_hi:[1,1]2588; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v1, -v32589; GFX942-NEXT: v_perm_b32 v2, v0, v8, s02590; GFX942-NEXT: v_pk_min_f16 v2, v2, v4 neg_lo:[0,1] neg_hi:[0,1]2591; GFX942-NEXT: v_cndmask_b32_e32 v9, v7, v6, vcc2592; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62593; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, -v1, -v3 src0_sel:WORD_1 src1_sel:WORD_12594; GFX942-NEXT: s_nop 12595; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v6, vcc2596; GFX942-NEXT: v_perm_b32 v1, v1, v9, s02597; GFX942-NEXT: v_pk_min_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]2598; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v9, -v52599; GFX942-NEXT: s_nop 12600; GFX942-NEXT: v_cndmask_b32_e32 v1, v7, v1, vcc2601; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v8, -v42602; GFX942-NEXT: s_nop 12603; GFX942-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc2604; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, -v4 src0_sel:DWORD src1_sel:WORD_12605; GFX942-NEXT: s_nop 12606; GFX942-NEXT: v_cndmask_b32_sdwa v0, v7, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12607; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02608; GFX942-NEXT: s_setpc_b64 s[30:31]2609;2610; GFX950-LABEL: v_fminimum3_v3f16__fneg_all:2611; GFX950: ; %bb.0:2612; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2613; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v4 neg_lo:[1,1,1] neg_hi:[1,1,1]2614; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v5 neg_lo:[1,1,1] neg_hi:[1,1,1]2615; GFX950-NEXT: s_setpc_b64 s[30:31]2616 %a.fneg = fneg <3 x half> %a2617 %b.fneg = fneg <3 x half> %b2618 %c.fneg = fneg <3 x half> %c2619 %max0 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a.fneg, <3 x half> %b.fneg)2620 %max1 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %max0, <3 x half> %c.fneg)2621 ret <3 x half> %max12622}2623 2624define <3 x half> @v_fminimum3_v3f16__inlineimm1(<3 x half> %a, <3 x half> %c) {2625; GFX12-LABEL: v_fminimum3_v3f16__inlineimm1:2626; GFX12: ; %bb.0:2627; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02628; GFX12-NEXT: s_wait_expcnt 0x02629; GFX12-NEXT: s_wait_samplecnt 0x02630; GFX12-NEXT: s_wait_bvhcnt 0x02631; GFX12-NEXT: s_wait_kmcnt 0x02632; GFX12-NEXT: v_pk_minimum_f16 v0, v0, 2.0 op_sel_hi:[1,0]2633; GFX12-NEXT: v_pk_minimum_f16 v1, v1, 2.02634; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2635; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22636; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32637; GFX12-NEXT: s_setpc_b64 s[30:31]2638;2639; GFX942-LABEL: v_fminimum3_v3f16__inlineimm1:2640; GFX942: ; %bb.0:2641; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2642; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v0 src0_sel:WORD_1 src1_sel:WORD_12643; GFX942-NEXT: v_pk_min_f16 v4, v0, 2.0 op_sel_hi:[1,0]2644; GFX942-NEXT: v_mov_b32_e32 v5, 0x7e002645; GFX942-NEXT: v_cndmask_b32_sdwa v6, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12646; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v02647; GFX942-NEXT: s_mov_b32 s1, 0x50401002648; GFX942-NEXT: v_pk_min_f16 v7, v1, 2.02649; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc2650; GFX942-NEXT: v_perm_b32 v4, v6, v0, s12651; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v12652; GFX942-NEXT: s_movk_i32 s0, 0x7e002653; GFX942-NEXT: v_pk_min_f16 v4, v4, v22654; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc2655; GFX942-NEXT: v_pack_b32_f16 v7, v1, s02656; GFX942-NEXT: v_lshrrev_b32_e32 v8, 16, v42657; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v6, v2 src0_sel:DWORD src1_sel:WORD_12658; GFX942-NEXT: v_pk_min_f16 v7, v7, v32659; GFX942-NEXT: s_nop 02660; GFX942-NEXT: v_cndmask_b32_e32 v6, v5, v8, vcc2661; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v32662; GFX942-NEXT: s_nop 12663; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc2664; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v22665; GFX942-NEXT: s_nop 12666; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc2667; GFX942-NEXT: v_perm_b32 v0, v6, v0, s12668; GFX942-NEXT: s_setpc_b64 s[30:31]2669;2670; GFX950-LABEL: v_fminimum3_v3f16__inlineimm1:2671; GFX950: ; %bb.0:2672; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2673; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, 2.0, v2 op_sel_hi:[1,0,1]2674; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, 2.0, v32675; GFX950-NEXT: s_setpc_b64 s[30:31]2676 %max0 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a, <3 x half> <half 2.0, half 2.0, half 2.0>)2677 %max1 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %max0, <3 x half> %c)2678 ret <3 x half> %max12679}2680 2681define <3 x half> @v_fminimum3_v3f16__inlineimm2(<3 x half> %a, <3 x half> %b) {2682; GFX12-LABEL: v_fminimum3_v3f16__inlineimm2:2683; GFX12: ; %bb.0:2684; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02685; GFX12-NEXT: s_wait_expcnt 0x02686; GFX12-NEXT: s_wait_samplecnt 0x02687; GFX12-NEXT: s_wait_bvhcnt 0x02688; GFX12-NEXT: s_wait_kmcnt 0x02689; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22690; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32691; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2692; GFX12-NEXT: v_pk_minimum_f16 v0, v0, 4.0 op_sel_hi:[1,0]2693; GFX12-NEXT: v_pk_minimum_f16 v1, v1, 4.02694; GFX12-NEXT: s_setpc_b64 s[30:31]2695;2696; GFX942-LABEL: v_fminimum3_v3f16__inlineimm2:2697; GFX942: ; %bb.0:2698; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2699; GFX942-NEXT: v_pk_min_f16 v4, v0, v22700; GFX942-NEXT: v_mov_b32_e32 v5, 0x7e002701; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v22702; GFX942-NEXT: s_mov_b32 s0, 0x50401002703; GFX942-NEXT: s_nop 02704; GFX942-NEXT: v_cndmask_b32_e32 v6, v5, v4, vcc2705; GFX942-NEXT: v_lshrrev_b32_e32 v4, 16, v42706; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_12707; GFX942-NEXT: s_nop 12708; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc2709; GFX942-NEXT: v_pk_min_f16 v4, v1, v32710; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v32711; GFX942-NEXT: v_perm_b32 v2, v0, v6, s02712; GFX942-NEXT: v_pk_min_f16 v2, v2, 4.0 op_sel_hi:[1,0]2713; GFX942-NEXT: v_cndmask_b32_e32 v7, v5, v4, vcc2714; GFX942-NEXT: v_lshrrev_b32_e32 v4, 16, v42715; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_12716; GFX942-NEXT: s_nop 12717; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc2718; GFX942-NEXT: v_perm_b32 v1, v1, v7, s02719; GFX942-NEXT: v_pk_min_f16 v1, v1, 4.02720; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v7, v72721; GFX942-NEXT: s_nop 12722; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc2723; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v6, v62724; GFX942-NEXT: s_nop 12725; GFX942-NEXT: v_cndmask_b32_e32 v3, v5, v2, vcc2726; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v02727; GFX942-NEXT: s_nop 12728; GFX942-NEXT: v_cndmask_b32_sdwa v0, v5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12729; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02730; GFX942-NEXT: s_setpc_b64 s[30:31]2731;2732; GFX950-LABEL: v_fminimum3_v3f16__inlineimm2:2733; GFX950: ; %bb.0:2734; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2735; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, 4.0 op_sel_hi:[1,1,0]2736; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, 4.02737; GFX950-NEXT: s_setpc_b64 s[30:31]2738 %max0 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %a, <3 x half> %b)2739 %max1 = call <3 x half> @llvm.minimum.v3f16(<3 x half> %max0, <3 x half> <half 4.0, half 4.0, half 4.0>)2740 ret <3 x half> %max12741}2742 2743define <4 x half> @v_fminimum3_v4f16(<4 x half> %a, <4 x half> %b, <4 x half> %c) {2744; GFX12-LABEL: v_fminimum3_v4f16:2745; GFX12: ; %bb.0:2746; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02747; GFX12-NEXT: s_wait_expcnt 0x02748; GFX12-NEXT: s_wait_samplecnt 0x02749; GFX12-NEXT: s_wait_bvhcnt 0x02750; GFX12-NEXT: s_wait_kmcnt 0x02751; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22752; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32753; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2754; GFX12-NEXT: v_pk_minimum_f16 v0, v4, v02755; GFX12-NEXT: v_pk_minimum_f16 v1, v5, v12756; GFX12-NEXT: s_setpc_b64 s[30:31]2757;2758; GFX942-LABEL: v_fminimum3_v4f16:2759; GFX942: ; %bb.0:2760; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2761; GFX942-NEXT: v_pk_min_f16 v6, v0, v22762; GFX942-NEXT: v_mov_b32_e32 v7, 0x7e002763; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v22764; GFX942-NEXT: s_mov_b32 s0, 0x50401002765; GFX942-NEXT: s_nop 02766; GFX942-NEXT: v_cndmask_b32_e32 v8, v7, v6, vcc2767; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62768; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_12769; GFX942-NEXT: s_nop 12770; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc2771; GFX942-NEXT: v_pk_min_f16 v6, v1, v32772; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v32773; GFX942-NEXT: v_perm_b32 v2, v0, v8, s02774; GFX942-NEXT: v_pk_min_f16 v2, v4, v22775; GFX942-NEXT: v_cndmask_b32_e32 v9, v7, v6, vcc2776; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_12777; GFX942-NEXT: s_nop 12778; GFX942-NEXT: v_cndmask_b32_sdwa v1, v7, v6, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12779; GFX942-NEXT: v_perm_b32 v3, v1, v9, s02780; GFX942-NEXT: v_pk_min_f16 v3, v5, v32781; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v5, v92782; GFX942-NEXT: s_nop 12783; GFX942-NEXT: v_cndmask_b32_e32 v6, v7, v3, vcc2784; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v5, v1 src0_sel:WORD_1 src1_sel:DWORD2785; GFX942-NEXT: s_nop 12786; GFX942-NEXT: v_cndmask_b32_sdwa v1, v7, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12787; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v4, v82788; GFX942-NEXT: v_perm_b32 v1, v1, v6, s02789; GFX942-NEXT: s_nop 02790; GFX942-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc2791; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v4, v0 src0_sel:WORD_1 src1_sel:DWORD2792; GFX942-NEXT: s_nop 12793; GFX942-NEXT: v_cndmask_b32_sdwa v0, v7, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12794; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02795; GFX942-NEXT: s_setpc_b64 s[30:31]2796;2797; GFX950-LABEL: v_fminimum3_v4f16:2798; GFX950: ; %bb.0:2799; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2800; GFX950-NEXT: v_pk_minimum3_f16 v0, v4, v0, v22801; GFX950-NEXT: v_pk_minimum3_f16 v1, v5, v1, v32802; GFX950-NEXT: s_setpc_b64 s[30:31]2803 %max0 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a, <4 x half> %b)2804 %max1 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %c, <4 x half> %max0)2805 ret <4 x half> %max12806}2807 2808define <4 x half> @v_fminimum3_v4f16_commute(<4 x half> %a, <4 x half> %b, <4 x half> %c) {2809; GFX12-LABEL: v_fminimum3_v4f16_commute:2810; GFX12: ; %bb.0:2811; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02812; GFX12-NEXT: s_wait_expcnt 0x02813; GFX12-NEXT: s_wait_samplecnt 0x02814; GFX12-NEXT: s_wait_bvhcnt 0x02815; GFX12-NEXT: s_wait_kmcnt 0x02816; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22817; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32818; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2819; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v42820; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v52821; GFX12-NEXT: s_setpc_b64 s[30:31]2822;2823; GFX942-LABEL: v_fminimum3_v4f16_commute:2824; GFX942: ; %bb.0:2825; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2826; GFX942-NEXT: v_pk_min_f16 v6, v0, v22827; GFX942-NEXT: v_mov_b32_e32 v7, 0x7e002828; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v22829; GFX942-NEXT: s_mov_b32 s0, 0x50401002830; GFX942-NEXT: s_nop 02831; GFX942-NEXT: v_cndmask_b32_e32 v8, v7, v6, vcc2832; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62833; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_12834; GFX942-NEXT: s_nop 12835; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc2836; GFX942-NEXT: v_pk_min_f16 v6, v1, v32837; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v32838; GFX942-NEXT: v_perm_b32 v2, v0, v8, s02839; GFX942-NEXT: v_pk_min_f16 v2, v2, v42840; GFX942-NEXT: v_cndmask_b32_e32 v9, v7, v6, vcc2841; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_12842; GFX942-NEXT: s_nop 12843; GFX942-NEXT: v_cndmask_b32_sdwa v1, v7, v6, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12844; GFX942-NEXT: v_perm_b32 v3, v1, v9, s02845; GFX942-NEXT: v_pk_min_f16 v3, v3, v52846; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v9, v52847; GFX942-NEXT: s_nop 12848; GFX942-NEXT: v_cndmask_b32_e32 v6, v7, v3, vcc2849; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v5 src0_sel:DWORD src1_sel:WORD_12850; GFX942-NEXT: s_nop 12851; GFX942-NEXT: v_cndmask_b32_sdwa v1, v7, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12852; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v8, v42853; GFX942-NEXT: v_perm_b32 v1, v1, v6, s02854; GFX942-NEXT: s_nop 02855; GFX942-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc2856; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v4 src0_sel:DWORD src1_sel:WORD_12857; GFX942-NEXT: s_nop 12858; GFX942-NEXT: v_cndmask_b32_sdwa v0, v7, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12859; GFX942-NEXT: v_perm_b32 v0, v0, v3, s02860; GFX942-NEXT: s_setpc_b64 s[30:31]2861;2862; GFX950-LABEL: v_fminimum3_v4f16_commute:2863; GFX950: ; %bb.0:2864; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2865; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v42866; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v52867; GFX950-NEXT: s_setpc_b64 s[30:31]2868 %max0 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a, <4 x half> %b)2869 %max1 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %max0, <4 x half> %c)2870 ret <4 x half> %max12871}2872 2873define <4 x half> @v_fminimum3_v4f16__fabs_all(<4 x half> %a, <4 x half> %b, <4 x half> %c) {2874; GFX12-LABEL: v_fminimum3_v4f16__fabs_all:2875; GFX12: ; %bb.0:2876; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02877; GFX12-NEXT: s_wait_expcnt 0x02878; GFX12-NEXT: s_wait_samplecnt 0x02879; GFX12-NEXT: s_wait_bvhcnt 0x02880; GFX12-NEXT: s_wait_kmcnt 0x02881; GFX12-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02882; GFX12-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v12883; GFX12-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v22884; GFX12-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v32885; GFX12-NEXT: v_and_b32_e32 v5, 0x7fff7fff, v52886; GFX12-NEXT: v_and_b32_e32 v4, 0x7fff7fff, v42887; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)2888; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v22889; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v32890; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2891; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v42892; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v52893; GFX12-NEXT: s_setpc_b64 s[30:31]2894;2895; GFX942-LABEL: v_fminimum3_v4f16__fabs_all:2896; GFX942: ; %bb.0:2897; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2898; GFX942-NEXT: v_and_b32_e32 v7, 0x7fff7fff, v02899; GFX942-NEXT: v_and_b32_e32 v9, 0x7fff7fff, v22900; GFX942-NEXT: v_pk_min_f16 v7, v7, v92901; GFX942-NEXT: v_mov_b32_e32 v12, 0x7e002902; GFX942-NEXT: v_lshrrev_b32_e32 v9, 16, v72903; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, |v0|, |v2| src0_sel:WORD_1 src1_sel:WORD_12904; GFX942-NEXT: v_and_b32_e32 v6, 0x7fff7fff, v12905; GFX942-NEXT: v_and_b32_e32 v8, 0x7fff7fff, v32906; GFX942-NEXT: v_cndmask_b32_e32 v9, v12, v9, vcc2907; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v0|, |v2|2908; GFX942-NEXT: v_pk_min_f16 v6, v6, v82909; GFX942-NEXT: s_mov_b32 s0, 0x50401002910; GFX942-NEXT: v_cndmask_b32_e32 v0, v12, v7, vcc2911; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, |v1|, |v3| src0_sel:WORD_1 src1_sel:WORD_12912; GFX942-NEXT: v_and_b32_e32 v11, 0x7fff7fff, v52913; GFX942-NEXT: v_and_b32_e32 v10, 0x7fff7fff, v42914; GFX942-NEXT: v_cndmask_b32_sdwa v7, v12, v6, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12915; GFX942-NEXT: v_cmp_o_f16_e64 vcc, |v1|, |v3|2916; GFX942-NEXT: v_perm_b32 v2, v9, v0, s02917; GFX942-NEXT: v_pk_min_f16 v2, v2, v102918; GFX942-NEXT: v_cndmask_b32_e32 v1, v12, v6, vcc2919; GFX942-NEXT: v_perm_b32 v3, v7, v1, s02920; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v7, |v5| src0_sel:DWORD src1_sel:WORD_12921; GFX942-NEXT: v_pk_min_f16 v3, v3, v112922; GFX942-NEXT: s_nop 02923; GFX942-NEXT: v_cndmask_b32_sdwa v6, v12, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12924; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v9, |v4| src0_sel:DWORD src1_sel:WORD_12925; GFX942-NEXT: s_nop 12926; GFX942-NEXT: v_cndmask_b32_sdwa v7, v12, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12927; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v1, |v5|2928; GFX942-NEXT: s_nop 12929; GFX942-NEXT: v_cndmask_b32_e32 v1, v12, v3, vcc2930; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v0, |v4|2931; GFX942-NEXT: v_perm_b32 v1, v6, v1, s02932; GFX942-NEXT: s_nop 02933; GFX942-NEXT: v_cndmask_b32_e32 v0, v12, v2, vcc2934; GFX942-NEXT: v_perm_b32 v0, v7, v0, s02935; GFX942-NEXT: s_setpc_b64 s[30:31]2936;2937; GFX950-LABEL: v_fminimum3_v4f16__fabs_all:2938; GFX950: ; %bb.0:2939; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2940; GFX950-NEXT: v_and_b32_e32 v1, 0x7fff7fff, v12941; GFX950-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v02942; GFX950-NEXT: v_and_b32_e32 v3, 0x7fff7fff, v32943; GFX950-NEXT: v_and_b32_e32 v2, 0x7fff7fff, v22944; GFX950-NEXT: v_and_b32_e32 v5, 0x7fff7fff, v52945; GFX950-NEXT: v_and_b32_e32 v4, 0x7fff7fff, v42946; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v42947; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v52948; GFX950-NEXT: s_setpc_b64 s[30:31]2949 %a.fabs = call <4 x half> @llvm.fabs.v4f16(<4 x half> %a)2950 %b.fabs = call <4 x half> @llvm.fabs.v4f16(<4 x half> %b)2951 %c.fabs = call <4 x half> @llvm.fabs.v4f16(<4 x half> %c)2952 %max0 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a.fabs, <4 x half> %b.fabs)2953 %max1 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %max0, <4 x half> %c.fabs)2954 ret <4 x half> %max12955}2956 2957define <4 x half> @v_fminimum3_v4f16__fneg_all(<4 x half> %a, <4 x half> %b, <4 x half> %c) {2958; GFX12-LABEL: v_fminimum3_v4f16__fneg_all:2959; GFX12: ; %bb.0:2960; GFX12-NEXT: s_wait_loadcnt_dscnt 0x02961; GFX12-NEXT: s_wait_expcnt 0x02962; GFX12-NEXT: s_wait_samplecnt 0x02963; GFX12-NEXT: s_wait_bvhcnt 0x02964; GFX12-NEXT: s_wait_kmcnt 0x02965; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v2 neg_lo:[1,1] neg_hi:[1,1]2966; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v3 neg_lo:[1,1] neg_hi:[1,1]2967; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2968; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v4 neg_lo:[0,1] neg_hi:[0,1]2969; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v5 neg_lo:[0,1] neg_hi:[0,1]2970; GFX12-NEXT: s_setpc_b64 s[30:31]2971;2972; GFX942-LABEL: v_fminimum3_v4f16__fneg_all:2973; GFX942: ; %bb.0:2974; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2975; GFX942-NEXT: v_pk_min_f16 v6, v0, v2 neg_lo:[1,1] neg_hi:[1,1]2976; GFX942-NEXT: v_mov_b32_e32 v7, 0x7e002977; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v0, -v22978; GFX942-NEXT: s_mov_b32 s0, 0x50401002979; GFX942-NEXT: s_nop 02980; GFX942-NEXT: v_cndmask_b32_e32 v8, v7, v6, vcc2981; GFX942-NEXT: v_lshrrev_b32_e32 v6, 16, v62982; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, -v0, -v2 src0_sel:WORD_1 src1_sel:WORD_12983; GFX942-NEXT: s_nop 12984; GFX942-NEXT: v_cndmask_b32_e32 v0, v7, v6, vcc2985; GFX942-NEXT: v_pk_min_f16 v6, v1, v3 neg_lo:[1,1] neg_hi:[1,1]2986; GFX942-NEXT: v_cmp_o_f16_e64 vcc, -v1, -v32987; GFX942-NEXT: v_perm_b32 v2, v0, v8, s02988; GFX942-NEXT: v_pk_min_f16 v2, v2, v4 neg_lo:[0,1] neg_hi:[0,1]2989; GFX942-NEXT: v_cndmask_b32_e32 v9, v7, v6, vcc2990; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, -v1, -v3 src0_sel:WORD_1 src1_sel:WORD_12991; GFX942-NEXT: s_nop 12992; GFX942-NEXT: v_cndmask_b32_sdwa v1, v7, v6, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12993; GFX942-NEXT: v_perm_b32 v3, v1, v9, s02994; GFX942-NEXT: v_pk_min_f16 v3, v3, v5 neg_lo:[0,1] neg_hi:[0,1]2995; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v9, -v52996; GFX942-NEXT: s_nop 12997; GFX942-NEXT: v_cndmask_b32_e32 v6, v7, v3, vcc2998; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, -v5 src0_sel:DWORD src1_sel:WORD_12999; GFX942-NEXT: s_nop 13000; GFX942-NEXT: v_cndmask_b32_sdwa v1, v7, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13001; GFX942-NEXT: v_cmp_o_f16_e64 vcc, v8, -v43002; GFX942-NEXT: v_perm_b32 v1, v1, v6, s03003; GFX942-NEXT: s_nop 03004; GFX942-NEXT: v_cndmask_b32_e32 v3, v7, v2, vcc3005; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, -v4 src0_sel:DWORD src1_sel:WORD_13006; GFX942-NEXT: s_nop 13007; GFX942-NEXT: v_cndmask_b32_sdwa v0, v7, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13008; GFX942-NEXT: v_perm_b32 v0, v0, v3, s03009; GFX942-NEXT: s_setpc_b64 s[30:31]3010;3011; GFX950-LABEL: v_fminimum3_v4f16__fneg_all:3012; GFX950: ; %bb.0:3013; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3014; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, v4 neg_lo:[1,1,1] neg_hi:[1,1,1]3015; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, v5 neg_lo:[1,1,1] neg_hi:[1,1,1]3016; GFX950-NEXT: s_setpc_b64 s[30:31]3017 %a.fneg = fneg <4 x half> %a3018 %b.fneg = fneg <4 x half> %b3019 %c.fneg = fneg <4 x half> %c3020 %max0 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a.fneg, <4 x half> %b.fneg)3021 %max1 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %max0, <4 x half> %c.fneg)3022 ret <4 x half> %max13023}3024 3025define <4 x half> @v_fminimum3_v4f16__inlineimm1(<4 x half> %a, <4 x half> %c) {3026; GFX12-LABEL: v_fminimum3_v4f16__inlineimm1:3027; GFX12: ; %bb.0:3028; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03029; GFX12-NEXT: s_wait_expcnt 0x03030; GFX12-NEXT: s_wait_samplecnt 0x03031; GFX12-NEXT: s_wait_bvhcnt 0x03032; GFX12-NEXT: s_wait_kmcnt 0x03033; GFX12-NEXT: v_pk_minimum_f16 v0, v0, 2.0 op_sel_hi:[1,0]3034; GFX12-NEXT: v_pk_minimum_f16 v1, v1, 2.0 op_sel_hi:[1,0]3035; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3036; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v23037; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v33038; GFX12-NEXT: s_setpc_b64 s[30:31]3039;3040; GFX942-LABEL: v_fminimum3_v4f16__inlineimm1:3041; GFX942: ; %bb.0:3042; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3043; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v0 src0_sel:WORD_1 src1_sel:WORD_13044; GFX942-NEXT: v_pk_min_f16 v4, v0, 2.0 op_sel_hi:[1,0]3045; GFX942-NEXT: v_mov_b32_e32 v5, 0x7e003046; GFX942-NEXT: v_cndmask_b32_sdwa v6, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13047; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v03048; GFX942-NEXT: v_pk_min_f16 v7, v1, 2.0 op_sel_hi:[1,0]3049; GFX942-NEXT: s_mov_b32 s0, 0x50401003050; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc3051; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v1 src0_sel:WORD_1 src1_sel:WORD_13052; GFX942-NEXT: v_perm_b32 v4, v6, v0, s03053; GFX942-NEXT: v_pk_min_f16 v4, v4, v23054; GFX942-NEXT: v_cndmask_b32_sdwa v8, v5, v7, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13055; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v13056; GFX942-NEXT: s_nop 13057; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc3058; GFX942-NEXT: v_perm_b32 v7, v8, v1, s03059; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v8, v3 src0_sel:DWORD src1_sel:WORD_13060; GFX942-NEXT: v_pk_min_f16 v7, v7, v33061; GFX942-NEXT: s_nop 03062; GFX942-NEXT: v_cndmask_b32_sdwa v8, v5, v7, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13063; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v6, v2 src0_sel:DWORD src1_sel:WORD_13064; GFX942-NEXT: s_nop 13065; GFX942-NEXT: v_cndmask_b32_sdwa v6, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13066; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v33067; GFX942-NEXT: s_nop 13068; GFX942-NEXT: v_cndmask_b32_e32 v1, v5, v7, vcc3069; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v23070; GFX942-NEXT: v_perm_b32 v1, v8, v1, s03071; GFX942-NEXT: s_nop 03072; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc3073; GFX942-NEXT: v_perm_b32 v0, v6, v0, s03074; GFX942-NEXT: s_setpc_b64 s[30:31]3075;3076; GFX950-LABEL: v_fminimum3_v4f16__inlineimm1:3077; GFX950: ; %bb.0:3078; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3079; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, 2.0, v2 op_sel_hi:[1,0,1]3080; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, 2.0, v3 op_sel_hi:[1,0,1]3081; GFX950-NEXT: s_setpc_b64 s[30:31]3082 %max0 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a, <4 x half> <half 2.0, half 2.0, half 2.0, half 2.0>)3083 %max1 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %max0, <4 x half> %c)3084 ret <4 x half> %max13085}3086 3087define <4 x half> @v_fminimum3_v4f16__inlineimm2(<4 x half> %a, <4 x half> %b) {3088; GFX12-LABEL: v_fminimum3_v4f16__inlineimm2:3089; GFX12: ; %bb.0:3090; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03091; GFX12-NEXT: s_wait_expcnt 0x03092; GFX12-NEXT: s_wait_samplecnt 0x03093; GFX12-NEXT: s_wait_bvhcnt 0x03094; GFX12-NEXT: s_wait_kmcnt 0x03095; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v23096; GFX12-NEXT: v_pk_minimum_f16 v1, v1, v33097; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3098; GFX12-NEXT: v_pk_minimum_f16 v0, v0, 4.0 op_sel_hi:[1,0]3099; GFX12-NEXT: v_pk_minimum_f16 v1, v1, 4.0 op_sel_hi:[1,0]3100; GFX12-NEXT: s_setpc_b64 s[30:31]3101;3102; GFX942-LABEL: v_fminimum3_v4f16__inlineimm2:3103; GFX942: ; %bb.0:3104; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3105; GFX942-NEXT: v_pk_min_f16 v4, v0, v23106; GFX942-NEXT: v_mov_b32_e32 v5, 0x7e003107; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v23108; GFX942-NEXT: s_mov_b32 s0, 0x50401003109; GFX942-NEXT: s_nop 03110; GFX942-NEXT: v_cndmask_b32_e32 v6, v5, v4, vcc3111; GFX942-NEXT: v_lshrrev_b32_e32 v4, 16, v43112; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:WORD_13113; GFX942-NEXT: s_nop 13114; GFX942-NEXT: v_cndmask_b32_e32 v0, v5, v4, vcc3115; GFX942-NEXT: v_pk_min_f16 v4, v1, v33116; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v33117; GFX942-NEXT: v_perm_b32 v2, v0, v6, s03118; GFX942-NEXT: v_pk_min_f16 v2, v2, 4.0 op_sel_hi:[1,0]3119; GFX942-NEXT: v_cndmask_b32_e32 v7, v5, v4, vcc3120; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v3 src0_sel:WORD_1 src1_sel:WORD_13121; GFX942-NEXT: s_nop 13122; GFX942-NEXT: v_cndmask_b32_sdwa v1, v5, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13123; GFX942-NEXT: v_perm_b32 v3, v1, v7, s03124; GFX942-NEXT: v_pk_min_f16 v3, v3, 4.0 op_sel_hi:[1,0]3125; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v7, v73126; GFX942-NEXT: s_nop 13127; GFX942-NEXT: v_cndmask_b32_e32 v4, v5, v3, vcc3128; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v1, v13129; GFX942-NEXT: s_nop 13130; GFX942-NEXT: v_cndmask_b32_sdwa v1, v5, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13131; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v6, v63132; GFX942-NEXT: v_perm_b32 v1, v1, v4, s03133; GFX942-NEXT: s_nop 03134; GFX942-NEXT: v_cndmask_b32_e32 v3, v5, v2, vcc3135; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v03136; GFX942-NEXT: s_nop 13137; GFX942-NEXT: v_cndmask_b32_sdwa v0, v5, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13138; GFX942-NEXT: v_perm_b32 v0, v0, v3, s03139; GFX942-NEXT: s_setpc_b64 s[30:31]3140;3141; GFX950-LABEL: v_fminimum3_v4f16__inlineimm2:3142; GFX950: ; %bb.0:3143; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3144; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v2, 4.0 op_sel_hi:[1,1,0]3145; GFX950-NEXT: v_pk_minimum3_f16 v1, v1, v3, 4.0 op_sel_hi:[1,1,0]3146; GFX950-NEXT: s_setpc_b64 s[30:31]3147 %max0 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %a, <4 x half> %b)3148 %max1 = call <4 x half> @llvm.minimum.v4f16(<4 x half> %max0, <4 x half> <half 4.0, half 4.0, half 4.0, half 4.0>)3149 ret <4 x half> %max13150}3151 3152define double @v_fminimum3_f64(double %a, double %b, double %c) {3153; GFX12-LABEL: v_fminimum3_f64:3154; GFX12: ; %bb.0:3155; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03156; GFX12-NEXT: s_wait_expcnt 0x03157; GFX12-NEXT: s_wait_samplecnt 0x03158; GFX12-NEXT: s_wait_bvhcnt 0x03159; GFX12-NEXT: s_wait_kmcnt 0x03160; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3161; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3162; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[4:5]3163; GFX12-NEXT: s_setpc_b64 s[30:31]3164;3165; GFX9-LABEL: v_fminimum3_f64:3166; GFX9: ; %bb.0:3167; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3168; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], v[2:3]3169; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003170; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3171; GFX9-NEXT: s_nop 13172; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3173; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3174; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], v[4:5]3175; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[4:5]3176; GFX9-NEXT: s_nop 13177; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3178; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3179; GFX9-NEXT: s_setpc_b64 s[30:31]3180 %max0 = call double @llvm.minimum.f64(double %a, double %b)3181 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3182 ret double %max13183}3184 3185define double @v_fminimum3_f64_commute(double %a, double %b, double %c) {3186; GFX12-LABEL: v_fminimum3_f64_commute:3187; GFX12: ; %bb.0:3188; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03189; GFX12-NEXT: s_wait_expcnt 0x03190; GFX12-NEXT: s_wait_samplecnt 0x03191; GFX12-NEXT: s_wait_bvhcnt 0x03192; GFX12-NEXT: s_wait_kmcnt 0x03193; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3194; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3195; GFX12-NEXT: v_minimum_f64 v[0:1], v[4:5], v[0:1]3196; GFX12-NEXT: s_setpc_b64 s[30:31]3197;3198; GFX9-LABEL: v_fminimum3_f64_commute:3199; GFX9: ; %bb.0:3200; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3201; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], v[2:3]3202; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003203; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3204; GFX9-NEXT: s_nop 13205; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3206; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3207; GFX9-NEXT: v_min_f64 v[2:3], v[4:5], v[0:1]3208; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[4:5], v[0:1]3209; GFX9-NEXT: s_nop 13210; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3211; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3212; GFX9-NEXT: s_setpc_b64 s[30:31]3213 %max0 = call double @llvm.minimum.f64(double %a, double %b)3214 %max1 = call double @llvm.minimum.f64(double %c, double %max0)3215 ret double %max13216}3217 3218define amdgpu_ps <2 x i32> @s_fminimum3_f64(double inreg %a, double inreg %b, double inreg %c) {3219; GFX12-LABEL: s_fminimum3_f64:3220; GFX12: ; %bb.0:3221; GFX12-NEXT: v_minimum_f64 v[0:1], s[0:1], s[2:3]3222; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3223; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], s[4:5]3224; GFX12-NEXT: v_readfirstlane_b32 s0, v03225; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_2)3226; GFX12-NEXT: v_readfirstlane_b32 s1, v13227; GFX12-NEXT: s_wait_alu depctr_va_sdst(0)3228; GFX12-NEXT: ; return to shader part epilog3229;3230; GFX9-LABEL: s_fminimum3_f64:3231; GFX9: ; %bb.0:3232; GFX9-NEXT: v_mov_b64_e32 v[0:1], s[2:3]3233; GFX9-NEXT: v_min_f64 v[2:3], s[0:1], v[0:1]3234; GFX9-NEXT: v_mov_b32_e32 v4, 0x7ff800003235; GFX9-NEXT: v_cmp_u_f64_e32 vcc, s[0:1], v[0:1]3236; GFX9-NEXT: s_nop 13237; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc3238; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3239; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], s[4:5]3240; GFX9-NEXT: v_cmp_u_f64_e32 vcc, s[4:5], v[0:1]3241; GFX9-NEXT: s_nop 13242; GFX9-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc3243; GFX9-NEXT: v_cndmask_b32_e64 v1, v2, 0, vcc3244; GFX9-NEXT: v_readfirstlane_b32 s1, v03245; GFX9-NEXT: v_readfirstlane_b32 s0, v13246; GFX9-NEXT: ; return to shader part epilog3247 %max0 = call double @llvm.minimum.f64(double %a, double %b)3248 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3249 %cast = bitcast double %max1 to <2 x i32>3250 %elt0 = extractelement <2 x i32> %cast, i32 03251 %elt1 = extractelement <2 x i32> %cast, i32 13252 %readlane0 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt0)3253 %readlane1 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt1)3254 %insert.0 = insertelement <2 x i32> poison, i32 %readlane0, i32 03255 %insert.1 = insertelement <2 x i32> %insert.0, i32 %readlane1, i32 13256 ret <2 x i32> %insert.13257}3258 3259define double @v_fminimum3_f64_fabs0(double %a, double %b, double %c) {3260; GFX12-LABEL: v_fminimum3_f64_fabs0:3261; GFX12: ; %bb.0:3262; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03263; GFX12-NEXT: s_wait_expcnt 0x03264; GFX12-NEXT: s_wait_samplecnt 0x03265; GFX12-NEXT: s_wait_bvhcnt 0x03266; GFX12-NEXT: s_wait_kmcnt 0x03267; GFX12-NEXT: v_minimum_f64 v[0:1], |v[0:1]|, v[2:3]3268; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3269; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[4:5]3270; GFX12-NEXT: s_setpc_b64 s[30:31]3271;3272; GFX9-LABEL: v_fminimum3_f64_fabs0:3273; GFX9: ; %bb.0:3274; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3275; GFX9-NEXT: v_min_f64 v[6:7], |v[0:1]|, v[2:3]3276; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003277; GFX9-NEXT: v_cmp_u_f64_e64 vcc, |v[0:1]|, v[2:3]3278; GFX9-NEXT: s_nop 13279; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3280; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3281; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], v[4:5]3282; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[4:5]3283; GFX9-NEXT: s_nop 13284; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3285; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3286; GFX9-NEXT: s_setpc_b64 s[30:31]3287 %a.fabs = call double @llvm.fabs.f64(double %a)3288 %max0 = call double @llvm.minimum.f64(double %a.fabs, double %b)3289 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3290 ret double %max13291}3292 3293define double @v_fminimum3_f64_fabs1(double %a, double %b, double %c) {3294; GFX12-LABEL: v_fminimum3_f64_fabs1:3295; GFX12: ; %bb.0:3296; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03297; GFX12-NEXT: s_wait_expcnt 0x03298; GFX12-NEXT: s_wait_samplecnt 0x03299; GFX12-NEXT: s_wait_bvhcnt 0x03300; GFX12-NEXT: s_wait_kmcnt 0x03301; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], |v[2:3]|3302; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3303; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[4:5]3304; GFX12-NEXT: s_setpc_b64 s[30:31]3305;3306; GFX9-LABEL: v_fminimum3_f64_fabs1:3307; GFX9: ; %bb.0:3308; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3309; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], |v[2:3]|3310; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003311; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], |v[2:3]|3312; GFX9-NEXT: s_nop 13313; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3314; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3315; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], v[4:5]3316; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[4:5]3317; GFX9-NEXT: s_nop 13318; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3319; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3320; GFX9-NEXT: s_setpc_b64 s[30:31]3321 %b.fabs = call double @llvm.fabs.f64(double %b)3322 %max0 = call double @llvm.minimum.f64(double %a, double %b.fabs)3323 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3324 ret double %max13325}3326 3327define double @v_fminimum3_f64_fabs2(double %a, double %b, double %c) {3328; GFX12-LABEL: v_fminimum3_f64_fabs2:3329; GFX12: ; %bb.0:3330; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03331; GFX12-NEXT: s_wait_expcnt 0x03332; GFX12-NEXT: s_wait_samplecnt 0x03333; GFX12-NEXT: s_wait_bvhcnt 0x03334; GFX12-NEXT: s_wait_kmcnt 0x03335; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3336; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3337; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], |v[4:5]|3338; GFX12-NEXT: s_setpc_b64 s[30:31]3339;3340; GFX9-LABEL: v_fminimum3_f64_fabs2:3341; GFX9: ; %bb.0:3342; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3343; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], v[2:3]3344; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003345; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3346; GFX9-NEXT: s_nop 13347; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3348; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3349; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], |v[4:5]|3350; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], |v[4:5]|3351; GFX9-NEXT: s_nop 13352; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3353; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3354; GFX9-NEXT: s_setpc_b64 s[30:31]3355 %c.fabs = call double @llvm.fabs.f64(double %c)3356 %max0 = call double @llvm.minimum.f64(double %a, double %b)3357 %max1 = call double @llvm.minimum.f64(double %max0, double %c.fabs)3358 ret double %max13359}3360 3361define double @v_fminimum3_f64_fabs_all(double %a, double %b, double %c) {3362; GFX12-LABEL: v_fminimum3_f64_fabs_all:3363; GFX12: ; %bb.0:3364; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03365; GFX12-NEXT: s_wait_expcnt 0x03366; GFX12-NEXT: s_wait_samplecnt 0x03367; GFX12-NEXT: s_wait_bvhcnt 0x03368; GFX12-NEXT: s_wait_kmcnt 0x03369; GFX12-NEXT: v_minimum_f64 v[0:1], |v[0:1]|, |v[2:3]|3370; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3371; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], |v[4:5]|3372; GFX12-NEXT: s_setpc_b64 s[30:31]3373;3374; GFX9-LABEL: v_fminimum3_f64_fabs_all:3375; GFX9: ; %bb.0:3376; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3377; GFX9-NEXT: v_min_f64 v[6:7], |v[0:1]|, |v[2:3]|3378; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003379; GFX9-NEXT: v_cmp_u_f64_e64 vcc, |v[0:1]|, |v[2:3]|3380; GFX9-NEXT: s_nop 13381; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3382; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3383; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], |v[4:5]|3384; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], |v[4:5]|3385; GFX9-NEXT: s_nop 13386; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3387; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3388; GFX9-NEXT: s_setpc_b64 s[30:31]3389 %a.fabs = call double @llvm.fabs.f64(double %a)3390 %b.fabs = call double @llvm.fabs.f64(double %b)3391 %c.fabs = call double @llvm.fabs.f64(double %c)3392 %max0 = call double @llvm.minimum.f64(double %a.fabs, double %b.fabs)3393 %max1 = call double @llvm.minimum.f64(double %max0, double %c.fabs)3394 ret double %max13395}3396 3397define double @v_fminimum3_f64_fneg_all(double %a, double %b, double %c) {3398; GFX12-LABEL: v_fminimum3_f64_fneg_all:3399; GFX12: ; %bb.0:3400; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03401; GFX12-NEXT: s_wait_expcnt 0x03402; GFX12-NEXT: s_wait_samplecnt 0x03403; GFX12-NEXT: s_wait_bvhcnt 0x03404; GFX12-NEXT: s_wait_kmcnt 0x03405; GFX12-NEXT: v_minimum_f64 v[0:1], -v[0:1], -v[2:3]3406; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3407; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], -v[4:5]3408; GFX12-NEXT: s_setpc_b64 s[30:31]3409;3410; GFX9-LABEL: v_fminimum3_f64_fneg_all:3411; GFX9: ; %bb.0:3412; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3413; GFX9-NEXT: v_min_f64 v[6:7], -v[0:1], -v[2:3]3414; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003415; GFX9-NEXT: v_cmp_u_f64_e64 vcc, -v[0:1], -v[2:3]3416; GFX9-NEXT: s_nop 13417; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3418; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3419; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], -v[4:5]3420; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], -v[4:5]3421; GFX9-NEXT: s_nop 13422; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3423; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3424; GFX9-NEXT: s_setpc_b64 s[30:31]3425 %a.fneg = fneg double %a3426 %b.fneg = fneg double %b3427 %c.fneg = fneg double %c3428 %max0 = call double @llvm.minimum.f64(double %a.fneg, double %b.fneg)3429 %max1 = call double @llvm.minimum.f64(double %max0, double %c.fneg)3430 ret double %max13431}3432 3433define double @v_fminimum3_f64_fneg_fabs_all(double %a, double %b, double %c) {3434; GFX12-LABEL: v_fminimum3_f64_fneg_fabs_all:3435; GFX12: ; %bb.0:3436; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03437; GFX12-NEXT: s_wait_expcnt 0x03438; GFX12-NEXT: s_wait_samplecnt 0x03439; GFX12-NEXT: s_wait_bvhcnt 0x03440; GFX12-NEXT: s_wait_kmcnt 0x03441; GFX12-NEXT: v_minimum_f64 v[0:1], -|v[0:1]|, -|v[2:3]|3442; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3443; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], -|v[4:5]|3444; GFX12-NEXT: s_setpc_b64 s[30:31]3445;3446; GFX9-LABEL: v_fminimum3_f64_fneg_fabs_all:3447; GFX9: ; %bb.0:3448; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3449; GFX9-NEXT: v_min_f64 v[6:7], -|v[0:1]|, -|v[2:3]|3450; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003451; GFX9-NEXT: v_cmp_u_f64_e64 vcc, -|v[0:1]|, -|v[2:3]|3452; GFX9-NEXT: s_nop 13453; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3454; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3455; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], -|v[4:5]|3456; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], -|v[4:5]|3457; GFX9-NEXT: s_nop 13458; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3459; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3460; GFX9-NEXT: s_setpc_b64 s[30:31]3461 %a.fabs = call double @llvm.fabs.f64(double %a)3462 %b.fabs = call double @llvm.fabs.f64(double %b)3463 %c.fabs = call double @llvm.fabs.f64(double %c)3464 %a.fneg.fabs = fneg double %a.fabs3465 %b.fneg.fabs = fneg double %b.fabs3466 %c.fneg.fabs = fneg double %c.fabs3467 %max0 = call double @llvm.minimum.f64(double %a.fneg.fabs, double %b.fneg.fabs)3468 %max1 = call double @llvm.minimum.f64(double %max0, double %c.fneg.fabs)3469 ret double %max13470}3471 3472define double @v_fminimum3_f64_fneg0(double %a, double %b, double %c) {3473; GFX12-LABEL: v_fminimum3_f64_fneg0:3474; GFX12: ; %bb.0:3475; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03476; GFX12-NEXT: s_wait_expcnt 0x03477; GFX12-NEXT: s_wait_samplecnt 0x03478; GFX12-NEXT: s_wait_bvhcnt 0x03479; GFX12-NEXT: s_wait_kmcnt 0x03480; GFX12-NEXT: v_minimum_f64 v[0:1], -v[0:1], v[2:3]3481; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3482; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[4:5]3483; GFX12-NEXT: s_setpc_b64 s[30:31]3484;3485; GFX9-LABEL: v_fminimum3_f64_fneg0:3486; GFX9: ; %bb.0:3487; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3488; GFX9-NEXT: v_min_f64 v[6:7], -v[0:1], v[2:3]3489; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003490; GFX9-NEXT: v_cmp_u_f64_e64 vcc, -v[0:1], v[2:3]3491; GFX9-NEXT: s_nop 13492; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3493; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3494; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], v[4:5]3495; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[4:5]3496; GFX9-NEXT: s_nop 13497; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3498; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3499; GFX9-NEXT: s_setpc_b64 s[30:31]3500 %a.fneg = fneg double %a3501 %max0 = call double @llvm.minimum.f64(double %a.fneg, double %b)3502 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3503 ret double %max13504}3505 3506define double @v_fminimum3_f64_fneg1(double %a, double %b, double %c) {3507; GFX12-LABEL: v_fminimum3_f64_fneg1:3508; GFX12: ; %bb.0:3509; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03510; GFX12-NEXT: s_wait_expcnt 0x03511; GFX12-NEXT: s_wait_samplecnt 0x03512; GFX12-NEXT: s_wait_bvhcnt 0x03513; GFX12-NEXT: s_wait_kmcnt 0x03514; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], -v[2:3]3515; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3516; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[4:5]3517; GFX12-NEXT: s_setpc_b64 s[30:31]3518;3519; GFX9-LABEL: v_fminimum3_f64_fneg1:3520; GFX9: ; %bb.0:3521; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3522; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], -v[2:3]3523; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003524; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], -v[2:3]3525; GFX9-NEXT: s_nop 13526; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3527; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3528; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], v[4:5]3529; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[4:5]3530; GFX9-NEXT: s_nop 13531; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3532; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3533; GFX9-NEXT: s_setpc_b64 s[30:31]3534 %b.fneg = fneg double %b3535 %max0 = call double @llvm.minimum.f64(double %a, double %b.fneg)3536 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3537 ret double %max13538}3539 3540define double @v_fminimum3_f64_fneg2(double %a, double %b, double %c) {3541; GFX12-LABEL: v_fminimum3_f64_fneg2:3542; GFX12: ; %bb.0:3543; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03544; GFX12-NEXT: s_wait_expcnt 0x03545; GFX12-NEXT: s_wait_samplecnt 0x03546; GFX12-NEXT: s_wait_bvhcnt 0x03547; GFX12-NEXT: s_wait_kmcnt 0x03548; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3549; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3550; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], -v[4:5]3551; GFX12-NEXT: s_setpc_b64 s[30:31]3552;3553; GFX9-LABEL: v_fminimum3_f64_fneg2:3554; GFX9: ; %bb.0:3555; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3556; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], v[2:3]3557; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800003558; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3559; GFX9-NEXT: s_nop 13560; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc3561; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc3562; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], -v[4:5]3563; GFX9-NEXT: v_cmp_u_f64_e64 vcc, v[0:1], -v[4:5]3564; GFX9-NEXT: s_nop 13565; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3566; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc3567; GFX9-NEXT: s_setpc_b64 s[30:31]3568 %c.fneg = fneg double %c3569 %max0 = call double @llvm.minimum.f64(double %a, double %b)3570 %max1 = call double @llvm.minimum.f64(double %max0, double %c.fneg)3571 ret double %max13572}3573 3574define double @v_fminimum3_f64_const0(double %b, double %c) {3575; GFX12-LABEL: v_fminimum3_f64_const0:3576; GFX12: ; %bb.0:3577; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03578; GFX12-NEXT: s_wait_expcnt 0x03579; GFX12-NEXT: s_wait_samplecnt 0x03580; GFX12-NEXT: s_wait_bvhcnt 0x03581; GFX12-NEXT: s_wait_kmcnt 0x03582; GFX12-NEXT: v_minimum_f64 v[0:1], 0x40200000, v[0:1]3583; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3584; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3585; GFX12-NEXT: s_setpc_b64 s[30:31]3586;3587; GFX9-LABEL: v_fminimum3_f64_const0:3588; GFX9: ; %bb.0:3589; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3590; GFX9-NEXT: s_mov_b32 s0, 03591; GFX9-NEXT: s_mov_b32 s1, 0x402000003592; GFX9-NEXT: v_min_f64 v[4:5], v[0:1], s[0:1]3593; GFX9-NEXT: v_mov_b32_e32 v6, 0x7ff800003594; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]3595; GFX9-NEXT: s_nop 13596; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc3597; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc3598; GFX9-NEXT: v_min_f64 v[4:5], v[0:1], v[2:3]3599; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3600; GFX9-NEXT: s_nop 13601; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc3602; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc3603; GFX9-NEXT: s_setpc_b64 s[30:31]3604 %max0 = call double @llvm.minimum.f64(double 8.0, double %b)3605 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3606 ret double %max13607}3608 3609define double @v_fminimum3_f64__const2(double %a, double %b) {3610; GFX12-LABEL: v_fminimum3_f64__const2:3611; GFX12: ; %bb.0:3612; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03613; GFX12-NEXT: s_wait_expcnt 0x03614; GFX12-NEXT: s_wait_samplecnt 0x03615; GFX12-NEXT: s_wait_bvhcnt 0x03616; GFX12-NEXT: s_wait_kmcnt 0x03617; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3618; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3619; GFX12-NEXT: v_minimum_f64 v[0:1], 0x40200000, v[0:1]3620; GFX12-NEXT: s_setpc_b64 s[30:31]3621;3622; GFX9-LABEL: v_fminimum3_f64__const2:3623; GFX9: ; %bb.0:3624; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3625; GFX9-NEXT: v_min_f64 v[4:5], v[0:1], v[2:3]3626; GFX9-NEXT: v_mov_b32_e32 v6, 0x7ff800003627; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3628; GFX9-NEXT: s_mov_b32 s0, 03629; GFX9-NEXT: s_mov_b32 s1, 0x402000003630; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc3631; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc3632; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], s[0:1]3633; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]3634; GFX9-NEXT: s_nop 13635; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3636; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v6, vcc3637; GFX9-NEXT: s_setpc_b64 s[30:31]3638 %max0 = call double @llvm.minimum.f64(double %a, double %b)3639 %max1 = call double @llvm.minimum.f64(double %max0, double 8.0)3640 ret double %max13641}3642 3643define double @v_fminimum3_f64_inlineimm0(double %b, double %c) {3644; GFX12-LABEL: v_fminimum3_f64_inlineimm0:3645; GFX12: ; %bb.0:3646; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03647; GFX12-NEXT: s_wait_expcnt 0x03648; GFX12-NEXT: s_wait_samplecnt 0x03649; GFX12-NEXT: s_wait_bvhcnt 0x03650; GFX12-NEXT: s_wait_kmcnt 0x03651; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], 4.03652; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3653; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3654; GFX12-NEXT: s_setpc_b64 s[30:31]3655;3656; GFX9-LABEL: v_fminimum3_f64_inlineimm0:3657; GFX9: ; %bb.0:3658; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3659; GFX9-NEXT: v_min_f64 v[4:5], v[0:1], 4.03660; GFX9-NEXT: v_mov_b32_e32 v6, 0x7ff800003661; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]3662; GFX9-NEXT: s_nop 13663; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc3664; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc3665; GFX9-NEXT: v_min_f64 v[4:5], v[0:1], v[2:3]3666; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3667; GFX9-NEXT: s_nop 13668; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc3669; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc3670; GFX9-NEXT: s_setpc_b64 s[30:31]3671 %max0 = call double @llvm.minimum.f64(double 4.0, double %b)3672 %max1 = call double @llvm.minimum.f64(double %max0, double %c)3673 ret double %max13674}3675 3676define double @v_fminimum3_f64__inlineimm(double %a, double %b) {3677; GFX12-LABEL: v_fminimum3_f64__inlineimm:3678; GFX12: ; %bb.0:3679; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03680; GFX12-NEXT: s_wait_expcnt 0x03681; GFX12-NEXT: s_wait_samplecnt 0x03682; GFX12-NEXT: s_wait_bvhcnt 0x03683; GFX12-NEXT: s_wait_kmcnt 0x03684; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3685; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3686; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], 4.03687; GFX12-NEXT: s_setpc_b64 s[30:31]3688;3689; GFX9-LABEL: v_fminimum3_f64__inlineimm:3690; GFX9: ; %bb.0:3691; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3692; GFX9-NEXT: v_min_f64 v[4:5], v[0:1], v[2:3]3693; GFX9-NEXT: v_mov_b32_e32 v6, 0x7ff800003694; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]3695; GFX9-NEXT: s_nop 13696; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v6, vcc3697; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc3698; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], 4.03699; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]3700; GFX9-NEXT: s_nop 13701; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3702; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v6, vcc3703; GFX9-NEXT: s_setpc_b64 s[30:31]3704 %max0 = call double @llvm.minimum.f64(double %a, double %b)3705 %max1 = call double @llvm.minimum.f64(double %max0, double 4.0)3706 ret double %max13707}3708 3709define double @v_fminimum3_f64_const1_const2(double %a) {3710; GFX12-LABEL: v_fminimum3_f64_const1_const2:3711; GFX12: ; %bb.0:3712; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03713; GFX12-NEXT: s_wait_expcnt 0x03714; GFX12-NEXT: s_wait_samplecnt 0x03715; GFX12-NEXT: s_wait_bvhcnt 0x03716; GFX12-NEXT: s_wait_kmcnt 0x03717; GFX12-NEXT: v_minimum_f64 v[0:1], 0x40200000, v[0:1]3718; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3719; GFX12-NEXT: v_minimum_f64 v[0:1], 0x40300000, v[0:1]3720; GFX12-NEXT: s_setpc_b64 s[30:31]3721;3722; GFX9-LABEL: v_fminimum3_f64_const1_const2:3723; GFX9: ; %bb.0:3724; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3725; GFX9-NEXT: s_mov_b32 s0, 03726; GFX9-NEXT: s_mov_b32 s1, 0x402000003727; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], s[0:1]3728; GFX9-NEXT: v_mov_b32_e32 v4, 0x7ff800003729; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]3730; GFX9-NEXT: s_mov_b32 s0, 03731; GFX9-NEXT: s_mov_b32 s1, 0x403000003732; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc3733; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3734; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], s[0:1]3735; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[0:1]3736; GFX9-NEXT: s_nop 13737; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc3738; GFX9-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc3739; GFX9-NEXT: s_setpc_b64 s[30:31]3740 %max0 = call double @llvm.minimum.f64(double %a, double 8.0)3741 %max1 = call double @llvm.minimum.f64(double %max0, double 16.0)3742 ret double %max13743}3744 3745define <2 x float> @v_no_fminimum3_f32__multi_use(float %a, float %b, float %c) {3746; GFX12-LABEL: v_no_fminimum3_f32__multi_use:3747; GFX12: ; %bb.0:3748; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03749; GFX12-NEXT: s_wait_expcnt 0x03750; GFX12-NEXT: s_wait_samplecnt 0x03751; GFX12-NEXT: s_wait_bvhcnt 0x03752; GFX12-NEXT: s_wait_kmcnt 0x03753; GFX12-NEXT: v_minimum_f32 v0, v0, v13754; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3755; GFX12-NEXT: v_minimum_f32 v1, v0, v23756; GFX12-NEXT: s_setpc_b64 s[30:31]3757;3758; GFX942-LABEL: v_no_fminimum3_f32__multi_use:3759; GFX942: ; %bb.0:3760; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3761; GFX942-NEXT: v_min_f32_e32 v3, v0, v13762; GFX942-NEXT: v_mov_b32_e32 v4, 0x7fc000003763; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v13764; GFX942-NEXT: s_nop 13765; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc3766; GFX942-NEXT: v_min_f32_e32 v1, v0, v23767; GFX942-NEXT: v_cmp_o_f32_e32 vcc, v0, v23768; GFX942-NEXT: s_nop 13769; GFX942-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc3770; GFX942-NEXT: s_setpc_b64 s[30:31]3771;3772; GFX950-LABEL: v_no_fminimum3_f32__multi_use:3773; GFX950: ; %bb.0:3774; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3775; GFX950-NEXT: v_minimum3_f32 v0, v0, v1, v13776; GFX950-NEXT: v_minimum3_f32 v1, v0, v2, v23777; GFX950-NEXT: s_setpc_b64 s[30:31]3778 %max0 = call float @llvm.minimum.f32(float %a, float %b)3779 %max1 = call float @llvm.minimum.f32(float %max0, float %c)3780 %insert.0 = insertelement <2 x float> poison, float %max0, i32 03781 %insert.1 = insertelement <2 x float> %insert.0, float %max1, i32 13782 ret <2 x float> %insert.13783}3784 3785define amdgpu_ps <2 x i32> @s_no_fminimum3_f32__multi_use(float inreg %a, float inreg %b, float inreg %c) {3786; GFX12-LABEL: s_no_fminimum3_f32__multi_use:3787; GFX12: ; %bb.0:3788; GFX12-NEXT: s_minimum_f32 s0, s0, s13789; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3)3790; GFX12-NEXT: s_minimum_f32 s1, s0, s23791; GFX12-NEXT: ; return to shader part epilog3792;3793; GFX942-LABEL: s_no_fminimum3_f32__multi_use:3794; GFX942: ; %bb.0:3795; GFX942-NEXT: v_mov_b32_e32 v0, s13796; GFX942-NEXT: v_min_f32_e32 v1, s0, v03797; GFX942-NEXT: v_mov_b32_e32 v2, 0x7fc000003798; GFX942-NEXT: v_cmp_o_f32_e32 vcc, s0, v03799; GFX942-NEXT: s_nop 13800; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc3801; GFX942-NEXT: v_min_f32_e32 v1, s2, v03802; GFX942-NEXT: v_cmp_o_f32_e32 vcc, s2, v03803; GFX942-NEXT: v_readfirstlane_b32 s0, v03804; GFX942-NEXT: s_nop 03805; GFX942-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc3806; GFX942-NEXT: s_nop 03807; GFX942-NEXT: v_readfirstlane_b32 s1, v13808; GFX942-NEXT: ; return to shader part epilog3809;3810; GFX950-LABEL: s_no_fminimum3_f32__multi_use:3811; GFX950: ; %bb.0:3812; GFX950-NEXT: v_mov_b32_e32 v0, s03813; GFX950-NEXT: v_minimum3_f32 v0, v0, s1, s13814; GFX950-NEXT: v_minimum3_f32 v1, v0, s2, s23815; GFX950-NEXT: v_readfirstlane_b32 s0, v03816; GFX950-NEXT: v_readfirstlane_b32 s1, v13817; GFX950-NEXT: ; return to shader part epilog3818 %max0 = call float @llvm.minimum.f32(float %a, float %b)3819 %max1 = call float @llvm.minimum.f32(float %max0, float %c)3820 %cast0 = bitcast float %max0 to i323821 %cast1 = bitcast float %max1 to i323822 %readfirstlane0 = call i32 @llvm.amdgcn.readfirstlane(i32 %cast0)3823 %readfirstlane1 = call i32 @llvm.amdgcn.readfirstlane(i32 %cast1)3824 %insert.0 = insertelement <2 x i32> poison, i32 %readfirstlane0, i32 03825 %insert.1 = insertelement <2 x i32> %insert.0, i32 %readfirstlane1, i32 13826 ret <2 x i32> %insert.13827}3828 3829define <2 x half> @v_no_fminimum3_f16__multi_use(half %a, half %b, half %c) {3830; GFX12-TRUE16-LABEL: v_no_fminimum3_f16__multi_use:3831; GFX12-TRUE16: ; %bb.0:3832; GFX12-TRUE16-NEXT: s_wait_loadcnt_dscnt 0x03833; GFX12-TRUE16-NEXT: s_wait_expcnt 0x03834; GFX12-TRUE16-NEXT: s_wait_samplecnt 0x03835; GFX12-TRUE16-NEXT: s_wait_bvhcnt 0x03836; GFX12-TRUE16-NEXT: s_wait_kmcnt 0x03837; GFX12-TRUE16-NEXT: v_minimum_f16 v0.l, v0.l, v1.l3838; GFX12-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3839; GFX12-TRUE16-NEXT: v_minimum_f16 v0.h, v0.l, v2.l3840; GFX12-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h3841; GFX12-TRUE16-NEXT: s_setpc_b64 s[30:31]3842;3843; GFX12-FAKE16-LABEL: v_no_fminimum3_f16__multi_use:3844; GFX12-FAKE16: ; %bb.0:3845; GFX12-FAKE16-NEXT: s_wait_loadcnt_dscnt 0x03846; GFX12-FAKE16-NEXT: s_wait_expcnt 0x03847; GFX12-FAKE16-NEXT: s_wait_samplecnt 0x03848; GFX12-FAKE16-NEXT: s_wait_bvhcnt 0x03849; GFX12-FAKE16-NEXT: s_wait_kmcnt 0x03850; GFX12-FAKE16-NEXT: v_minimum_f16 v0, v0, v13851; GFX12-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3852; GFX12-FAKE16-NEXT: v_minimum_f16 v1, v0, v23853; GFX12-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v13854; GFX12-FAKE16-NEXT: s_setpc_b64 s[30:31]3855;3856; GFX942-LABEL: v_no_fminimum3_f16__multi_use:3857; GFX942: ; %bb.0:3858; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3859; GFX942-NEXT: v_min_f16_e32 v3, v0, v13860; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e003861; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v13862; GFX942-NEXT: s_nop 13863; GFX942-NEXT: v_cndmask_b32_e32 v0, v4, v3, vcc3864; GFX942-NEXT: v_min_f16_e32 v1, v0, v23865; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v23866; GFX942-NEXT: s_nop 13867; GFX942-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc3868; GFX942-NEXT: v_pack_b32_f16 v0, v0, v13869; GFX942-NEXT: s_setpc_b64 s[30:31]3870;3871; GFX950-LABEL: v_no_fminimum3_f16__multi_use:3872; GFX950: ; %bb.0:3873; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3874; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v13875; GFX950-NEXT: s_nop 03876; GFX950-NEXT: v_pk_minimum3_f16 v1, v0, v2, v23877; GFX950-NEXT: s_nop 03878; GFX950-NEXT: v_pack_b32_f16 v0, v0, v13879; GFX950-NEXT: s_setpc_b64 s[30:31]3880 %max0 = call half @llvm.minimum.f16(half %a, half %b)3881 %max1 = call half @llvm.minimum.f16(half %max0, half %c)3882 %insert.0 = insertelement <2 x half> poison, half %max0, i32 03883 %insert.1 = insertelement <2 x half> %insert.0, half %max1, i32 13884 ret <2 x half> %insert.13885}3886 3887define amdgpu_ps <2 x i32> @s_no_fminimum3_f16__multi_use(half inreg %a, half inreg %b, half inreg %c) {3888; GFX12-LABEL: s_no_fminimum3_f16__multi_use:3889; GFX12: ; %bb.0:3890; GFX12-NEXT: s_minimum_f16 s0, s0, s13891; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_2)3892; GFX12-NEXT: s_minimum_f16 s1, s0, s23893; GFX12-NEXT: s_and_b32 s0, 0xffff, s03894; GFX12-NEXT: s_and_b32 s1, 0xffff, s13895; GFX12-NEXT: ; return to shader part epilog3896;3897; GFX942-LABEL: s_no_fminimum3_f16__multi_use:3898; GFX942: ; %bb.0:3899; GFX942-NEXT: v_mov_b32_e32 v0, s13900; GFX942-NEXT: v_min_f16_e32 v1, s0, v03901; GFX942-NEXT: v_mov_b32_e32 v2, 0x7e003902; GFX942-NEXT: v_cmp_o_f16_e32 vcc, s0, v03903; GFX942-NEXT: s_nop 13904; GFX942-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc3905; GFX942-NEXT: v_min_f16_e32 v1, s2, v03906; GFX942-NEXT: v_cmp_o_f16_e32 vcc, s2, v03907; GFX942-NEXT: v_and_b32_e32 v0, 0xffff, v03908; GFX942-NEXT: s_nop 03909; GFX942-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc3910; GFX942-NEXT: v_and_b32_e32 v1, 0xffff, v13911; GFX942-NEXT: v_readfirstlane_b32 s0, v03912; GFX942-NEXT: v_readfirstlane_b32 s1, v13913; GFX942-NEXT: ; return to shader part epilog3914;3915; GFX950-LABEL: s_no_fminimum3_f16__multi_use:3916; GFX950: ; %bb.0:3917; GFX950-NEXT: v_mov_b32_e32 v0, s03918; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, s1, s13919; GFX950-NEXT: s_nop 03920; GFX950-NEXT: v_pk_minimum3_f16 v1, v0, s2, s23921; GFX950-NEXT: v_and_b32_e32 v0, 0xffff, v03922; GFX950-NEXT: v_and_b32_e32 v1, 0xffff, v13923; GFX950-NEXT: v_readfirstlane_b32 s0, v03924; GFX950-NEXT: v_readfirstlane_b32 s1, v13925; GFX950-NEXT: ; return to shader part epilog3926 %max0 = call half @llvm.minimum.f16(half %a, half %b)3927 %max1 = call half @llvm.minimum.f16(half %max0, half %c)3928 %cast0 = bitcast half %max0 to i163929 %cast1 = bitcast half %max1 to i163930 %ext0 = zext i16 %cast0 to i323931 %ext1 = zext i16 %cast1 to i323932 %readfirstlane0 = call i32 @llvm.amdgcn.readfirstlane(i32 %ext0)3933 %readfirstlane1 = call i32 @llvm.amdgcn.readfirstlane(i32 %ext1)3934 %insert.0 = insertelement <2 x i32> poison, i32 %readfirstlane0, i32 03935 %insert.1 = insertelement <2 x i32> %insert.0, i32 %readfirstlane1, i32 13936 ret <2 x i32> %insert.13937}3938 3939define <4 x half> @v_no_fminimum3_v2f16__multi_use(<2 x half> %a, <2 x half> %b, <2 x half> %c) {3940; GFX12-LABEL: v_no_fminimum3_v2f16__multi_use:3941; GFX12: ; %bb.0:3942; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03943; GFX12-NEXT: s_wait_expcnt 0x03944; GFX12-NEXT: s_wait_samplecnt 0x03945; GFX12-NEXT: s_wait_bvhcnt 0x03946; GFX12-NEXT: s_wait_kmcnt 0x03947; GFX12-NEXT: v_pk_minimum_f16 v0, v0, v13948; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3949; GFX12-NEXT: v_pk_minimum_f16 v1, v0, v23950; GFX12-NEXT: s_setpc_b64 s[30:31]3951;3952; GFX942-LABEL: v_no_fminimum3_v2f16__multi_use:3953; GFX942: ; %bb.0:3954; GFX942-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3955; GFX942-NEXT: v_pk_min_f16 v3, v0, v13956; GFX942-NEXT: v_mov_b32_e32 v4, 0x7e003957; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v0, v13958; GFX942-NEXT: s_mov_b32 s0, 0x50401003959; GFX942-NEXT: s_nop 03960; GFX942-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc3961; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v0, v1 src0_sel:WORD_1 src1_sel:WORD_13962; GFX942-NEXT: s_nop 13963; GFX942-NEXT: v_cndmask_b32_sdwa v1, v4, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13964; GFX942-NEXT: v_perm_b32 v0, v1, v5, s03965; GFX942-NEXT: v_pk_min_f16 v3, v0, v23966; GFX942-NEXT: v_cmp_o_f16_e32 vcc, v5, v23967; GFX942-NEXT: s_nop 13968; GFX942-NEXT: v_cndmask_b32_e32 v5, v4, v3, vcc3969; GFX942-NEXT: v_cmp_o_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:WORD_13970; GFX942-NEXT: s_nop 13971; GFX942-NEXT: v_cndmask_b32_sdwa v1, v4, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13972; GFX942-NEXT: v_perm_b32 v1, v1, v5, s03973; GFX942-NEXT: s_setpc_b64 s[30:31]3974;3975; GFX950-LABEL: v_no_fminimum3_v2f16__multi_use:3976; GFX950: ; %bb.0:3977; GFX950-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3978; GFX950-NEXT: v_pk_minimum3_f16 v0, v0, v1, v13979; GFX950-NEXT: s_nop 03980; GFX950-NEXT: v_pk_minimum3_f16 v1, v0, v2, v23981; GFX950-NEXT: s_setpc_b64 s[30:31]3982 %max0 = call <2 x half> @llvm.minimum.f16(<2 x half> %a, <2 x half> %b)3983 %max1 = call <2 x half> @llvm.minimum.f16(<2 x half> %max0, <2 x half> %c)3984 %concat = shufflevector <2 x half> %max0, <2 x half> %max1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>3985 ret <4 x half> %concat3986}3987 3988define <2 x double> @v_no_fminimum3_f64__multi_use(double %a, double %b, double %c) {3989; GFX12-LABEL: v_no_fminimum3_f64__multi_use:3990; GFX12: ; %bb.0:3991; GFX12-NEXT: s_wait_loadcnt_dscnt 0x03992; GFX12-NEXT: s_wait_expcnt 0x03993; GFX12-NEXT: s_wait_samplecnt 0x03994; GFX12-NEXT: s_wait_bvhcnt 0x03995; GFX12-NEXT: s_wait_kmcnt 0x03996; GFX12-NEXT: v_minimum_f64 v[0:1], v[0:1], v[2:3]3997; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)3998; GFX12-NEXT: v_minimum_f64 v[2:3], v[0:1], v[4:5]3999; GFX12-NEXT: s_setpc_b64 s[30:31]4000;4001; GFX9-LABEL: v_no_fminimum3_f64__multi_use:4002; GFX9: ; %bb.0:4003; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4004; GFX9-NEXT: v_min_f64 v[6:7], v[0:1], v[2:3]4005; GFX9-NEXT: v_mov_b32_e32 v8, 0x7ff800004006; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[2:3]4007; GFX9-NEXT: s_nop 14008; GFX9-NEXT: v_cndmask_b32_e32 v1, v7, v8, vcc4009; GFX9-NEXT: v_cndmask_b32_e64 v0, v6, 0, vcc4010; GFX9-NEXT: v_min_f64 v[2:3], v[0:1], v[4:5]4011; GFX9-NEXT: v_cmp_u_f64_e32 vcc, v[0:1], v[4:5]4012; GFX9-NEXT: s_nop 14013; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc4014; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc4015; GFX9-NEXT: s_setpc_b64 s[30:31]4016 %max0 = call double @llvm.minimum.f64(double %a, double %b)4017 %max1 = call double @llvm.minimum.f64(double %max0, double %c)4018 %insert.0 = insertelement <2 x double> poison, double %max0, i32 04019 %insert.1 = insertelement <2 x double> %insert.0, double %max1, i32 14020 ret <2 x double> %insert.14021}4022