8831 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX9-SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX9-GISEL %s4; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX10,GFX10-SDAG %s5; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1030 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX10,GFX10-GISEL %s6; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX11,GFX11-SDAG,GFX11-SDAG-TRUE16 %s7; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX11,GFX11-SDAG,GFX11-SDAG-FAKE16 %s8; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX11,GFX11-GISEL,GFX11-GISEL-TRUE16 %s9; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdpal -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GCN,GFX1011,GFX11,GFX11-GISEL,GFX11-GISEL-FAKE16 %s10 11; Test fmul by power of 2 which is better emitted as ldexp12 13declare half @llvm.fabs.f16(half)14declare <2 x half> @llvm.fabs.v2f16(<2 x half>)15declare float @llvm.fabs.f32(float)16declare <2 x float> @llvm.fabs.v2f32(<2 x float>)17declare double @llvm.fabs.f64(double)18declare <2 x double> @llvm.fabs.v2f64(<2 x double>)19declare i32 @llvm.amdgcn.readfirstlane(i32)20 21define float @v_mul_42_f32(float %x) {22; GCN-LABEL: v_mul_42_f32:23; GCN: ; %bb.0:24; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; GCN-NEXT: v_mul_f32_e32 v0, 0x42280000, v026; GCN-NEXT: s_setpc_b64 s[30:31]27 %mul = fmul float %x, 42.028 ret float %mul29}30 31define double @v_mul_42_f64(double %x) {32; GFX9-SDAG-LABEL: v_mul_42_f64:33; GFX9-SDAG: ; %bb.0:34; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; GFX9-SDAG-NEXT: s_mov_b32 s4, 036; GFX9-SDAG-NEXT: s_mov_b32 s5, 0x4045000037; GFX9-SDAG-NEXT: v_mul_f64 v[0:1], v[0:1], s[4:5]38; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]39;40; GFX9-GISEL-LABEL: v_mul_42_f64:41; GFX9-GISEL: ; %bb.0:42; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)43; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 044; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x4045000045; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]46; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]47;48; GFX1011-LABEL: v_mul_42_f64:49; GFX1011: ; %bb.0:50; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)51; GFX1011-NEXT: v_mul_f64 v[0:1], 0x40450000, v[0:1]52; GFX1011-NEXT: s_setpc_b64 s[30:31]53 %mul = fmul double %x, 42.054 ret double %mul55}56 57define half @v_mul_42_f16(half %x) {58; GFX9-LABEL: v_mul_42_f16:59; GFX9: ; %bb.0:60; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)61; GFX9-NEXT: v_mul_f16_e32 v0, 0x5140, v062; GFX9-NEXT: s_setpc_b64 s[30:31]63;64; GFX10-LABEL: v_mul_42_f16:65; GFX10: ; %bb.0:66; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)67; GFX10-NEXT: v_mul_f16_e32 v0, 0x5140, v068; GFX10-NEXT: s_setpc_b64 s[30:31]69;70; GFX11-SDAG-TRUE16-LABEL: v_mul_42_f16:71; GFX11-SDAG-TRUE16: ; %bb.0:72; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)73; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5140, v0.l74; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]75;76; GFX11-SDAG-FAKE16-LABEL: v_mul_42_f16:77; GFX11-SDAG-FAKE16: ; %bb.0:78; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)79; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5140, v080; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]81;82; GFX11-GISEL-TRUE16-LABEL: v_mul_42_f16:83; GFX11-GISEL-TRUE16: ; %bb.0:84; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)85; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5140, v0.l86; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]87;88; GFX11-GISEL-FAKE16-LABEL: v_mul_42_f16:89; GFX11-GISEL-FAKE16: ; %bb.0:90; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)91; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5140, v092; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]93 %mul = fmul half %x, 42.094 ret half %mul95}96 97define <2 x half> @v_mul_42_v2f16(<2 x half> %x) {98; GFX9-SDAG-LABEL: v_mul_42_v2f16:99; GFX9-SDAG: ; %bb.0:100; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)101; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x5140102; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, s4 op_sel_hi:[1,0]103; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]104;105; GFX9-GISEL-LABEL: v_mul_42_v2f16:106; GFX9-GISEL: ; %bb.0:107; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)108; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x51405140109; GFX9-GISEL-NEXT: v_pk_mul_f16 v0, v0, v1110; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]111;112; GFX10-SDAG-LABEL: v_mul_42_v2f16:113; GFX10-SDAG: ; %bb.0:114; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, 0x5140, v0 op_sel_hi:[0,1]116; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]117;118; GFX10-GISEL-LABEL: v_mul_42_v2f16:119; GFX10-GISEL: ; %bb.0:120; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)121; GFX10-GISEL-NEXT: v_pk_mul_f16 v0, 0x51405140, v0122; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]123;124; GFX11-SDAG-LABEL: v_mul_42_v2f16:125; GFX11-SDAG: ; %bb.0:126; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; GFX11-SDAG-NEXT: v_pk_mul_f16 v0, 0x5140, v0 op_sel_hi:[0,1]128; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]129;130; GFX11-GISEL-LABEL: v_mul_42_v2f16:131; GFX11-GISEL: ; %bb.0:132; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)133; GFX11-GISEL-NEXT: v_pk_mul_f16 v0, 0x51405140, v0134; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]135 %mul = fmul <2 x half> %x, <half 42.0, half 42.0>136 ret <2 x half> %mul137}138 139; 0x1p-17140define float @v_mul_0x1pn17_f32(float %x) {141; GCN-LABEL: v_mul_0x1pn17_f32:142; GCN: ; %bb.0:143; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)144; GCN-NEXT: v_mul_f32_e32 v0, 0x37000000, v0145; GCN-NEXT: s_setpc_b64 s[30:31]146 %mul = fmul float %x, 0.00000762939453125147 ret float %mul148}149 150; 0x1p-16151define float @v_mul_0x1pn16_f32(float %x) {152; GCN-LABEL: v_mul_0x1pn16_f32:153; GCN: ; %bb.0:154; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)155; GCN-NEXT: v_mul_f32_e32 v0, 0x37800000, v0156; GCN-NEXT: s_setpc_b64 s[30:31]157 %mul = fmul float %x, 0.0000152587890625158 ret float %mul159}160 161; 0x1p-15162define float @v_mul_0x1pn15_f32(float %x) {163; GCN-LABEL: v_mul_0x1pn15_f32:164; GCN: ; %bb.0:165; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)166; GCN-NEXT: v_mul_f32_e32 v0, 0x38000000, v0167; GCN-NEXT: s_setpc_b64 s[30:31]168 %mul = fmul float %x, 0.000030517578125169 ret float %mul170}171 172define float @v_mul_neg256_f32(float %x) {173; GCN-LABEL: v_mul_neg256_f32:174; GCN: ; %bb.0:175; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)176; GCN-NEXT: v_mul_f32_e32 v0, 0xc3800000, v0177; GCN-NEXT: s_setpc_b64 s[30:31]178 %mul = fmul float %x, -256.0179 ret float %mul180}181 182define float @v_mul_neg128_f32(float %x) {183; GCN-LABEL: v_mul_neg128_f32:184; GCN: ; %bb.0:185; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)186; GCN-NEXT: v_mul_f32_e32 v0, 0xc3000000, v0187; GCN-NEXT: s_setpc_b64 s[30:31]188 %mul = fmul float %x, -128.0189 ret float %mul190}191 192define float @v_mul_neg64_f32(float %x) {193; GCN-LABEL: v_mul_neg64_f32:194; GCN: ; %bb.0:195; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)196; GCN-NEXT: v_mul_f32_e32 v0, 0xc2800000, v0197; GCN-NEXT: s_setpc_b64 s[30:31]198 %mul = fmul float %x, -64.0199 ret float %mul200}201 202define float @v_mul_neg32_f32(float %x) {203; GCN-LABEL: v_mul_neg32_f32:204; GCN: ; %bb.0:205; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)206; GCN-NEXT: v_mul_f32_e32 v0, 0xc2000000, v0207; GCN-NEXT: s_setpc_b64 s[30:31]208 %mul = fmul float %x, -32.0209 ret float %mul210}211 212define float @v_mul_neg16_f32(float %x) {213; GCN-LABEL: v_mul_neg16_f32:214; GCN: ; %bb.0:215; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)216; GCN-NEXT: v_mul_f32_e32 v0, 0xc1800000, v0217; GCN-NEXT: s_setpc_b64 s[30:31]218 %mul = fmul float %x, -16.0219 ret float %mul220}221 222define float @v_mul_neg8_f32(float %x) {223; GCN-LABEL: v_mul_neg8_f32:224; GCN: ; %bb.0:225; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)226; GCN-NEXT: v_mul_f32_e32 v0, 0xc1000000, v0227; GCN-NEXT: s_setpc_b64 s[30:31]228 %mul = fmul float %x, -8.0229 ret float %mul230}231 232define float @v_mul_neg4_f32(float %x) {233; GCN-LABEL: v_mul_neg4_f32:234; GCN: ; %bb.0:235; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)236; GCN-NEXT: v_mul_f32_e32 v0, -4.0, v0237; GCN-NEXT: s_setpc_b64 s[30:31]238 %mul = fmul float %x, -4.0239 ret float %mul240}241 242define float @v_mul_neg2_f32(float %x) {243; GCN-LABEL: v_mul_neg2_f32:244; GCN: ; %bb.0:245; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)246; GCN-NEXT: v_mul_f32_e32 v0, -2.0, v0247; GCN-NEXT: s_setpc_b64 s[30:31]248 %mul = fmul float %x, -2.0249 ret float %mul250}251 252define float @v_mul_neg1_f32(float %x) {253; GCN-LABEL: v_mul_neg1_f32:254; GCN: ; %bb.0:255; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)256; GCN-NEXT: v_xor_b32_e32 v0, 0x80000000, v0257; GCN-NEXT: s_setpc_b64 s[30:31]258 %mul = fmul float %x, -1.0259 ret float %mul260}261 262define float @v_mul_neg_half_f32(float %x) {263; GCN-LABEL: v_mul_neg_half_f32:264; GCN: ; %bb.0:265; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)266; GCN-NEXT: v_mul_f32_e32 v0, -0.5, v0267; GCN-NEXT: s_setpc_b64 s[30:31]268 %mul = fmul float %x, -0.5269 ret float %mul270}271 272define float @v_mul_neg_quarter_f32(float %x) {273; GCN-LABEL: v_mul_neg_quarter_f32:274; GCN: ; %bb.0:275; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)276; GCN-NEXT: v_mul_f32_e32 v0, 0xbe800000, v0277; GCN-NEXT: s_setpc_b64 s[30:31]278 %mul = fmul float %x, -0.25279 ret float %mul280}281 282define float @v_mul_quarter_f32(float %x) {283; GCN-LABEL: v_mul_quarter_f32:284; GCN: ; %bb.0:285; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)286; GCN-NEXT: v_mul_f32_e32 v0, 0x3e800000, v0287; GCN-NEXT: s_setpc_b64 s[30:31]288 %mul = fmul float %x, 0.25289 ret float %mul290}291 292define float @v_mul_half_f32(float %x) {293; GCN-LABEL: v_mul_half_f32:294; GCN: ; %bb.0:295; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)296; GCN-NEXT: v_mul_f32_e32 v0, 0.5, v0297; GCN-NEXT: s_setpc_b64 s[30:31]298 %mul = fmul float %x, 0.5299 ret float %mul300}301 302define float @v_mul_1_f32(float %x) {303; GCN-LABEL: v_mul_1_f32:304; GCN: ; %bb.0:305; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)306; GCN-NEXT: s_setpc_b64 s[30:31]307 %mul = fmul float %x, 1.0308 ret float %mul309}310 311define float @v_mul_2_f32(float %x) {312; GFX9-SDAG-LABEL: v_mul_2_f32:313; GFX9-SDAG: ; %bb.0:314; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)315; GFX9-SDAG-NEXT: v_add_f32_e32 v0, v0, v0316; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]317;318; GFX9-GISEL-LABEL: v_mul_2_f32:319; GFX9-GISEL: ; %bb.0:320; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)321; GFX9-GISEL-NEXT: v_mul_f32_e32 v0, 2.0, v0322; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]323;324; GFX10-SDAG-LABEL: v_mul_2_f32:325; GFX10-SDAG: ; %bb.0:326; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)327; GFX10-SDAG-NEXT: v_add_f32_e32 v0, v0, v0328; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]329;330; GFX10-GISEL-LABEL: v_mul_2_f32:331; GFX10-GISEL: ; %bb.0:332; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)333; GFX10-GISEL-NEXT: v_mul_f32_e32 v0, 2.0, v0334; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]335;336; GFX11-SDAG-LABEL: v_mul_2_f32:337; GFX11-SDAG: ; %bb.0:338; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)339; GFX11-SDAG-NEXT: v_add_f32_e32 v0, v0, v0340; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]341;342; GFX11-GISEL-LABEL: v_mul_2_f32:343; GFX11-GISEL: ; %bb.0:344; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)345; GFX11-GISEL-NEXT: v_mul_f32_e32 v0, 2.0, v0346; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]347 %mul = fmul float %x, 2.0348 ret float %mul349}350 351define float @v_mul_4_f32(float %x) {352; GCN-LABEL: v_mul_4_f32:353; GCN: ; %bb.0:354; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)355; GCN-NEXT: v_mul_f32_e32 v0, 4.0, v0356; GCN-NEXT: s_setpc_b64 s[30:31]357 %mul = fmul float %x, 4.0358 ret float %mul359}360 361define float @v_mul_8_f32(float %x) {362; GCN-LABEL: v_mul_8_f32:363; GCN: ; %bb.0:364; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)365; GCN-NEXT: v_mul_f32_e32 v0, 0x41000000, v0366; GCN-NEXT: s_setpc_b64 s[30:31]367 %mul = fmul float %x, 8.0368 ret float %mul369}370 371define float @v_mul_16_f32(float %x) {372; GCN-LABEL: v_mul_16_f32:373; GCN: ; %bb.0:374; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)375; GCN-NEXT: v_mul_f32_e32 v0, 0x41800000, v0376; GCN-NEXT: s_setpc_b64 s[30:31]377 %mul = fmul float %x, 16.0378 ret float %mul379}380 381define float @v_mul_32_f32(float %x) {382; GCN-LABEL: v_mul_32_f32:383; GCN: ; %bb.0:384; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)385; GCN-NEXT: v_mul_f32_e32 v0, 0x42000000, v0386; GCN-NEXT: s_setpc_b64 s[30:31]387 %mul = fmul float %x, 32.0388 ret float %mul389}390 391define float @v_mul_64_f32(float %x) {392; GCN-LABEL: v_mul_64_f32:393; GCN: ; %bb.0:394; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)395; GCN-NEXT: v_mul_f32_e32 v0, 0x42800000, v0396; GCN-NEXT: s_setpc_b64 s[30:31]397 %mul = fmul float %x, 64.0398 ret float %mul399}400 401define float @v_mul_128_f32(float %x) {402; GCN-LABEL: v_mul_128_f32:403; GCN: ; %bb.0:404; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)405; GCN-NEXT: v_mul_f32_e32 v0, 0x43000000, v0406; GCN-NEXT: s_setpc_b64 s[30:31]407 %mul = fmul float %x, 128.0408 ret float %mul409}410 411define float @v_mul_256_f32(float %x) {412; GCN-LABEL: v_mul_256_f32:413; GCN: ; %bb.0:414; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)415; GCN-NEXT: v_mul_f32_e32 v0, 0x43800000, v0416; GCN-NEXT: s_setpc_b64 s[30:31]417 %mul = fmul float %x, 256.0418 ret float %mul419}420 421; 0x1p+63422define float @v_mul_0x1p63_f32(float %x) {423; GCN-LABEL: v_mul_0x1p63_f32:424; GCN: ; %bb.0:425; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)426; GCN-NEXT: v_mul_f32_e32 v0, 0x5f000000, v0427; GCN-NEXT: s_setpc_b64 s[30:31]428 %mul = fmul float %x, 9223372036854775808.0429 ret float %mul430}431 432; 0x1p+64433define float @v_mul_0x1p64_f32(float %x) {434; GCN-LABEL: v_mul_0x1p64_f32:435; GCN: ; %bb.0:436; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)437; GCN-NEXT: v_mul_f32_e32 v0, 0x5f800000, v0438; GCN-NEXT: s_setpc_b64 s[30:31]439 %mul = fmul float %x, 18446744073709551616.0440 ret float %mul441}442 443; 0x1p+65444define float @v_mul_0x1p65_f32(float %x) {445; GCN-LABEL: v_mul_0x1p65_f32:446; GCN: ; %bb.0:447; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)448; GCN-NEXT: v_mul_f32_e32 v0, 0x60000000, v0449; GCN-NEXT: s_setpc_b64 s[30:31]450 %mul = fmul float %x, 36893488147419103232.0451 ret float %mul452}453 454; Check that this doesn't interfer with fma formation455define float @v_fma_mul_add_32_f32(float %x, float %y) {456; GFX9-SDAG-LABEL: v_fma_mul_add_32_f32:457; GFX9-SDAG: ; %bb.0:458; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)459; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x42000000460; GFX9-SDAG-NEXT: v_fma_f32 v0, v0, s4, v1461; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]462;463; GFX9-GISEL-LABEL: v_fma_mul_add_32_f32:464; GFX9-GISEL: ; %bb.0:465; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)466; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x42000000467; GFX9-GISEL-NEXT: v_fma_f32 v0, v0, v2, v1468; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]469;470; GFX1011-LABEL: v_fma_mul_add_32_f32:471; GFX1011: ; %bb.0:472; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)473; GFX1011-NEXT: v_fmamk_f32 v0, v0, 0x42000000, v1474; GFX1011-NEXT: s_setpc_b64 s[30:31]475 %mul = fmul contract float %x, 32.0476 %fma = fadd contract float %mul, %y477 ret float %fma478}479 480define float @v_fma_mul_sub_32_f32(float %x, float %y) {481; GFX9-SDAG-LABEL: v_fma_mul_sub_32_f32:482; GFX9-SDAG: ; %bb.0:483; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)484; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x42000000485; GFX9-SDAG-NEXT: v_fma_f32 v0, v0, s4, -v1486; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]487;488; GFX9-GISEL-LABEL: v_fma_mul_sub_32_f32:489; GFX9-GISEL: ; %bb.0:490; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)491; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x42000000492; GFX9-GISEL-NEXT: v_fma_f32 v0, v0, v2, -v1493; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]494;495; GFX1011-LABEL: v_fma_mul_sub_32_f32:496; GFX1011: ; %bb.0:497; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)498; GFX1011-NEXT: v_fma_f32 v0, 0x42000000, v0, -v1499; GFX1011-NEXT: s_setpc_b64 s[30:31]500 %mul = fmul contract float %x, 32.0501 %fma = fsub contract float %mul, %y502 ret float %fma503}504 505define float @v_fma_mul_add_neg32_f32(float %x, float %y) {506; GFX9-SDAG-LABEL: v_fma_mul_add_neg32_f32:507; GFX9-SDAG: ; %bb.0:508; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)509; GFX9-SDAG-NEXT: s_mov_b32 s4, 0xc2000000510; GFX9-SDAG-NEXT: v_fma_f32 v0, v0, s4, v1511; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]512;513; GFX9-GISEL-LABEL: v_fma_mul_add_neg32_f32:514; GFX9-GISEL: ; %bb.0:515; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)516; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xc2000000517; GFX9-GISEL-NEXT: v_fma_f32 v0, v0, v2, v1518; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]519;520; GFX1011-LABEL: v_fma_mul_add_neg32_f32:521; GFX1011: ; %bb.0:522; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)523; GFX1011-NEXT: v_fmamk_f32 v0, v0, 0xc2000000, v1524; GFX1011-NEXT: s_setpc_b64 s[30:31]525 %mul = fmul contract float %x, -32.0526 %fma = fadd contract float %mul, %y527 ret float %fma528}529 530define float @v_mul_fabs_32_f32(float %x) {531; GFX9-SDAG-LABEL: v_mul_fabs_32_f32:532; GFX9-SDAG: ; %bb.0:533; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)534; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x42000000535; GFX9-SDAG-NEXT: v_mul_f32_e64 v0, |v0|, s4536; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]537;538; GFX9-GISEL-LABEL: v_mul_fabs_32_f32:539; GFX9-GISEL: ; %bb.0:540; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)541; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x42000000542; GFX9-GISEL-NEXT: v_mul_f32_e64 v0, |v0|, v1543; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]544;545; GFX1011-LABEL: v_mul_fabs_32_f32:546; GFX1011: ; %bb.0:547; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)548; GFX1011-NEXT: v_mul_f32_e64 v0, 0x42000000, |v0|549; GFX1011-NEXT: s_setpc_b64 s[30:31]550 %x.fabs = call float @llvm.fabs.f32(float %x)551 %mul = fmul float %x.fabs, 32.0552 ret float %mul553}554 555define float @v_mul_add_fma_fabs_32_f32(float %x, float %y) {556; GFX9-SDAG-LABEL: v_mul_add_fma_fabs_32_f32:557; GFX9-SDAG: ; %bb.0:558; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)559; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x42000000560; GFX9-SDAG-NEXT: v_fma_f32 v0, |v0|, s4, v1561; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]562;563; GFX9-GISEL-LABEL: v_mul_add_fma_fabs_32_f32:564; GFX9-GISEL: ; %bb.0:565; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)566; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x42000000567; GFX9-GISEL-NEXT: v_fma_f32 v0, |v0|, v2, v1568; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]569;570; GFX1011-LABEL: v_mul_add_fma_fabs_32_f32:571; GFX1011: ; %bb.0:572; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)573; GFX1011-NEXT: v_fma_f32 v0, 0x42000000, |v0|, v1574; GFX1011-NEXT: s_setpc_b64 s[30:31]575 %x.fabs = call float @llvm.fabs.f32(float %x)576 %mul = fmul contract float %x.fabs, 32.0577 %fma = fadd contract float %mul, %y578 ret float %fma579}580 581define <2 x float> @v_mul_16_v2f32(<2 x float> %x) {582; GFX9-LABEL: v_mul_16_v2f32:583; GFX9: ; %bb.0:584; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX9-NEXT: v_mul_f32_e32 v0, 0x41800000, v0586; GFX9-NEXT: v_mul_f32_e32 v1, 0x41800000, v1587; GFX9-NEXT: s_setpc_b64 s[30:31]588;589; GFX10-LABEL: v_mul_16_v2f32:590; GFX10: ; %bb.0:591; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)592; GFX10-NEXT: v_mul_f32_e32 v0, 0x41800000, v0593; GFX10-NEXT: v_mul_f32_e32 v1, 0x41800000, v1594; GFX10-NEXT: s_setpc_b64 s[30:31]595;596; GFX11-LABEL: v_mul_16_v2f32:597; GFX11: ; %bb.0:598; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)599; GFX11-NEXT: v_dual_mul_f32 v0, 0x41800000, v0 :: v_dual_mul_f32 v1, 0x41800000, v1600; GFX11-NEXT: s_setpc_b64 s[30:31]601 %mul = fmul <2 x float> %x, <float 16.0, float 16.0>602 ret <2 x float> %mul603}604 605define <2 x float> @v_mul_neg16_v2f32(<2 x float> %x) {606; GFX9-LABEL: v_mul_neg16_v2f32:607; GFX9: ; %bb.0:608; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)609; GFX9-NEXT: v_mul_f32_e32 v0, 0xc1800000, v0610; GFX9-NEXT: v_mul_f32_e32 v1, 0xc1800000, v1611; GFX9-NEXT: s_setpc_b64 s[30:31]612;613; GFX10-LABEL: v_mul_neg16_v2f32:614; GFX10: ; %bb.0:615; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)616; GFX10-NEXT: v_mul_f32_e32 v0, 0xc1800000, v0617; GFX10-NEXT: v_mul_f32_e32 v1, 0xc1800000, v1618; GFX10-NEXT: s_setpc_b64 s[30:31]619;620; GFX11-LABEL: v_mul_neg16_v2f32:621; GFX11: ; %bb.0:622; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)623; GFX11-NEXT: v_dual_mul_f32 v0, 0xc1800000, v0 :: v_dual_mul_f32 v1, 0xc1800000, v1624; GFX11-NEXT: s_setpc_b64 s[30:31]625 %mul = fmul <2 x float> %x, <float -16.0, float -16.0>626 ret <2 x float> %mul627}628 629define <2 x float> @v_mul_fabs_16_v2f32(<2 x float> %x) {630; GFX9-SDAG-LABEL: v_mul_fabs_16_v2f32:631; GFX9-SDAG: ; %bb.0:632; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)633; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x41800000634; GFX9-SDAG-NEXT: v_mul_f32_e64 v0, |v0|, s4635; GFX9-SDAG-NEXT: v_mul_f32_e64 v1, |v1|, s4636; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]637;638; GFX9-GISEL-LABEL: v_mul_fabs_16_v2f32:639; GFX9-GISEL: ; %bb.0:640; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)641; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x41800000642; GFX9-GISEL-NEXT: v_mul_f32_e64 v0, |v0|, v2643; GFX9-GISEL-NEXT: v_mul_f32_e64 v1, |v1|, v2644; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]645;646; GFX1011-LABEL: v_mul_fabs_16_v2f32:647; GFX1011: ; %bb.0:648; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)649; GFX1011-NEXT: v_mul_f32_e64 v0, 0x41800000, |v0|650; GFX1011-NEXT: v_mul_f32_e64 v1, 0x41800000, |v1|651; GFX1011-NEXT: s_setpc_b64 s[30:31]652 %x.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %x)653 %mul = fmul <2 x float> %x.fabs, <float 16.0, float 16.0>654 ret <2 x float> %mul655}656 657define <2 x float> @v_fma_mul_add_32_v2f32(<2 x float> %x, <2 x float> %y) {658; GFX9-SDAG-LABEL: v_fma_mul_add_32_v2f32:659; GFX9-SDAG: ; %bb.0:660; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)661; GFX9-SDAG-NEXT: s_mov_b32 s4, 0x42000000662; GFX9-SDAG-NEXT: v_fma_f32 v0, v0, s4, v2663; GFX9-SDAG-NEXT: v_fma_f32 v1, v1, s4, v3664; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]665;666; GFX9-GISEL-LABEL: v_fma_mul_add_32_v2f32:667; GFX9-GISEL: ; %bb.0:668; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)669; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x42000000670; GFX9-GISEL-NEXT: v_fma_f32 v0, v0, v4, v2671; GFX9-GISEL-NEXT: v_fma_f32 v1, v1, v4, v3672; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]673;674; GFX10-LABEL: v_fma_mul_add_32_v2f32:675; GFX10: ; %bb.0:676; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)677; GFX10-NEXT: v_fmamk_f32 v0, v0, 0x42000000, v2678; GFX10-NEXT: v_fmamk_f32 v1, v1, 0x42000000, v3679; GFX10-NEXT: s_setpc_b64 s[30:31]680;681; GFX11-LABEL: v_fma_mul_add_32_v2f32:682; GFX11: ; %bb.0:683; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)684; GFX11-NEXT: v_dual_fmamk_f32 v0, v0, 0x42000000, v2 :: v_dual_fmamk_f32 v1, v1, 0x42000000, v3685; GFX11-NEXT: s_setpc_b64 s[30:31]686 %mul = fmul contract <2 x float> %x, <float 32.0, float 32.0>687 %fma = fadd contract <2 x float> %mul, %y688 ret <2 x float> %fma689}690 691define amdgpu_ps i32 @s_mul_neg64_f32(float inreg %x) {692; GFX9-LABEL: s_mul_neg64_f32:693; GFX9: ; %bb.0:694; GFX9-NEXT: v_mov_b32_e32 v0, 0xc2800000695; GFX9-NEXT: v_mul_f32_e32 v0, s0, v0696; GFX9-NEXT: v_readfirstlane_b32 s0, v0697; GFX9-NEXT: ; return to shader part epilog698;699; GFX1011-LABEL: s_mul_neg64_f32:700; GFX1011: ; %bb.0:701; GFX1011-NEXT: v_mul_f32_e64 v0, 0xc2800000, s0702; GFX1011-NEXT: v_readfirstlane_b32 s0, v0703; GFX1011-NEXT: ; return to shader part epilog704 %mul = fmul float %x, -64.0705 %cast = bitcast float %mul to i32706 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)707 ret i32 %readfirstlane708}709 710define amdgpu_ps i32 @s_mul_32_f32(float inreg %x) {711; GFX9-LABEL: s_mul_32_f32:712; GFX9: ; %bb.0:713; GFX9-NEXT: v_mov_b32_e32 v0, 0x42000000714; GFX9-NEXT: v_mul_f32_e32 v0, s0, v0715; GFX9-NEXT: v_readfirstlane_b32 s0, v0716; GFX9-NEXT: ; return to shader part epilog717;718; GFX1011-LABEL: s_mul_32_f32:719; GFX1011: ; %bb.0:720; GFX1011-NEXT: v_mul_f32_e64 v0, 0x42000000, s0721; GFX1011-NEXT: v_readfirstlane_b32 s0, v0722; GFX1011-NEXT: ; return to shader part epilog723 %mul = fmul float %x, 32.0724 %cast = bitcast float %mul to i32725 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)726 ret i32 %readfirstlane727}728 729define amdgpu_ps i32 @s_mul_fma_32_f32(float inreg %x, float inreg %y) {730; GFX9-LABEL: s_mul_fma_32_f32:731; GFX9: ; %bb.0:732; GFX9-NEXT: v_mov_b32_e32 v0, 0x42000000733; GFX9-NEXT: v_mov_b32_e32 v1, s1734; GFX9-NEXT: v_fma_f32 v0, s0, v0, v1735; GFX9-NEXT: v_readfirstlane_b32 s0, v0736; GFX9-NEXT: ; return to shader part epilog737;738; GFX10-SDAG-LABEL: s_mul_fma_32_f32:739; GFX10-SDAG: ; %bb.0:740; GFX10-SDAG-NEXT: v_mov_b32_e32 v0, s1741; GFX10-SDAG-NEXT: v_fmamk_f32 v0, s0, 0x42000000, v0742; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v0743; GFX10-SDAG-NEXT: ; return to shader part epilog744;745; GFX10-GISEL-LABEL: s_mul_fma_32_f32:746; GFX10-GISEL: ; %bb.0:747; GFX10-GISEL-NEXT: v_mov_b32_e32 v0, s1748; GFX10-GISEL-NEXT: v_fmac_f32_e64 v0, 0x42000000, s0749; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v0750; GFX10-GISEL-NEXT: ; return to shader part epilog751;752; GFX11-SDAG-LABEL: s_mul_fma_32_f32:753; GFX11-SDAG: ; %bb.0:754; GFX11-SDAG-NEXT: v_mov_b32_e32 v0, s1755; GFX11-SDAG-NEXT: v_fmamk_f32 v0, s0, 0x42000000, v0756; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v0757; GFX11-SDAG-NEXT: ; return to shader part epilog758;759; GFX11-GISEL-LABEL: s_mul_fma_32_f32:760; GFX11-GISEL: ; %bb.0:761; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, s1762; GFX11-GISEL-NEXT: v_fmac_f32_e64 v0, 0x42000000, s0763; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v0764; GFX11-GISEL-NEXT: ; return to shader part epilog765 %mul = fmul contract float %x, 32.0766 %fma = fadd contract float %mul, %y767 %cast = bitcast float %fma to i32768 %readfirstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)769 ret i32 %readfirstlane770}771 772; 0x1p-1031773define double @v_mul_0x1pn1031_f64(double %x) {774; GFX9-SDAG-LABEL: v_mul_0x1pn1031_f64:775; GFX9-SDAG: ; %bb.0:776; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)777; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xfbf9778; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s4779; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]780;781; GFX9-GISEL-LABEL: v_mul_0x1pn1031_f64:782; GFX9-GISEL: ; %bb.0:783; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)784; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0785; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x800786; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]787; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]788;789; GFX10-SDAG-LABEL: v_mul_0x1pn1031_f64:790; GFX10-SDAG: ; %bb.0:791; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)792; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xfffffbf9793; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]794;795; GFX10-GISEL-LABEL: v_mul_0x1pn1031_f64:796; GFX10-GISEL: ; %bb.0:797; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)798; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x800, v[0:1]799; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]800;801; GFX11-SDAG-LABEL: v_mul_0x1pn1031_f64:802; GFX11-SDAG: ; %bb.0:803; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)804; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xfffffbf9805; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]806;807; GFX11-GISEL-LABEL: v_mul_0x1pn1031_f64:808; GFX11-GISEL: ; %bb.0:809; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)810; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x800, v[0:1]811; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]812 %mul = fmul double %x, 4.34584737989687770135e-311813 ret double %mul814}815 816; 0x1p-1022817define double @v_mul_0x1pn1022_f64(double %x) {818; GFX9-SDAG-LABEL: v_mul_0x1pn1022_f64:819; GFX9-SDAG: ; %bb.0:820; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)821; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xfc02822; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s4823; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]824;825; GFX9-GISEL-LABEL: v_mul_0x1pn1022_f64:826; GFX9-GISEL: ; %bb.0:827; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)828; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0829; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x100000830; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]831; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]832;833; GFX10-SDAG-LABEL: v_mul_0x1pn1022_f64:834; GFX10-SDAG: ; %bb.0:835; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)836; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xfffffc02837; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]838;839; GFX10-GISEL-LABEL: v_mul_0x1pn1022_f64:840; GFX10-GISEL: ; %bb.0:841; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)842; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x100000, v[0:1]843; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]844;845; GFX11-SDAG-LABEL: v_mul_0x1pn1022_f64:846; GFX11-SDAG: ; %bb.0:847; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)848; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xfffffc02849; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]850;851; GFX11-GISEL-LABEL: v_mul_0x1pn1022_f64:852; GFX11-GISEL: ; %bb.0:853; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)854; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x100000, v[0:1]855; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]856 %mul = fmul double %x, 2.22507385850720138309e-308857 ret double %mul858}859 860; 0x1p-1021861define double @v_mul_0x1pn1021_f64(double %x) {862; GFX9-SDAG-LABEL: v_mul_0x1pn1021_f64:863; GFX9-SDAG: ; %bb.0:864; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)865; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xfc03866; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s4867; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]868;869; GFX9-GISEL-LABEL: v_mul_0x1pn1021_f64:870; GFX9-GISEL: ; %bb.0:871; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)872; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0873; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x200000874; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]875; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]876;877; GFX10-SDAG-LABEL: v_mul_0x1pn1021_f64:878; GFX10-SDAG: ; %bb.0:879; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)880; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xfffffc03881; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]882;883; GFX10-GISEL-LABEL: v_mul_0x1pn1021_f64:884; GFX10-GISEL: ; %bb.0:885; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)886; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x200000, v[0:1]887; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]888;889; GFX11-SDAG-LABEL: v_mul_0x1pn1021_f64:890; GFX11-SDAG: ; %bb.0:891; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)892; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xfffffc03893; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]894;895; GFX11-GISEL-LABEL: v_mul_0x1pn1021_f64:896; GFX11-GISEL: ; %bb.0:897; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)898; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x200000, v[0:1]899; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]900 %mul = fmul double %x, 4.45014771701440276618e-308901 ret double %mul902}903 904; 0x1p-64905define double @v_mul_0x1pn64_f64(double %x) {906; GFX9-SDAG-LABEL: v_mul_0x1pn64_f64:907; GFX9-SDAG: ; %bb.0:908; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)909; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xffc0910; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s4911; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]912;913; GFX9-GISEL-LABEL: v_mul_0x1pn64_f64:914; GFX9-GISEL: ; %bb.0:915; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)916; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0917; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3bf00000918; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]919; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]920;921; GFX10-SDAG-LABEL: v_mul_0x1pn64_f64:922; GFX10-SDAG: ; %bb.0:923; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)924; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xffffffc0925; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]926;927; GFX10-GISEL-LABEL: v_mul_0x1pn64_f64:928; GFX10-GISEL: ; %bb.0:929; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)930; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x3bf00000, v[0:1]931; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]932;933; GFX11-SDAG-LABEL: v_mul_0x1pn64_f64:934; GFX11-SDAG: ; %bb.0:935; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)936; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xffffffc0937; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]938;939; GFX11-GISEL-LABEL: v_mul_0x1pn64_f64:940; GFX11-GISEL: ; %bb.0:941; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)942; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x3bf00000, v[0:1]943; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]944 %mul = fmul double %x, 5.42101086242752217004e-20945 ret double %mul946}947 948; 0x1p-17949define double @v_mul_0x1pn17_f64(double %x) {950; GFX9-SDAG-LABEL: v_mul_0x1pn17_f64:951; GFX9-SDAG: ; %bb.0:952; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)953; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xffef954; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s4955; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]956;957; GFX9-GISEL-LABEL: v_mul_0x1pn17_f64:958; GFX9-GISEL: ; %bb.0:959; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)960; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0961; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3ee00000962; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]963; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]964;965; GFX10-SDAG-LABEL: v_mul_0x1pn17_f64:966; GFX10-SDAG: ; %bb.0:967; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)968; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xffffffef969; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]970;971; GFX10-GISEL-LABEL: v_mul_0x1pn17_f64:972; GFX10-GISEL: ; %bb.0:973; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)974; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x3ee00000, v[0:1]975; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]976;977; GFX11-SDAG-LABEL: v_mul_0x1pn17_f64:978; GFX11-SDAG: ; %bb.0:979; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)980; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0xffffffef981; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]982;983; GFX11-GISEL-LABEL: v_mul_0x1pn17_f64:984; GFX11-GISEL: ; %bb.0:985; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)986; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x3ee00000, v[0:1]987; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]988 %mul = fmul double %x, 0.00000762939453125989 ret double %mul990}991 992; 0x1p-16993define double @v_mul_0x1pn16_f64(double %x) {994; GFX9-SDAG-LABEL: v_mul_0x1pn16_f64:995; GFX9-SDAG: ; %bb.0:996; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)997; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -16998; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]999;1000; GFX9-GISEL-LABEL: v_mul_0x1pn16_f64:1001; GFX9-GISEL: ; %bb.0:1002; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1003; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01004; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3ef000001005; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1006; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1007;1008; GFX10-SDAG-LABEL: v_mul_0x1pn16_f64:1009; GFX10-SDAG: ; %bb.0:1010; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1011; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -161012; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1013;1014; GFX10-GISEL-LABEL: v_mul_0x1pn16_f64:1015; GFX10-GISEL: ; %bb.0:1016; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1017; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x3ef00000, v[0:1]1018; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1019;1020; GFX11-SDAG-LABEL: v_mul_0x1pn16_f64:1021; GFX11-SDAG: ; %bb.0:1022; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1023; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -161024; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1025;1026; GFX11-GISEL-LABEL: v_mul_0x1pn16_f64:1027; GFX11-GISEL: ; %bb.0:1028; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1029; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x3ef00000, v[0:1]1030; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1031 %mul = fmul double %x, 0.00001525878906251032 ret double %mul1033}1034 1035; 0x1p-151036define double @v_mul_0x1pn15_f64(double %x) {1037; GFX9-SDAG-LABEL: v_mul_0x1pn15_f64:1038; GFX9-SDAG: ; %bb.0:1039; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1040; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -151041; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1042;1043; GFX9-GISEL-LABEL: v_mul_0x1pn15_f64:1044; GFX9-GISEL: ; %bb.0:1045; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1046; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01047; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0.51048; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1049; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1050;1051; GFX10-SDAG-LABEL: v_mul_0x1pn15_f64:1052; GFX10-SDAG: ; %bb.0:1053; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1054; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -151055; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1056;1057; GFX10-GISEL-LABEL: v_mul_0x1pn15_f64:1058; GFX10-GISEL: ; %bb.0:1059; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1060; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x3f000000, v[0:1]1061; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1062;1063; GFX11-SDAG-LABEL: v_mul_0x1pn15_f64:1064; GFX11-SDAG: ; %bb.0:1065; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1066; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -151067; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1068;1069; GFX11-GISEL-LABEL: v_mul_0x1pn15_f64:1070; GFX11-GISEL: ; %bb.0:1071; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1072; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x3f000000, v[0:1]1073; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1074 %mul = fmul double %x, 0.0000305175781251075 ret double %mul1076}1077 1078define double @v_mul_neg256_f64(double %x) {1079; GFX9-SDAG-LABEL: v_mul_neg256_f64:1080; GFX9-SDAG: ; %bb.0:1081; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1082; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 81083; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1084;1085; GFX9-GISEL-LABEL: v_mul_neg256_f64:1086; GFX9-GISEL: ; %bb.0:1087; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1088; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01089; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc07000001090; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1091; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1092;1093; GFX10-SDAG-LABEL: v_mul_neg256_f64:1094; GFX10-SDAG: ; %bb.0:1095; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1096; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 81097; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1098;1099; GFX10-GISEL-LABEL: v_mul_neg256_f64:1100; GFX10-GISEL: ; %bb.0:1101; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1102; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0700000, v[0:1]1103; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1104;1105; GFX11-SDAG-LABEL: v_mul_neg256_f64:1106; GFX11-SDAG: ; %bb.0:1107; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1108; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 81109; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1110;1111; GFX11-GISEL-LABEL: v_mul_neg256_f64:1112; GFX11-GISEL: ; %bb.0:1113; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1114; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0700000, v[0:1]1115; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1116 %mul = fmul double %x, -256.01117 ret double %mul1118}1119 1120define double @v_mul_neg128_f64(double %x) {1121; GFX9-SDAG-LABEL: v_mul_neg128_f64:1122; GFX9-SDAG: ; %bb.0:1123; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1124; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 71125; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1126;1127; GFX9-GISEL-LABEL: v_mul_neg128_f64:1128; GFX9-GISEL: ; %bb.0:1129; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1130; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01131; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc06000001132; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1133; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1134;1135; GFX10-SDAG-LABEL: v_mul_neg128_f64:1136; GFX10-SDAG: ; %bb.0:1137; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1138; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 71139; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1140;1141; GFX10-GISEL-LABEL: v_mul_neg128_f64:1142; GFX10-GISEL: ; %bb.0:1143; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1144; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0600000, v[0:1]1145; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1146;1147; GFX11-SDAG-LABEL: v_mul_neg128_f64:1148; GFX11-SDAG: ; %bb.0:1149; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1150; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 71151; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1152;1153; GFX11-GISEL-LABEL: v_mul_neg128_f64:1154; GFX11-GISEL: ; %bb.0:1155; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1156; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0600000, v[0:1]1157; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1158 %mul = fmul double %x, -128.01159 ret double %mul1160}1161 1162define double @v_mul_neg64_f64(double %x) {1163; GFX9-SDAG-LABEL: v_mul_neg64_f64:1164; GFX9-SDAG: ; %bb.0:1165; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1166; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 61167; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1168;1169; GFX9-GISEL-LABEL: v_mul_neg64_f64:1170; GFX9-GISEL: ; %bb.0:1171; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1172; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01173; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc05000001174; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1175; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1176;1177; GFX10-SDAG-LABEL: v_mul_neg64_f64:1178; GFX10-SDAG: ; %bb.0:1179; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1180; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 61181; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1182;1183; GFX10-GISEL-LABEL: v_mul_neg64_f64:1184; GFX10-GISEL: ; %bb.0:1185; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1186; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0500000, v[0:1]1187; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1188;1189; GFX11-SDAG-LABEL: v_mul_neg64_f64:1190; GFX11-SDAG: ; %bb.0:1191; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1192; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 61193; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1194;1195; GFX11-GISEL-LABEL: v_mul_neg64_f64:1196; GFX11-GISEL: ; %bb.0:1197; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1198; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0500000, v[0:1]1199; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1200 %mul = fmul double %x, -64.01201 ret double %mul1202}1203 1204define double @v_mul_neg32_f64(double %x) {1205; GFX9-SDAG-LABEL: v_mul_neg32_f64:1206; GFX9-SDAG: ; %bb.0:1207; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1208; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 51209; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1210;1211; GFX9-GISEL-LABEL: v_mul_neg32_f64:1212; GFX9-GISEL: ; %bb.0:1213; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1214; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01215; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc04000001216; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1217; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1218;1219; GFX10-SDAG-LABEL: v_mul_neg32_f64:1220; GFX10-SDAG: ; %bb.0:1221; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1222; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 51223; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1224;1225; GFX10-GISEL-LABEL: v_mul_neg32_f64:1226; GFX10-GISEL: ; %bb.0:1227; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1228; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0400000, v[0:1]1229; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1230;1231; GFX11-SDAG-LABEL: v_mul_neg32_f64:1232; GFX11-SDAG: ; %bb.0:1233; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1234; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 51235; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1236;1237; GFX11-GISEL-LABEL: v_mul_neg32_f64:1238; GFX11-GISEL: ; %bb.0:1239; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1240; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0400000, v[0:1]1241; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1242 %mul = fmul double %x, -32.01243 ret double %mul1244}1245 1246define double @v_mul_neg16_f64(double %x) {1247; GFX9-SDAG-LABEL: v_mul_neg16_f64:1248; GFX9-SDAG: ; %bb.0:1249; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1250; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 41251; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1252;1253; GFX9-GISEL-LABEL: v_mul_neg16_f64:1254; GFX9-GISEL: ; %bb.0:1255; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1256; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01257; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc03000001258; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1259; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1260;1261; GFX10-SDAG-LABEL: v_mul_neg16_f64:1262; GFX10-SDAG: ; %bb.0:1263; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1264; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 41265; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1266;1267; GFX10-GISEL-LABEL: v_mul_neg16_f64:1268; GFX10-GISEL: ; %bb.0:1269; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1270; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0300000, v[0:1]1271; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1272;1273; GFX11-SDAG-LABEL: v_mul_neg16_f64:1274; GFX11-SDAG: ; %bb.0:1275; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1276; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 41277; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1278;1279; GFX11-GISEL-LABEL: v_mul_neg16_f64:1280; GFX11-GISEL: ; %bb.0:1281; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1282; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0300000, v[0:1]1283; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1284 %mul = fmul double %x, -16.01285 ret double %mul1286}1287 1288define double @v_mul_neg8_f64(double %x) {1289; GFX9-SDAG-LABEL: v_mul_neg8_f64:1290; GFX9-SDAG: ; %bb.0:1291; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1292; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 31293; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1294;1295; GFX9-GISEL-LABEL: v_mul_neg8_f64:1296; GFX9-GISEL: ; %bb.0:1297; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1298; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01299; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc02000001300; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1301; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1302;1303; GFX10-SDAG-LABEL: v_mul_neg8_f64:1304; GFX10-SDAG: ; %bb.0:1305; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1306; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 31307; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1308;1309; GFX10-GISEL-LABEL: v_mul_neg8_f64:1310; GFX10-GISEL: ; %bb.0:1311; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1312; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0200000, v[0:1]1313; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1314;1315; GFX11-SDAG-LABEL: v_mul_neg8_f64:1316; GFX11-SDAG: ; %bb.0:1317; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1318; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 31319; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1320;1321; GFX11-GISEL-LABEL: v_mul_neg8_f64:1322; GFX11-GISEL: ; %bb.0:1323; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1324; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0200000, v[0:1]1325; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1326 %mul = fmul double %x, -8.01327 ret double %mul1328}1329 1330define double @v_mul_neg4_f64(double %x) {1331; GCN-LABEL: v_mul_neg4_f64:1332; GCN: ; %bb.0:1333; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1334; GCN-NEXT: v_mul_f64 v[0:1], v[0:1], -4.01335; GCN-NEXT: s_setpc_b64 s[30:31]1336 %mul = fmul double %x, -4.01337 ret double %mul1338}1339 1340define double @v_mul_neg2_f64(double %x) {1341; GCN-LABEL: v_mul_neg2_f64:1342; GCN: ; %bb.0:1343; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1344; GCN-NEXT: v_mul_f64 v[0:1], v[0:1], -2.01345; GCN-NEXT: s_setpc_b64 s[30:31]1346 %mul = fmul double %x, -2.01347 ret double %mul1348}1349 1350define double @v_mul_0_f64(double %x) {1351; GCN-LABEL: v_mul_0_f64:1352; GCN: ; %bb.0:1353; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1354; GCN-NEXT: v_mul_f64 v[0:1], v[0:1], 01355; GCN-NEXT: s_setpc_b64 s[30:31]1356 %mul = fmul double %x, 0.01357 ret double %mul1358}1359 1360define double @v_mul_neg1_f64(double %x) {1361; GCN-LABEL: v_mul_neg1_f64:1362; GCN: ; %bb.0:1363; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1364; GCN-NEXT: v_xor_b32_e32 v1, 0x80000000, v11365; GCN-NEXT: s_setpc_b64 s[30:31]1366 %mul = fmul double %x, -1.01367 ret double %mul1368}1369 1370define double @v_mul_neg_half_f64(double %x) {1371; GCN-LABEL: v_mul_neg_half_f64:1372; GCN: ; %bb.0:1373; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1374; GCN-NEXT: v_mul_f64 v[0:1], v[0:1], -0.51375; GCN-NEXT: s_setpc_b64 s[30:31]1376 %mul = fmul double %x, -0.51377 ret double %mul1378}1379 1380define double @v_mul_neg_quarter_f64(double %x) {1381; GFX9-SDAG-LABEL: v_mul_neg_quarter_f64:1382; GFX9-SDAG: ; %bb.0:1383; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1384; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], -21385; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1386;1387; GFX9-GISEL-LABEL: v_mul_neg_quarter_f64:1388; GFX9-GISEL: ; %bb.0:1389; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1390; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01391; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xbfd000001392; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1393; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1394;1395; GFX10-SDAG-LABEL: v_mul_neg_quarter_f64:1396; GFX10-SDAG: ; %bb.0:1397; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1398; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], -21399; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1400;1401; GFX10-GISEL-LABEL: v_mul_neg_quarter_f64:1402; GFX10-GISEL: ; %bb.0:1403; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1404; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xbfd00000, v[0:1]1405; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1406;1407; GFX11-SDAG-LABEL: v_mul_neg_quarter_f64:1408; GFX11-SDAG: ; %bb.0:1409; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1410; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], -21411; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1412;1413; GFX11-GISEL-LABEL: v_mul_neg_quarter_f64:1414; GFX11-GISEL: ; %bb.0:1415; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1416; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xbfd00000, v[0:1]1417; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1418 %mul = fmul double %x, -0.251419 ret double %mul1420}1421 1422define double @v_mul_quarter_f64(double %x) {1423; GFX9-SDAG-LABEL: v_mul_quarter_f64:1424; GFX9-SDAG: ; %bb.0:1425; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1426; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -21427; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1428;1429; GFX9-GISEL-LABEL: v_mul_quarter_f64:1430; GFX9-GISEL: ; %bb.0:1431; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1432; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01433; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3fd000001434; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1435; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1436;1437; GFX10-SDAG-LABEL: v_mul_quarter_f64:1438; GFX10-SDAG: ; %bb.0:1439; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1440; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -21441; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1442;1443; GFX10-GISEL-LABEL: v_mul_quarter_f64:1444; GFX10-GISEL: ; %bb.0:1445; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1446; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x3fd00000, v[0:1]1447; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1448;1449; GFX11-SDAG-LABEL: v_mul_quarter_f64:1450; GFX11-SDAG: ; %bb.0:1451; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1452; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], -21453; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1454;1455; GFX11-GISEL-LABEL: v_mul_quarter_f64:1456; GFX11-GISEL: ; %bb.0:1457; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1458; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x3fd00000, v[0:1]1459; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1460 %mul = fmul double %x, 0.251461 ret double %mul1462}1463 1464define double @v_mul_half_f64(double %x) {1465; GCN-LABEL: v_mul_half_f64:1466; GCN: ; %bb.0:1467; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1468; GCN-NEXT: v_mul_f64 v[0:1], v[0:1], 0.51469; GCN-NEXT: s_setpc_b64 s[30:31]1470 %mul = fmul double %x, 0.51471 ret double %mul1472}1473 1474define double @v_mul_1_f64(double %x) {1475; GCN-LABEL: v_mul_1_f64:1476; GCN: ; %bb.0:1477; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1478; GCN-NEXT: s_setpc_b64 s[30:31]1479 %mul = fmul double %x, 1.01480 ret double %mul1481}1482 1483define double @v_mul_2_f64(double %x) {1484; GFX9-SDAG-LABEL: v_mul_2_f64:1485; GFX9-SDAG: ; %bb.0:1486; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1487; GFX9-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]1488; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1489;1490; GFX9-GISEL-LABEL: v_mul_2_f64:1491; GFX9-GISEL: ; %bb.0:1492; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1493; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.01494; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1495;1496; GFX10-SDAG-LABEL: v_mul_2_f64:1497; GFX10-SDAG: ; %bb.0:1498; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1499; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]1500; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1501;1502; GFX10-GISEL-LABEL: v_mul_2_f64:1503; GFX10-GISEL: ; %bb.0:1504; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1505; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.01506; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1507;1508; GFX11-SDAG-LABEL: v_mul_2_f64:1509; GFX11-SDAG: ; %bb.0:1510; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1511; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]1512; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1513;1514; GFX11-GISEL-LABEL: v_mul_2_f64:1515; GFX11-GISEL: ; %bb.0:1516; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1517; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.01518; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1519 %mul = fmul double %x, 2.01520 ret double %mul1521}1522 1523define double @v_mul_4_f64(double %x) {1524; GCN-LABEL: v_mul_4_f64:1525; GCN: ; %bb.0:1526; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1527; GCN-NEXT: v_mul_f64 v[0:1], v[0:1], 4.01528; GCN-NEXT: s_setpc_b64 s[30:31]1529 %mul = fmul double %x, 4.01530 ret double %mul1531}1532 1533define double @v_mul_8_f64(double %x) {1534; GFX9-SDAG-LABEL: v_mul_8_f64:1535; GFX9-SDAG: ; %bb.0:1536; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1537; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 31538; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1539;1540; GFX9-GISEL-LABEL: v_mul_8_f64:1541; GFX9-GISEL: ; %bb.0:1542; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1543; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01544; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x402000001545; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1546; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1547;1548; GFX10-SDAG-LABEL: v_mul_8_f64:1549; GFX10-SDAG: ; %bb.0:1550; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1551; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 31552; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1553;1554; GFX10-GISEL-LABEL: v_mul_8_f64:1555; GFX10-GISEL: ; %bb.0:1556; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1557; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40200000, v[0:1]1558; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1559;1560; GFX11-SDAG-LABEL: v_mul_8_f64:1561; GFX11-SDAG: ; %bb.0:1562; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1563; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 31564; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1565;1566; GFX11-GISEL-LABEL: v_mul_8_f64:1567; GFX11-GISEL: ; %bb.0:1568; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1569; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40200000, v[0:1]1570; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1571 %mul = fmul double %x, 8.01572 ret double %mul1573}1574 1575define double @v_mul_16_f64(double %x) {1576; GFX9-SDAG-LABEL: v_mul_16_f64:1577; GFX9-SDAG: ; %bb.0:1578; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1579; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 41580; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1581;1582; GFX9-GISEL-LABEL: v_mul_16_f64:1583; GFX9-GISEL: ; %bb.0:1584; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1585; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01586; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x403000001587; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1588; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1589;1590; GFX10-SDAG-LABEL: v_mul_16_f64:1591; GFX10-SDAG: ; %bb.0:1592; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1593; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 41594; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1595;1596; GFX10-GISEL-LABEL: v_mul_16_f64:1597; GFX10-GISEL: ; %bb.0:1598; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1599; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40300000, v[0:1]1600; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1601;1602; GFX11-SDAG-LABEL: v_mul_16_f64:1603; GFX11-SDAG: ; %bb.0:1604; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1605; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 41606; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1607;1608; GFX11-GISEL-LABEL: v_mul_16_f64:1609; GFX11-GISEL: ; %bb.0:1610; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1611; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40300000, v[0:1]1612; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1613 %mul = fmul double %x, 16.01614 ret double %mul1615}1616 1617define double @v_mul_32_f64(double %x) {1618; GFX9-SDAG-LABEL: v_mul_32_f64:1619; GFX9-SDAG: ; %bb.0:1620; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1621; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 51622; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1623;1624; GFX9-GISEL-LABEL: v_mul_32_f64:1625; GFX9-GISEL: ; %bb.0:1626; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1627; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01628; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x404000001629; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1630; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1631;1632; GFX10-SDAG-LABEL: v_mul_32_f64:1633; GFX10-SDAG: ; %bb.0:1634; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1635; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 51636; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1637;1638; GFX10-GISEL-LABEL: v_mul_32_f64:1639; GFX10-GISEL: ; %bb.0:1640; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1641; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, v[0:1]1642; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1643;1644; GFX11-SDAG-LABEL: v_mul_32_f64:1645; GFX11-SDAG: ; %bb.0:1646; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1647; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 51648; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1649;1650; GFX11-GISEL-LABEL: v_mul_32_f64:1651; GFX11-GISEL: ; %bb.0:1652; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1653; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, v[0:1]1654; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1655 %mul = fmul double %x, 32.01656 ret double %mul1657}1658 1659define double @v_mul_64_f64(double %x) {1660; GFX9-SDAG-LABEL: v_mul_64_f64:1661; GFX9-SDAG: ; %bb.0:1662; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1663; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 61664; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1665;1666; GFX9-GISEL-LABEL: v_mul_64_f64:1667; GFX9-GISEL: ; %bb.0:1668; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1669; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01670; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x405000001671; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1672; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1673;1674; GFX10-SDAG-LABEL: v_mul_64_f64:1675; GFX10-SDAG: ; %bb.0:1676; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1677; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 61678; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1679;1680; GFX10-GISEL-LABEL: v_mul_64_f64:1681; GFX10-GISEL: ; %bb.0:1682; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1683; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40500000, v[0:1]1684; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1685;1686; GFX11-SDAG-LABEL: v_mul_64_f64:1687; GFX11-SDAG: ; %bb.0:1688; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1689; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 61690; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1691;1692; GFX11-GISEL-LABEL: v_mul_64_f64:1693; GFX11-GISEL: ; %bb.0:1694; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1695; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40500000, v[0:1]1696; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1697 %mul = fmul double %x, 64.01698 ret double %mul1699}1700 1701define double @v_mul_128_f64(double %x) {1702; GFX9-SDAG-LABEL: v_mul_128_f64:1703; GFX9-SDAG: ; %bb.0:1704; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1705; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 71706; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1707;1708; GFX9-GISEL-LABEL: v_mul_128_f64:1709; GFX9-GISEL: ; %bb.0:1710; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1711; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01712; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x406000001713; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1714; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1715;1716; GFX10-SDAG-LABEL: v_mul_128_f64:1717; GFX10-SDAG: ; %bb.0:1718; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1719; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 71720; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1721;1722; GFX10-GISEL-LABEL: v_mul_128_f64:1723; GFX10-GISEL: ; %bb.0:1724; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1725; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40600000, v[0:1]1726; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1727;1728; GFX11-SDAG-LABEL: v_mul_128_f64:1729; GFX11-SDAG: ; %bb.0:1730; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1731; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 71732; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1733;1734; GFX11-GISEL-LABEL: v_mul_128_f64:1735; GFX11-GISEL: ; %bb.0:1736; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1737; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40600000, v[0:1]1738; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1739 %mul = fmul double %x, 128.01740 ret double %mul1741}1742 1743define double @v_mul_256_f64(double %x) {1744; GFX9-SDAG-LABEL: v_mul_256_f64:1745; GFX9-SDAG: ; %bb.0:1746; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1747; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 81748; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1749;1750; GFX9-GISEL-LABEL: v_mul_256_f64:1751; GFX9-GISEL: ; %bb.0:1752; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1753; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01754; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x407000001755; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1756; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1757;1758; GFX10-SDAG-LABEL: v_mul_256_f64:1759; GFX10-SDAG: ; %bb.0:1760; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1761; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 81762; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1763;1764; GFX10-GISEL-LABEL: v_mul_256_f64:1765; GFX10-GISEL: ; %bb.0:1766; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1767; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40700000, v[0:1]1768; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1769;1770; GFX11-SDAG-LABEL: v_mul_256_f64:1771; GFX11-SDAG: ; %bb.0:1772; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1773; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 81774; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1775;1776; GFX11-GISEL-LABEL: v_mul_256_f64:1777; GFX11-GISEL: ; %bb.0:1778; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1779; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40700000, v[0:1]1780; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1781 %mul = fmul double %x, 256.01782 ret double %mul1783}1784 1785; 0x1p+631786define double @v_mul_0x1p63_f64(double %x) {1787; GFX9-SDAG-LABEL: v_mul_0x1p63_f64:1788; GFX9-SDAG: ; %bb.0:1789; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1790; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 631791; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1792;1793; GFX9-GISEL-LABEL: v_mul_0x1p63_f64:1794; GFX9-GISEL: ; %bb.0:1795; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1796; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01797; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x43e000001798; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1799; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1800;1801; GFX10-SDAG-LABEL: v_mul_0x1p63_f64:1802; GFX10-SDAG: ; %bb.0:1803; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1804; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 631805; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1806;1807; GFX10-GISEL-LABEL: v_mul_0x1p63_f64:1808; GFX10-GISEL: ; %bb.0:1809; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1810; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x43e00000, v[0:1]1811; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1812;1813; GFX11-SDAG-LABEL: v_mul_0x1p63_f64:1814; GFX11-SDAG: ; %bb.0:1815; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1816; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 631817; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1818;1819; GFX11-GISEL-LABEL: v_mul_0x1p63_f64:1820; GFX11-GISEL: ; %bb.0:1821; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1822; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x43e00000, v[0:1]1823; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1824 %mul = fmul double %x, 9223372036854775808.01825 ret double %mul1826}1827 1828; 0x1p+641829define double @v_mul_0x1p64_f64(double %x) {1830; GFX9-SDAG-LABEL: v_mul_0x1p64_f64:1831; GFX9-SDAG: ; %bb.0:1832; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1833; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 641834; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1835;1836; GFX9-GISEL-LABEL: v_mul_0x1p64_f64:1837; GFX9-GISEL: ; %bb.0:1838; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1839; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01840; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x43f000001841; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1842; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1843;1844; GFX10-SDAG-LABEL: v_mul_0x1p64_f64:1845; GFX10-SDAG: ; %bb.0:1846; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1847; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 641848; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1849;1850; GFX10-GISEL-LABEL: v_mul_0x1p64_f64:1851; GFX10-GISEL: ; %bb.0:1852; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1853; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x43f00000, v[0:1]1854; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1855;1856; GFX11-SDAG-LABEL: v_mul_0x1p64_f64:1857; GFX11-SDAG: ; %bb.0:1858; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1859; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 641860; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1861;1862; GFX11-GISEL-LABEL: v_mul_0x1p64_f64:1863; GFX11-GISEL: ; %bb.0:1864; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1865; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x43f00000, v[0:1]1866; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1867 %mul = fmul double %x, 18446744073709551616.01868 ret double %mul1869}1870 1871; 0x1p+651872define double @v_mul_0x1p65_f64(double %x) {1873; GFX9-SDAG-LABEL: v_mul_0x1p65_f64:1874; GFX9-SDAG: ; %bb.0:1875; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1876; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x411877; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s41878; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1879;1880; GFX9-GISEL-LABEL: v_mul_0x1p65_f64:1881; GFX9-GISEL: ; %bb.0:1882; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1883; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01884; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v3, 341885; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1886; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1887;1888; GFX10-SDAG-LABEL: v_mul_0x1p65_f64:1889; GFX10-SDAG: ; %bb.0:1890; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1891; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x411892; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1893;1894; GFX10-GISEL-LABEL: v_mul_0x1p65_f64:1895; GFX10-GISEL: ; %bb.0:1896; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1897; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x44000000, v[0:1]1898; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1899;1900; GFX11-SDAG-LABEL: v_mul_0x1p65_f64:1901; GFX11-SDAG: ; %bb.0:1902; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1903; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x411904; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]1905;1906; GFX11-GISEL-LABEL: v_mul_0x1p65_f64:1907; GFX11-GISEL: ; %bb.0:1908; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1909; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x44000000, v[0:1]1910; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]1911 %mul = fmul double %x, 36893488147419103232.01912 ret double %mul1913}1914 1915define amdgpu_ps <2 x i32> @s_mul_0x1p65_f64(double inreg %x, double inreg %y) {1916; GFX9-SDAG-LABEL: s_mul_0x1p65_f64:1917; GFX9-SDAG: ; %bb.0:1918; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, 0x411919; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], s[0:1], v01920; GFX9-SDAG-NEXT: v_readfirstlane_b32 s0, v01921; GFX9-SDAG-NEXT: v_readfirstlane_b32 s1, v11922; GFX9-SDAG-NEXT: ; return to shader part epilog1923;1924; GFX9-GISEL-LABEL: s_mul_0x1p65_f64:1925; GFX9-GISEL: ; %bb.0:1926; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 01927; GFX9-GISEL-NEXT: v_bfrev_b32_e32 v1, 341928; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1]1929; GFX9-GISEL-NEXT: v_readfirstlane_b32 s0, v01930; GFX9-GISEL-NEXT: v_readfirstlane_b32 s1, v11931; GFX9-GISEL-NEXT: ; return to shader part epilog1932;1933; GFX10-SDAG-LABEL: s_mul_0x1p65_f64:1934; GFX10-SDAG: ; %bb.0:1935; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], s[0:1], 0x411936; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v01937; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v11938; GFX10-SDAG-NEXT: ; return to shader part epilog1939;1940; GFX10-GISEL-LABEL: s_mul_0x1p65_f64:1941; GFX10-GISEL: ; %bb.0:1942; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x44000000, s[0:1]1943; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v01944; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v11945; GFX10-GISEL-NEXT: ; return to shader part epilog1946;1947; GFX11-SDAG-LABEL: s_mul_0x1p65_f64:1948; GFX11-SDAG: ; %bb.0:1949; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], s[0:1], 0x411950; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v01951; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v11952; GFX11-SDAG-NEXT: ; return to shader part epilog1953;1954; GFX11-GISEL-LABEL: s_mul_0x1p65_f64:1955; GFX11-GISEL: ; %bb.0:1956; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x44000000, s[0:1]1957; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v01958; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v11959; GFX11-GISEL-NEXT: ; return to shader part epilog1960 %mul = fmul contract double %x, 36893488147419103232.01961 %cast = bitcast double %mul to <2 x i32>1962 %cast.0 = extractelement <2 x i32> %cast, i32 01963 %cast.1 = extractelement <2 x i32> %cast, i32 11964 %readlane.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %cast.0)1965 %readlane.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %cast.1)1966 %insert.0 = insertelement <2 x i32> poison, i32 %readlane.0, i32 01967 %insert.1 = insertelement <2 x i32> %insert.0, i32 %readlane.1, i32 11968 ret <2 x i32> %insert.11969}1970 1971; 0x1p+1281972define double @v_mul_0x1p128_f64(double %x) {1973; GFX9-SDAG-LABEL: v_mul_0x1p128_f64:1974; GFX9-SDAG: ; %bb.0:1975; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1976; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x801977; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s41978; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]1979;1980; GFX9-GISEL-LABEL: v_mul_0x1p128_f64:1981; GFX9-GISEL: ; %bb.0:1982; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1983; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 01984; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x47f000001985; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]1986; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]1987;1988; GFX10-SDAG-LABEL: v_mul_0x1p128_f64:1989; GFX10-SDAG: ; %bb.0:1990; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1991; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x801992; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]1993;1994; GFX10-GISEL-LABEL: v_mul_0x1p128_f64:1995; GFX10-GISEL: ; %bb.0:1996; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1997; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x47f00000, v[0:1]1998; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]1999;2000; GFX11-SDAG-LABEL: v_mul_0x1p128_f64:2001; GFX11-SDAG: ; %bb.0:2002; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2003; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x802004; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2005;2006; GFX11-GISEL-LABEL: v_mul_0x1p128_f64:2007; GFX11-GISEL: ; %bb.0:2008; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2009; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x47f00000, v[0:1]2010; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2011 %mul = fmul double %x, 3.40282366920938463463e+382012 ret double %mul2013}2014 2015; 0x1p+10222016define double @v_mul_0x1p1022_f64(double %x) {2017; GFX9-SDAG-LABEL: v_mul_0x1p1022_f64:2018; GFX9-SDAG: ; %bb.0:2019; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2020; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x3fe2021; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s42022; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2023;2024; GFX9-GISEL-LABEL: v_mul_0x1p1022_f64:2025; GFX9-GISEL: ; %bb.0:2026; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2027; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 02028; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fd000002029; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2030; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2031;2032; GFX10-SDAG-LABEL: v_mul_0x1p1022_f64:2033; GFX10-SDAG: ; %bb.0:2034; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2035; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x3fe2036; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2037;2038; GFX10-GISEL-LABEL: v_mul_0x1p1022_f64:2039; GFX10-GISEL: ; %bb.0:2040; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2041; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x7fd00000, v[0:1]2042; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2043;2044; GFX11-SDAG-LABEL: v_mul_0x1p1022_f64:2045; GFX11-SDAG: ; %bb.0:2046; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2047; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x3fe2048; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2049;2050; GFX11-GISEL-LABEL: v_mul_0x1p1022_f64:2051; GFX11-GISEL: ; %bb.0:2052; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2053; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x7fd00000, v[0:1]2054; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2055 %mul = fmul double %x, 4.49423283715578976932e+3072056 ret double %mul2057}2058 2059; 0x1p+10232060define double @v_mul_0x1p1023_f64(double %x) {2061; GFX9-SDAG-LABEL: v_mul_0x1p1023_f64:2062; GFX9-SDAG: ; %bb.0:2063; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2064; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x3ff2065; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], s42066; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2067;2068; GFX9-GISEL-LABEL: v_mul_0x1p1023_f64:2069; GFX9-GISEL: ; %bb.0:2070; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2071; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 02072; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fe000002073; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]2074; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2075;2076; GFX10-SDAG-LABEL: v_mul_0x1p1023_f64:2077; GFX10-SDAG: ; %bb.0:2078; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2079; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x3ff2080; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2081;2082; GFX10-GISEL-LABEL: v_mul_0x1p1023_f64:2083; GFX10-GISEL: ; %bb.0:2084; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2085; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x7fe00000, v[0:1]2086; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2087;2088; GFX11-SDAG-LABEL: v_mul_0x1p1023_f64:2089; GFX11-SDAG: ; %bb.0:2090; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2091; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 0x3ff2092; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2093;2094; GFX11-GISEL-LABEL: v_mul_0x1p1023_f64:2095; GFX11-GISEL: ; %bb.0:2096; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2097; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x7fe00000, v[0:1]2098; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2099 %mul = fmul double %x, 8.98846567431157953865e+3072100 ret double %mul2101}2102 2103; Check that this doesn't interfer with fma formation2104define double @v_fma_mul_add_32_f64(double %x, double %y) {2105; GFX9-SDAG-LABEL: v_fma_mul_add_32_f64:2106; GFX9-SDAG: ; %bb.0:2107; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2108; GFX9-SDAG-NEXT: s_mov_b32 s4, 02109; GFX9-SDAG-NEXT: s_mov_b32 s5, 0x404000002110; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[0:1], s[4:5], v[2:3]2111; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2112;2113; GFX9-GISEL-LABEL: v_fma_mul_add_32_f64:2114; GFX9-GISEL: ; %bb.0:2115; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2116; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02117; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x404000002118; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], v[0:1], v[4:5], v[2:3]2119; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2120;2121; GFX1011-LABEL: v_fma_mul_add_32_f64:2122; GFX1011: ; %bb.0:2123; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2124; GFX1011-NEXT: v_fma_f64 v[0:1], 0x40400000, v[0:1], v[2:3]2125; GFX1011-NEXT: s_setpc_b64 s[30:31]2126 %mul = fmul contract double %x, 32.02127 %fma = fadd contract double %mul, %y2128 ret double %fma2129}2130 2131define <2 x double> @v_fma_mul_add_32_v2f64(<2 x double> %x, <2 x double> %y) {2132; GFX9-SDAG-LABEL: v_fma_mul_add_32_v2f64:2133; GFX9-SDAG: ; %bb.0:2134; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2135; GFX9-SDAG-NEXT: s_mov_b32 s4, 02136; GFX9-SDAG-NEXT: s_mov_b32 s5, 0x404000002137; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[0:1], s[4:5], v[4:5]2138; GFX9-SDAG-NEXT: v_fma_f64 v[2:3], v[2:3], s[4:5], v[6:7]2139; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2140;2141; GFX9-GISEL-LABEL: v_fma_mul_add_32_v2f64:2142; GFX9-GISEL: ; %bb.0:2143; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2144; GFX9-GISEL-NEXT: v_mov_b32_e32 v8, 02145; GFX9-GISEL-NEXT: v_mov_b32_e32 v9, 0x404000002146; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], v[0:1], v[8:9], v[4:5]2147; GFX9-GISEL-NEXT: v_fma_f64 v[2:3], v[2:3], v[8:9], v[6:7]2148; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2149;2150; GFX1011-LABEL: v_fma_mul_add_32_v2f64:2151; GFX1011: ; %bb.0:2152; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2153; GFX1011-NEXT: v_fma_f64 v[0:1], 0x40400000, v[0:1], v[4:5]2154; GFX1011-NEXT: v_fma_f64 v[2:3], 0x40400000, v[2:3], v[6:7]2155; GFX1011-NEXT: s_setpc_b64 s[30:31]2156 %mul = fmul contract <2 x double> %x, <double 32.0, double 32.0>2157 %fma = fadd contract <2 x double> %mul, %y2158 ret <2 x double> %fma2159}2160 2161define <2 x double> @v_fma_mul_add_2_v2f64(<2 x double> %x, <2 x double> %y) {2162; GCN-LABEL: v_fma_mul_add_2_v2f64:2163; GCN: ; %bb.0:2164; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2165; GCN-NEXT: v_fma_f64 v[0:1], v[0:1], 2.0, v[4:5]2166; GCN-NEXT: v_fma_f64 v[2:3], v[2:3], 2.0, v[6:7]2167; GCN-NEXT: s_setpc_b64 s[30:31]2168 %mul = fmul contract <2 x double> %x, <double 2.0, double 2.0>2169 %fma = fadd contract <2 x double> %mul, %y2170 ret <2 x double> %fma2171}2172 2173define <2 x double> @v_fma_mul_add_4_v2f64(<2 x double> %x, <2 x double> %y) {2174; GCN-LABEL: v_fma_mul_add_4_v2f64:2175; GCN: ; %bb.0:2176; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2177; GCN-NEXT: v_fma_f64 v[0:1], v[0:1], 4.0, v[4:5]2178; GCN-NEXT: v_fma_f64 v[2:3], v[2:3], 4.0, v[6:7]2179; GCN-NEXT: s_setpc_b64 s[30:31]2180 %mul = fmul contract <2 x double> %x, <double 4.0, double 4.0>2181 %fma = fadd contract <2 x double> %mul, %y2182 ret <2 x double> %fma2183}2184 2185define double @v_fma_mul_add_2_f64(double %x, double %y) {2186; GCN-LABEL: v_fma_mul_add_2_f64:2187; GCN: ; %bb.0:2188; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2189; GCN-NEXT: v_fma_f64 v[0:1], v[0:1], 2.0, v[2:3]2190; GCN-NEXT: s_setpc_b64 s[30:31]2191 %mul = fmul contract double %x, 2.02192 %fma = fadd contract double %mul, %y2193 ret double %fma2194}2195 2196define double @v_fma_mul_add_4_f64(double %x, double %y) {2197; GCN-LABEL: v_fma_mul_add_4_f64:2198; GCN: ; %bb.0:2199; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2200; GCN-NEXT: v_fma_f64 v[0:1], v[0:1], 4.0, v[2:3]2201; GCN-NEXT: s_setpc_b64 s[30:31]2202 %mul = fmul contract double %x, 4.02203 %fma = fadd contract double %mul, %y2204 ret double %fma2205}2206 2207define double @v_fma_mul_add_neg4_f64(double %x, double %y) {2208; GCN-LABEL: v_fma_mul_add_neg4_f64:2209; GCN: ; %bb.0:2210; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2211; GCN-NEXT: v_fma_f64 v[0:1], v[0:1], -4.0, v[2:3]2212; GCN-NEXT: s_setpc_b64 s[30:31]2213 %mul = fmul contract double %x, -4.02214 %fma = fadd contract double %mul, %y2215 ret double %fma2216}2217 2218define double @v_mul_add_32_f64(double %x, double %y) {2219; GFX9-SDAG-LABEL: v_mul_add_32_f64:2220; GFX9-SDAG: ; %bb.0:2221; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2222; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 52223; GFX9-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2224; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2225;2226; GFX9-GISEL-LABEL: v_mul_add_32_f64:2227; GFX9-GISEL: ; %bb.0:2228; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2229; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02230; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x404000002231; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2232; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2233; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2234;2235; GFX10-SDAG-LABEL: v_mul_add_32_f64:2236; GFX10-SDAG: ; %bb.0:2237; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2238; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 52239; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2240; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2241;2242; GFX10-GISEL-LABEL: v_mul_add_32_f64:2243; GFX10-GISEL: ; %bb.0:2244; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2245; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, v[0:1]2246; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2247; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2248;2249; GFX11-SDAG-LABEL: v_mul_add_32_f64:2250; GFX11-SDAG: ; %bb.0:2251; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2252; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 52253; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2254; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2255;2256; GFX11-GISEL-LABEL: v_mul_add_32_f64:2257; GFX11-GISEL: ; %bb.0:2258; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2259; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, v[0:1]2260; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2261; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2262 %mul = fmul double %x, 32.02263 %fma = fadd double %mul, %y2264 ret double %fma2265}2266 2267define double @v_mul_add_2_f64(double %x, double %y) {2268; GFX9-SDAG-LABEL: v_mul_add_2_f64:2269; GFX9-SDAG: ; %bb.0:2270; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2271; GFX9-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]2272; GFX9-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2273; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2274;2275; GFX9-GISEL-LABEL: v_mul_add_2_f64:2276; GFX9-GISEL: ; %bb.0:2277; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2278; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.02279; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2280; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2281;2282; GFX10-SDAG-LABEL: v_mul_add_2_f64:2283; GFX10-SDAG: ; %bb.0:2284; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2285; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]2286; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2287; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2288;2289; GFX10-GISEL-LABEL: v_mul_add_2_f64:2290; GFX10-GISEL: ; %bb.0:2291; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2292; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.02293; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2294; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2295;2296; GFX11-SDAG-LABEL: v_mul_add_2_f64:2297; GFX11-SDAG: ; %bb.0:2298; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2299; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]2300; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2301; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2302;2303; GFX11-GISEL-LABEL: v_mul_add_2_f64:2304; GFX11-GISEL: ; %bb.0:2305; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2306; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.02307; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2308; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2309 %mul = fmul double %x, 2.02310 %fma = fadd double %mul, %y2311 ret double %fma2312}2313 2314define double @v_mul_add_4_f64(double %x, double %y) {2315; GFX9-SDAG-LABEL: v_mul_add_4_f64:2316; GFX9-SDAG: ; %bb.0:2317; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2318; GFX9-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]2319; GFX9-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2320; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2321;2322; GFX9-GISEL-LABEL: v_mul_add_4_f64:2323; GFX9-GISEL: ; %bb.0:2324; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2325; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.02326; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2327; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2328;2329; GFX10-SDAG-LABEL: v_mul_add_4_f64:2330; GFX10-SDAG: ; %bb.0:2331; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2332; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]2333; GFX10-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2334; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2335;2336; GFX10-GISEL-LABEL: v_mul_add_4_f64:2337; GFX10-GISEL: ; %bb.0:2338; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2339; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.02340; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2341; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2342;2343; GFX11-SDAG-LABEL: v_mul_add_4_f64:2344; GFX11-SDAG: ; %bb.0:2345; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2346; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[0:1]2347; GFX11-SDAG-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2348; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2349;2350; GFX11-GISEL-LABEL: v_mul_add_4_f64:2351; GFX11-GISEL: ; %bb.0:2352; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2353; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 2.02354; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[2:3]2355; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2356 %mul = fmul double %x, 2.02357 %fma = fadd double %mul, %y2358 ret double %fma2359}2360 2361define double @v_fma_mul_sub_32_f64(double %x, double %y) {2362; GFX9-SDAG-LABEL: v_fma_mul_sub_32_f64:2363; GFX9-SDAG: ; %bb.0:2364; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2365; GFX9-SDAG-NEXT: s_mov_b32 s4, 02366; GFX9-SDAG-NEXT: s_mov_b32 s5, 0x404000002367; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[0:1], s[4:5], -v[2:3]2368; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2369;2370; GFX9-GISEL-LABEL: v_fma_mul_sub_32_f64:2371; GFX9-GISEL: ; %bb.0:2372; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2373; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02374; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x404000002375; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], v[0:1], v[4:5], -v[2:3]2376; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2377;2378; GFX1011-LABEL: v_fma_mul_sub_32_f64:2379; GFX1011: ; %bb.0:2380; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2381; GFX1011-NEXT: v_fma_f64 v[0:1], 0x40400000, v[0:1], -v[2:3]2382; GFX1011-NEXT: s_setpc_b64 s[30:31]2383 %mul = fmul contract double %x, 32.02384 %fma = fsub contract double %mul, %y2385 ret double %fma2386}2387 2388define double @v_fma_mul_add_neg32_f64(double %x, double %y) {2389; GFX9-SDAG-LABEL: v_fma_mul_add_neg32_f64:2390; GFX9-SDAG: ; %bb.0:2391; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2392; GFX9-SDAG-NEXT: s_mov_b32 s4, 02393; GFX9-SDAG-NEXT: s_mov_b32 s5, 0xc04000002394; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[0:1], s[4:5], v[2:3]2395; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2396;2397; GFX9-GISEL-LABEL: v_fma_mul_add_neg32_f64:2398; GFX9-GISEL: ; %bb.0:2399; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2400; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02401; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xc04000002402; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], v[0:1], v[4:5], v[2:3]2403; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2404;2405; GFX1011-LABEL: v_fma_mul_add_neg32_f64:2406; GFX1011: ; %bb.0:2407; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2408; GFX1011-NEXT: v_fma_f64 v[0:1], 0xc0400000, v[0:1], v[2:3]2409; GFX1011-NEXT: s_setpc_b64 s[30:31]2410 %mul = fmul contract double %x, -32.02411 %fma = fadd contract double %mul, %y2412 ret double %fma2413}2414 2415define double @v_mul_fabs_32_f64(double %x) {2416; GFX9-SDAG-LABEL: v_mul_fabs_32_f64:2417; GFX9-SDAG: ; %bb.0:2418; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2419; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 52420; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2421;2422; GFX9-GISEL-LABEL: v_mul_fabs_32_f64:2423; GFX9-GISEL: ; %bb.0:2424; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2425; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 02426; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x404000002427; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]2428; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2429;2430; GFX10-SDAG-LABEL: v_mul_fabs_32_f64:2431; GFX10-SDAG: ; %bb.0:2432; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2433; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 52434; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2435;2436; GFX10-GISEL-LABEL: v_mul_fabs_32_f64:2437; GFX10-GISEL: ; %bb.0:2438; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2439; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, |v[0:1]|2440; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2441;2442; GFX11-SDAG-LABEL: v_mul_fabs_32_f64:2443; GFX11-SDAG: ; %bb.0:2444; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2445; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 52446; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2447;2448; GFX11-GISEL-LABEL: v_mul_fabs_32_f64:2449; GFX11-GISEL: ; %bb.0:2450; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2451; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, |v[0:1]|2452; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2453 %x.fabs = call double @llvm.fabs.f64(double %x)2454 %mul = fmul double %x.fabs, 32.02455 ret double %mul2456}2457 2458define double @v_mul_add_fma_fabs_32_f64(double %x, double %y) {2459; GFX9-SDAG-LABEL: v_mul_add_fma_fabs_32_f64:2460; GFX9-SDAG: ; %bb.0:2461; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2462; GFX9-SDAG-NEXT: s_mov_b32 s4, 02463; GFX9-SDAG-NEXT: s_mov_b32 s5, 0x404000002464; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], |v[0:1]|, s[4:5], v[2:3]2465; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2466;2467; GFX9-GISEL-LABEL: v_mul_add_fma_fabs_32_f64:2468; GFX9-GISEL: ; %bb.0:2469; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2470; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02471; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x404000002472; GFX9-GISEL-NEXT: v_fma_f64 v[0:1], |v[0:1]|, v[4:5], v[2:3]2473; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2474;2475; GFX1011-LABEL: v_mul_add_fma_fabs_32_f64:2476; GFX1011: ; %bb.0:2477; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2478; GFX1011-NEXT: v_fma_f64 v[0:1], 0x40400000, |v[0:1]|, v[2:3]2479; GFX1011-NEXT: s_setpc_b64 s[30:31]2480 %x.fabs = call double @llvm.fabs.f64(double %x)2481 %mul = fmul contract double %x.fabs, 32.02482 %fma = fadd contract double %mul, %y2483 ret double %fma2484}2485 2486define <2 x double> @v_mul_16_v2f64(<2 x double> %x) {2487; GFX9-SDAG-LABEL: v_mul_16_v2f64:2488; GFX9-SDAG: ; %bb.0:2489; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2490; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 42491; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], 42492; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2493;2494; GFX9-GISEL-LABEL: v_mul_16_v2f64:2495; GFX9-GISEL: ; %bb.0:2496; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2497; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02498; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x403000002499; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2500; GFX9-GISEL-NEXT: v_mul_f64 v[2:3], v[2:3], v[4:5]2501; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2502;2503; GFX10-SDAG-LABEL: v_mul_16_v2f64:2504; GFX10-SDAG: ; %bb.0:2505; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2506; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 42507; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], 42508; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2509;2510; GFX10-GISEL-LABEL: v_mul_16_v2f64:2511; GFX10-GISEL: ; %bb.0:2512; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2513; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40300000, v[0:1]2514; GFX10-GISEL-NEXT: v_mul_f64 v[2:3], 0x40300000, v[2:3]2515; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2516;2517; GFX11-SDAG-LABEL: v_mul_16_v2f64:2518; GFX11-SDAG: ; %bb.0:2519; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2520; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 42521; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], v[2:3], 42522; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2523;2524; GFX11-GISEL-LABEL: v_mul_16_v2f64:2525; GFX11-GISEL: ; %bb.0:2526; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2527; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40300000, v[0:1]2528; GFX11-GISEL-NEXT: v_mul_f64 v[2:3], 0x40300000, v[2:3]2529; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2530 %mul = fmul <2 x double> %x, <double 16.0, double 16.0>2531 ret <2 x double> %mul2532}2533 2534define <2 x double> @v_mul_neg16_v2f64(<2 x double> %x) {2535; GFX9-SDAG-LABEL: v_mul_neg16_v2f64:2536; GFX9-SDAG: ; %bb.0:2537; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2538; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 42539; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], -v[2:3], 42540; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2541;2542; GFX9-GISEL-LABEL: v_mul_neg16_v2f64:2543; GFX9-GISEL: ; %bb.0:2544; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2545; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02546; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0xc03000002547; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[4:5]2548; GFX9-GISEL-NEXT: v_mul_f64 v[2:3], v[2:3], v[4:5]2549; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2550;2551; GFX10-SDAG-LABEL: v_mul_neg16_v2f64:2552; GFX10-SDAG: ; %bb.0:2553; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2554; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 42555; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], -v[2:3], 42556; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2557;2558; GFX10-GISEL-LABEL: v_mul_neg16_v2f64:2559; GFX10-GISEL: ; %bb.0:2560; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2561; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0300000, v[0:1]2562; GFX10-GISEL-NEXT: v_mul_f64 v[2:3], 0xc0300000, v[2:3]2563; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2564;2565; GFX11-SDAG-LABEL: v_mul_neg16_v2f64:2566; GFX11-SDAG: ; %bb.0:2567; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2568; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[0:1], 42569; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], -v[2:3], 42570; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2571;2572; GFX11-GISEL-LABEL: v_mul_neg16_v2f64:2573; GFX11-GISEL: ; %bb.0:2574; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2575; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0300000, v[0:1]2576; GFX11-GISEL-NEXT: v_mul_f64 v[2:3], 0xc0300000, v[2:3]2577; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2578 %mul = fmul <2 x double> %x, <double -16.0, double -16.0>2579 ret <2 x double> %mul2580}2581 2582define <2 x double> @v_mul_fabs_16_v2f64(<2 x double> %x) {2583; GFX9-SDAG-LABEL: v_mul_fabs_16_v2f64:2584; GFX9-SDAG: ; %bb.0:2585; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2586; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 42587; GFX9-SDAG-NEXT: v_ldexp_f64 v[2:3], |v[2:3]|, 42588; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]2589;2590; GFX9-GISEL-LABEL: v_mul_fabs_16_v2f64:2591; GFX9-GISEL: ; %bb.0:2592; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2593; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 02594; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x403000002595; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[4:5]2596; GFX9-GISEL-NEXT: v_mul_f64 v[2:3], |v[2:3]|, v[4:5]2597; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]2598;2599; GFX10-SDAG-LABEL: v_mul_fabs_16_v2f64:2600; GFX10-SDAG: ; %bb.0:2601; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2602; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 42603; GFX10-SDAG-NEXT: v_ldexp_f64 v[2:3], |v[2:3]|, 42604; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]2605;2606; GFX10-GISEL-LABEL: v_mul_fabs_16_v2f64:2607; GFX10-GISEL: ; %bb.0:2608; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2609; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40300000, |v[0:1]|2610; GFX10-GISEL-NEXT: v_mul_f64 v[2:3], 0x40300000, |v[2:3]|2611; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]2612;2613; GFX11-SDAG-LABEL: v_mul_fabs_16_v2f64:2614; GFX11-SDAG: ; %bb.0:2615; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2616; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 42617; GFX11-SDAG-NEXT: v_ldexp_f64 v[2:3], |v[2:3]|, 42618; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]2619;2620; GFX11-GISEL-LABEL: v_mul_fabs_16_v2f64:2621; GFX11-GISEL: ; %bb.0:2622; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2623; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40300000, |v[0:1]|2624; GFX11-GISEL-NEXT: v_mul_f64 v[2:3], 0x40300000, |v[2:3]|2625; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]2626 %x.fabs = call <2 x double> @llvm.fabs.v2f64(<2 x double> %x)2627 %mul = fmul <2 x double> %x.fabs, <double 16.0, double 16.0>2628 ret <2 x double> %mul2629}2630 2631define amdgpu_ps <2 x i32> @s_mul_32_f64(double inreg %x, double inreg %y) {2632; GFX9-SDAG-LABEL: s_mul_32_f64:2633; GFX9-SDAG: ; %bb.0:2634; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], s[0:1], 52635; GFX9-SDAG-NEXT: v_readfirstlane_b32 s0, v02636; GFX9-SDAG-NEXT: v_readfirstlane_b32 s1, v12637; GFX9-SDAG-NEXT: ; return to shader part epilog2638;2639; GFX9-GISEL-LABEL: s_mul_32_f64:2640; GFX9-GISEL: ; %bb.0:2641; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, 02642; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x404000002643; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], s[0:1], v[0:1]2644; GFX9-GISEL-NEXT: v_readfirstlane_b32 s0, v02645; GFX9-GISEL-NEXT: v_readfirstlane_b32 s1, v12646; GFX9-GISEL-NEXT: ; return to shader part epilog2647;2648; GFX10-SDAG-LABEL: s_mul_32_f64:2649; GFX10-SDAG: ; %bb.0:2650; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], s[0:1], 52651; GFX10-SDAG-NEXT: v_readfirstlane_b32 s0, v02652; GFX10-SDAG-NEXT: v_readfirstlane_b32 s1, v12653; GFX10-SDAG-NEXT: ; return to shader part epilog2654;2655; GFX10-GISEL-LABEL: s_mul_32_f64:2656; GFX10-GISEL: ; %bb.0:2657; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, s[0:1]2658; GFX10-GISEL-NEXT: v_readfirstlane_b32 s0, v02659; GFX10-GISEL-NEXT: v_readfirstlane_b32 s1, v12660; GFX10-GISEL-NEXT: ; return to shader part epilog2661;2662; GFX11-SDAG-LABEL: s_mul_32_f64:2663; GFX11-SDAG: ; %bb.0:2664; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], s[0:1], 52665; GFX11-SDAG-NEXT: v_readfirstlane_b32 s0, v02666; GFX11-SDAG-NEXT: v_readfirstlane_b32 s1, v12667; GFX11-SDAG-NEXT: ; return to shader part epilog2668;2669; GFX11-GISEL-LABEL: s_mul_32_f64:2670; GFX11-GISEL: ; %bb.0:2671; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40400000, s[0:1]2672; GFX11-GISEL-NEXT: v_readfirstlane_b32 s0, v02673; GFX11-GISEL-NEXT: v_readfirstlane_b32 s1, v12674; GFX11-GISEL-NEXT: ; return to shader part epilog2675 %mul = fmul contract double %x, 32.02676 %cast = bitcast double %mul to <2 x i32>2677 %cast.0 = extractelement <2 x i32> %cast, i32 02678 %cast.1 = extractelement <2 x i32> %cast, i32 12679 %readlane.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %cast.0)2680 %readlane.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %cast.1)2681 %insert.0 = insertelement <2 x i32> poison, i32 %readlane.0, i32 02682 %insert.1 = insertelement <2 x i32> %insert.0, i32 %readlane.1, i32 12683 ret <2 x i32> %insert.12684}2685 2686; 0x1p-232687define half @v_mul_0x1pn23_f16(half %x) {2688; GFX9-LABEL: v_mul_0x1pn23_f16:2689; GFX9: ; %bb.0:2690; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2691; GFX9-NEXT: v_mul_f16_e32 v0, 2, v02692; GFX9-NEXT: s_setpc_b64 s[30:31]2693;2694; GFX10-LABEL: v_mul_0x1pn23_f16:2695; GFX10: ; %bb.0:2696; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2697; GFX10-NEXT: v_mul_f16_e32 v0, 2, v02698; GFX10-NEXT: s_setpc_b64 s[30:31]2699;2700; GFX11-SDAG-TRUE16-LABEL: v_mul_0x1pn23_f16:2701; GFX11-SDAG-TRUE16: ; %bb.0:2702; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2703; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 2, v0.l2704; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2705;2706; GFX11-SDAG-FAKE16-LABEL: v_mul_0x1pn23_f16:2707; GFX11-SDAG-FAKE16: ; %bb.0:2708; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2709; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 2, v02710; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2711;2712; GFX11-GISEL-TRUE16-LABEL: v_mul_0x1pn23_f16:2713; GFX11-GISEL-TRUE16: ; %bb.0:2714; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2715; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 2, v0.l2716; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2717;2718; GFX11-GISEL-FAKE16-LABEL: v_mul_0x1pn23_f16:2719; GFX11-GISEL-FAKE16: ; %bb.0:2720; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2721; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 2, v02722; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2723 %mul = fmul half %x, 0xH00022724 ret half %mul2725}2726 2727; 0x1p-172728define half @v_mul_0x1pn17_f16(half %x) {2729; GFX9-LABEL: v_mul_0x1pn17_f16:2730; GFX9: ; %bb.0:2731; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2732; GFX9-NEXT: v_mul_f16_e32 v0, 0x80, v02733; GFX9-NEXT: s_setpc_b64 s[30:31]2734;2735; GFX10-LABEL: v_mul_0x1pn17_f16:2736; GFX10: ; %bb.0:2737; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2738; GFX10-NEXT: v_mul_f16_e32 v0, 0x80, v02739; GFX10-NEXT: s_setpc_b64 s[30:31]2740;2741; GFX11-SDAG-TRUE16-LABEL: v_mul_0x1pn17_f16:2742; GFX11-SDAG-TRUE16: ; %bb.0:2743; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2744; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x80, v0.l2745; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2746;2747; GFX11-SDAG-FAKE16-LABEL: v_mul_0x1pn17_f16:2748; GFX11-SDAG-FAKE16: ; %bb.0:2749; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2750; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x80, v02751; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2752;2753; GFX11-GISEL-TRUE16-LABEL: v_mul_0x1pn17_f16:2754; GFX11-GISEL-TRUE16: ; %bb.0:2755; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2756; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x80, v0.l2757; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2758;2759; GFX11-GISEL-FAKE16-LABEL: v_mul_0x1pn17_f16:2760; GFX11-GISEL-FAKE16: ; %bb.0:2761; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2762; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x80, v02763; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2764 %mul = fmul half %x, 0.000007629394531252765 ret half %mul2766}2767 2768; 0x1p-162769define half @v_mul_0x1pn16_f16(half %x) {2770; GFX9-LABEL: v_mul_0x1pn16_f16:2771; GFX9: ; %bb.0:2772; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2773; GFX9-NEXT: v_mul_f16_e32 v0, 0x100, v02774; GFX9-NEXT: s_setpc_b64 s[30:31]2775;2776; GFX10-LABEL: v_mul_0x1pn16_f16:2777; GFX10: ; %bb.0:2778; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2779; GFX10-NEXT: v_mul_f16_e32 v0, 0x100, v02780; GFX10-NEXT: s_setpc_b64 s[30:31]2781;2782; GFX11-SDAG-TRUE16-LABEL: v_mul_0x1pn16_f16:2783; GFX11-SDAG-TRUE16: ; %bb.0:2784; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2785; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x100, v0.l2786; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2787;2788; GFX11-SDAG-FAKE16-LABEL: v_mul_0x1pn16_f16:2789; GFX11-SDAG-FAKE16: ; %bb.0:2790; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2791; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x100, v02792; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2793;2794; GFX11-GISEL-TRUE16-LABEL: v_mul_0x1pn16_f16:2795; GFX11-GISEL-TRUE16: ; %bb.0:2796; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2797; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x100, v0.l2798; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2799;2800; GFX11-GISEL-FAKE16-LABEL: v_mul_0x1pn16_f16:2801; GFX11-GISEL-FAKE16: ; %bb.0:2802; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2803; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x100, v02804; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2805 %mul = fmul half %x, 0.00001525878906252806 ret half %mul2807}2808 2809; 0x1p-152810define half @v_mul_0x1pn15_f16(half %x) {2811; GFX9-LABEL: v_mul_0x1pn15_f16:2812; GFX9: ; %bb.0:2813; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2814; GFX9-NEXT: v_mul_f16_e32 v0, 0x200, v02815; GFX9-NEXT: s_setpc_b64 s[30:31]2816;2817; GFX10-LABEL: v_mul_0x1pn15_f16:2818; GFX10: ; %bb.0:2819; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2820; GFX10-NEXT: v_mul_f16_e32 v0, 0x200, v02821; GFX10-NEXT: s_setpc_b64 s[30:31]2822;2823; GFX11-SDAG-TRUE16-LABEL: v_mul_0x1pn15_f16:2824; GFX11-SDAG-TRUE16: ; %bb.0:2825; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2826; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x200, v0.l2827; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2828;2829; GFX11-SDAG-FAKE16-LABEL: v_mul_0x1pn15_f16:2830; GFX11-SDAG-FAKE16: ; %bb.0:2831; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2832; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x200, v02833; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2834;2835; GFX11-GISEL-TRUE16-LABEL: v_mul_0x1pn15_f16:2836; GFX11-GISEL-TRUE16: ; %bb.0:2837; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2838; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x200, v0.l2839; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2840;2841; GFX11-GISEL-FAKE16-LABEL: v_mul_0x1pn15_f16:2842; GFX11-GISEL-FAKE16: ; %bb.0:2843; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2844; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x200, v02845; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2846 %mul = fmul half %x, 0.0000305175781252847 ret half %mul2848}2849 2850define half @v_mul_neg256_f16(half %x) {2851; GFX9-LABEL: v_mul_neg256_f16:2852; GFX9: ; %bb.0:2853; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2854; GFX9-NEXT: v_mul_f16_e32 v0, 0xdc00, v02855; GFX9-NEXT: s_setpc_b64 s[30:31]2856;2857; GFX10-LABEL: v_mul_neg256_f16:2858; GFX10: ; %bb.0:2859; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2860; GFX10-NEXT: v_mul_f16_e32 v0, 0xdc00, v02861; GFX10-NEXT: s_setpc_b64 s[30:31]2862;2863; GFX11-SDAG-TRUE16-LABEL: v_mul_neg256_f16:2864; GFX11-SDAG-TRUE16: ; %bb.0:2865; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2866; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xdc00, v0.l2867; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2868;2869; GFX11-SDAG-FAKE16-LABEL: v_mul_neg256_f16:2870; GFX11-SDAG-FAKE16: ; %bb.0:2871; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2872; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xdc00, v02873; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2874;2875; GFX11-GISEL-TRUE16-LABEL: v_mul_neg256_f16:2876; GFX11-GISEL-TRUE16: ; %bb.0:2877; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2878; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xdc00, v0.l2879; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2880;2881; GFX11-GISEL-FAKE16-LABEL: v_mul_neg256_f16:2882; GFX11-GISEL-FAKE16: ; %bb.0:2883; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2884; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xdc00, v02885; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2886 %mul = fmul half %x, -256.02887 ret half %mul2888}2889 2890define half @v_mul_neg128_f16(half %x) {2891; GFX9-LABEL: v_mul_neg128_f16:2892; GFX9: ; %bb.0:2893; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2894; GFX9-NEXT: v_mul_f16_e32 v0, 0xd800, v02895; GFX9-NEXT: s_setpc_b64 s[30:31]2896;2897; GFX10-LABEL: v_mul_neg128_f16:2898; GFX10: ; %bb.0:2899; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2900; GFX10-NEXT: v_mul_f16_e32 v0, 0xd800, v02901; GFX10-NEXT: s_setpc_b64 s[30:31]2902;2903; GFX11-SDAG-TRUE16-LABEL: v_mul_neg128_f16:2904; GFX11-SDAG-TRUE16: ; %bb.0:2905; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2906; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xd800, v0.l2907; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2908;2909; GFX11-SDAG-FAKE16-LABEL: v_mul_neg128_f16:2910; GFX11-SDAG-FAKE16: ; %bb.0:2911; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2912; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xd800, v02913; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2914;2915; GFX11-GISEL-TRUE16-LABEL: v_mul_neg128_f16:2916; GFX11-GISEL-TRUE16: ; %bb.0:2917; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2918; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xd800, v0.l2919; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2920;2921; GFX11-GISEL-FAKE16-LABEL: v_mul_neg128_f16:2922; GFX11-GISEL-FAKE16: ; %bb.0:2923; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2924; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xd800, v02925; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2926 %mul = fmul half %x, -128.02927 ret half %mul2928}2929 2930define half @v_mul_neg64_f16(half %x) {2931; GFX9-LABEL: v_mul_neg64_f16:2932; GFX9: ; %bb.0:2933; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2934; GFX9-NEXT: v_mul_f16_e32 v0, 0xd400, v02935; GFX9-NEXT: s_setpc_b64 s[30:31]2936;2937; GFX10-LABEL: v_mul_neg64_f16:2938; GFX10: ; %bb.0:2939; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2940; GFX10-NEXT: v_mul_f16_e32 v0, 0xd400, v02941; GFX10-NEXT: s_setpc_b64 s[30:31]2942;2943; GFX11-SDAG-TRUE16-LABEL: v_mul_neg64_f16:2944; GFX11-SDAG-TRUE16: ; %bb.0:2945; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2946; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xd400, v0.l2947; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2948;2949; GFX11-SDAG-FAKE16-LABEL: v_mul_neg64_f16:2950; GFX11-SDAG-FAKE16: ; %bb.0:2951; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2952; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xd400, v02953; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2954;2955; GFX11-GISEL-TRUE16-LABEL: v_mul_neg64_f16:2956; GFX11-GISEL-TRUE16: ; %bb.0:2957; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2958; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xd400, v0.l2959; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]2960;2961; GFX11-GISEL-FAKE16-LABEL: v_mul_neg64_f16:2962; GFX11-GISEL-FAKE16: ; %bb.0:2963; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2964; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xd400, v02965; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]2966 %mul = fmul half %x, -64.02967 ret half %mul2968}2969 2970define half @v_mul_neg32_f16(half %x) {2971; GFX9-LABEL: v_mul_neg32_f16:2972; GFX9: ; %bb.0:2973; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2974; GFX9-NEXT: v_mul_f16_e32 v0, 0xd000, v02975; GFX9-NEXT: s_setpc_b64 s[30:31]2976;2977; GFX10-LABEL: v_mul_neg32_f16:2978; GFX10: ; %bb.0:2979; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2980; GFX10-NEXT: v_mul_f16_e32 v0, 0xd000, v02981; GFX10-NEXT: s_setpc_b64 s[30:31]2982;2983; GFX11-SDAG-TRUE16-LABEL: v_mul_neg32_f16:2984; GFX11-SDAG-TRUE16: ; %bb.0:2985; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2986; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xd000, v0.l2987; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]2988;2989; GFX11-SDAG-FAKE16-LABEL: v_mul_neg32_f16:2990; GFX11-SDAG-FAKE16: ; %bb.0:2991; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2992; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xd000, v02993; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]2994;2995; GFX11-GISEL-TRUE16-LABEL: v_mul_neg32_f16:2996; GFX11-GISEL-TRUE16: ; %bb.0:2997; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2998; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xd000, v0.l2999; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3000;3001; GFX11-GISEL-FAKE16-LABEL: v_mul_neg32_f16:3002; GFX11-GISEL-FAKE16: ; %bb.0:3003; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3004; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xd000, v03005; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3006 %mul = fmul half %x, -32.03007 ret half %mul3008}3009 3010define half @v_mul_neg16_f16(half %x) {3011; GFX9-LABEL: v_mul_neg16_f16:3012; GFX9: ; %bb.0:3013; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3014; GFX9-NEXT: v_mul_f16_e32 v0, 0xcc00, v03015; GFX9-NEXT: s_setpc_b64 s[30:31]3016;3017; GFX10-LABEL: v_mul_neg16_f16:3018; GFX10: ; %bb.0:3019; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3020; GFX10-NEXT: v_mul_f16_e32 v0, 0xcc00, v03021; GFX10-NEXT: s_setpc_b64 s[30:31]3022;3023; GFX11-SDAG-TRUE16-LABEL: v_mul_neg16_f16:3024; GFX11-SDAG-TRUE16: ; %bb.0:3025; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3026; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xcc00, v0.l3027; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3028;3029; GFX11-SDAG-FAKE16-LABEL: v_mul_neg16_f16:3030; GFX11-SDAG-FAKE16: ; %bb.0:3031; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3032; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xcc00, v03033; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3034;3035; GFX11-GISEL-TRUE16-LABEL: v_mul_neg16_f16:3036; GFX11-GISEL-TRUE16: ; %bb.0:3037; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3038; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xcc00, v0.l3039; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3040;3041; GFX11-GISEL-FAKE16-LABEL: v_mul_neg16_f16:3042; GFX11-GISEL-FAKE16: ; %bb.0:3043; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3044; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xcc00, v03045; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3046 %mul = fmul half %x, -16.03047 ret half %mul3048}3049 3050define half @v_mul_neg8_f16(half %x) {3051; GFX9-LABEL: v_mul_neg8_f16:3052; GFX9: ; %bb.0:3053; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3054; GFX9-NEXT: v_mul_f16_e32 v0, 0xc800, v03055; GFX9-NEXT: s_setpc_b64 s[30:31]3056;3057; GFX10-LABEL: v_mul_neg8_f16:3058; GFX10: ; %bb.0:3059; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3060; GFX10-NEXT: v_mul_f16_e32 v0, 0xc800, v03061; GFX10-NEXT: s_setpc_b64 s[30:31]3062;3063; GFX11-SDAG-TRUE16-LABEL: v_mul_neg8_f16:3064; GFX11-SDAG-TRUE16: ; %bb.0:3065; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3066; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xc800, v0.l3067; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3068;3069; GFX11-SDAG-FAKE16-LABEL: v_mul_neg8_f16:3070; GFX11-SDAG-FAKE16: ; %bb.0:3071; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3072; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xc800, v03073; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3074;3075; GFX11-GISEL-TRUE16-LABEL: v_mul_neg8_f16:3076; GFX11-GISEL-TRUE16: ; %bb.0:3077; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3078; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xc800, v0.l3079; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3080;3081; GFX11-GISEL-FAKE16-LABEL: v_mul_neg8_f16:3082; GFX11-GISEL-FAKE16: ; %bb.0:3083; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3084; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xc800, v03085; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3086 %mul = fmul half %x, -8.03087 ret half %mul3088}3089 3090define half @v_mul_neg4_f16(half %x) {3091; GFX9-LABEL: v_mul_neg4_f16:3092; GFX9: ; %bb.0:3093; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3094; GFX9-NEXT: v_mul_f16_e32 v0, -4.0, v03095; GFX9-NEXT: s_setpc_b64 s[30:31]3096;3097; GFX10-LABEL: v_mul_neg4_f16:3098; GFX10: ; %bb.0:3099; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3100; GFX10-NEXT: v_mul_f16_e32 v0, -4.0, v03101; GFX10-NEXT: s_setpc_b64 s[30:31]3102;3103; GFX11-SDAG-TRUE16-LABEL: v_mul_neg4_f16:3104; GFX11-SDAG-TRUE16: ; %bb.0:3105; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3106; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, -4.0, v0.l3107; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3108;3109; GFX11-SDAG-FAKE16-LABEL: v_mul_neg4_f16:3110; GFX11-SDAG-FAKE16: ; %bb.0:3111; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3112; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, -4.0, v03113; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3114;3115; GFX11-GISEL-TRUE16-LABEL: v_mul_neg4_f16:3116; GFX11-GISEL-TRUE16: ; %bb.0:3117; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3118; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, -4.0, v0.l3119; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3120;3121; GFX11-GISEL-FAKE16-LABEL: v_mul_neg4_f16:3122; GFX11-GISEL-FAKE16: ; %bb.0:3123; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3124; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, -4.0, v03125; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3126 %mul = fmul half %x, -4.03127 ret half %mul3128}3129 3130define half @v_mul_neg2_f16(half %x) {3131; GFX9-LABEL: v_mul_neg2_f16:3132; GFX9: ; %bb.0:3133; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3134; GFX9-NEXT: v_mul_f16_e32 v0, -2.0, v03135; GFX9-NEXT: s_setpc_b64 s[30:31]3136;3137; GFX10-LABEL: v_mul_neg2_f16:3138; GFX10: ; %bb.0:3139; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3140; GFX10-NEXT: v_mul_f16_e32 v0, -2.0, v03141; GFX10-NEXT: s_setpc_b64 s[30:31]3142;3143; GFX11-SDAG-TRUE16-LABEL: v_mul_neg2_f16:3144; GFX11-SDAG-TRUE16: ; %bb.0:3145; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3146; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, -2.0, v0.l3147; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3148;3149; GFX11-SDAG-FAKE16-LABEL: v_mul_neg2_f16:3150; GFX11-SDAG-FAKE16: ; %bb.0:3151; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3152; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, -2.0, v03153; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3154;3155; GFX11-GISEL-TRUE16-LABEL: v_mul_neg2_f16:3156; GFX11-GISEL-TRUE16: ; %bb.0:3157; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3158; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, -2.0, v0.l3159; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3160;3161; GFX11-GISEL-FAKE16-LABEL: v_mul_neg2_f16:3162; GFX11-GISEL-FAKE16: ; %bb.0:3163; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3164; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, -2.0, v03165; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3166 %mul = fmul half %x, -2.03167 ret half %mul3168}3169 3170define half @v_mul_neg1_f16(half %x) {3171; GFX9-LABEL: v_mul_neg1_f16:3172; GFX9: ; %bb.0:3173; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3174; GFX9-NEXT: v_xor_b32_e32 v0, 0x8000, v03175; GFX9-NEXT: s_setpc_b64 s[30:31]3176;3177; GFX10-LABEL: v_mul_neg1_f16:3178; GFX10: ; %bb.0:3179; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3180; GFX10-NEXT: v_xor_b32_e32 v0, 0x8000, v03181; GFX10-NEXT: s_setpc_b64 s[30:31]3182;3183; GFX11-SDAG-TRUE16-LABEL: v_mul_neg1_f16:3184; GFX11-SDAG-TRUE16: ; %bb.0:3185; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3186; GFX11-SDAG-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.l3187; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3188;3189; GFX11-SDAG-FAKE16-LABEL: v_mul_neg1_f16:3190; GFX11-SDAG-FAKE16: ; %bb.0:3191; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3192; GFX11-SDAG-FAKE16-NEXT: v_xor_b32_e32 v0, 0x8000, v03193; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3194;3195; GFX11-GISEL-TRUE16-LABEL: v_mul_neg1_f16:3196; GFX11-GISEL-TRUE16: ; %bb.0:3197; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3198; GFX11-GISEL-TRUE16-NEXT: v_xor_b16 v0.l, 0x8000, v0.l3199; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3200;3201; GFX11-GISEL-FAKE16-LABEL: v_mul_neg1_f16:3202; GFX11-GISEL-FAKE16: ; %bb.0:3203; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3204; GFX11-GISEL-FAKE16-NEXT: v_xor_b32_e32 v0, 0x8000, v03205; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3206 %mul = fmul half %x, -1.03207 ret half %mul3208}3209 3210define half @v_mul_neg_half_f16(half %x) {3211; GFX9-LABEL: v_mul_neg_half_f16:3212; GFX9: ; %bb.0:3213; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3214; GFX9-NEXT: v_mul_f16_e32 v0, -0.5, v03215; GFX9-NEXT: s_setpc_b64 s[30:31]3216;3217; GFX10-LABEL: v_mul_neg_half_f16:3218; GFX10: ; %bb.0:3219; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3220; GFX10-NEXT: v_mul_f16_e32 v0, -0.5, v03221; GFX10-NEXT: s_setpc_b64 s[30:31]3222;3223; GFX11-SDAG-TRUE16-LABEL: v_mul_neg_half_f16:3224; GFX11-SDAG-TRUE16: ; %bb.0:3225; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3226; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, -0.5, v0.l3227; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3228;3229; GFX11-SDAG-FAKE16-LABEL: v_mul_neg_half_f16:3230; GFX11-SDAG-FAKE16: ; %bb.0:3231; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3232; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, -0.5, v03233; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3234;3235; GFX11-GISEL-TRUE16-LABEL: v_mul_neg_half_f16:3236; GFX11-GISEL-TRUE16: ; %bb.0:3237; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3238; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, -0.5, v0.l3239; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3240;3241; GFX11-GISEL-FAKE16-LABEL: v_mul_neg_half_f16:3242; GFX11-GISEL-FAKE16: ; %bb.0:3243; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3244; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, -0.5, v03245; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3246 %mul = fmul half %x, -0.53247 ret half %mul3248}3249 3250define half @v_mul_neg_quarter_f16(half %x) {3251; GFX9-LABEL: v_mul_neg_quarter_f16:3252; GFX9: ; %bb.0:3253; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3254; GFX9-NEXT: v_mul_f16_e32 v0, 0xb400, v03255; GFX9-NEXT: s_setpc_b64 s[30:31]3256;3257; GFX10-LABEL: v_mul_neg_quarter_f16:3258; GFX10: ; %bb.0:3259; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3260; GFX10-NEXT: v_mul_f16_e32 v0, 0xb400, v03261; GFX10-NEXT: s_setpc_b64 s[30:31]3262;3263; GFX11-SDAG-TRUE16-LABEL: v_mul_neg_quarter_f16:3264; GFX11-SDAG-TRUE16: ; %bb.0:3265; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3266; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xb400, v0.l3267; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3268;3269; GFX11-SDAG-FAKE16-LABEL: v_mul_neg_quarter_f16:3270; GFX11-SDAG-FAKE16: ; %bb.0:3271; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3272; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0xb400, v03273; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3274;3275; GFX11-GISEL-TRUE16-LABEL: v_mul_neg_quarter_f16:3276; GFX11-GISEL-TRUE16: ; %bb.0:3277; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3278; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0xb400, v0.l3279; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3280;3281; GFX11-GISEL-FAKE16-LABEL: v_mul_neg_quarter_f16:3282; GFX11-GISEL-FAKE16: ; %bb.0:3283; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3284; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0xb400, v03285; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3286 %mul = fmul half %x, -0.253287 ret half %mul3288}3289 3290define half @v_mul_quarter_f16(half %x) {3291; GFX9-LABEL: v_mul_quarter_f16:3292; GFX9: ; %bb.0:3293; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3294; GFX9-NEXT: v_mul_f16_e32 v0, 0x3400, v03295; GFX9-NEXT: s_setpc_b64 s[30:31]3296;3297; GFX10-LABEL: v_mul_quarter_f16:3298; GFX10: ; %bb.0:3299; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3300; GFX10-NEXT: v_mul_f16_e32 v0, 0x3400, v03301; GFX10-NEXT: s_setpc_b64 s[30:31]3302;3303; GFX11-SDAG-TRUE16-LABEL: v_mul_quarter_f16:3304; GFX11-SDAG-TRUE16: ; %bb.0:3305; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3306; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x3400, v0.l3307; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3308;3309; GFX11-SDAG-FAKE16-LABEL: v_mul_quarter_f16:3310; GFX11-SDAG-FAKE16: ; %bb.0:3311; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3312; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x3400, v03313; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3314;3315; GFX11-GISEL-TRUE16-LABEL: v_mul_quarter_f16:3316; GFX11-GISEL-TRUE16: ; %bb.0:3317; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3318; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x3400, v0.l3319; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3320;3321; GFX11-GISEL-FAKE16-LABEL: v_mul_quarter_f16:3322; GFX11-GISEL-FAKE16: ; %bb.0:3323; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3324; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x3400, v03325; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3326 %mul = fmul half %x, 0.253327 ret half %mul3328}3329 3330define half @v_mul_half_f16(half %x) {3331; GFX9-LABEL: v_mul_half_f16:3332; GFX9: ; %bb.0:3333; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3334; GFX9-NEXT: v_mul_f16_e32 v0, 0.5, v03335; GFX9-NEXT: s_setpc_b64 s[30:31]3336;3337; GFX10-LABEL: v_mul_half_f16:3338; GFX10: ; %bb.0:3339; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3340; GFX10-NEXT: v_mul_f16_e32 v0, 0.5, v03341; GFX10-NEXT: s_setpc_b64 s[30:31]3342;3343; GFX11-SDAG-TRUE16-LABEL: v_mul_half_f16:3344; GFX11-SDAG-TRUE16: ; %bb.0:3345; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3346; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0.5, v0.l3347; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3348;3349; GFX11-SDAG-FAKE16-LABEL: v_mul_half_f16:3350; GFX11-SDAG-FAKE16: ; %bb.0:3351; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3352; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0.5, v03353; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3354;3355; GFX11-GISEL-TRUE16-LABEL: v_mul_half_f16:3356; GFX11-GISEL-TRUE16: ; %bb.0:3357; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3358; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0.5, v0.l3359; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3360;3361; GFX11-GISEL-FAKE16-LABEL: v_mul_half_f16:3362; GFX11-GISEL-FAKE16: ; %bb.0:3363; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3364; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0.5, v03365; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3366 %mul = fmul half %x, 0.53367 ret half %mul3368}3369 3370define half @v_mul_1_f16(half %x) {3371; GCN-LABEL: v_mul_1_f16:3372; GCN: ; %bb.0:3373; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3374; GCN-NEXT: s_setpc_b64 s[30:31]3375 %mul = fmul half %x, 1.03376 ret half %mul3377}3378 3379define half @v_mul_2_f16(half %x) {3380; GFX9-SDAG-LABEL: v_mul_2_f16:3381; GFX9-SDAG: ; %bb.0:3382; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3383; GFX9-SDAG-NEXT: v_add_f16_e32 v0, v0, v03384; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]3385;3386; GFX9-GISEL-LABEL: v_mul_2_f16:3387; GFX9-GISEL: ; %bb.0:3388; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3389; GFX9-GISEL-NEXT: v_mul_f16_e32 v0, 2.0, v03390; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]3391;3392; GFX10-SDAG-LABEL: v_mul_2_f16:3393; GFX10-SDAG: ; %bb.0:3394; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3395; GFX10-SDAG-NEXT: v_add_f16_e32 v0, v0, v03396; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]3397;3398; GFX10-GISEL-LABEL: v_mul_2_f16:3399; GFX10-GISEL: ; %bb.0:3400; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3401; GFX10-GISEL-NEXT: v_mul_f16_e32 v0, 2.0, v03402; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]3403;3404; GFX11-SDAG-TRUE16-LABEL: v_mul_2_f16:3405; GFX11-SDAG-TRUE16: ; %bb.0:3406; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3407; GFX11-SDAG-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v0.l3408; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3409;3410; GFX11-SDAG-FAKE16-LABEL: v_mul_2_f16:3411; GFX11-SDAG-FAKE16: ; %bb.0:3412; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3413; GFX11-SDAG-FAKE16-NEXT: v_add_f16_e32 v0, v0, v03414; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3415;3416; GFX11-GISEL-TRUE16-LABEL: v_mul_2_f16:3417; GFX11-GISEL-TRUE16: ; %bb.0:3418; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3419; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 2.0, v0.l3420; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3421;3422; GFX11-GISEL-FAKE16-LABEL: v_mul_2_f16:3423; GFX11-GISEL-FAKE16: ; %bb.0:3424; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3425; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 2.0, v03426; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3427 %mul = fmul half %x, 2.03428 ret half %mul3429}3430 3431define half @v_mul_4_f16(half %x) {3432; GFX9-LABEL: v_mul_4_f16:3433; GFX9: ; %bb.0:3434; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3435; GFX9-NEXT: v_mul_f16_e32 v0, 4.0, v03436; GFX9-NEXT: s_setpc_b64 s[30:31]3437;3438; GFX10-LABEL: v_mul_4_f16:3439; GFX10: ; %bb.0:3440; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3441; GFX10-NEXT: v_mul_f16_e32 v0, 4.0, v03442; GFX10-NEXT: s_setpc_b64 s[30:31]3443;3444; GFX11-SDAG-TRUE16-LABEL: v_mul_4_f16:3445; GFX11-SDAG-TRUE16: ; %bb.0:3446; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3447; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 4.0, v0.l3448; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3449;3450; GFX11-SDAG-FAKE16-LABEL: v_mul_4_f16:3451; GFX11-SDAG-FAKE16: ; %bb.0:3452; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3453; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 4.0, v03454; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3455;3456; GFX11-GISEL-TRUE16-LABEL: v_mul_4_f16:3457; GFX11-GISEL-TRUE16: ; %bb.0:3458; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3459; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 4.0, v0.l3460; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3461;3462; GFX11-GISEL-FAKE16-LABEL: v_mul_4_f16:3463; GFX11-GISEL-FAKE16: ; %bb.0:3464; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3465; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 4.0, v03466; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3467 %mul = fmul half %x, 4.03468 ret half %mul3469}3470 3471define half @v_mul_8_f16(half %x) {3472; GFX9-LABEL: v_mul_8_f16:3473; GFX9: ; %bb.0:3474; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3475; GFX9-NEXT: v_mul_f16_e32 v0, 0x4800, v03476; GFX9-NEXT: s_setpc_b64 s[30:31]3477;3478; GFX10-LABEL: v_mul_8_f16:3479; GFX10: ; %bb.0:3480; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3481; GFX10-NEXT: v_mul_f16_e32 v0, 0x4800, v03482; GFX10-NEXT: s_setpc_b64 s[30:31]3483;3484; GFX11-SDAG-TRUE16-LABEL: v_mul_8_f16:3485; GFX11-SDAG-TRUE16: ; %bb.0:3486; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3487; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x4800, v0.l3488; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3489;3490; GFX11-SDAG-FAKE16-LABEL: v_mul_8_f16:3491; GFX11-SDAG-FAKE16: ; %bb.0:3492; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3493; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x4800, v03494; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3495;3496; GFX11-GISEL-TRUE16-LABEL: v_mul_8_f16:3497; GFX11-GISEL-TRUE16: ; %bb.0:3498; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3499; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x4800, v0.l3500; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3501;3502; GFX11-GISEL-FAKE16-LABEL: v_mul_8_f16:3503; GFX11-GISEL-FAKE16: ; %bb.0:3504; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3505; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x4800, v03506; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3507 %mul = fmul half %x, 8.03508 ret half %mul3509}3510 3511define half @v_mul_16_f16(half %x) {3512; GFX9-LABEL: v_mul_16_f16:3513; GFX9: ; %bb.0:3514; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3515; GFX9-NEXT: v_mul_f16_e32 v0, 0x4c00, v03516; GFX9-NEXT: s_setpc_b64 s[30:31]3517;3518; GFX10-LABEL: v_mul_16_f16:3519; GFX10: ; %bb.0:3520; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3521; GFX10-NEXT: v_mul_f16_e32 v0, 0x4c00, v03522; GFX10-NEXT: s_setpc_b64 s[30:31]3523;3524; GFX11-SDAG-TRUE16-LABEL: v_mul_16_f16:3525; GFX11-SDAG-TRUE16: ; %bb.0:3526; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3527; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x4c00, v0.l3528; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3529;3530; GFX11-SDAG-FAKE16-LABEL: v_mul_16_f16:3531; GFX11-SDAG-FAKE16: ; %bb.0:3532; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3533; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x4c00, v03534; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3535;3536; GFX11-GISEL-TRUE16-LABEL: v_mul_16_f16:3537; GFX11-GISEL-TRUE16: ; %bb.0:3538; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3539; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x4c00, v0.l3540; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3541;3542; GFX11-GISEL-FAKE16-LABEL: v_mul_16_f16:3543; GFX11-GISEL-FAKE16: ; %bb.0:3544; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3545; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x4c00, v03546; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3547 %mul = fmul half %x, 16.03548 ret half %mul3549}3550 3551define half @v_mul_32_f16(half %x) {3552; GFX9-LABEL: v_mul_32_f16:3553; GFX9: ; %bb.0:3554; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3555; GFX9-NEXT: v_mul_f16_e32 v0, 0x5000, v03556; GFX9-NEXT: s_setpc_b64 s[30:31]3557;3558; GFX10-LABEL: v_mul_32_f16:3559; GFX10: ; %bb.0:3560; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3561; GFX10-NEXT: v_mul_f16_e32 v0, 0x5000, v03562; GFX10-NEXT: s_setpc_b64 s[30:31]3563;3564; GFX11-SDAG-TRUE16-LABEL: v_mul_32_f16:3565; GFX11-SDAG-TRUE16: ; %bb.0:3566; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3567; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5000, v0.l3568; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3569;3570; GFX11-SDAG-FAKE16-LABEL: v_mul_32_f16:3571; GFX11-SDAG-FAKE16: ; %bb.0:3572; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3573; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5000, v03574; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3575;3576; GFX11-GISEL-TRUE16-LABEL: v_mul_32_f16:3577; GFX11-GISEL-TRUE16: ; %bb.0:3578; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3579; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5000, v0.l3580; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3581;3582; GFX11-GISEL-FAKE16-LABEL: v_mul_32_f16:3583; GFX11-GISEL-FAKE16: ; %bb.0:3584; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3585; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5000, v03586; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3587 %mul = fmul half %x, 32.03588 ret half %mul3589}3590 3591define half @v_mul_64_f16(half %x) {3592; GFX9-LABEL: v_mul_64_f16:3593; GFX9: ; %bb.0:3594; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3595; GFX9-NEXT: v_mul_f16_e32 v0, 0x5400, v03596; GFX9-NEXT: s_setpc_b64 s[30:31]3597;3598; GFX10-LABEL: v_mul_64_f16:3599; GFX10: ; %bb.0:3600; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3601; GFX10-NEXT: v_mul_f16_e32 v0, 0x5400, v03602; GFX10-NEXT: s_setpc_b64 s[30:31]3603;3604; GFX11-SDAG-TRUE16-LABEL: v_mul_64_f16:3605; GFX11-SDAG-TRUE16: ; %bb.0:3606; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3607; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5400, v0.l3608; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3609;3610; GFX11-SDAG-FAKE16-LABEL: v_mul_64_f16:3611; GFX11-SDAG-FAKE16: ; %bb.0:3612; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3613; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5400, v03614; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3615;3616; GFX11-GISEL-TRUE16-LABEL: v_mul_64_f16:3617; GFX11-GISEL-TRUE16: ; %bb.0:3618; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3619; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5400, v0.l3620; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3621;3622; GFX11-GISEL-FAKE16-LABEL: v_mul_64_f16:3623; GFX11-GISEL-FAKE16: ; %bb.0:3624; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3625; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5400, v03626; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3627 %mul = fmul half %x, 64.03628 ret half %mul3629}3630 3631define half @v_mul_128_f16(half %x) {3632; GFX9-LABEL: v_mul_128_f16:3633; GFX9: ; %bb.0:3634; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3635; GFX9-NEXT: v_mul_f16_e32 v0, 0x5800, v03636; GFX9-NEXT: s_setpc_b64 s[30:31]3637;3638; GFX10-LABEL: v_mul_128_f16:3639; GFX10: ; %bb.0:3640; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3641; GFX10-NEXT: v_mul_f16_e32 v0, 0x5800, v03642; GFX10-NEXT: s_setpc_b64 s[30:31]3643;3644; GFX11-SDAG-TRUE16-LABEL: v_mul_128_f16:3645; GFX11-SDAG-TRUE16: ; %bb.0:3646; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3647; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5800, v0.l3648; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3649;3650; GFX11-SDAG-FAKE16-LABEL: v_mul_128_f16:3651; GFX11-SDAG-FAKE16: ; %bb.0:3652; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3653; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5800, v03654; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3655;3656; GFX11-GISEL-TRUE16-LABEL: v_mul_128_f16:3657; GFX11-GISEL-TRUE16: ; %bb.0:3658; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3659; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5800, v0.l3660; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3661;3662; GFX11-GISEL-FAKE16-LABEL: v_mul_128_f16:3663; GFX11-GISEL-FAKE16: ; %bb.0:3664; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3665; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5800, v03666; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3667 %mul = fmul half %x, 128.03668 ret half %mul3669}3670 3671define half @v_mul_256_f16(half %x) {3672; GFX9-LABEL: v_mul_256_f16:3673; GFX9: ; %bb.0:3674; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3675; GFX9-NEXT: v_mul_f16_e32 v0, 0x5c00, v03676; GFX9-NEXT: s_setpc_b64 s[30:31]3677;3678; GFX10-LABEL: v_mul_256_f16:3679; GFX10: ; %bb.0:3680; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3681; GFX10-NEXT: v_mul_f16_e32 v0, 0x5c00, v03682; GFX10-NEXT: s_setpc_b64 s[30:31]3683;3684; GFX11-SDAG-TRUE16-LABEL: v_mul_256_f16:3685; GFX11-SDAG-TRUE16: ; %bb.0:3686; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3687; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5c00, v0.l3688; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3689;3690; GFX11-SDAG-FAKE16-LABEL: v_mul_256_f16:3691; GFX11-SDAG-FAKE16: ; %bb.0:3692; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3693; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5c00, v03694; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3695;3696; GFX11-GISEL-TRUE16-LABEL: v_mul_256_f16:3697; GFX11-GISEL-TRUE16: ; %bb.0:3698; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3699; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5c00, v0.l3700; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3701;3702; GFX11-GISEL-FAKE16-LABEL: v_mul_256_f16:3703; GFX11-GISEL-FAKE16: ; %bb.0:3704; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3705; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5c00, v03706; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3707 %mul = fmul half %x, 256.03708 ret half %mul3709}3710 3711; 0x1p+153712define half @v_mul_0x1p15_f16(half %x) {3713; GFX9-LABEL: v_mul_0x1p15_f16:3714; GFX9: ; %bb.0:3715; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3716; GFX9-NEXT: v_mul_f16_e32 v0, 0x7800, v03717; GFX9-NEXT: s_setpc_b64 s[30:31]3718;3719; GFX10-LABEL: v_mul_0x1p15_f16:3720; GFX10: ; %bb.0:3721; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3722; GFX10-NEXT: v_mul_f16_e32 v0, 0x7800, v03723; GFX10-NEXT: s_setpc_b64 s[30:31]3724;3725; GFX11-SDAG-TRUE16-LABEL: v_mul_0x1p15_f16:3726; GFX11-SDAG-TRUE16: ; %bb.0:3727; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3728; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x7800, v0.l3729; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3730;3731; GFX11-SDAG-FAKE16-LABEL: v_mul_0x1p15_f16:3732; GFX11-SDAG-FAKE16: ; %bb.0:3733; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3734; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x7800, v03735; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3736;3737; GFX11-GISEL-TRUE16-LABEL: v_mul_0x1p15_f16:3738; GFX11-GISEL-TRUE16: ; %bb.0:3739; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3740; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x7800, v0.l3741; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3742;3743; GFX11-GISEL-FAKE16-LABEL: v_mul_0x1p15_f16:3744; GFX11-GISEL-FAKE16: ; %bb.0:3745; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3746; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x7800, v03747; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3748 %mul = fmul half %x, 32768.03749 ret half %mul3750}3751 3752; 0x1p+143753define half @v_mul_0x1p14_f16(half %x) {3754; GFX9-LABEL: v_mul_0x1p14_f16:3755; GFX9: ; %bb.0:3756; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3757; GFX9-NEXT: v_mul_f16_e32 v0, 0x7400, v03758; GFX9-NEXT: s_setpc_b64 s[30:31]3759;3760; GFX10-LABEL: v_mul_0x1p14_f16:3761; GFX10: ; %bb.0:3762; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3763; GFX10-NEXT: v_mul_f16_e32 v0, 0x7400, v03764; GFX10-NEXT: s_setpc_b64 s[30:31]3765;3766; GFX11-SDAG-TRUE16-LABEL: v_mul_0x1p14_f16:3767; GFX11-SDAG-TRUE16: ; %bb.0:3768; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3769; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x7400, v0.l3770; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3771;3772; GFX11-SDAG-FAKE16-LABEL: v_mul_0x1p14_f16:3773; GFX11-SDAG-FAKE16: ; %bb.0:3774; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3775; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x7400, v03776; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3777;3778; GFX11-GISEL-TRUE16-LABEL: v_mul_0x1p14_f16:3779; GFX11-GISEL-TRUE16: ; %bb.0:3780; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3781; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x7400, v0.l3782; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3783;3784; GFX11-GISEL-FAKE16-LABEL: v_mul_0x1p14_f16:3785; GFX11-GISEL-FAKE16: ; %bb.0:3786; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3787; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x7400, v03788; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3789 %mul = fmul half %x, 16384.03790 ret half %mul3791}3792 3793; Check that this doesn't interfer with fma formation3794define half @v_fma_mul_add_32_f16(half %x, half %y) {3795; GFX9-SDAG-LABEL: v_fma_mul_add_32_f16:3796; GFX9-SDAG: ; %bb.0:3797; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3798; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x50003799; GFX9-SDAG-NEXT: v_fma_f16 v0, v0, s4, v13800; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]3801;3802; GFX9-GISEL-LABEL: v_fma_mul_add_32_f16:3803; GFX9-GISEL: ; %bb.0:3804; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3805; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x50003806; GFX9-GISEL-NEXT: v_fma_f16 v0, v0, v2, v13807; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]3808;3809; GFX10-LABEL: v_fma_mul_add_32_f16:3810; GFX10: ; %bb.0:3811; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3812; GFX10-NEXT: v_fmamk_f16 v0, v0, 0x5000, v13813; GFX10-NEXT: s_setpc_b64 s[30:31]3814;3815; GFX11-SDAG-TRUE16-LABEL: v_fma_mul_add_32_f16:3816; GFX11-SDAG-TRUE16: ; %bb.0:3817; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3818; GFX11-SDAG-TRUE16-NEXT: v_fmamk_f16 v0.l, v0.l, 0x5000, v1.l3819; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3820;3821; GFX11-SDAG-FAKE16-LABEL: v_fma_mul_add_32_f16:3822; GFX11-SDAG-FAKE16: ; %bb.0:3823; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3824; GFX11-SDAG-FAKE16-NEXT: v_fmamk_f16 v0, v0, 0x5000, v13825; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3826;3827; GFX11-GISEL-TRUE16-LABEL: v_fma_mul_add_32_f16:3828; GFX11-GISEL-TRUE16: ; %bb.0:3829; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3830; GFX11-GISEL-TRUE16-NEXT: v_fmac_f16_e32 v1.l, 0x5000, v0.l3831; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v0, v13832; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3833;3834; GFX11-GISEL-FAKE16-LABEL: v_fma_mul_add_32_f16:3835; GFX11-GISEL-FAKE16: ; %bb.0:3836; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3837; GFX11-GISEL-FAKE16-NEXT: v_fmamk_f16 v0, v0, 0x5000, v13838; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3839 %mul = fmul contract half %x, 32.03840 %fma = fadd contract half %mul, %y3841 ret half %fma3842}3843 3844define half @v_fma_mul_sub_32_f16(half %x, half %y) {3845; GFX9-SDAG-LABEL: v_fma_mul_sub_32_f16:3846; GFX9-SDAG: ; %bb.0:3847; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3848; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x50003849; GFX9-SDAG-NEXT: v_fma_f16 v0, v0, s4, -v13850; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]3851;3852; GFX9-GISEL-LABEL: v_fma_mul_sub_32_f16:3853; GFX9-GISEL: ; %bb.0:3854; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3855; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x50003856; GFX9-GISEL-NEXT: v_fma_f16 v0, v0, v2, -v13857; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]3858;3859; GFX10-LABEL: v_fma_mul_sub_32_f16:3860; GFX10: ; %bb.0:3861; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3862; GFX10-NEXT: v_fma_f16 v0, v0, 0x5000, -v13863; GFX10-NEXT: s_setpc_b64 s[30:31]3864;3865; GFX11-SDAG-TRUE16-LABEL: v_fma_mul_sub_32_f16:3866; GFX11-SDAG-TRUE16: ; %bb.0:3867; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3868; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v0.l, 0x5000, -v1.l3869; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3870;3871; GFX11-SDAG-FAKE16-LABEL: v_fma_mul_sub_32_f16:3872; GFX11-SDAG-FAKE16: ; %bb.0:3873; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3874; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v0, 0x5000, -v13875; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3876;3877; GFX11-GISEL-TRUE16-LABEL: v_fma_mul_sub_32_f16:3878; GFX11-GISEL-TRUE16: ; %bb.0:3879; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3880; GFX11-GISEL-TRUE16-NEXT: v_fma_f16 v0.l, v0.l, 0x5000, -v1.l3881; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3882;3883; GFX11-GISEL-FAKE16-LABEL: v_fma_mul_sub_32_f16:3884; GFX11-GISEL-FAKE16: ; %bb.0:3885; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3886; GFX11-GISEL-FAKE16-NEXT: v_fma_f16 v0, v0, 0x5000, -v13887; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3888 %mul = fmul contract half %x, 32.03889 %fma = fsub contract half %mul, %y3890 ret half %fma3891}3892 3893define half @v_fma_mul_add_neg32_f16(half %x, half %y) {3894; GFX9-SDAG-LABEL: v_fma_mul_add_neg32_f16:3895; GFX9-SDAG: ; %bb.0:3896; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3897; GFX9-SDAG-NEXT: s_mov_b32 s4, 0xd0003898; GFX9-SDAG-NEXT: v_fma_f16 v0, v0, s4, v13899; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]3900;3901; GFX9-GISEL-LABEL: v_fma_mul_add_neg32_f16:3902; GFX9-GISEL: ; %bb.0:3903; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3904; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xd0003905; GFX9-GISEL-NEXT: v_fma_f16 v0, v0, v2, v13906; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]3907;3908; GFX10-LABEL: v_fma_mul_add_neg32_f16:3909; GFX10: ; %bb.0:3910; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3911; GFX10-NEXT: v_fmamk_f16 v0, v0, 0xd000, v13912; GFX10-NEXT: s_setpc_b64 s[30:31]3913;3914; GFX11-SDAG-TRUE16-LABEL: v_fma_mul_add_neg32_f16:3915; GFX11-SDAG-TRUE16: ; %bb.0:3916; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3917; GFX11-SDAG-TRUE16-NEXT: v_fmamk_f16 v0.l, v0.l, 0xd000, v1.l3918; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3919;3920; GFX11-SDAG-FAKE16-LABEL: v_fma_mul_add_neg32_f16:3921; GFX11-SDAG-FAKE16: ; %bb.0:3922; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3923; GFX11-SDAG-FAKE16-NEXT: v_fmamk_f16 v0, v0, 0xd000, v13924; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3925;3926; GFX11-GISEL-TRUE16-LABEL: v_fma_mul_add_neg32_f16:3927; GFX11-GISEL-TRUE16: ; %bb.0:3928; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3929; GFX11-GISEL-TRUE16-NEXT: v_fmac_f16_e32 v1.l, 0xd000, v0.l3930; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v0, v13931; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3932;3933; GFX11-GISEL-FAKE16-LABEL: v_fma_mul_add_neg32_f16:3934; GFX11-GISEL-FAKE16: ; %bb.0:3935; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3936; GFX11-GISEL-FAKE16-NEXT: v_fmamk_f16 v0, v0, 0xd000, v13937; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3938 %mul = fmul contract half %x, -32.03939 %fma = fadd contract half %mul, %y3940 ret half %fma3941}3942 3943define half @v_mul_fabs_32_f16(half %x) {3944; GFX9-SDAG-LABEL: v_mul_fabs_32_f16:3945; GFX9-SDAG: ; %bb.0:3946; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3947; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x50003948; GFX9-SDAG-NEXT: v_mul_f16_e64 v0, |v0|, s43949; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]3950;3951; GFX9-GISEL-LABEL: v_mul_fabs_32_f16:3952; GFX9-GISEL: ; %bb.0:3953; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3954; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x50003955; GFX9-GISEL-NEXT: v_mul_f16_e64 v0, |v0|, v13956; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]3957;3958; GFX10-LABEL: v_mul_fabs_32_f16:3959; GFX10: ; %bb.0:3960; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3961; GFX10-NEXT: v_mul_f16_e64 v0, 0x5000, |v0|3962; GFX10-NEXT: s_setpc_b64 s[30:31]3963;3964; GFX11-SDAG-TRUE16-LABEL: v_mul_fabs_32_f16:3965; GFX11-SDAG-TRUE16: ; %bb.0:3966; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3967; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e64 v0.l, 0x5000, |v0.l|3968; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]3969;3970; GFX11-SDAG-FAKE16-LABEL: v_mul_fabs_32_f16:3971; GFX11-SDAG-FAKE16: ; %bb.0:3972; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3973; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e64 v0, 0x5000, |v0|3974; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]3975;3976; GFX11-GISEL-TRUE16-LABEL: v_mul_fabs_32_f16:3977; GFX11-GISEL-TRUE16: ; %bb.0:3978; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3979; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e64 v0.l, 0x5000, |v0.l|3980; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]3981;3982; GFX11-GISEL-FAKE16-LABEL: v_mul_fabs_32_f16:3983; GFX11-GISEL-FAKE16: ; %bb.0:3984; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3985; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e64 v0, 0x5000, |v0|3986; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]3987 %x.fabs = call half @llvm.fabs.f16(half %x)3988 %mul = fmul half %x.fabs, 32.03989 ret half %mul3990}3991 3992define half @v_mul_add_fma_fabs_32_f16(half %x, half %y) {3993; GFX9-SDAG-LABEL: v_mul_add_fma_fabs_32_f16:3994; GFX9-SDAG: ; %bb.0:3995; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3996; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x50003997; GFX9-SDAG-NEXT: v_fma_f16 v0, |v0|, s4, v13998; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]3999;4000; GFX9-GISEL-LABEL: v_mul_add_fma_fabs_32_f16:4001; GFX9-GISEL: ; %bb.0:4002; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4003; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x50004004; GFX9-GISEL-NEXT: v_fma_f16 v0, |v0|, v2, v14005; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4006;4007; GFX10-LABEL: v_mul_add_fma_fabs_32_f16:4008; GFX10: ; %bb.0:4009; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4010; GFX10-NEXT: v_fma_f16 v0, |v0|, 0x5000, v14011; GFX10-NEXT: s_setpc_b64 s[30:31]4012;4013; GFX11-SDAG-TRUE16-LABEL: v_mul_add_fma_fabs_32_f16:4014; GFX11-SDAG-TRUE16: ; %bb.0:4015; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4016; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, |v0.l|, 0x5000, v1.l4017; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]4018;4019; GFX11-SDAG-FAKE16-LABEL: v_mul_add_fma_fabs_32_f16:4020; GFX11-SDAG-FAKE16: ; %bb.0:4021; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4022; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, |v0|, 0x5000, v14023; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]4024;4025; GFX11-GISEL-TRUE16-LABEL: v_mul_add_fma_fabs_32_f16:4026; GFX11-GISEL-TRUE16: ; %bb.0:4027; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4028; GFX11-GISEL-TRUE16-NEXT: v_fma_f16 v0.l, |v0.l|, 0x5000, v1.l4029; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]4030;4031; GFX11-GISEL-FAKE16-LABEL: v_mul_add_fma_fabs_32_f16:4032; GFX11-GISEL-FAKE16: ; %bb.0:4033; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4034; GFX11-GISEL-FAKE16-NEXT: v_fma_f16 v0, |v0|, 0x5000, v14035; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]4036 %x.fabs = call half @llvm.fabs.f16(half %x)4037 %mul = fmul contract half %x.fabs, 32.04038 %fma = fadd contract half %mul, %y4039 ret half %fma4040}4041 4042define <2 x half> @v_mul_16_v2f16(<2 x half> %x) {4043; GFX9-SDAG-LABEL: v_mul_16_v2f16:4044; GFX9-SDAG: ; %bb.0:4045; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4046; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x4c004047; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, s4 op_sel_hi:[1,0]4048; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4049;4050; GFX9-GISEL-LABEL: v_mul_16_v2f16:4051; GFX9-GISEL: ; %bb.0:4052; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4053; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x4c004c004054; GFX9-GISEL-NEXT: v_pk_mul_f16 v0, v0, v14055; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4056;4057; GFX10-SDAG-LABEL: v_mul_16_v2f16:4058; GFX10-SDAG: ; %bb.0:4059; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4060; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, 0x4c00, v0 op_sel_hi:[0,1]4061; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4062;4063; GFX10-GISEL-LABEL: v_mul_16_v2f16:4064; GFX10-GISEL: ; %bb.0:4065; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4066; GFX10-GISEL-NEXT: v_pk_mul_f16 v0, 0x4c004c00, v04067; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4068;4069; GFX11-SDAG-LABEL: v_mul_16_v2f16:4070; GFX11-SDAG: ; %bb.0:4071; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4072; GFX11-SDAG-NEXT: v_pk_mul_f16 v0, 0x4c00, v0 op_sel_hi:[0,1]4073; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4074;4075; GFX11-GISEL-LABEL: v_mul_16_v2f16:4076; GFX11-GISEL: ; %bb.0:4077; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4078; GFX11-GISEL-NEXT: v_pk_mul_f16 v0, 0x4c004c00, v04079; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4080 %mul = fmul <2 x half> %x, <half 16.0, half 16.0>4081 ret <2 x half> %mul4082}4083 4084define <2 x half> @v_mul_neg16_v2f16(<2 x half> %x) {4085; GFX9-SDAG-LABEL: v_mul_neg16_v2f16:4086; GFX9-SDAG: ; %bb.0:4087; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4088; GFX9-SDAG-NEXT: s_mov_b32 s4, 0xcc004089; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, s4 op_sel_hi:[1,0]4090; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4091;4092; GFX9-GISEL-LABEL: v_mul_neg16_v2f16:4093; GFX9-GISEL: ; %bb.0:4094; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4095; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0xcc00cc004096; GFX9-GISEL-NEXT: v_pk_mul_f16 v0, v0, v14097; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4098;4099; GFX10-SDAG-LABEL: v_mul_neg16_v2f16:4100; GFX10-SDAG: ; %bb.0:4101; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4102; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, 0xcc00, v0 op_sel_hi:[0,1]4103; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4104;4105; GFX10-GISEL-LABEL: v_mul_neg16_v2f16:4106; GFX10-GISEL: ; %bb.0:4107; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4108; GFX10-GISEL-NEXT: v_pk_mul_f16 v0, 0xcc00cc00, v04109; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4110;4111; GFX11-SDAG-LABEL: v_mul_neg16_v2f16:4112; GFX11-SDAG: ; %bb.0:4113; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4114; GFX11-SDAG-NEXT: v_pk_mul_f16 v0, 0xcc00, v0 op_sel_hi:[0,1]4115; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4116;4117; GFX11-GISEL-LABEL: v_mul_neg16_v2f16:4118; GFX11-GISEL: ; %bb.0:4119; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4120; GFX11-GISEL-NEXT: v_pk_mul_f16 v0, 0xcc00cc00, v04121; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4122 %mul = fmul <2 x half> %x, <half -16.0, half -16.0>4123 ret <2 x half> %mul4124}4125 4126define <2 x half> @v_mul_fabs_16_v2f16(<2 x half> %x) {4127; GFX9-SDAG-LABEL: v_mul_fabs_16_v2f16:4128; GFX9-SDAG: ; %bb.0:4129; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4130; GFX9-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v04131; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x4c004132; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v0, s4 op_sel_hi:[1,0]4133; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4134;4135; GFX9-GISEL-LABEL: v_mul_fabs_16_v2f16:4136; GFX9-GISEL: ; %bb.0:4137; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4138; GFX9-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v04139; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, 0x4c004c004140; GFX9-GISEL-NEXT: v_pk_mul_f16 v0, v0, v14141; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4142;4143; GFX10-SDAG-LABEL: v_mul_fabs_16_v2f16:4144; GFX10-SDAG: ; %bb.0:4145; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4146; GFX10-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v04147; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, 0x4c00, v0 op_sel_hi:[0,1]4148; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4149;4150; GFX10-GISEL-LABEL: v_mul_fabs_16_v2f16:4151; GFX10-GISEL: ; %bb.0:4152; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4153; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v04154; GFX10-GISEL-NEXT: v_pk_mul_f16 v0, 0x4c004c00, v04155; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4156;4157; GFX11-SDAG-LABEL: v_mul_fabs_16_v2f16:4158; GFX11-SDAG: ; %bb.0:4159; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4160; GFX11-SDAG-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v04161; GFX11-SDAG-NEXT: v_pk_mul_f16 v0, 0x4c00, v0 op_sel_hi:[0,1]4162; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4163;4164; GFX11-GISEL-LABEL: v_mul_fabs_16_v2f16:4165; GFX11-GISEL: ; %bb.0:4166; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4167; GFX11-GISEL-NEXT: v_and_b32_e32 v0, 0x7fff7fff, v04168; GFX11-GISEL-NEXT: v_pk_mul_f16 v0, 0x4c004c00, v04169; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4170 %x.fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)4171 %mul = fmul <2 x half> %x.fabs, <half 16.0, half 16.0>4172 ret <2 x half> %mul4173}4174 4175define <2 x half> @v_fma_mul_add_32_v2f16(<2 x half> %x, <2 x half> %y) {4176; GFX9-SDAG-LABEL: v_fma_mul_add_32_v2f16:4177; GFX9-SDAG: ; %bb.0:4178; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4179; GFX9-SDAG-NEXT: s_movk_i32 s4, 0x50004180; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v0, s4, v1 op_sel_hi:[1,0,1]4181; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4182;4183; GFX9-GISEL-LABEL: v_fma_mul_add_32_v2f16:4184; GFX9-GISEL: ; %bb.0:4185; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4186; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0x500050004187; GFX9-GISEL-NEXT: v_pk_fma_f16 v0, v0, v2, v14188; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4189;4190; GFX10-SDAG-LABEL: v_fma_mul_add_32_v2f16:4191; GFX10-SDAG: ; %bb.0:4192; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4193; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, 0x5000, v0, v1 op_sel_hi:[0,1,1]4194; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4195;4196; GFX10-GISEL-LABEL: v_fma_mul_add_32_v2f16:4197; GFX10-GISEL: ; %bb.0:4198; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4199; GFX10-GISEL-NEXT: v_pk_fma_f16 v0, 0x50005000, v0, v14200; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4201;4202; GFX11-SDAG-LABEL: v_fma_mul_add_32_v2f16:4203; GFX11-SDAG: ; %bb.0:4204; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4205; GFX11-SDAG-NEXT: v_pk_fma_f16 v0, 0x5000, v0, v1 op_sel_hi:[0,1,1]4206; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4207;4208; GFX11-GISEL-LABEL: v_fma_mul_add_32_v2f16:4209; GFX11-GISEL: ; %bb.0:4210; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4211; GFX11-GISEL-NEXT: v_pk_fma_f16 v0, 0x50005000, v0, v14212; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4213 %mul = fmul contract <2 x half> %x, <half 32.0, half 32.0>4214 %fma = fadd contract <2 x half> %mul, %y4215 ret <2 x half> %fma4216}4217 4218define amdgpu_ps i32 @s_mul_32_f16(half inreg %x, half inreg %y) {4219; GFX9-LABEL: s_mul_32_f16:4220; GFX9: ; %bb.0:4221; GFX9-NEXT: v_mov_b32_e32 v0, 0x50004222; GFX9-NEXT: v_mul_f16_e32 v0, s0, v04223; GFX9-NEXT: v_readfirstlane_b32 s0, v04224; GFX9-NEXT: ; return to shader part epilog4225;4226; GFX10-LABEL: s_mul_32_f16:4227; GFX10: ; %bb.0:4228; GFX10-NEXT: v_mul_f16_e64 v0, 0x5000, s04229; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v04230; GFX10-NEXT: v_readfirstlane_b32 s0, v04231; GFX10-NEXT: ; return to shader part epilog4232;4233; GFX11-SDAG-TRUE16-LABEL: s_mul_32_f16:4234; GFX11-SDAG-TRUE16: ; %bb.0:4235; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e64 v0.l, 0x5000, s04236; GFX11-SDAG-TRUE16-NEXT: v_and_b32_e32 v0, 0xffff, v04237; GFX11-SDAG-TRUE16-NEXT: v_readfirstlane_b32 s0, v04238; GFX11-SDAG-TRUE16-NEXT: ; return to shader part epilog4239;4240; GFX11-SDAG-FAKE16-LABEL: s_mul_32_f16:4241; GFX11-SDAG-FAKE16: ; %bb.0:4242; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e64 v0, 0x5000, s04243; GFX11-SDAG-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v04244; GFX11-SDAG-FAKE16-NEXT: v_readfirstlane_b32 s0, v04245; GFX11-SDAG-FAKE16-NEXT: ; return to shader part epilog4246;4247; GFX11-GISEL-TRUE16-LABEL: s_mul_32_f16:4248; GFX11-GISEL-TRUE16: ; %bb.0:4249; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e64 v0.l, 0x5000, s04250; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.h, 04251; GFX11-GISEL-TRUE16-NEXT: v_readfirstlane_b32 s0, v04252; GFX11-GISEL-TRUE16-NEXT: ; return to shader part epilog4253;4254; GFX11-GISEL-FAKE16-LABEL: s_mul_32_f16:4255; GFX11-GISEL-FAKE16: ; %bb.0:4256; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e64 v0, 0x5000, s04257; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v04258; GFX11-GISEL-FAKE16-NEXT: v_readfirstlane_b32 s0, v04259; GFX11-GISEL-FAKE16-NEXT: ; return to shader part epilog4260 %mul = fmul contract half %x, 32.04261 %cast = bitcast half %mul to i164262 %zext = zext i16 %cast to i324263 %readlane = call i32 @llvm.amdgcn.readfirstlane(i32 %zext)4264 ret i32 %readlane4265}4266 4267; --------------------------------------------------------------------4268; fmul by select of power of 24269; --------------------------------------------------------------------4270 4271define float @v_mul_f32_select_64_1(i32 %arg, float %x) {4272; GFX9-LABEL: v_mul_f32_select_64_1:4273; GFX9: ; %bb.0:4274; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4275; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04276; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc4277; GFX9-NEXT: v_ldexp_f32 v0, v1, v04278; GFX9-NEXT: s_setpc_b64 s[30:31]4279;4280; GFX1011-LABEL: v_mul_f32_select_64_1:4281; GFX1011: ; %bb.0:4282; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4283; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04284; GFX1011-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4285; GFX1011-NEXT: v_ldexp_f32 v0, v1, v04286; GFX1011-NEXT: s_setpc_b64 s[30:31]4287 %cond = icmp eq i32 %arg, 04288 %select.pow2 = select i1 %cond, float 64.0, float 1.04289 %mul = fmul float %x, %select.pow24290 ret float %mul4291}4292 4293define float @v_mul_f32_select_1_64(i32 %arg, float %x) {4294; GFX9-LABEL: v_mul_f32_select_1_64:4295; GFX9: ; %bb.0:4296; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4297; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04298; GFX9-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc4299; GFX9-NEXT: v_ldexp_f32 v0, v1, v04300; GFX9-NEXT: s_setpc_b64 s[30:31]4301;4302; GFX1011-LABEL: v_mul_f32_select_1_64:4303; GFX1011: ; %bb.0:4304; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4305; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04306; GFX1011-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4307; GFX1011-NEXT: v_ldexp_f32 v0, v1, v04308; GFX1011-NEXT: s_setpc_b64 s[30:31]4309 %cond = icmp eq i32 %arg, 04310 %select.pow2 = select i1 %cond, float 1.0, float 64.04311 %mul = fmul float %x, %select.pow24312 ret float %mul4313}4314 4315define float @v_mul_f32_select_n1_n64(i32 %arg, float %x) {4316; GFX9-LABEL: v_mul_f32_select_n1_n64:4317; GFX9: ; %bb.0:4318; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4319; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04320; GFX9-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc4321; GFX9-NEXT: v_ldexp_f32 v0, -v1, v04322; GFX9-NEXT: s_setpc_b64 s[30:31]4323;4324; GFX1011-LABEL: v_mul_f32_select_n1_n64:4325; GFX1011: ; %bb.0:4326; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4327; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04328; GFX1011-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4329; GFX1011-NEXT: v_ldexp_f32 v0, -v1, v04330; GFX1011-NEXT: s_setpc_b64 s[30:31]4331 %cond = icmp eq i32 %arg, 04332 %select.pow2 = select i1 %cond, float -1.0, float -64.04333 %mul = fmul float %x, %select.pow24334 ret float %mul4335}4336 4337define float @v_mul_f32_select_n64_n1(i32 %arg, float %x) {4338; GFX9-LABEL: v_mul_f32_select_n64_n1:4339; GFX9: ; %bb.0:4340; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4341; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04342; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc4343; GFX9-NEXT: v_ldexp_f32 v0, -v1, v04344; GFX9-NEXT: s_setpc_b64 s[30:31]4345;4346; GFX1011-LABEL: v_mul_f32_select_n64_n1:4347; GFX1011: ; %bb.0:4348; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4349; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04350; GFX1011-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4351; GFX1011-NEXT: v_ldexp_f32 v0, -v1, v04352; GFX1011-NEXT: s_setpc_b64 s[30:31]4353 %cond = icmp eq i32 %arg, 04354 %select.pow2 = select i1 %cond, float -64.0, float -1.04355 %mul = fmul float %x, %select.pow24356 ret float %mul4357}4358 4359define float @v_mul_f32_select_128_64(i32 %arg, float %x) {4360; GFX9-SDAG-LABEL: v_mul_f32_select_128_64:4361; GFX9-SDAG: ; %bb.0:4362; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4363; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04364; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc4365; GFX9-SDAG-NEXT: v_ldexp_f32 v0, v1, v04366; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4367;4368; GFX9-GISEL-LABEL: v_mul_f32_select_128_64:4369; GFX9-GISEL: ; %bb.0:4370; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4371; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04372; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc4373; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v04374; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v1, v04375; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4376;4377; GFX10-SDAG-LABEL: v_mul_f32_select_128_64:4378; GFX10-SDAG: ; %bb.0:4379; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4380; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04381; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo4382; GFX10-SDAG-NEXT: v_ldexp_f32 v0, v1, v04383; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4384;4385; GFX10-GISEL-LABEL: v_mul_f32_select_128_64:4386; GFX10-GISEL: ; %bb.0:4387; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4388; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04389; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo4390; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v04391; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v1, v04392; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4393;4394; GFX11-SDAG-LABEL: v_mul_f32_select_128_64:4395; GFX11-SDAG: ; %bb.0:4396; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4397; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04398; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo4399; GFX11-SDAG-NEXT: v_ldexp_f32 v0, v1, v04400; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4401;4402; GFX11-GISEL-LABEL: v_mul_f32_select_128_64:4403; GFX11-GISEL: ; %bb.0:4404; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4405; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04406; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo4407; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v04408; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v1, v04409; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4410 %cond = icmp eq i32 %arg, 04411 %select.pow2 = select i1 %cond, float 128.0, float 64.04412 %mul = fmul float %x, %select.pow24413 ret float %mul4414}4415 4416define float @v_mul_f32_select_n128_n64(i32 %arg, float %x) {4417; GFX9-SDAG-LABEL: v_mul_f32_select_n128_n64:4418; GFX9-SDAG: ; %bb.0:4419; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4420; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04421; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc4422; GFX9-SDAG-NEXT: v_ldexp_f32 v0, -v1, v04423; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4424;4425; GFX9-GISEL-LABEL: v_mul_f32_select_n128_n64:4426; GFX9-GISEL: ; %bb.0:4427; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4428; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04429; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc4430; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v04431; GFX9-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04432; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4433;4434; GFX10-SDAG-LABEL: v_mul_f32_select_n128_n64:4435; GFX10-SDAG: ; %bb.0:4436; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4437; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04438; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo4439; GFX10-SDAG-NEXT: v_ldexp_f32 v0, -v1, v04440; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4441;4442; GFX10-GISEL-LABEL: v_mul_f32_select_n128_n64:4443; GFX10-GISEL: ; %bb.0:4444; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4445; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04446; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo4447; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v04448; GFX10-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04449; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4450;4451; GFX11-SDAG-LABEL: v_mul_f32_select_n128_n64:4452; GFX11-SDAG: ; %bb.0:4453; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4454; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04455; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo4456; GFX11-SDAG-NEXT: v_ldexp_f32 v0, -v1, v04457; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4458;4459; GFX11-GISEL-LABEL: v_mul_f32_select_n128_n64:4460; GFX11-GISEL: ; %bb.0:4461; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4462; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04463; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo4464; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v04465; GFX11-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04466; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4467 %cond = icmp eq i32 %arg, 04468 %select.pow2 = select i1 %cond, float -128.0, float -64.04469 %mul = fmul float %x, %select.pow24470 ret float %mul4471}4472 4473define float @v_mul_f32_select_n128_n16(i32 %arg, float %x) {4474; GFX9-LABEL: v_mul_f32_select_n128_n16:4475; GFX9: ; %bb.0:4476; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4477; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04478; GFX9-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc4479; GFX9-NEXT: v_ldexp_f32 v0, -v1, v04480; GFX9-NEXT: s_setpc_b64 s[30:31]4481;4482; GFX1011-LABEL: v_mul_f32_select_n128_n16:4483; GFX1011: ; %bb.0:4484; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4485; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04486; GFX1011-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo4487; GFX1011-NEXT: v_ldexp_f32 v0, -v1, v04488; GFX1011-NEXT: s_setpc_b64 s[30:31]4489 %cond = icmp eq i32 %arg, 04490 %select.pow2 = select i1 %cond, float -128.0, float -16.04491 %mul = fmul float %x, %select.pow24492 ret float %mul4493}4494 4495define float @v_contract_mul_add_f32_select_64_1(i32 %arg, float %x, float %y) {4496; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_64_1:4497; GFX9-SDAG: ; %bb.0:4498; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4499; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x428000004500; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04501; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, 1.0, v3, vcc4502; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24503; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4504;4505; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_64_1:4506; GFX9-GISEL: ; %bb.0:4507; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4508; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04509; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc4510; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v1, v04511; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24512; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4513;4514; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_64_1:4515; GFX10-SDAG: ; %bb.0:4516; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4517; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04518; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 1.0, 0x42800000, vcc_lo4519; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24520; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4521;4522; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_64_1:4523; GFX10-GISEL: ; %bb.0:4524; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4525; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04526; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4527; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v1, v04528; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24529; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4530;4531; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_64_1:4532; GFX11-SDAG: ; %bb.0:4533; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4534; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04535; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 1.0, 0x42800000, vcc_lo4536; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24537; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4538;4539; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_64_1:4540; GFX11-GISEL: ; %bb.0:4541; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4542; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04543; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4544; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v1, v04545; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24546; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4547 %cond = icmp eq i32 %arg, 04548 %select.pow2 = select contract i1 %cond, float 64.0, float 1.04549 %mul = fmul contract float %x, %select.pow24550 %fma = fadd contract float %mul, %y4551 ret float %fma4552}4553 4554define float @v_contract_mul_add_f32_select_1_64(i32 %arg, float %x, float %y) {4555; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_1_64:4556; GFX9-SDAG: ; %bb.0:4557; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4558; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x428000004559; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04560; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, v3, 1.0, vcc4561; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24562; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4563;4564; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_1_64:4565; GFX9-GISEL: ; %bb.0:4566; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4567; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04568; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc4569; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v1, v04570; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24571; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4572;4573; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_1_64:4574; GFX10-SDAG: ; %bb.0:4575; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4576; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04577; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0x42800000, 1.0, vcc_lo4578; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24579; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4580;4581; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_1_64:4582; GFX10-GISEL: ; %bb.0:4583; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4584; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04585; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4586; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v1, v04587; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24588; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4589;4590; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_1_64:4591; GFX11-SDAG: ; %bb.0:4592; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4593; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04594; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 0x42800000, 1.0, vcc_lo4595; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24596; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4597;4598; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_1_64:4599; GFX11-GISEL: ; %bb.0:4600; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4601; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04602; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4603; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v1, v04604; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24605; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4606 %cond = icmp eq i32 %arg, 04607 %select.pow2 = select contract i1 %cond, float 1.0, float 64.04608 %mul = fmul contract float %x, %select.pow24609 %fma = fadd contract float %mul, %y4610 ret float %fma4611}4612 4613define float @v_contract_mul_add_f32_select_n64_n1(i32 %arg, float %x, float %y) {4614; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_n64_n1:4615; GFX9-SDAG: ; %bb.0:4616; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4617; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xc28000004618; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04619; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, -1.0, v3, vcc4620; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24621; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4622;4623; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_n64_n1:4624; GFX9-GISEL: ; %bb.0:4625; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4626; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04627; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc4628; GFX9-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04629; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24630; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4631;4632; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_n64_n1:4633; GFX10-SDAG: ; %bb.0:4634; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4635; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04636; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, -1.0, 0xc2800000, vcc_lo4637; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24638; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4639;4640; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_n64_n1:4641; GFX10-GISEL: ; %bb.0:4642; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4643; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04644; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4645; GFX10-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04646; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24647; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4648;4649; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_n64_n1:4650; GFX11-SDAG: ; %bb.0:4651; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4652; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04653; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, -1.0, 0xc2800000, vcc_lo4654; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24655; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4656;4657; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_n64_n1:4658; GFX11-GISEL: ; %bb.0:4659; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4660; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04661; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4662; GFX11-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04663; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24664; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4665 %cond = icmp eq i32 %arg, 04666 %select.pow2 = select contract i1 %cond, float -64.0, float -1.04667 %mul = fmul contract float %x, %select.pow24668 %fma = fadd contract float %mul, %y4669 ret float %fma4670}4671 4672define float @v_contract_mul_add_f32_select_n1_n64(i32 %arg, float %x, float %y) {4673; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_n1_n64:4674; GFX9-SDAG: ; %bb.0:4675; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4676; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xc28000004677; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04678; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, v3, -1.0, vcc4679; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24680; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4681;4682; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_n1_n64:4683; GFX9-GISEL: ; %bb.0:4684; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4685; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04686; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc4687; GFX9-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04688; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24689; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4690;4691; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_n1_n64:4692; GFX10-SDAG: ; %bb.0:4693; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4694; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04695; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0xc2800000, -1.0, vcc_lo4696; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24697; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4698;4699; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_n1_n64:4700; GFX10-GISEL: ; %bb.0:4701; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4702; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04703; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4704; GFX10-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04705; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24706; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4707;4708; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_n1_n64:4709; GFX11-SDAG: ; %bb.0:4710; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4711; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04712; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 0xc2800000, -1.0, vcc_lo4713; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24714; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4715;4716; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_n1_n64:4717; GFX11-GISEL: ; %bb.0:4718; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4719; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04720; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4721; GFX11-GISEL-NEXT: v_ldexp_f32 v0, -v1, v04722; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24723; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4724 %cond = icmp eq i32 %arg, 04725 %select.pow2 = select contract i1 %cond, float -1.0, float -64.04726 %mul = fmul contract float %x, %select.pow24727 %fma = fadd contract float %mul, %y4728 ret float %fma4729}4730 4731define float @v_contract_mul_add_f32_select_128_64(i32 %arg, float %x, float %y) {4732; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_128_64:4733; GFX9-SDAG: ; %bb.0:4734; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4735; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x428000004736; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x430000004737; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04738; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc4739; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24740; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4741;4742; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_128_64:4743; GFX9-GISEL: ; %bb.0:4744; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4745; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04746; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc4747; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v04748; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v1, v04749; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24750; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4751;4752; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_128_64:4753; GFX10-SDAG: ; %bb.0:4754; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4755; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x430000004756; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04757; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x42800000, v3, vcc_lo4758; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24759; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4760;4761; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_128_64:4762; GFX10-GISEL: ; %bb.0:4763; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4764; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04765; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo4766; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v04767; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v1, v04768; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24769; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4770;4771; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_128_64:4772; GFX11-SDAG: ; %bb.0:4773; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4774; GFX11-SDAG-NEXT: v_mov_b32_e32 v3, 0x430000004775; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04776; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x42800000, v3, vcc_lo4777; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24778; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4779;4780; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_128_64:4781; GFX11-GISEL: ; %bb.0:4782; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4783; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04784; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo4785; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v04786; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v1, v04787; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24788; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4789 %cond = icmp eq i32 %arg, 04790 %select.pow2 = select i1 %cond, float 128.0, float 64.04791 %mul = fmul contract float %x, %select.pow24792 %fma = fadd contract float %mul, %y4793 ret float %fma4794}4795 4796define float @v_contract_mul_add_f32_select_128_4(i32 %arg, float %x, float %y) {4797; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_128_4:4798; GFX9-SDAG: ; %bb.0:4799; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4800; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x430000004801; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04802; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, 4.0, v3, vcc4803; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24804; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4805;4806; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_128_4:4807; GFX9-GISEL: ; %bb.0:4808; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4809; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04810; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc4811; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v1, v04812; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24813; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4814;4815; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_128_4:4816; GFX10-SDAG: ; %bb.0:4817; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4818; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04819; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 4.0, 0x43000000, vcc_lo4820; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24821; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4822;4823; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_128_4:4824; GFX10-GISEL: ; %bb.0:4825; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4826; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04827; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo4828; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v1, v04829; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24830; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4831;4832; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_128_4:4833; GFX11-SDAG: ; %bb.0:4834; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4835; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04836; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 4.0, 0x43000000, vcc_lo4837; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24838; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4839;4840; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_128_4:4841; GFX11-GISEL: ; %bb.0:4842; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4843; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04844; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo4845; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v1, v04846; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24847; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4848 %cond = icmp eq i32 %arg, 04849 %select.pow2 = select i1 %cond, float 128.0, float 4.04850 %mul = fmul contract float %x, %select.pow24851 %fma = fadd contract float %mul, %y4852 ret float %fma4853}4854 4855define float @v_contract_mul_add_f32_select_2_4(i32 %arg, float %x, float %y) {4856; GFX9-LABEL: v_contract_mul_add_f32_select_2_4:4857; GFX9: ; %bb.0:4858; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4859; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04860; GFX9-NEXT: v_cndmask_b32_e64 v0, 4.0, 2.0, vcc4861; GFX9-NEXT: v_fma_f32 v0, v1, v0, v24862; GFX9-NEXT: s_setpc_b64 s[30:31]4863;4864; GFX1011-LABEL: v_contract_mul_add_f32_select_2_4:4865; GFX1011: ; %bb.0:4866; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4867; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04868; GFX1011-NEXT: v_cndmask_b32_e64 v0, 4.0, 2.0, vcc_lo4869; GFX1011-NEXT: v_fma_f32 v0, v1, v0, v24870; GFX1011-NEXT: s_setpc_b64 s[30:31]4871 %cond = icmp eq i32 %arg, 04872 %select.pow2 = select i1 %cond, float 2.0, float 4.04873 %mul = fmul contract float %x, %select.pow24874 %fma = fadd contract float %mul, %y4875 ret float %fma4876}4877 4878define float @v_contract_mul_add_f32_select_4_128(i32 %arg, float %x, float %y) {4879; GFX9-SDAG-LABEL: v_contract_mul_add_f32_select_4_128:4880; GFX9-SDAG: ; %bb.0:4881; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4882; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x430000004883; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04884; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, v3, 4.0, vcc4885; GFX9-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24886; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]4887;4888; GFX9-GISEL-LABEL: v_contract_mul_add_f32_select_4_128:4889; GFX9-GISEL: ; %bb.0:4890; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4891; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04892; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc4893; GFX9-GISEL-NEXT: v_ldexp_f32 v0, v1, v04894; GFX9-GISEL-NEXT: v_add_f32_e32 v0, v0, v24895; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]4896;4897; GFX10-SDAG-LABEL: v_contract_mul_add_f32_select_4_128:4898; GFX10-SDAG: ; %bb.0:4899; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4900; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04901; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 0x43000000, 4.0, vcc_lo4902; GFX10-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24903; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]4904;4905; GFX10-GISEL-LABEL: v_contract_mul_add_f32_select_4_128:4906; GFX10-GISEL: ; %bb.0:4907; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4908; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04909; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo4910; GFX10-GISEL-NEXT: v_ldexp_f32 v0, v1, v04911; GFX10-GISEL-NEXT: v_add_f32_e32 v0, v0, v24912; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]4913;4914; GFX11-SDAG-LABEL: v_contract_mul_add_f32_select_4_128:4915; GFX11-SDAG: ; %bb.0:4916; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4917; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04918; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 0x43000000, 4.0, vcc_lo4919; GFX11-SDAG-NEXT: v_fma_f32 v0, v1, v0, v24920; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]4921;4922; GFX11-GISEL-LABEL: v_contract_mul_add_f32_select_4_128:4923; GFX11-GISEL: ; %bb.0:4924; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4925; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04926; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo4927; GFX11-GISEL-NEXT: v_ldexp_f32 v0, v1, v04928; GFX11-GISEL-NEXT: v_add_f32_e32 v0, v0, v24929; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]4930 %cond = icmp eq i32 %arg, 04931 %select.pow2 = select i1 %cond, float 4.0, float 128.04932 %mul = fmul contract float %x, %select.pow24933 %fma = fadd contract float %mul, %y4934 ret float %fma4935}4936 4937define double @v_mul_f64_select_64_1(i32 %arg, double %x) {4938; GFX9-LABEL: v_mul_f64_select_64_1:4939; GFX9: ; %bb.0:4940; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4941; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04942; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc4943; GFX9-NEXT: v_ldexp_f64 v[0:1], v[1:2], v04944; GFX9-NEXT: s_setpc_b64 s[30:31]4945;4946; GFX1011-LABEL: v_mul_f64_select_64_1:4947; GFX1011: ; %bb.0:4948; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4949; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04950; GFX1011-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo4951; GFX1011-NEXT: v_ldexp_f64 v[0:1], v[1:2], v04952; GFX1011-NEXT: s_setpc_b64 s[30:31]4953 %cond = icmp eq i32 %arg, 04954 %select.pow2 = select i1 %cond, double 64.0, double 1.04955 %mul = fmul double %x, %select.pow24956 ret double %mul4957}4958 4959define double @v_mul_f64_select_1_64(i32 %arg, double %x) {4960; GFX9-LABEL: v_mul_f64_select_1_64:4961; GFX9: ; %bb.0:4962; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4963; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04964; GFX9-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc4965; GFX9-NEXT: v_ldexp_f64 v[0:1], v[1:2], v04966; GFX9-NEXT: s_setpc_b64 s[30:31]4967;4968; GFX1011-LABEL: v_mul_f64_select_1_64:4969; GFX1011: ; %bb.0:4970; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4971; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04972; GFX1011-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4973; GFX1011-NEXT: v_ldexp_f64 v[0:1], v[1:2], v04974; GFX1011-NEXT: s_setpc_b64 s[30:31]4975 %cond = icmp eq i32 %arg, 04976 %select.pow2 = select i1 %cond, double 1.0, double 64.04977 %mul = fmul double %x, %select.pow24978 ret double %mul4979}4980 4981define double @v_mul_f64_select_n1_n64(i32 %arg, double %x) {4982; GFX9-LABEL: v_mul_f64_select_n1_n64:4983; GFX9: ; %bb.0:4984; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4985; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v04986; GFX9-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc4987; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v04988; GFX9-NEXT: s_setpc_b64 s[30:31]4989;4990; GFX1011-LABEL: v_mul_f64_select_n1_n64:4991; GFX1011: ; %bb.0:4992; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)4993; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v04994; GFX1011-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo4995; GFX1011-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v04996; GFX1011-NEXT: s_setpc_b64 s[30:31]4997 %cond = icmp eq i32 %arg, 04998 %select.pow2 = select i1 %cond, double -1.0, double -64.04999 %mul = fmul double %x, %select.pow25000 ret double %mul5001}5002 5003define double @v_mul_f64_select_128_64(i32 %arg, double %x) {5004; GFX9-SDAG-LABEL: v_mul_f64_select_128_64:5005; GFX9-SDAG: ; %bb.0:5006; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5007; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05008; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc5009; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05010; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5011;5012; GFX9-GISEL-LABEL: v_mul_f64_select_128_64:5013; GFX9-GISEL: ; %bb.0:5014; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5015; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05016; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc5017; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v05018; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05019; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5020;5021; GFX10-SDAG-LABEL: v_mul_f64_select_128_64:5022; GFX10-SDAG: ; %bb.0:5023; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5024; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05025; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5026; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05027; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5028;5029; GFX10-GISEL-LABEL: v_mul_f64_select_128_64:5030; GFX10-GISEL: ; %bb.0:5031; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5032; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05033; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5034; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05035; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05036; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5037;5038; GFX11-SDAG-LABEL: v_mul_f64_select_128_64:5039; GFX11-SDAG: ; %bb.0:5040; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5041; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05042; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5043; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05044; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5045;5046; GFX11-GISEL-LABEL: v_mul_f64_select_128_64:5047; GFX11-GISEL: ; %bb.0:5048; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5049; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05050; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5051; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05052; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05053; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5054 %cond = icmp eq i32 %arg, 05055 %select.pow2 = select i1 %cond, double 128.0, double 64.05056 %mul = fmul double %x, %select.pow25057 ret double %mul5058}5059 5060define double @v_mul_f64_select_n128_n64(i32 %arg, double %x) {5061; GFX9-SDAG-LABEL: v_mul_f64_select_n128_n64:5062; GFX9-SDAG: ; %bb.0:5063; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5064; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05065; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc5066; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05067; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5068;5069; GFX9-GISEL-LABEL: v_mul_f64_select_n128_n64:5070; GFX9-GISEL: ; %bb.0:5071; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5072; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05073; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc5074; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v05075; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05076; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5077;5078; GFX10-SDAG-LABEL: v_mul_f64_select_n128_n64:5079; GFX10-SDAG: ; %bb.0:5080; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5081; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05082; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5083; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05084; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5085;5086; GFX10-GISEL-LABEL: v_mul_f64_select_n128_n64:5087; GFX10-GISEL: ; %bb.0:5088; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5089; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05090; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5091; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05092; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05093; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5094;5095; GFX11-SDAG-LABEL: v_mul_f64_select_n128_n64:5096; GFX11-SDAG: ; %bb.0:5097; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5098; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05099; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5100; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05101; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5102;5103; GFX11-GISEL-LABEL: v_mul_f64_select_n128_n64:5104; GFX11-GISEL: ; %bb.0:5105; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5106; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05107; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5108; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05109; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05110; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5111 %cond = icmp eq i32 %arg, 05112 %select.pow2 = select i1 %cond, double -128.0, double -64.05113 %mul = fmul double %x, %select.pow25114 ret double %mul5115}5116 5117define double @v_mul_f64_select_n128_n16(i32 %arg, double %x) {5118; GFX9-LABEL: v_mul_f64_select_n128_n16:5119; GFX9: ; %bb.0:5120; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5121; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05122; GFX9-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc5123; GFX9-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05124; GFX9-NEXT: s_setpc_b64 s[30:31]5125;5126; GFX1011-LABEL: v_mul_f64_select_n128_n16:5127; GFX1011: ; %bb.0:5128; GFX1011-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5129; GFX1011-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05130; GFX1011-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo5131; GFX1011-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05132; GFX1011-NEXT: s_setpc_b64 s[30:31]5133 %cond = icmp eq i32 %arg, 05134 %select.pow2 = select i1 %cond, double -128.0, double -16.05135 %mul = fmul double %x, %select.pow25136 ret double %mul5137}5138 5139define double @v_contract_mul_add_f64_select_64_1(i32 %arg, double %x, double %y) {5140; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_64_1:5141; GFX9-SDAG: ; %bb.0:5142; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5143; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x3ff000005144; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0x405000005145; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05146; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05147; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5148; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5149; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5150;5151; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_64_1:5152; GFX9-GISEL: ; %bb.0:5153; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5154; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05155; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc5156; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05157; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5158; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5159;5160; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_64_1:5161; GFX10-SDAG: ; %bb.0:5162; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5163; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0x405000005164; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05165; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05166; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x3ff00000, v6, vcc_lo5167; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5168; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5169;5170; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_64_1:5171; GFX10-GISEL: ; %bb.0:5172; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5173; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05174; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5175; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05176; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5177; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5178;5179; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_64_1:5180; GFX11-SDAG: ; %bb.0:5181; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5182; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0x40500000 :: v_dual_mov_b32 v5, 05183; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05184; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x3ff00000, v6, vcc_lo5185; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5186; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5187;5188; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_64_1:5189; GFX11-GISEL: ; %bb.0:5190; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5191; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05192; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5193; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05194; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5195; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5196 %cond = icmp eq i32 %arg, 05197 %select.pow2 = select contract i1 %cond, double 64.0, double 1.05198 %mul = fmul contract double %x, %select.pow25199 %fma = fadd contract double %mul, %y5200 ret double %fma5201}5202 5203define double @v_contract_mul_add_f64_select_1_64(i32 %arg, double %x, double %y) {5204; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_1_64:5205; GFX9-SDAG: ; %bb.0:5206; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5207; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x405000005208; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0x3ff000005209; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05210; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05211; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5212; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5213; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5214;5215; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_1_64:5216; GFX9-GISEL: ; %bb.0:5217; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5218; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05219; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc5220; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05221; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5222; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5223;5224; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_1_64:5225; GFX10-SDAG: ; %bb.0:5226; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5227; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0x3ff000005228; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05229; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05230; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40500000, v6, vcc_lo5231; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5232; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5233;5234; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_1_64:5235; GFX10-GISEL: ; %bb.0:5236; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5237; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05238; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5239; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05240; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5241; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5242;5243; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_1_64:5244; GFX11-SDAG: ; %bb.0:5245; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5246; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0x3ff00000 :: v_dual_mov_b32 v5, 05247; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05248; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40500000, v6, vcc_lo5249; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5250; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5251;5252; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_1_64:5253; GFX11-GISEL: ; %bb.0:5254; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5255; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05256; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5257; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05258; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5259; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5260 %cond = icmp eq i32 %arg, 05261 %select.pow2 = select contract i1 %cond, double 1.0, double 64.05262 %mul = fmul contract double %x, %select.pow25263 %fma = fadd contract double %mul, %y5264 ret double %fma5265}5266 5267define double @v_contract_mul_add_f64_select_n64_n1(i32 %arg, double %x, double %y) {5268; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_n64_n1:5269; GFX9-SDAG: ; %bb.0:5270; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5271; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0xbff000005272; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0xc05000005273; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05274; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05275; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5276; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5277; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5278;5279; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_n64_n1:5280; GFX9-GISEL: ; %bb.0:5281; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5282; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05283; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc5284; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05285; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5286; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5287;5288; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_n64_n1:5289; GFX10-SDAG: ; %bb.0:5290; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5291; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0xc05000005292; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05293; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05294; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0xbff00000, v6, vcc_lo5295; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5296; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5297;5298; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_n64_n1:5299; GFX10-GISEL: ; %bb.0:5300; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5301; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05302; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5303; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05304; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5305; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5306;5307; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_n64_n1:5308; GFX11-SDAG: ; %bb.0:5309; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5310; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0xc0500000 :: v_dual_mov_b32 v5, 05311; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05312; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0xbff00000, v6, vcc_lo5313; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5314; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5315;5316; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_n64_n1:5317; GFX11-GISEL: ; %bb.0:5318; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5319; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05320; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5321; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05322; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5323; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5324 %cond = icmp eq i32 %arg, 05325 %select.pow2 = select contract i1 %cond, double -64.0, double -1.05326 %mul = fmul contract double %x, %select.pow25327 %fma = fadd contract double %mul, %y5328 ret double %fma5329}5330 5331define double @v_contract_mul_add_f64_select_n1_n64(i32 %arg, double %x, double %y) {5332; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_n1_n64:5333; GFX9-SDAG: ; %bb.0:5334; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5335; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0xc05000005336; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0xbff000005337; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05338; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05339; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5340; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5341; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5342;5343; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_n1_n64:5344; GFX9-GISEL: ; %bb.0:5345; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5346; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05347; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc5348; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05349; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5350; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5351;5352; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_n1_n64:5353; GFX10-SDAG: ; %bb.0:5354; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5355; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0xbff000005356; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05357; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05358; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0xc0500000, v6, vcc_lo5359; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5360; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5361;5362; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_n1_n64:5363; GFX10-GISEL: ; %bb.0:5364; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5365; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05366; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5367; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05368; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5369; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5370;5371; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_n1_n64:5372; GFX11-SDAG: ; %bb.0:5373; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5374; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0xbff00000 :: v_dual_mov_b32 v5, 05375; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05376; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0xc0500000, v6, vcc_lo5377; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5378; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5379;5380; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_n1_n64:5381; GFX11-GISEL: ; %bb.0:5382; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5383; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05384; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5385; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], -v[1:2], v05386; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5387; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5388 %cond = icmp eq i32 %arg, 05389 %select.pow2 = select contract i1 %cond, double -1.0, double -64.05390 %mul = fmul contract double %x, %select.pow25391 %fma = fadd contract double %mul, %y5392 ret double %fma5393}5394 5395define double @v_contract_mul_add_f64_select_128_64(i32 %arg, double %x, double %y) {5396; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_128_64:5397; GFX9-SDAG: ; %bb.0:5398; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5399; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x405000005400; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0x406000005401; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05402; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05403; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5404; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5405; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5406;5407; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_128_64:5408; GFX9-GISEL: ; %bb.0:5409; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5410; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05411; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc5412; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v05413; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05414; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5415; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5416;5417; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_128_64:5418; GFX10-SDAG: ; %bb.0:5419; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5420; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0x406000005421; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05422; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05423; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40500000, v6, vcc_lo5424; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5425; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5426;5427; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_128_64:5428; GFX10-GISEL: ; %bb.0:5429; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5430; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05431; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5432; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05433; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05434; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5435; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5436;5437; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_128_64:5438; GFX11-SDAG: ; %bb.0:5439; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5440; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0x40600000 :: v_dual_mov_b32 v5, 05441; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05442; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40500000, v6, vcc_lo5443; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5444; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5445;5446; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_128_64:5447; GFX11-GISEL: ; %bb.0:5448; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5449; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05450; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5451; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05452; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05453; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5454; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5455 %cond = icmp eq i32 %arg, 05456 %select.pow2 = select i1 %cond, double 128.0, double 64.05457 %mul = fmul contract double %x, %select.pow25458 %fma = fadd contract double %mul, %y5459 ret double %fma5460}5461 5462define double @v_contract_mul_add_f64_select_128_4(i32 %arg, double %x, double %y) {5463; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_128_4:5464; GFX9-SDAG: ; %bb.0:5465; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5466; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x401000005467; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0x406000005468; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05469; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05470; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5471; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5472; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5473;5474; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_128_4:5475; GFX9-GISEL: ; %bb.0:5476; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5477; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05478; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc5479; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05480; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5481; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5482;5483; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_128_4:5484; GFX10-SDAG: ; %bb.0:5485; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5486; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0x406000005487; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05488; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05489; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40100000, v6, vcc_lo5490; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5491; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5492;5493; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_128_4:5494; GFX10-GISEL: ; %bb.0:5495; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5496; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05497; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo5498; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05499; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5500; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5501;5502; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_128_4:5503; GFX11-SDAG: ; %bb.0:5504; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5505; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0x40600000 :: v_dual_mov_b32 v5, 05506; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05507; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40100000, v6, vcc_lo5508; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5509; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5510;5511; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_128_4:5512; GFX11-GISEL: ; %bb.0:5513; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5514; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05515; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo5516; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05517; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5518; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5519 %cond = icmp eq i32 %arg, 05520 %select.pow2 = select i1 %cond, double 128.0, double 4.05521 %mul = fmul contract double %x, %select.pow25522 %fma = fadd contract double %mul, %y5523 ret double %fma5524}5525 5526define double @v_contract_mul_add_f64_select_2_4(i32 %arg, double %x, double %y) {5527; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_2_4:5528; GFX9-SDAG: ; %bb.0:5529; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5530; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x401000005531; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05532; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05533; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v6, v6, 2.0, vcc5534; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5535; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5536;5537; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_2_4:5538; GFX9-GISEL: ; %bb.0:5539; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5540; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05541; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc5542; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 2, v05543; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05544; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5545; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5546;5547; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_2_4:5548; GFX10-SDAG: ; %bb.0:5549; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5550; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05551; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05552; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v6, 0x40100000, 2.0, vcc_lo5553; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5554; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5555;5556; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_2_4:5557; GFX10-GISEL: ; %bb.0:5558; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5559; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05560; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo5561; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 2, v05562; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05563; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5564; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5565;5566; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_2_4:5567; GFX11-SDAG: ; %bb.0:5568; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5569; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05570; GFX11-SDAG-NEXT: v_mov_b32_e32 v5, 05571; GFX11-SDAG-NEXT: v_cndmask_b32_e64 v6, 0x40100000, 2.0, vcc_lo5572; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5573; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5574;5575; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_2_4:5576; GFX11-GISEL: ; %bb.0:5577; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5578; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05579; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo5580; GFX11-GISEL-NEXT: v_add_nc_u32_e32 v0, 2, v05581; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05582; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5583; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5584 %cond = icmp eq i32 %arg, 05585 %select.pow2 = select i1 %cond, double 2.0, double 4.05586 %mul = fmul contract double %x, %select.pow25587 %fma = fadd contract double %mul, %y5588 ret double %fma5589}5590 5591define double @v_contract_mul_add_f64_select_4_128(i32 %arg, double %x, double %y) {5592; GFX9-SDAG-LABEL: v_contract_mul_add_f64_select_4_128:5593; GFX9-SDAG: ; %bb.0:5594; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5595; GFX9-SDAG-NEXT: v_mov_b32_e32 v6, 0x406000005596; GFX9-SDAG-NEXT: v_mov_b32_e32 v7, 0x401000005597; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05598; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 05599; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v6, v6, v7, vcc5600; GFX9-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5601; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5602;5603; GFX9-GISEL-LABEL: v_contract_mul_add_f64_select_4_128:5604; GFX9-GISEL: ; %bb.0:5605; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5606; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05607; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc5608; GFX9-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05609; GFX9-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5610; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5611;5612; GFX10-SDAG-LABEL: v_contract_mul_add_f64_select_4_128:5613; GFX10-SDAG: ; %bb.0:5614; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5615; GFX10-SDAG-NEXT: v_mov_b32_e32 v6, 0x401000005616; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05617; GFX10-SDAG-NEXT: v_mov_b32_e32 v5, 05618; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40600000, v6, vcc_lo5619; GFX10-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5620; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5621;5622; GFX10-GISEL-LABEL: v_contract_mul_add_f64_select_4_128:5623; GFX10-GISEL: ; %bb.0:5624; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5625; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05626; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo5627; GFX10-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05628; GFX10-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5629; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5630;5631; GFX11-SDAG-LABEL: v_contract_mul_add_f64_select_4_128:5632; GFX11-SDAG: ; %bb.0:5633; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5634; GFX11-SDAG-NEXT: v_dual_mov_b32 v6, 0x40100000 :: v_dual_mov_b32 v5, 05635; GFX11-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05636; GFX11-SDAG-NEXT: v_cndmask_b32_e32 v6, 0x40600000, v6, vcc_lo5637; GFX11-SDAG-NEXT: v_fma_f64 v[0:1], v[1:2], v[5:6], v[3:4]5638; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]5639;5640; GFX11-GISEL-LABEL: v_contract_mul_add_f64_select_4_128:5641; GFX11-GISEL: ; %bb.0:5642; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5643; GFX11-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05644; GFX11-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo5645; GFX11-GISEL-NEXT: v_ldexp_f64 v[0:1], v[1:2], v05646; GFX11-GISEL-NEXT: v_add_f64 v[0:1], v[0:1], v[3:4]5647; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]5648 %cond = icmp eq i32 %arg, 05649 %select.pow2 = select i1 %cond, double 4.0, double 128.05650 %mul = fmul contract double %x, %select.pow25651 %fma = fadd contract double %mul, %y5652 ret double %fma5653}5654 5655define half @v_mul_f16_select_64_1(i32 %arg, half %x) {5656; GFX9-LABEL: v_mul_f16_select_64_1:5657; GFX9: ; %bb.0:5658; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5659; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05660; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc5661; GFX9-NEXT: v_ldexp_f16_e32 v0, v1, v05662; GFX9-NEXT: s_setpc_b64 s[30:31]5663;5664; GFX10-LABEL: v_mul_f16_select_64_1:5665; GFX10: ; %bb.0:5666; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5667; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05668; GFX10-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5669; GFX10-NEXT: v_ldexp_f16_e32 v0, v1, v05670; GFX10-NEXT: s_setpc_b64 s[30:31]5671;5672; GFX11-SDAG-TRUE16-LABEL: v_mul_f16_select_64_1:5673; GFX11-SDAG-TRUE16: ; %bb.0:5674; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5675; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05676; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5677; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l5678; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5679;5680; GFX11-SDAG-FAKE16-LABEL: v_mul_f16_select_64_1:5681; GFX11-SDAG-FAKE16: ; %bb.0:5682; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5683; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05684; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5685; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v05686; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5687;5688; GFX11-GISEL-TRUE16-LABEL: v_mul_f16_select_64_1:5689; GFX11-GISEL-TRUE16: ; %bb.0:5690; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5691; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05692; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5693; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l5694; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5695;5696; GFX11-GISEL-FAKE16-LABEL: v_mul_f16_select_64_1:5697; GFX11-GISEL-FAKE16: ; %bb.0:5698; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5699; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05700; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo5701; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v05702; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5703 %cond = icmp eq i32 %arg, 05704 %select.pow2 = select i1 %cond, half 64.0, half 1.05705 %mul = fmul half %x, %select.pow25706 ret half %mul5707}5708 5709define half @v_mul_f16_select_1_64(i32 %arg, half %x) {5710; GFX9-LABEL: v_mul_f16_select_1_64:5711; GFX9: ; %bb.0:5712; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5713; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05714; GFX9-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc5715; GFX9-NEXT: v_ldexp_f16_e32 v0, v1, v05716; GFX9-NEXT: s_setpc_b64 s[30:31]5717;5718; GFX10-LABEL: v_mul_f16_select_1_64:5719; GFX10: ; %bb.0:5720; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5721; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05722; GFX10-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5723; GFX10-NEXT: v_ldexp_f16_e32 v0, v1, v05724; GFX10-NEXT: s_setpc_b64 s[30:31]5725;5726; GFX11-SDAG-TRUE16-LABEL: v_mul_f16_select_1_64:5727; GFX11-SDAG-TRUE16: ; %bb.0:5728; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5729; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05730; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5731; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l5732; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5733;5734; GFX11-SDAG-FAKE16-LABEL: v_mul_f16_select_1_64:5735; GFX11-SDAG-FAKE16: ; %bb.0:5736; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5737; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05738; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5739; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v05740; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5741;5742; GFX11-GISEL-TRUE16-LABEL: v_mul_f16_select_1_64:5743; GFX11-GISEL-TRUE16: ; %bb.0:5744; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5745; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05746; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5747; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l5748; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5749;5750; GFX11-GISEL-FAKE16-LABEL: v_mul_f16_select_1_64:5751; GFX11-GISEL-FAKE16: ; %bb.0:5752; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5753; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05754; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5755; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v05756; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5757 %cond = icmp eq i32 %arg, 05758 %select.pow2 = select i1 %cond, half 1.0, half 64.05759 %mul = fmul half %x, %select.pow25760 ret half %mul5761}5762 5763define half @v_mul_f16_select_n1_n64(i32 %arg, half %x) {5764; GFX9-LABEL: v_mul_f16_select_n1_n64:5765; GFX9: ; %bb.0:5766; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5767; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05768; GFX9-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc5769; GFX9-NEXT: v_ldexp_f16_e64 v0, -v1, v05770; GFX9-NEXT: s_setpc_b64 s[30:31]5771;5772; GFX10-LABEL: v_mul_f16_select_n1_n64:5773; GFX10: ; %bb.0:5774; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5775; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05776; GFX10-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5777; GFX10-NEXT: v_ldexp_f16_e64 v0, -v1, v05778; GFX10-NEXT: s_setpc_b64 s[30:31]5779;5780; GFX11-SDAG-TRUE16-LABEL: v_mul_f16_select_n1_n64:5781; GFX11-SDAG-TRUE16: ; %bb.0:5782; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5783; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05784; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5785; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l5786; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5787;5788; GFX11-SDAG-FAKE16-LABEL: v_mul_f16_select_n1_n64:5789; GFX11-SDAG-FAKE16: ; %bb.0:5790; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5791; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05792; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5793; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v05794; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5795;5796; GFX11-GISEL-TRUE16-LABEL: v_mul_f16_select_n1_n64:5797; GFX11-GISEL-TRUE16: ; %bb.0:5798; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5799; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05800; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5801; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l5802; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5803;5804; GFX11-GISEL-FAKE16-LABEL: v_mul_f16_select_n1_n64:5805; GFX11-GISEL-FAKE16: ; %bb.0:5806; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5807; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05808; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo5809; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v05810; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5811 %cond = icmp eq i32 %arg, 05812 %select.pow2 = select i1 %cond, half -1.0, half -64.05813 %mul = fmul half %x, %select.pow25814 ret half %mul5815}5816 5817define half @v_mul_f16_select_128_64(i32 %arg, half %x) {5818; GFX9-SDAG-LABEL: v_mul_f16_select_128_64:5819; GFX9-SDAG: ; %bb.0:5820; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5821; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05822; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc5823; GFX9-SDAG-NEXT: v_ldexp_f16_e32 v0, v1, v05824; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5825;5826; GFX9-GISEL-LABEL: v_mul_f16_select_128_64:5827; GFX9-GISEL: ; %bb.0:5828; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5829; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05830; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc5831; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v05832; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff80005833; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff5834; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v2, v35835; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v05836; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5837;5838; GFX10-SDAG-LABEL: v_mul_f16_select_128_64:5839; GFX10-SDAG: ; %bb.0:5840; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5841; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05842; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5843; GFX10-SDAG-NEXT: v_ldexp_f16_e32 v0, v1, v05844; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5845;5846; GFX10-GISEL-LABEL: v_mul_f16_select_128_64:5847; GFX10-GISEL: ; %bb.0:5848; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5849; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05850; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff5851; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5852; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05853; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v25854; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v05855; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5856;5857; GFX11-SDAG-TRUE16-LABEL: v_mul_f16_select_128_64:5858; GFX11-SDAG-TRUE16: ; %bb.0:5859; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5860; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05861; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5862; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l5863; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5864;5865; GFX11-SDAG-FAKE16-LABEL: v_mul_f16_select_128_64:5866; GFX11-SDAG-FAKE16: ; %bb.0:5867; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5868; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05869; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5870; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v05871; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5872;5873; GFX11-GISEL-TRUE16-LABEL: v_mul_f16_select_128_64:5874; GFX11-GISEL-TRUE16: ; %bb.0:5875; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5876; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05877; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0x7fff5878; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5879; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v0, 6, v05880; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v25881; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l5882; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5883;5884; GFX11-GISEL-FAKE16-LABEL: v_mul_f16_select_128_64:5885; GFX11-GISEL-FAKE16: ; %bb.0:5886; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5887; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05888; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0x7fff5889; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5890; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 6, v05891; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v25892; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v05893; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5894 %cond = icmp eq i32 %arg, 05895 %select.pow2 = select i1 %cond, half 128.0, half 64.05896 %mul = fmul half %x, %select.pow25897 ret half %mul5898}5899 5900define half @v_mul_f16_select_n128_n64(i32 %arg, half %x) {5901; GFX9-SDAG-LABEL: v_mul_f16_select_n128_n64:5902; GFX9-SDAG: ; %bb.0:5903; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5904; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05905; GFX9-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc5906; GFX9-SDAG-NEXT: v_ldexp_f16_e64 v0, -v1, v05907; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]5908;5909; GFX9-GISEL-LABEL: v_mul_f16_select_n128_n64:5910; GFX9-GISEL: ; %bb.0:5911; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5912; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05913; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc5914; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v05915; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 0xffff80005916; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff5917; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v2, v35918; GFX9-GISEL-NEXT: v_ldexp_f16_e64 v0, -v1, v05919; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]5920;5921; GFX10-SDAG-LABEL: v_mul_f16_select_n128_n64:5922; GFX10-SDAG: ; %bb.0:5923; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5924; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05925; GFX10-SDAG-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5926; GFX10-SDAG-NEXT: v_ldexp_f16_e64 v0, -v1, v05927; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]5928;5929; GFX10-GISEL-LABEL: v_mul_f16_select_n128_n64:5930; GFX10-GISEL: ; %bb.0:5931; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5932; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05933; GFX10-GISEL-NEXT: v_mov_b32_e32 v2, 0x7fff5934; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5935; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v05936; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v25937; GFX10-GISEL-NEXT: v_ldexp_f16_e64 v0, -v1, v05938; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]5939;5940; GFX11-SDAG-TRUE16-LABEL: v_mul_f16_select_n128_n64:5941; GFX11-SDAG-TRUE16: ; %bb.0:5942; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5943; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05944; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5945; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l5946; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]5947;5948; GFX11-SDAG-FAKE16-LABEL: v_mul_f16_select_n128_n64:5949; GFX11-SDAG-FAKE16: ; %bb.0:5950; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5951; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05952; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 7, vcc_lo5953; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v05954; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]5955;5956; GFX11-GISEL-TRUE16-LABEL: v_mul_f16_select_n128_n64:5957; GFX11-GISEL-TRUE16: ; %bb.0:5958; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5959; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05960; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v2, 0x7fff5961; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5962; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v0, 6, v05963; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v25964; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l5965; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]5966;5967; GFX11-GISEL-FAKE16-LABEL: v_mul_f16_select_n128_n64:5968; GFX11-GISEL-FAKE16: ; %bb.0:5969; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5970; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05971; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v2, 0x7fff5972; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo5973; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 6, v05974; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v25975; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v05976; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]5977 %cond = icmp eq i32 %arg, 05978 %select.pow2 = select i1 %cond, half -128.0, half -64.05979 %mul = fmul half %x, %select.pow25980 ret half %mul5981}5982 5983define half @v_mul_f16_select_n128_n16(i32 %arg, half %x) {5984; GFX9-LABEL: v_mul_f16_select_n128_n16:5985; GFX9: ; %bb.0:5986; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5987; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 0, v05988; GFX9-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc5989; GFX9-NEXT: v_ldexp_f16_e64 v0, -v1, v05990; GFX9-NEXT: s_setpc_b64 s[30:31]5991;5992; GFX10-LABEL: v_mul_f16_select_n128_n16:5993; GFX10: ; %bb.0:5994; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)5995; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v05996; GFX10-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo5997; GFX10-NEXT: v_ldexp_f16_e64 v0, -v1, v05998; GFX10-NEXT: s_setpc_b64 s[30:31]5999;6000; GFX11-SDAG-TRUE16-LABEL: v_mul_f16_select_n128_n16:6001; GFX11-SDAG-TRUE16: ; %bb.0:6002; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6003; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06004; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo6005; GFX11-SDAG-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l6006; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6007;6008; GFX11-SDAG-FAKE16-LABEL: v_mul_f16_select_n128_n16:6009; GFX11-SDAG-FAKE16: ; %bb.0:6010; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6011; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06012; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo6013; GFX11-SDAG-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v06014; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6015;6016; GFX11-GISEL-TRUE16-LABEL: v_mul_f16_select_n128_n16:6017; GFX11-GISEL-TRUE16: ; %bb.0:6018; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6019; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06020; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo6021; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l6022; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6023;6024; GFX11-GISEL-FAKE16-LABEL: v_mul_f16_select_n128_n16:6025; GFX11-GISEL-FAKE16: ; %bb.0:6026; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6027; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06028; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo6029; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v06030; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6031 %cond = icmp eq i32 %arg, 06032 %select.pow2 = select i1 %cond, half -128.0, half -16.06033 %mul = fmul half %x, %select.pow26034 ret half %mul6035}6036 6037define half @v_contract_mul_add_f16_select_64_1(i32 %arg, half %x, half %y) {6038; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_64_1:6039; GFX9-SDAG: ; %bb.0:6040; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6041; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x3c006042; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x54006043; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06044; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6045; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26046; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6047;6048; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_64_1:6049; GFX9-GISEL: ; %bb.0:6050; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6051; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06052; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc6053; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06054; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26055; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6056;6057; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_64_1:6058; GFX10-SDAG: ; %bb.0:6059; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6060; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x54006061; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06062; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v3, vcc_lo6063; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26064; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6065;6066; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_64_1:6067; GFX10-GISEL: ; %bb.0:6068; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6069; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06070; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6071; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06072; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26073; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6074;6075; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_64_1:6076; GFX11-SDAG-TRUE16: ; %bb.0:6077; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6078; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x3c006079; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06080; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x5400, vcc_lo6081; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6082; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6083;6084; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_64_1:6085; GFX11-SDAG-FAKE16: ; %bb.0:6086; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6087; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x54006088; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06089; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v3, vcc_lo6090; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26091; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6092;6093; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_64_1:6094; GFX11-GISEL-TRUE16: ; %bb.0:6095; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6096; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06097; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6098; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l6099; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6100; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6101;6102; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_64_1:6103; GFX11-GISEL-FAKE16: ; %bb.0:6104; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6105; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06106; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6107; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v06108; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26109; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6110 %cond = icmp eq i32 %arg, 06111 %select.pow2 = select contract i1 %cond, half 64.0, half 1.06112 %mul = fmul contract half %x, %select.pow26113 %fma = fadd contract half %mul, %y6114 ret half %fma6115}6116 6117define half @v_contract_mul_add_f16_select_1_64(i32 %arg, half %x, half %y) {6118; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_1_64:6119; GFX9-SDAG: ; %bb.0:6120; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6121; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x54006122; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x3c006123; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06124; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6125; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26126; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6127;6128; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_1_64:6129; GFX9-GISEL: ; %bb.0:6130; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6131; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06132; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc6133; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06134; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26135; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6136;6137; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_1_64:6138; GFX10-SDAG: ; %bb.0:6139; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6140; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x3c006141; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06142; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo6143; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26144; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6145;6146; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_1_64:6147; GFX10-GISEL: ; %bb.0:6148; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6149; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06150; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6151; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06152; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26153; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6154;6155; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_1_64:6156; GFX11-SDAG-TRUE16: ; %bb.0:6157; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6158; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x54006159; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06160; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x3c00, vcc_lo6161; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6162; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6163;6164; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_1_64:6165; GFX11-SDAG-FAKE16: ; %bb.0:6166; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6167; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x3c006168; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06169; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo6170; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26171; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6172;6173; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_1_64:6174; GFX11-GISEL-TRUE16: ; %bb.0:6175; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6176; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06177; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6178; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l6179; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6180; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6181;6182; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_1_64:6183; GFX11-GISEL-FAKE16: ; %bb.0:6184; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6185; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06186; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6187; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v06188; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26189; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6190 %cond = icmp eq i32 %arg, 06191 %select.pow2 = select contract i1 %cond, half 1.0, half 64.06192 %mul = fmul contract half %x, %select.pow26193 %fma = fadd contract half %mul, %y6194 ret half %fma6195}6196 6197define half @v_contract_mul_add_f16_select_n64_n1(i32 %arg, half %x, half %y) {6198; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_n64_n1:6199; GFX9-SDAG: ; %bb.0:6200; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6201; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xbc006202; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xd4006203; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06204; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6205; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26206; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6207;6208; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_n64_n1:6209; GFX9-GISEL: ; %bb.0:6210; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6211; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06212; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc6213; GFX9-GISEL-NEXT: v_ldexp_f16_e64 v0, -v1, v06214; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26215; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6216;6217; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_n64_n1:6218; GFX10-SDAG: ; %bb.0:6219; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6220; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xd4006221; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06222; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xbc00, v3, vcc_lo6223; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26224; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6225;6226; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_n64_n1:6227; GFX10-GISEL: ; %bb.0:6228; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6229; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06230; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6231; GFX10-GISEL-NEXT: v_ldexp_f16_e64 v0, -v1, v06232; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26233; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6234;6235; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_n64_n1:6236; GFX11-SDAG-TRUE16: ; %bb.0:6237; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6238; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xbc006239; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06240; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0xd400, vcc_lo6241; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6242; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6243;6244; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_n64_n1:6245; GFX11-SDAG-FAKE16: ; %bb.0:6246; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6247; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0xd4006248; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06249; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xbc00, v3, vcc_lo6250; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26251; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6252;6253; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_n64_n1:6254; GFX11-GISEL-TRUE16: ; %bb.0:6255; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6256; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06257; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6258; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l6259; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6260; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6261;6262; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_n64_n1:6263; GFX11-GISEL-FAKE16: ; %bb.0:6264; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6265; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06266; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6267; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v06268; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26269; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6270 %cond = icmp eq i32 %arg, 06271 %select.pow2 = select contract i1 %cond, half -64.0, half -1.06272 %mul = fmul contract half %x, %select.pow26273 %fma = fadd contract half %mul, %y6274 ret half %fma6275}6276 6277define half @v_contract_mul_add_f16_select_n1_n64(i32 %arg, half %x, half %y) {6278; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_n1_n64:6279; GFX9-SDAG: ; %bb.0:6280; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6281; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xd4006282; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xbc006283; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06284; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6285; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26286; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6287;6288; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_n1_n64:6289; GFX9-GISEL: ; %bb.0:6290; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6291; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06292; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc6293; GFX9-GISEL-NEXT: v_ldexp_f16_e64 v0, -v1, v06294; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26295; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6296;6297; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_n1_n64:6298; GFX10-SDAG: ; %bb.0:6299; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6300; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xbc006301; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06302; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xd400, v3, vcc_lo6303; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26304; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6305;6306; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_n1_n64:6307; GFX10-GISEL: ; %bb.0:6308; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6309; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06310; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6311; GFX10-GISEL-NEXT: v_ldexp_f16_e64 v0, -v1, v06312; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26313; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6314;6315; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_n1_n64:6316; GFX11-SDAG-TRUE16: ; %bb.0:6317; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6318; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xd4006319; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06320; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0xbc00, vcc_lo6321; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6322; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6323;6324; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_n1_n64:6325; GFX11-SDAG-FAKE16: ; %bb.0:6326; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6327; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0xbc006328; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06329; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xd400, v3, vcc_lo6330; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26331; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6332;6333; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_n1_n64:6334; GFX11-GISEL-TRUE16: ; %bb.0:6335; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6336; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06337; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6338; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e64 v0.l, -v1.l, v0.l6339; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6340; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6341;6342; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_n1_n64:6343; GFX11-GISEL-FAKE16: ; %bb.0:6344; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6345; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06346; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6347; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e64 v0, -v1, v06348; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26349; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6350 %cond = icmp eq i32 %arg, 06351 %select.pow2 = select contract i1 %cond, half -1.0, half -64.06352 %mul = fmul contract half %x, %select.pow26353 %fma = fadd contract half %mul, %y6354 ret half %fma6355}6356 6357define half @v_contract_mul_add_f16_select_128_64(i32 %arg, half %x, half %y) {6358; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_128_64:6359; GFX9-SDAG: ; %bb.0:6360; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6361; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x54006362; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x58006363; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06364; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6365; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26366; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6367;6368; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_128_64:6369; GFX9-GISEL: ; %bb.0:6370; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6371; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06372; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc6373; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v06374; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff80006375; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff6376; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v3, v46377; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06378; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26379; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6380;6381; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_128_64:6382; GFX10-SDAG: ; %bb.0:6383; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6384; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x58006385; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06386; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo6387; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26388; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6389;6390; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_128_64:6391; GFX10-GISEL: ; %bb.0:6392; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6393; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06394; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff6395; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo6396; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v06397; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v36398; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06399; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26400; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6401;6402; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_128_64:6403; GFX11-SDAG-TRUE16: ; %bb.0:6404; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6405; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x54006406; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06407; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x5800, vcc_lo6408; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6409; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6410;6411; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_128_64:6412; GFX11-SDAG-FAKE16: ; %bb.0:6413; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6414; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x58006415; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06416; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo6417; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26418; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6419;6420; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_128_64:6421; GFX11-GISEL-TRUE16: ; %bb.0:6422; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6423; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06424; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v3, 0x7fff6425; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo6426; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v0, 6, v06427; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v36428; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l6429; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6430; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6431;6432; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_128_64:6433; GFX11-GISEL-FAKE16: ; %bb.0:6434; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6435; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06436; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x7fff6437; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo6438; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 6, v06439; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v36440; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v06441; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26442; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6443 %cond = icmp eq i32 %arg, 06444 %select.pow2 = select i1 %cond, half 128.0, half 64.06445 %mul = fmul contract half %x, %select.pow26446 %fma = fadd contract half %mul, %y6447 ret half %fma6448}6449 6450define half @v_contract_mul_add_f16_select_128_4(i32 %arg, half %x, half %y) {6451; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_128_4:6452; GFX9-SDAG: ; %bb.0:6453; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6454; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x44006455; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x58006456; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06457; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6458; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26459; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6460;6461; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_128_4:6462; GFX9-GISEL: ; %bb.0:6463; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6464; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06465; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc6466; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06467; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26468; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6469;6470; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_128_4:6471; GFX10-SDAG: ; %bb.0:6472; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6473; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x58006474; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06475; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x4400, v3, vcc_lo6476; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26477; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6478;6479; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_128_4:6480; GFX10-GISEL: ; %bb.0:6481; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6482; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06483; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo6484; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06485; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26486; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6487;6488; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_128_4:6489; GFX11-SDAG-TRUE16: ; %bb.0:6490; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6491; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x44006492; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06493; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x5800, vcc_lo6494; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6495; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6496;6497; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_128_4:6498; GFX11-SDAG-FAKE16: ; %bb.0:6499; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6500; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x58006501; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06502; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x4400, v3, vcc_lo6503; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26504; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6505;6506; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_128_4:6507; GFX11-GISEL-TRUE16: ; %bb.0:6508; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6509; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06510; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo6511; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l6512; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6513; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6514;6515; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_128_4:6516; GFX11-GISEL-FAKE16: ; %bb.0:6517; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6518; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06519; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo6520; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v06521; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26522; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6523 %cond = icmp eq i32 %arg, 06524 %select.pow2 = select i1 %cond, half 128.0, half 4.06525 %mul = fmul contract half %x, %select.pow26526 %fma = fadd contract half %mul, %y6527 ret half %fma6528}6529 6530define half @v_contract_mul_add_f16_select_2_4(i32 %arg, half %x, half %y) {6531; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_2_4:6532; GFX9-SDAG: ; %bb.0:6533; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6534; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x44006535; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x40006536; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06537; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6538; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26539; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6540;6541; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_2_4:6542; GFX9-GISEL: ; %bb.0:6543; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6544; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06545; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc6546; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 2, v06547; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff80006548; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff6549; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v3, v46550; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06551; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26552; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6553;6554; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_2_4:6555; GFX10-SDAG: ; %bb.0:6556; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6557; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x40006558; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06559; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x4400, v3, vcc_lo6560; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26561; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6562;6563; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_2_4:6564; GFX10-GISEL: ; %bb.0:6565; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6566; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06567; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff6568; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo6569; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 2, v06570; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v36571; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06572; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26573; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6574;6575; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_2_4:6576; GFX11-SDAG-TRUE16: ; %bb.0:6577; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6578; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x44006579; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06580; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x4000, vcc_lo6581; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6582; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6583;6584; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_2_4:6585; GFX11-SDAG-FAKE16: ; %bb.0:6586; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6587; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x40006588; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06589; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x4400, v3, vcc_lo6590; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26591; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6592;6593; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_2_4:6594; GFX11-GISEL-TRUE16: ; %bb.0:6595; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6596; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06597; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v3, 0x7fff6598; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo6599; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v0, 2, v06600; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v36601; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l6602; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6603; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6604;6605; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_2_4:6606; GFX11-GISEL-FAKE16: ; %bb.0:6607; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6608; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06609; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x7fff6610; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo6611; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 2, v06612; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v36613; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v06614; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26615; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6616 %cond = icmp eq i32 %arg, 06617 %select.pow2 = select i1 %cond, half 2.0, half 4.06618 %mul = fmul contract half %x, %select.pow26619 %fma = fadd contract half %mul, %y6620 ret half %fma6621}6622 6623define half @v_contract_mul_add_f16_select_4_128(i32 %arg, half %x, half %y) {6624; GFX9-SDAG-LABEL: v_contract_mul_add_f16_select_4_128:6625; GFX9-SDAG: ; %bb.0:6626; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6627; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x58006628; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x44006629; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06630; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6631; GFX9-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26632; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6633;6634; GFX9-GISEL-LABEL: v_contract_mul_add_f16_select_4_128:6635; GFX9-GISEL: ; %bb.0:6636; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6637; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06638; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc6639; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06640; GFX9-GISEL-NEXT: v_add_f16_e32 v0, v0, v26641; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6642;6643; GFX10-SDAG-LABEL: v_contract_mul_add_f16_select_4_128:6644; GFX10-SDAG: ; %bb.0:6645; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6646; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x44006647; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06648; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5800, v3, vcc_lo6649; GFX10-SDAG-NEXT: v_fma_f16 v0, v1, v0, v26650; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6651;6652; GFX10-GISEL-LABEL: v_contract_mul_add_f16_select_4_128:6653; GFX10-GISEL: ; %bb.0:6654; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6655; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06656; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo6657; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v1, v06658; GFX10-GISEL-NEXT: v_add_f16_e32 v0, v0, v26659; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6660;6661; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_f16_select_4_128:6662; GFX11-SDAG-TRUE16: ; %bb.0:6663; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6664; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x58006665; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06666; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x4400, vcc_lo6667; GFX11-SDAG-TRUE16-NEXT: v_fma_f16 v0.l, v1.l, v0.l, v2.l6668; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6669;6670; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_f16_select_4_128:6671; GFX11-SDAG-FAKE16: ; %bb.0:6672; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6673; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x44006674; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06675; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5800, v3, vcc_lo6676; GFX11-SDAG-FAKE16-NEXT: v_fma_f16 v0, v1, v0, v26677; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6678;6679; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_f16_select_4_128:6680; GFX11-GISEL-TRUE16: ; %bb.0:6681; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6682; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06683; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo6684; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v1.l, v0.l6685; GFX11-GISEL-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v2.l6686; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6687;6688; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_f16_select_4_128:6689; GFX11-GISEL-FAKE16: ; %bb.0:6690; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6691; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06692; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo6693; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v1, v06694; GFX11-GISEL-FAKE16-NEXT: v_add_f16_e32 v0, v0, v26695; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6696 %cond = icmp eq i32 %arg, 06697 %select.pow2 = select i1 %cond, half 4.0, half 128.06698 %mul = fmul contract half %x, %select.pow26699 %fma = fadd contract half %mul, %y6700 ret half %fma6701}6702 6703define <2 x half> @v_mul_v2f16_select_64_1(<2 x i32> %arg, <2 x half> %x) {6704; GFX9-SDAG-LABEL: v_mul_v2f16_select_64_1:6705; GFX9-SDAG: ; %bb.0:6706; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6707; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x3c006708; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x54006709; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16710; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc6711; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06712; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6713; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v16714; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v2, v06715; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6716;6717; GFX9-GISEL-LABEL: v_mul_v2f16_select_64_1:6718; GFX9-GISEL: ; %bb.0:6719; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6720; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06721; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc6722; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16723; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc6724; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v06725; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6726; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v06727; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6728;6729; GFX10-SDAG-LABEL: v_mul_v2f16_select_64_1:6730; GFX10-SDAG: ; %bb.0:6731; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6732; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x54006733; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16734; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v3, vcc_lo6735; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06736; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v3, vcc_lo6737; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v16738; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v2, v06739; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6740;6741; GFX10-GISEL-LABEL: v_mul_v2f16_select_64_1:6742; GFX10-GISEL: ; %bb.0:6743; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6744; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06745; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6746; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16747; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v06748; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo6749; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v06750; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6751; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v06752; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6753;6754; GFX11-SDAG-TRUE16-LABEL: v_mul_v2f16_select_64_1:6755; GFX11-SDAG-TRUE16: ; %bb.0:6756; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6757; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x3c006758; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16759; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v06760; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x5400, vcc_lo6761; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x5400, s06762; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l6763; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v2, v06764; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6765;6766; GFX11-SDAG-FAKE16-LABEL: v_mul_v2f16_select_64_1:6767; GFX11-SDAG-FAKE16: ; %bb.0:6768; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6769; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x54006770; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16771; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v3, vcc_lo6772; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06773; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v3, vcc_lo6774; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16775; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v2, v06776; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6777;6778; GFX11-GISEL-TRUE16-LABEL: v_mul_v2f16_select_64_1:6779; GFX11-GISEL-TRUE16: ; %bb.0:6780; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6781; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06782; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6783; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16784; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l6785; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo6786; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l6787; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6788;6789; GFX11-GISEL-FAKE16-LABEL: v_mul_v2f16_select_64_1:6790; GFX11-GISEL-FAKE16: ; %bb.0:6791; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6792; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06793; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v26794; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo6795; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16796; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v06797; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo6798; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v06799; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v3, v16800; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v06801; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6802 %cond = icmp eq <2 x i32> %arg, zeroinitializer6803 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 64.0, half 64.0>, <2 x half> <half 1.0, half 1.0>6804 %mul = fmul <2 x half> %x, %select.pow26805 ret <2 x half> %mul6806}6807 6808define <2 x half> @v_mul_v2f16_select_1_64(<2 x i32> %arg, <2 x half> %x) {6809; GFX9-SDAG-LABEL: v_mul_v2f16_select_1_64:6810; GFX9-SDAG: ; %bb.0:6811; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6812; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x54006813; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x3c006814; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16815; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc6816; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06817; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6818; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v16819; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v2, v06820; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6821;6822; GFX9-GISEL-LABEL: v_mul_v2f16_select_1_64:6823; GFX9-GISEL: ; %bb.0:6824; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6825; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06826; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc6827; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16828; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc6829; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v06830; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6831; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v06832; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6833;6834; GFX10-SDAG-LABEL: v_mul_v2f16_select_1_64:6835; GFX10-SDAG: ; %bb.0:6836; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6837; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x3c006838; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16839; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x5400, v3, vcc_lo6840; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06841; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo6842; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v16843; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v2, v06844; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6845;6846; GFX10-GISEL-LABEL: v_mul_v2f16_select_1_64:6847; GFX10-GISEL: ; %bb.0:6848; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6849; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06850; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6851; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16852; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v06853; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo6854; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v06855; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6856; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v06857; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6858;6859; GFX11-SDAG-TRUE16-LABEL: v_mul_v2f16_select_1_64:6860; GFX11-SDAG-TRUE16: ; %bb.0:6861; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6862; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x54006863; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16864; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v06865; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x3c00, vcc_lo6866; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x3c00, s06867; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l6868; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v2, v06869; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6870;6871; GFX11-SDAG-FAKE16-LABEL: v_mul_v2f16_select_1_64:6872; GFX11-SDAG-FAKE16: ; %bb.0:6873; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6874; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x3c006875; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16876; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x5400, v3, vcc_lo6877; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06878; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo6879; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16880; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v2, v06881; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6882;6883; GFX11-GISEL-TRUE16-LABEL: v_mul_v2f16_select_1_64:6884; GFX11-GISEL-TRUE16: ; %bb.0:6885; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6886; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06887; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6888; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16889; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l6890; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo6891; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l6892; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]6893;6894; GFX11-GISEL-FAKE16-LABEL: v_mul_v2f16_select_1_64:6895; GFX11-GISEL-FAKE16: ; %bb.0:6896; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6897; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06898; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v26899; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6900; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16901; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v06902; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo6903; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v06904; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v3, v16905; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v06906; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]6907 %cond = icmp eq <2 x i32> %arg, zeroinitializer6908 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 1.0, half 1.0>, <2 x half> <half 64.0, half 64.0>6909 %mul = fmul <2 x half> %x, %select.pow26910 ret <2 x half> %mul6911}6912 6913define <2 x half> @v_mul_v2f16_select_n1_n64(<2 x i32> %arg, <2 x half> %x) {6914; GFX9-SDAG-LABEL: v_mul_v2f16_select_n1_n64:6915; GFX9-SDAG: ; %bb.0:6916; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6917; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xd4006918; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xbc006919; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16920; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc6921; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06922; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc6923; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v16924; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v2, v06925; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]6926;6927; GFX9-GISEL-LABEL: v_mul_v2f16_select_n1_n64:6928; GFX9-GISEL: ; %bb.0:6929; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6930; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v06931; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc6932; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16933; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v26934; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc6935; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v06936; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6937; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v06938; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]6939;6940; GFX10-SDAG-LABEL: v_mul_v2f16_select_n1_n64:6941; GFX10-SDAG: ; %bb.0:6942; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6943; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xbc006944; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16945; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xd400, v3, vcc_lo6946; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06947; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xd400, v3, vcc_lo6948; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v16949; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v2, v06950; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]6951;6952; GFX10-GISEL-LABEL: v_mul_v2f16_select_n1_n64:6953; GFX10-GISEL: ; %bb.0:6954; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6955; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06956; GFX10-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v26957; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6958; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16959; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v06960; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo6961; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v06962; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD6963; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v06964; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]6965;6966; GFX11-SDAG-TRUE16-LABEL: v_mul_v2f16_select_n1_n64:6967; GFX11-SDAG-TRUE16: ; %bb.0:6968; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6969; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xd4006970; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16971; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v06972; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0xbc00, vcc_lo6973; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xbc00, s06974; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l6975; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v2, v06976; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]6977;6978; GFX11-SDAG-FAKE16-LABEL: v_mul_v2f16_select_n1_n64:6979; GFX11-SDAG-FAKE16: ; %bb.0:6980; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6981; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0xbc006982; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16983; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xd400, v3, vcc_lo6984; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06985; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xd400, v3, vcc_lo6986; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v16987; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v2, v06988; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]6989;6990; GFX11-GISEL-TRUE16-LABEL: v_mul_v2f16_select_n1_n64:6991; GFX11-GISEL-TRUE16: ; %bb.0:6992; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)6993; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v06994; GFX11-GISEL-TRUE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v26995; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo6996; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v16997; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l6998; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo6999; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7000; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7001;7002; GFX11-GISEL-FAKE16-LABEL: v_mul_v2f16_select_n1_n64:7003; GFX11-GISEL-FAKE16: ; %bb.0:7004; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7005; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07006; GFX11-GISEL-FAKE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27007; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7008; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17009; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v27010; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07011; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7012; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07013; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v3, v17014; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07015; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7016 %cond = icmp eq <2 x i32> %arg, zeroinitializer7017 %select.pow2 = select <2 x i1> %cond, <2 x half> <half -1.0, half -1.0>, <2 x half> <half -64.0, half -64.0>7018 %mul = fmul <2 x half> %x, %select.pow27019 ret <2 x half> %mul7020}7021 7022define <2 x half> @v_mul_v2f16_select_128_64(<2 x i32> %arg, <2 x half> %x) {7023; GFX9-SDAG-LABEL: v_mul_v2f16_select_128_64:7024; GFX9-SDAG: ; %bb.0:7025; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7026; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0x54007027; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x58007028; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17029; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc7030; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07031; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc7032; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17033; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v2, v07034; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7035;7036; GFX9-GISEL-LABEL: v_mul_v2f16_select_128_64:7037; GFX9-GISEL: ; %bb.0:7038; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7039; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07040; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc7041; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17042; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc7043; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v07044; GFX9-GISEL-NEXT: v_add_u32_e32 v1, 6, v17045; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff80007046; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff7047; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v3, v47048; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v3, v47049; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07050; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7051; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07052; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7053;7054; GFX10-SDAG-LABEL: v_mul_v2f16_select_128_64:7055; GFX10-SDAG: ; %bb.0:7056; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7057; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0x58007058; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17059; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x5400, v3, vcc_lo7060; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07061; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo7062; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17063; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v2, v07064; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7065;7066; GFX10-GISEL-LABEL: v_mul_v2f16_select_128_64:7067; GFX10-GISEL: ; %bb.0:7068; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7069; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07070; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff7071; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7072; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17073; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v07074; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7075; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v37076; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v1, 6, v17077; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07078; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v37079; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07080; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7081; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07082; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7083;7084; GFX11-SDAG-TRUE16-LABEL: v_mul_v2f16_select_128_64:7085; GFX11-SDAG-TRUE16: ; %bb.0:7086; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7087; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0x54007088; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17089; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07090; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0x5800, vcc_lo7091; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0x5800, s07092; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7093; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v2, v07094; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7095;7096; GFX11-SDAG-FAKE16-LABEL: v_mul_v2f16_select_128_64:7097; GFX11-SDAG-FAKE16: ; %bb.0:7098; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7099; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0x58007100; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17101; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x5400, v3, vcc_lo7102; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07103; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5400, v3, vcc_lo7104; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17105; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v2, v07106; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7107;7108; GFX11-GISEL-TRUE16-LABEL: v_mul_v2f16_select_128_64:7109; GFX11-GISEL-TRUE16: ; %bb.0:7110; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7111; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07112; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7113; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17114; GFX11-GISEL-TRUE16-NEXT: v_dual_mov_b32 v3, 0x7fff :: v_dual_add_nc_u32 v0, 6, v07115; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7116; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v37117; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v1, 6, v17118; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7119; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v37120; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7121; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7122;7123; GFX11-GISEL-FAKE16-LABEL: v_mul_v2f16_select_128_64:7124; GFX11-GISEL-FAKE16: ; %bb.0:7125; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7126; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07127; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v27128; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x7fff7129; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7130; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17131; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 6, v07132; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7133; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v37134; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v1, 6, v17135; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07136; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v37137; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07138; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v17139; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07140; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7141 %cond = icmp eq <2 x i32> %arg, zeroinitializer7142 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 128.0, half 128.0>, <2 x half> <half 64.0, half 64.0>7143 %mul = fmul <2 x half> %x, %select.pow27144 ret <2 x half> %mul7145}7146 7147define <2 x half> @v_mul_v2f16_select_n128_n64(<2 x i32> %arg, <2 x half> %x) {7148; GFX9-SDAG-LABEL: v_mul_v2f16_select_n128_n64:7149; GFX9-SDAG: ; %bb.0:7150; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7151; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xd4007152; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xd8007153; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17154; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc7155; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07156; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc7157; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17158; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v2, v07159; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7160;7161; GFX9-GISEL-LABEL: v_mul_v2f16_select_n128_n64:7162; GFX9-GISEL: ; %bb.0:7163; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7164; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07165; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc7166; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17167; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc7168; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v07169; GFX9-GISEL-NEXT: v_add_u32_e32 v1, 6, v17170; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xffff80007171; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff7172; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27173; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v3, v47174; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v3, v47175; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07176; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7177; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07178; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7179;7180; GFX10-SDAG-LABEL: v_mul_v2f16_select_n128_n64:7181; GFX10-SDAG: ; %bb.0:7182; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7183; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xd8007184; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17185; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xd400, v3, vcc_lo7186; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07187; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xd400, v3, vcc_lo7188; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17189; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v2, v07190; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7191;7192; GFX10-GISEL-LABEL: v_mul_v2f16_select_n128_n64:7193; GFX10-GISEL: ; %bb.0:7194; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7195; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07196; GFX10-GISEL-NEXT: v_mov_b32_e32 v3, 0x7fff7197; GFX10-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27198; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7199; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17200; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v07201; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7202; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v37203; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v1, 6, v17204; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07205; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v37206; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07207; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7208; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07209; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7210;7211; GFX11-SDAG-TRUE16-LABEL: v_mul_v2f16_select_n128_n64:7212; GFX11-SDAG-TRUE16: ; %bb.0:7213; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7214; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xd4007215; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17216; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07217; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0xd800, vcc_lo7218; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xd800, s07219; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7220; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v2, v07221; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7222;7223; GFX11-SDAG-FAKE16-LABEL: v_mul_v2f16_select_n128_n64:7224; GFX11-SDAG-FAKE16: ; %bb.0:7225; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7226; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0xd8007227; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17228; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xd400, v3, vcc_lo7229; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07230; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xd400, v3, vcc_lo7231; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17232; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v2, v07233; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7234;7235; GFX11-GISEL-TRUE16-LABEL: v_mul_v2f16_select_n128_n64:7236; GFX11-GISEL-TRUE16: ; %bb.0:7237; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7238; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07239; GFX11-GISEL-TRUE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27240; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7241; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17242; GFX11-GISEL-TRUE16-NEXT: v_dual_mov_b32 v3, 0x7fff :: v_dual_add_nc_u32 v0, 6, v07243; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7244; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v37245; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v1, 6, v17246; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7247; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v37248; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7249; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7250;7251; GFX11-GISEL-FAKE16-LABEL: v_mul_v2f16_select_n128_n64:7252; GFX11-GISEL-FAKE16: ; %bb.0:7253; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7254; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07255; GFX11-GISEL-FAKE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27256; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v3, 0x7fff7257; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7258; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17259; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v27260; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 6, v07261; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7262; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v37263; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v1, 6, v17264; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07265; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v37266; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07267; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v17268; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07269; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7270 %cond = icmp eq <2 x i32> %arg, zeroinitializer7271 %select.pow2 = select <2 x i1> %cond, <2 x half> <half -128.0, half -128.0>, <2 x half> <half -64.0, half -64.0>7272 %mul = fmul <2 x half> %x, %select.pow27273 ret <2 x half> %mul7274}7275 7276define <2 x half> @v_mul_v2f16_select_n128_n16(<2 x i32> %arg, <2 x half> %x) {7277; GFX9-SDAG-LABEL: v_mul_v2f16_select_n128_n16:7278; GFX9-SDAG: ; %bb.0:7279; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7280; GFX9-SDAG-NEXT: v_mov_b32_e32 v3, 0xcc007281; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xd8007282; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17283; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc7284; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07285; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v3, v4, vcc7286; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17287; GFX9-SDAG-NEXT: v_pk_mul_f16 v0, v2, v07288; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7289;7290; GFX9-GISEL-LABEL: v_mul_v2f16_select_n128_n16:7291; GFX9-GISEL: ; %bb.0:7292; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7293; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07294; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc7295; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17296; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27297; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 4, 7, vcc7298; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07299; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7300; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07301; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7302;7303; GFX10-SDAG-LABEL: v_mul_v2f16_select_n128_n16:7304; GFX10-SDAG: ; %bb.0:7305; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7306; GFX10-SDAG-NEXT: v_mov_b32_e32 v3, 0xd8007307; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17308; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xcc00, v3, vcc_lo7309; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07310; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xcc00, v3, vcc_lo7311; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17312; GFX10-SDAG-NEXT: v_pk_mul_f16 v0, v2, v07313; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7314;7315; GFX10-GISEL-LABEL: v_mul_v2f16_select_n128_n16:7316; GFX10-GISEL: ; %bb.0:7317; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7318; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07319; GFX10-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27320; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo7321; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17322; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07323; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 4, 7, vcc_lo7324; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07325; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7326; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07327; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7328;7329; GFX11-SDAG-TRUE16-LABEL: v_mul_v2f16_select_n128_n16:7330; GFX11-SDAG-TRUE16: ; %bb.0:7331; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7332; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v3.l, 0xcc007333; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17334; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07335; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, 0xd800, vcc_lo7336; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v3.l, 0xd800, s07337; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7338; GFX11-SDAG-TRUE16-NEXT: v_pk_mul_f16 v0, v2, v07339; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7340;7341; GFX11-SDAG-FAKE16-LABEL: v_mul_v2f16_select_n128_n16:7342; GFX11-SDAG-FAKE16: ; %bb.0:7343; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7344; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v3, 0xd8007345; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17346; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xcc00, v3, vcc_lo7347; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07348; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xcc00, v3, vcc_lo7349; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17350; GFX11-SDAG-FAKE16-NEXT: v_pk_mul_f16 v0, v2, v07351; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7352;7353; GFX11-GISEL-TRUE16-LABEL: v_mul_v2f16_select_n128_n16:7354; GFX11-GISEL-TRUE16: ; %bb.0:7355; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7356; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07357; GFX11-GISEL-TRUE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27358; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo7359; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17360; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7361; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 4, 7, vcc_lo7362; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7363; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7364;7365; GFX11-GISEL-FAKE16-LABEL: v_mul_v2f16_select_n128_n16:7366; GFX11-GISEL-FAKE16: ; %bb.0:7367; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7368; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07369; GFX11-GISEL-FAKE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27370; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 4, 7, vcc_lo7371; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17372; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v27373; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07374; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 4, 7, vcc_lo7375; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07376; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v3, v17377; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07378; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7379 %cond = icmp eq <2 x i32> %arg, zeroinitializer7380 %select.pow2 = select <2 x i1> %cond, <2 x half> <half -128.0, half -128.0>, <2 x half> <half -16.0, half -16.0>7381 %mul = fmul <2 x half> %x, %select.pow27382 ret <2 x half> %mul7383}7384 7385define <2 x half> @v_contract_mul_add_v2f16_select_64_1(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {7386; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_64_1:7387; GFX9-SDAG: ; %bb.0:7388; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7389; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x3c007390; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x54007391; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17392; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc7393; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07394; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7395; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17396; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37397; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7398;7399; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_64_1:7400; GFX9-GISEL: ; %bb.0:7401; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7402; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07403; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc7404; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17405; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc7406; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07407; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7408; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07409; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v37410; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7411;7412; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_64_1:7413; GFX10-SDAG: ; %bb.0:7414; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7415; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x54007416; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17417; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v4, vcc_lo7418; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07419; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v4, vcc_lo7420; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17421; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37422; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7423;7424; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_64_1:7425; GFX10-GISEL: ; %bb.0:7426; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7427; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07428; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo7429; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17430; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07431; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo7432; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07433; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7434; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07435; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v37436; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7437;7438; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_64_1:7439; GFX11-SDAG-TRUE16: ; %bb.0:7440; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7441; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0x3c007442; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17443; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07444; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0x5400, vcc_lo7445; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0x5400, s07446; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7447; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37448; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7449;7450; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_64_1:7451; GFX11-SDAG-FAKE16: ; %bb.0:7452; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7453; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0x54007454; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17455; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3c00, v4, vcc_lo7456; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07457; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3c00, v4, vcc_lo7458; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17459; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37460; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7461;7462; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_64_1:7463; GFX11-GISEL-TRUE16: ; %bb.0:7464; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7465; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07466; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo7467; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17468; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7469; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo7470; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7471; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v37472; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7473;7474; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_64_1:7475; GFX11-GISEL-FAKE16: ; %bb.0:7476; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7477; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07478; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v27479; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo7480; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17481; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07482; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo7483; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07484; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v17485; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07486; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v37487; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7488 %cond = icmp eq <2 x i32> %arg, zeroinitializer7489 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 64.0, half 64.0>, <2 x half> <half 1.0, half 1.0>7490 %mul = fmul contract <2 x half> %x, %select.pow27491 %fma = fadd contract <2 x half> %mul, %y7492 ret <2 x half> %fma7493}7494 7495define <2 x half> @v_contract_mul_add_v2f16_select_1_64(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {7496; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_1_64:7497; GFX9-SDAG: ; %bb.0:7498; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7499; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x54007500; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x3c007501; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17502; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc7503; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07504; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7505; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17506; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37507; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7508;7509; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_1_64:7510; GFX9-GISEL: ; %bb.0:7511; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7512; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07513; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc7514; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17515; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc7516; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07517; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7518; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07519; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v37520; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7521;7522; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_1_64:7523; GFX10-SDAG: ; %bb.0:7524; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7525; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x3c007526; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17527; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x5400, v4, vcc_lo7528; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07529; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5400, v4, vcc_lo7530; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17531; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37532; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7533;7534; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_1_64:7535; GFX10-GISEL: ; %bb.0:7536; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7537; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07538; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7539; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17540; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07541; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7542; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07543; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7544; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07545; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v37546; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7547;7548; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_1_64:7549; GFX11-SDAG-TRUE16: ; %bb.0:7550; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7551; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0x54007552; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17553; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07554; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0x3c00, vcc_lo7555; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0x3c00, s07556; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7557; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37558; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7559;7560; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_1_64:7561; GFX11-SDAG-FAKE16: ; %bb.0:7562; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7563; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0x3c007564; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17565; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x5400, v4, vcc_lo7566; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07567; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5400, v4, vcc_lo7568; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17569; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37570; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7571;7572; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_1_64:7573; GFX11-GISEL-TRUE16: ; %bb.0:7574; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7575; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07576; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7577; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17578; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7579; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7580; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7581; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v37582; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7583;7584; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_1_64:7585; GFX11-GISEL-FAKE16: ; %bb.0:7586; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7587; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07588; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v27589; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7590; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17591; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07592; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7593; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07594; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v17595; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07596; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v37597; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7598 %cond = icmp eq <2 x i32> %arg, zeroinitializer7599 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 1.0, half 1.0>, <2 x half> <half 64.0, half 64.0>7600 %mul = fmul contract <2 x half> %x, %select.pow27601 %fma = fadd contract <2 x half> %mul, %y7602 ret <2 x half> %fma7603}7604 7605define <2 x half> @v_contract_mul_add_v2f16_select_n64_n1(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {7606; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7607; GFX9-SDAG: ; %bb.0:7608; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7609; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xbc007610; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0xd4007611; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17612; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc7613; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07614; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7615; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17616; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37617; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7618;7619; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7620; GFX9-GISEL: ; %bb.0:7621; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7622; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07623; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc7624; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17625; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27626; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc7627; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07628; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7629; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07630; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v37631; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7632;7633; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7634; GFX10-SDAG: ; %bb.0:7635; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7636; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0xd4007637; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17638; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xbc00, v4, vcc_lo7639; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07640; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xbc00, v4, vcc_lo7641; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17642; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37643; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7644;7645; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7646; GFX10-GISEL: ; %bb.0:7647; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7648; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07649; GFX10-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27650; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo7651; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17652; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07653; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo7654; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07655; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7656; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07657; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v37658; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7659;7660; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7661; GFX11-SDAG-TRUE16: ; %bb.0:7662; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7663; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0xbc007664; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17665; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07666; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0xd400, vcc_lo7667; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0xd400, s07668; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7669; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37670; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7671;7672; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7673; GFX11-SDAG-FAKE16: ; %bb.0:7674; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7675; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0xd4007676; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17677; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xbc00, v4, vcc_lo7678; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07679; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xbc00, v4, vcc_lo7680; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17681; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37682; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7683;7684; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7685; GFX11-GISEL-TRUE16: ; %bb.0:7686; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7687; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07688; GFX11-GISEL-TRUE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27689; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo7690; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17691; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7692; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo7693; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7694; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v37695; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7696;7697; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_n64_n1:7698; GFX11-GISEL-FAKE16: ; %bb.0:7699; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7700; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07701; GFX11-GISEL-FAKE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27702; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 6, vcc_lo7703; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17704; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v27705; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07706; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 6, vcc_lo7707; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07708; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v17709; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07710; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v37711; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7712 %cond = icmp eq <2 x i32> %arg, zeroinitializer7713 %select.pow2 = select <2 x i1> %cond, <2 x half> <half -64.0, half -64.0>, <2 x half> <half -1.0, half -1.0>7714 %mul = fmul contract <2 x half> %x, %select.pow27715 %fma = fadd contract <2 x half> %mul, %y7716 ret <2 x half> %fma7717}7718 7719define <2 x half> @v_contract_mul_add_v2f16_select_n1_n64(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {7720; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7721; GFX9-SDAG: ; %bb.0:7722; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7723; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0xd4007724; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0xbc007725; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17726; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc7727; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07728; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7729; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17730; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37731; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7732;7733; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7734; GFX9-GISEL: ; %bb.0:7735; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7736; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07737; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc7738; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17739; GFX9-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27740; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc7741; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07742; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7743; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07744; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v37745; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7746;7747; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7748; GFX10-SDAG: ; %bb.0:7749; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7750; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0xbc007751; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17752; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0xd400, v4, vcc_lo7753; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07754; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0xd400, v4, vcc_lo7755; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17756; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37757; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7758;7759; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7760; GFX10-GISEL: ; %bb.0:7761; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7762; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07763; GFX10-GISEL-NEXT: v_xor_b32_e32 v2, 0x80008000, v27764; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7765; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17766; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07767; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7768; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07769; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7770; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07771; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v37772; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7773;7774; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7775; GFX11-SDAG-TRUE16: ; %bb.0:7776; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7777; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0xd4007778; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17779; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07780; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0xbc00, vcc_lo7781; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0xbc00, s07782; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7783; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37784; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7785;7786; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7787; GFX11-SDAG-FAKE16: ; %bb.0:7788; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7789; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0xbc007790; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17791; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0xd400, v4, vcc_lo7792; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07793; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0xd400, v4, vcc_lo7794; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17795; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37796; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7797;7798; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7799; GFX11-GISEL-TRUE16: ; %bb.0:7800; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7801; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07802; GFX11-GISEL-TRUE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27803; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7804; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17805; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7806; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7807; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7808; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v37809; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7810;7811; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_n1_n64:7812; GFX11-GISEL-FAKE16: ; %bb.0:7813; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7814; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07815; GFX11-GISEL-FAKE16-NEXT: v_xor_b32_e32 v2, 0x80008000, v27816; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 6, 0, vcc_lo7817; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17818; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v27819; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07820; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 6, 0, vcc_lo7821; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07822; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v17823; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07824; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v37825; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7826 %cond = icmp eq <2 x i32> %arg, zeroinitializer7827 %select.pow2 = select <2 x i1> %cond, <2 x half> <half -1.0, half -1.0>, <2 x half> <half -64.0, half -64.0>7828 %mul = fmul contract <2 x half> %x, %select.pow27829 %fma = fadd contract <2 x half> %mul, %y7830 ret <2 x half> %fma7831}7832 7833define <2 x half> @v_contract_mul_add_v2f16_select_128_64(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {7834; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_128_64:7835; GFX9-SDAG: ; %bb.0:7836; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7837; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x54007838; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x58007839; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17840; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc7841; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07842; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7843; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17844; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37845; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7846;7847; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_128_64:7848; GFX9-GISEL: ; %bb.0:7849; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7850; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07851; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc7852; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17853; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc7854; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 6, v07855; GFX9-GISEL-NEXT: v_add_u32_e32 v1, 6, v17856; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xffff80007857; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x7fff7858; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v4, v57859; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v4, v57860; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07861; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7862; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07863; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v37864; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7865;7866; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_128_64:7867; GFX10-SDAG: ; %bb.0:7868; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7869; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x58007870; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17871; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x5400, v4, vcc_lo7872; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07873; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5400, v4, vcc_lo7874; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17875; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37876; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]7877;7878; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_128_64:7879; GFX10-GISEL: ; %bb.0:7880; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7881; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07882; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff7883; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7884; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17885; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 6, v07886; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7887; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v47888; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v1, 6, v17889; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07890; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v47891; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v07892; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7893; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07894; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v37895; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]7896;7897; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_128_64:7898; GFX11-SDAG-TRUE16: ; %bb.0:7899; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7900; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0x54007901; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17902; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v07903; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0x5800, vcc_lo7904; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0x5800, s07905; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l7906; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37907; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]7908;7909; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_128_64:7910; GFX11-SDAG-FAKE16: ; %bb.0:7911; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7912; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0x58007913; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17914; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x5400, v4, vcc_lo7915; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07916; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5400, v4, vcc_lo7917; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v17918; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v37919; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]7920;7921; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_128_64:7922; GFX11-GISEL-TRUE16: ; %bb.0:7923; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7924; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07925; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7926; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17927; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v0, 6, v07928; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7929; GFX11-GISEL-TRUE16-NEXT: v_dual_mov_b32 v4, 0x7fff :: v_dual_add_nc_u32 v1, 6, v17930; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v47931; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v47932; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l7933; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l7934; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v37935; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]7936;7937; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_128_64:7938; GFX11-GISEL-FAKE16: ; %bb.0:7939; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7940; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07941; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v27942; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo7943; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17944; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 6, v07945; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc_lo7946; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v4, 0x7fff :: v_dual_add_nc_u32 v1, 6, v17947; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v47948; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v47949; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v07950; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v5, v17951; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v07952; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v07953; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v37954; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]7955 %cond = icmp eq <2 x i32> %arg, zeroinitializer7956 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 128.0, half 128.0>, <2 x half> <half 64.0, half 64.0>7957 %mul = fmul contract <2 x half> %x, %select.pow27958 %fma = fadd contract <2 x half> %mul, %y7959 ret <2 x half> %fma7960}7961 7962define <2 x half> @v_contract_mul_add_v2f16_select_128_4(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {7963; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_128_4:7964; GFX9-SDAG: ; %bb.0:7965; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7966; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x44007967; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x58007968; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17969; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc7970; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07971; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc7972; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17973; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37974; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]7975;7976; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_128_4:7977; GFX9-GISEL: ; %bb.0:7978; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7979; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v07980; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc7981; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v17982; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 2, 7, vcc7983; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v07984; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD7985; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v07986; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v37987; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]7988;7989; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_128_4:7990; GFX10-SDAG: ; %bb.0:7991; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)7992; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x58007993; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v17994; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x4400, v4, vcc_lo7995; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v07996; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x4400, v4, vcc_lo7997; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v17998; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v37999; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8000;8001; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_128_4:8002; GFX10-GISEL: ; %bb.0:8003; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8004; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08005; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo8006; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18007; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v08008; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 2, 7, vcc_lo8009; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v08010; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8011; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v08012; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v38013; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8014;8015; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_128_4:8016; GFX11-SDAG-TRUE16: ; %bb.0:8017; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8018; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0x44008019; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18020; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v08021; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0x5800, vcc_lo8022; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0x5800, s08023; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l8024; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v38025; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]8026;8027; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_128_4:8028; GFX11-SDAG-FAKE16: ; %bb.0:8029; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8030; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0x58008031; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18032; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4400, v4, vcc_lo8033; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08034; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x4400, v4, vcc_lo8035; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v18036; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v38037; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]8038;8039; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_128_4:8040; GFX11-GISEL-TRUE16: ; %bb.0:8041; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8042; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08043; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo8044; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18045; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l8046; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 2, 7, vcc_lo8047; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l8048; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v38049; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]8050;8051; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_128_4:8052; GFX11-GISEL-FAKE16: ; %bb.0:8053; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8054; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08055; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v28056; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 2, 7, vcc_lo8057; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18058; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v08059; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 2, 7, vcc_lo8060; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v08061; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v18062; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v08063; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v38064; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]8065 %cond = icmp eq <2 x i32> %arg, zeroinitializer8066 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 128.0, half 128.0>, <2 x half> <half 4.0, half 4.0>8067 %mul = fmul contract <2 x half> %x, %select.pow28068 %fma = fadd contract <2 x half> %mul, %y8069 ret <2 x half> %fma8070}8071 8072define <2 x half> @v_contract_mul_add_v2f16_select_2_4(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {8073; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_2_4:8074; GFX9-SDAG: ; %bb.0:8075; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8076; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x44008077; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x40008078; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v18079; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc8080; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v08081; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc8082; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v18083; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v38084; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8085;8086; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_2_4:8087; GFX9-GISEL: ; %bb.0:8088; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8089; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v08090; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc8091; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v18092; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc8093; GFX9-GISEL-NEXT: v_add_u32_e32 v0, 2, v08094; GFX9-GISEL-NEXT: v_add_u32_e32 v1, 2, v18095; GFX9-GISEL-NEXT: v_mov_b32_e32 v4, 0xffff80008096; GFX9-GISEL-NEXT: v_mov_b32_e32 v5, 0x7fff8097; GFX9-GISEL-NEXT: v_med3_i32 v0, v0, v4, v58098; GFX9-GISEL-NEXT: v_med3_i32 v1, v1, v4, v58099; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v08100; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8101; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v08102; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v38103; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8104;8105; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_2_4:8106; GFX10-SDAG: ; %bb.0:8107; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8108; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x40008109; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18110; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x4400, v4, vcc_lo8111; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08112; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x4400, v4, vcc_lo8113; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v18114; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v38115; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8116;8117; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_2_4:8118; GFX10-GISEL: ; %bb.0:8119; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8120; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08121; GFX10-GISEL-NEXT: v_mov_b32_e32 v4, 0x7fff8122; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo8123; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18124; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v0, 2, v08125; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo8126; GFX10-GISEL-NEXT: v_med3_i32 v0, 0xffff8000, v0, v48127; GFX10-GISEL-NEXT: v_add_nc_u32_e32 v1, 2, v18128; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v08129; GFX10-GISEL-NEXT: v_med3_i32 v1, 0xffff8000, v1, v48130; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v08131; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8132; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v08133; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v38134; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8135;8136; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_2_4:8137; GFX11-SDAG-TRUE16: ; %bb.0:8138; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8139; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0x44008140; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18141; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v08142; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0x4000, vcc_lo8143; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0x4000, s08144; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l8145; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v38146; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]8147;8148; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_2_4:8149; GFX11-SDAG-FAKE16: ; %bb.0:8150; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8151; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0x40008152; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18153; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x4400, v4, vcc_lo8154; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08155; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x4400, v4, vcc_lo8156; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v18157; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v38158; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]8159;8160; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_2_4:8161; GFX11-GISEL-TRUE16: ; %bb.0:8162; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8163; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08164; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo8165; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18166; GFX11-GISEL-TRUE16-NEXT: v_add_nc_u32_e32 v0, 2, v08167; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo8168; GFX11-GISEL-TRUE16-NEXT: v_dual_mov_b32 v4, 0x7fff :: v_dual_add_nc_u32 v1, 2, v18169; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v48170; GFX11-GISEL-TRUE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v48171; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l8172; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l8173; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v38174; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]8175;8176; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_2_4:8177; GFX11-GISEL-FAKE16: ; %bb.0:8178; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8179; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08180; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v28181; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 0, -1, vcc_lo8182; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18183; GFX11-GISEL-FAKE16-NEXT: v_add_nc_u32_e32 v0, 2, v08184; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 0, -1, vcc_lo8185; GFX11-GISEL-FAKE16-NEXT: v_dual_mov_b32 v4, 0x7fff :: v_dual_add_nc_u32 v1, 2, v18186; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v0, 0xffff8000, v0, v48187; GFX11-GISEL-FAKE16-NEXT: v_med3_i32 v1, 0xffff8000, v1, v48188; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v08189; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v5, v18190; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v08191; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v08192; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v38193; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]8194 %cond = icmp eq <2 x i32> %arg, zeroinitializer8195 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 2.0, half 2.0>, <2 x half> <half 4.0, half 4.0>8196 %mul = fmul contract <2 x half> %x, %select.pow28197 %fma = fadd contract <2 x half> %mul, %y8198 ret <2 x half> %fma8199}8200 8201define <2 x half> @v_contract_mul_add_v2f16_select_4_128(<2 x i32> %arg, <2 x half> %x, <2 x half> %y) {8202; GFX9-SDAG-LABEL: v_contract_mul_add_v2f16_select_4_128:8203; GFX9-SDAG: ; %bb.0:8204; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8205; GFX9-SDAG-NEXT: v_mov_b32_e32 v4, 0x58008206; GFX9-SDAG-NEXT: v_mov_b32_e32 v5, 0x44008207; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v18208; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc8209; GFX9-SDAG-NEXT: v_cmp_eq_u32_e32 vcc, 0, v08210; GFX9-SDAG-NEXT: v_cndmask_b32_e32 v0, v4, v5, vcc8211; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v18212; GFX9-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v38213; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8214;8215; GFX9-GISEL-LABEL: v_contract_mul_add_v2f16_select_4_128:8216; GFX9-GISEL: ; %bb.0:8217; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8218; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v08219; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc8220; GFX9-GISEL-NEXT: v_cmp_eq_u32_e32 vcc, 0, v18221; GFX9-GISEL-NEXT: v_cndmask_b32_e64 v1, 7, 2, vcc8222; GFX9-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v08223; GFX9-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8224; GFX9-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v08225; GFX9-GISEL-NEXT: v_pk_add_f16 v0, v0, v38226; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8227;8228; GFX10-SDAG-LABEL: v_contract_mul_add_v2f16_select_4_128:8229; GFX10-SDAG: ; %bb.0:8230; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8231; GFX10-SDAG-NEXT: v_mov_b32_e32 v4, 0x44008232; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18233; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v1, 0x5800, v4, vcc_lo8234; GFX10-SDAG-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08235; GFX10-SDAG-NEXT: v_cndmask_b32_e32 v0, 0x5800, v4, vcc_lo8236; GFX10-SDAG-NEXT: v_pack_b32_f16 v0, v0, v18237; GFX10-SDAG-NEXT: v_pk_fma_f16 v0, v2, v0, v38238; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8239;8240; GFX10-GISEL-LABEL: v_contract_mul_add_v2f16_select_4_128:8241; GFX10-GISEL: ; %bb.0:8242; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8243; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08244; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo8245; GFX10-GISEL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18246; GFX10-GISEL-NEXT: v_ldexp_f16_e32 v0, v2, v08247; GFX10-GISEL-NEXT: v_cndmask_b32_e64 v1, 7, 2, vcc_lo8248; GFX10-GISEL-NEXT: v_and_b32_e32 v0, 0xffff, v08249; GFX10-GISEL-NEXT: v_ldexp_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD8250; GFX10-GISEL-NEXT: v_lshl_or_b32 v0, v1, 16, v08251; GFX10-GISEL-NEXT: v_pk_add_f16 v0, v0, v38252; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8253;8254; GFX11-SDAG-TRUE16-LABEL: v_contract_mul_add_v2f16_select_4_128:8255; GFX11-SDAG-TRUE16: ; %bb.0:8256; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8257; GFX11-SDAG-TRUE16-NEXT: v_mov_b16_e32 v4.l, 0x58008258; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18259; GFX11-SDAG-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v08260; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, 0x4400, vcc_lo8261; GFX11-SDAG-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.l, 0x4400, s08262; GFX11-SDAG-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l8263; GFX11-SDAG-TRUE16-NEXT: v_pk_fma_f16 v0, v2, v0, v38264; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]8265;8266; GFX11-SDAG-FAKE16-LABEL: v_contract_mul_add_v2f16_select_4_128:8267; GFX11-SDAG-FAKE16: ; %bb.0:8268; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8269; GFX11-SDAG-FAKE16-NEXT: v_mov_b32_e32 v4, 0x44008270; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18271; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x5800, v4, vcc_lo8272; GFX11-SDAG-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08273; GFX11-SDAG-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x5800, v4, vcc_lo8274; GFX11-SDAG-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v18275; GFX11-SDAG-FAKE16-NEXT: v_pk_fma_f16 v0, v2, v0, v38276; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]8277;8278; GFX11-GISEL-TRUE16-LABEL: v_contract_mul_add_v2f16_select_4_128:8279; GFX11-GISEL-TRUE16: ; %bb.0:8280; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8281; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08282; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo8283; GFX11-GISEL-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18284; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.l, v2.l, v0.l8285; GFX11-GISEL-TRUE16-NEXT: v_cndmask_b32_e64 v1, 7, 2, vcc_lo8286; GFX11-GISEL-TRUE16-NEXT: v_ldexp_f16_e32 v0.h, v2.h, v1.l8287; GFX11-GISEL-TRUE16-NEXT: v_pk_add_f16 v0, v0, v38288; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]8289;8290; GFX11-GISEL-FAKE16-LABEL: v_contract_mul_add_v2f16_select_4_128:8291; GFX11-GISEL-FAKE16: ; %bb.0:8292; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8293; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v08294; GFX11-GISEL-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v28295; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v0, 7, 2, vcc_lo8296; GFX11-GISEL-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v18297; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v0, v2, v08298; GFX11-GISEL-FAKE16-NEXT: v_cndmask_b32_e64 v1, 7, 2, vcc_lo8299; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v08300; GFX11-GISEL-FAKE16-NEXT: v_ldexp_f16_e32 v1, v4, v18301; GFX11-GISEL-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v08302; GFX11-GISEL-FAKE16-NEXT: v_pk_add_f16 v0, v0, v38303; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]8304 %cond = icmp eq <2 x i32> %arg, zeroinitializer8305 %select.pow2 = select <2 x i1> %cond, <2 x half> <half 4.0, half 4.0>, <2 x half> <half 128.0, half 128.0>8306 %mul = fmul contract <2 x half> %x, %select.pow28307 %fma = fadd contract <2 x half> %mul, %y8308 ret <2 x half> %fma8309}8310 8311;---------------------------------------------------------------------8312; strictfp support8313;---------------------------------------------------------------------8314 8315define float @v_constrained_fmul_32_f32(float %x, float %y) #0 {8316; GCN-LABEL: v_constrained_fmul_32_f32:8317; GCN: ; %bb.0:8318; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8319; GCN-NEXT: v_mul_f32_e32 v0, 0x42000000, v08320; GCN-NEXT: s_setpc_b64 s[30:31]8321 %val = call float @llvm.experimental.constrained.fmul.f32(float %x, float 32.0, metadata !"round.dynamic", metadata !"fpexcept.strict")8322 ret float %val8323}8324 8325define double @v_constrained_fmul_32_f64(double %x, double %y) #0 {8326; GFX9-SDAG-LABEL: v_constrained_fmul_32_f64:8327; GFX9-SDAG: ; %bb.0:8328; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8329; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 58330; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8331;8332; GFX9-GISEL-LABEL: v_constrained_fmul_32_f64:8333; GFX9-GISEL: ; %bb.0:8334; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8335; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08336; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x404000008337; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]8338; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8339;8340; GFX10-SDAG-LABEL: v_constrained_fmul_32_f64:8341; GFX10-SDAG: ; %bb.0:8342; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8343; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 58344; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8345;8346; GFX10-GISEL-LABEL: v_constrained_fmul_32_f64:8347; GFX10-GISEL: ; %bb.0:8348; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8349; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 0x404000008350; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8351;8352; GFX11-SDAG-LABEL: v_constrained_fmul_32_f64:8353; GFX11-SDAG: ; %bb.0:8354; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8355; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 58356; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8357;8358; GFX11-GISEL-LABEL: v_constrained_fmul_32_f64:8359; GFX11-GISEL: ; %bb.0:8360; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8361; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 0x404000008362; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8363 %val = call double @llvm.experimental.constrained.fmul.f64(double %x, double 32.0, metadata !"round.dynamic", metadata !"fpexcept.strict")8364 ret double %val8365}8366 8367define double @v_constrained_fmul_0x1p64_f64(double %x, double %y) #0 {8368; GFX9-SDAG-LABEL: v_constrained_fmul_0x1p64_f64:8369; GFX9-SDAG: ; %bb.0:8370; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8371; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 648372; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8373;8374; GFX9-GISEL-LABEL: v_constrained_fmul_0x1p64_f64:8375; GFX9-GISEL: ; %bb.0:8376; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8377; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08378; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x43f000008379; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], v[2:3]8380; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8381;8382; GFX10-SDAG-LABEL: v_constrained_fmul_0x1p64_f64:8383; GFX10-SDAG: ; %bb.0:8384; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8385; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 648386; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8387;8388; GFX10-GISEL-LABEL: v_constrained_fmul_0x1p64_f64:8389; GFX10-GISEL: ; %bb.0:8390; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8391; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 0x43f000008392; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8393;8394; GFX11-SDAG-LABEL: v_constrained_fmul_0x1p64_f64:8395; GFX11-SDAG: ; %bb.0:8396; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8397; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], v[0:1], 648398; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8399;8400; GFX11-GISEL-LABEL: v_constrained_fmul_0x1p64_f64:8401; GFX11-GISEL: ; %bb.0:8402; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8403; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], v[0:1], 0x43f000008404; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8405 %val = call double @llvm.experimental.constrained.fmul.f64(double %x, double 18446744073709551616.0, metadata !"round.dynamic", metadata !"fpexcept.strict")8406 ret double %val8407}8408 8409define half @v_constrained_fmul_32_f16(half %x, half %y) #0 {8410; GFX9-LABEL: v_constrained_fmul_32_f16:8411; GFX9: ; %bb.0:8412; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8413; GFX9-NEXT: v_mul_f16_e32 v0, 0x5000, v08414; GFX9-NEXT: s_setpc_b64 s[30:31]8415;8416; GFX10-LABEL: v_constrained_fmul_32_f16:8417; GFX10: ; %bb.0:8418; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8419; GFX10-NEXT: v_mul_f16_e32 v0, 0x5000, v08420; GFX10-NEXT: s_setpc_b64 s[30:31]8421;8422; GFX11-SDAG-TRUE16-LABEL: v_constrained_fmul_32_f16:8423; GFX11-SDAG-TRUE16: ; %bb.0:8424; GFX11-SDAG-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8425; GFX11-SDAG-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5000, v0.l8426; GFX11-SDAG-TRUE16-NEXT: s_setpc_b64 s[30:31]8427;8428; GFX11-SDAG-FAKE16-LABEL: v_constrained_fmul_32_f16:8429; GFX11-SDAG-FAKE16: ; %bb.0:8430; GFX11-SDAG-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8431; GFX11-SDAG-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5000, v08432; GFX11-SDAG-FAKE16-NEXT: s_setpc_b64 s[30:31]8433;8434; GFX11-GISEL-TRUE16-LABEL: v_constrained_fmul_32_f16:8435; GFX11-GISEL-TRUE16: ; %bb.0:8436; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8437; GFX11-GISEL-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x5000, v0.l8438; GFX11-GISEL-TRUE16-NEXT: s_setpc_b64 s[30:31]8439;8440; GFX11-GISEL-FAKE16-LABEL: v_constrained_fmul_32_f16:8441; GFX11-GISEL-FAKE16: ; %bb.0:8442; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8443; GFX11-GISEL-FAKE16-NEXT: v_mul_f16_e32 v0, 0x5000, v08444; GFX11-GISEL-FAKE16-NEXT: s_setpc_b64 s[30:31]8445 %val = call half @llvm.experimental.constrained.fmul.f16(half %x, half 32.0, metadata !"round.dynamic", metadata !"fpexcept.strict")8446 ret half %val8447}8448 8449define double @v_mul_fabs_0x1pn1031_f64(double %x) {8450; GFX9-SDAG-LABEL: v_mul_fabs_0x1pn1031_f64:8451; GFX9-SDAG: ; %bb.0:8452; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8453; GFX9-SDAG-NEXT: s_movk_i32 s4, 0xfbf98454; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, s48455; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8456;8457; GFX9-GISEL-LABEL: v_mul_fabs_0x1pn1031_f64:8458; GFX9-GISEL: ; %bb.0:8459; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8460; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08461; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x8008462; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]8463; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8464;8465; GFX10-SDAG-LABEL: v_mul_fabs_0x1pn1031_f64:8466; GFX10-SDAG: ; %bb.0:8467; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8468; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 0xfffffbf98469; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8470;8471; GFX10-GISEL-LABEL: v_mul_fabs_0x1pn1031_f64:8472; GFX10-GISEL: ; %bb.0:8473; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8474; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x800, |v[0:1]|8475; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8476;8477; GFX11-SDAG-LABEL: v_mul_fabs_0x1pn1031_f64:8478; GFX11-SDAG: ; %bb.0:8479; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8480; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 0xfffffbf98481; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8482;8483; GFX11-GISEL-LABEL: v_mul_fabs_0x1pn1031_f64:8484; GFX11-GISEL: ; %bb.0:8485; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8486; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x800, |v[0:1]|8487; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8488 %fabs.x = call double @llvm.fabs.f64(double %x)8489 %mul = fmul double %fabs.x, 4.34584737989687770135e-3118490 ret double %mul8491}8492 8493define double @v_mul_fabs_neg256_f64(double %x) {8494; GFX9-SDAG-LABEL: v_mul_fabs_neg256_f64:8495; GFX9-SDAG: ; %bb.0:8496; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8497; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, 88498; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8499;8500; GFX9-GISEL-LABEL: v_mul_fabs_neg256_f64:8501; GFX9-GISEL: ; %bb.0:8502; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8503; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08504; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc07000008505; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]8506; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8507;8508; GFX10-SDAG-LABEL: v_mul_fabs_neg256_f64:8509; GFX10-SDAG: ; %bb.0:8510; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8511; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, 88512; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8513;8514; GFX10-GISEL-LABEL: v_mul_fabs_neg256_f64:8515; GFX10-GISEL: ; %bb.0:8516; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8517; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0700000, |v[0:1]|8518; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8519;8520; GFX11-SDAG-LABEL: v_mul_fabs_neg256_f64:8521; GFX11-SDAG: ; %bb.0:8522; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8523; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, 88524; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8525;8526; GFX11-GISEL-LABEL: v_mul_fabs_neg256_f64:8527; GFX11-GISEL: ; %bb.0:8528; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8529; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0700000, |v[0:1]|8530; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8531 %fabs.x = call double @llvm.fabs.f64(double %x)8532 %mul = fmul double %fabs.x, -256.08533 ret double %mul8534}8535 8536define double @v_mul_fabs_neg8_f64(double %x) {8537; GFX9-SDAG-LABEL: v_mul_fabs_neg8_f64:8538; GFX9-SDAG: ; %bb.0:8539; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8540; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, 38541; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8542;8543; GFX9-GISEL-LABEL: v_mul_fabs_neg8_f64:8544; GFX9-GISEL: ; %bb.0:8545; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8546; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08547; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xc02000008548; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]8549; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8550;8551; GFX10-SDAG-LABEL: v_mul_fabs_neg8_f64:8552; GFX10-SDAG: ; %bb.0:8553; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8554; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, 38555; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8556;8557; GFX10-GISEL-LABEL: v_mul_fabs_neg8_f64:8558; GFX10-GISEL: ; %bb.0:8559; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8560; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0200000, |v[0:1]|8561; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8562;8563; GFX11-SDAG-LABEL: v_mul_fabs_neg8_f64:8564; GFX11-SDAG: ; %bb.0:8565; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8566; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, 38567; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8568;8569; GFX11-GISEL-LABEL: v_mul_fabs_neg8_f64:8570; GFX11-GISEL: ; %bb.0:8571; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8572; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xc0200000, |v[0:1]|8573; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8574 %fabs.x = call double @llvm.fabs.f64(double %x)8575 %mul = fmul double %fabs.x, -8.08576 ret double %mul8577}8578 8579define double @v_mul_fabs_neg4_f64(double %x) {8580; GCN-LABEL: v_mul_fabs_neg4_f64:8581; GCN: ; %bb.0:8582; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8583; GCN-NEXT: v_mul_f64 v[0:1], |v[0:1]|, -4.08584; GCN-NEXT: s_setpc_b64 s[30:31]8585 %fabs.x = call double @llvm.fabs.f64(double %x)8586 %mul = fmul double %fabs.x, -4.08587 ret double %mul8588}8589 8590define double @v_mul_fabs_neg2_f64(double %x) {8591; GCN-LABEL: v_mul_fabs_neg2_f64:8592; GCN: ; %bb.0:8593; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8594; GCN-NEXT: v_mul_f64 v[0:1], |v[0:1]|, -2.08595; GCN-NEXT: s_setpc_b64 s[30:31]8596 %fabs.x = call double @llvm.fabs.f64(double %x)8597 %mul = fmul double %fabs.x, -2.08598 ret double %mul8599}8600 8601define double @v_mul_fabs_neg1_f64(double %x) {8602; GCN-LABEL: v_mul_fabs_neg1_f64:8603; GCN: ; %bb.0:8604; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8605; GCN-NEXT: v_or_b32_e32 v1, 0x80000000, v18606; GCN-NEXT: s_setpc_b64 s[30:31]8607 %fabs.x = call double @llvm.fabs.f64(double %x)8608 %mul = fmul double %fabs.x, -1.08609 ret double %mul8610}8611 8612define double @v_mul_fabs_neghalf_f64(double %x) {8613; GCN-LABEL: v_mul_fabs_neghalf_f64:8614; GCN: ; %bb.0:8615; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8616; GCN-NEXT: v_mul_f64 v[0:1], |v[0:1]|, -0.58617; GCN-NEXT: s_setpc_b64 s[30:31]8618 %fabs.x = call double @llvm.fabs.f64(double %x)8619 %mul = fmul double %fabs.x, -0.58620 ret double %mul8621}8622 8623define double @v_mul_fabs_negquarter_f64(double %x) {8624; GFX9-SDAG-LABEL: v_mul_fabs_negquarter_f64:8625; GFX9-SDAG: ; %bb.0:8626; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8627; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, -28628; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8629;8630; GFX9-GISEL-LABEL: v_mul_fabs_negquarter_f64:8631; GFX9-GISEL: ; %bb.0:8632; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8633; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08634; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0xbfd000008635; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]8636; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8637;8638; GFX10-SDAG-LABEL: v_mul_fabs_negquarter_f64:8639; GFX10-SDAG: ; %bb.0:8640; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8641; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, -28642; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8643;8644; GFX10-GISEL-LABEL: v_mul_fabs_negquarter_f64:8645; GFX10-GISEL: ; %bb.0:8646; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8647; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0xbfd00000, |v[0:1]|8648; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8649;8650; GFX11-SDAG-LABEL: v_mul_fabs_negquarter_f64:8651; GFX11-SDAG: ; %bb.0:8652; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8653; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], -|v[0:1]|, -28654; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8655;8656; GFX11-GISEL-LABEL: v_mul_fabs_negquarter_f64:8657; GFX11-GISEL: ; %bb.0:8658; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8659; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0xbfd00000, |v[0:1]|8660; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8661 %fabs.x = call double @llvm.fabs.f64(double %x)8662 %mul = fmul double %fabs.x, -0.258663 ret double %mul8664}8665 8666define double @v_mul_fabs_quarter_f64(double %x) {8667; GFX9-SDAG-LABEL: v_mul_fabs_quarter_f64:8668; GFX9-SDAG: ; %bb.0:8669; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8670; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, -28671; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8672;8673; GFX9-GISEL-LABEL: v_mul_fabs_quarter_f64:8674; GFX9-GISEL: ; %bb.0:8675; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8676; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08677; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x3fd000008678; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]8679; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8680;8681; GFX10-SDAG-LABEL: v_mul_fabs_quarter_f64:8682; GFX10-SDAG: ; %bb.0:8683; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8684; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, -28685; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8686;8687; GFX10-GISEL-LABEL: v_mul_fabs_quarter_f64:8688; GFX10-GISEL: ; %bb.0:8689; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8690; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x3fd00000, |v[0:1]|8691; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8692;8693; GFX11-SDAG-LABEL: v_mul_fabs_quarter_f64:8694; GFX11-SDAG: ; %bb.0:8695; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8696; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, -28697; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8698;8699; GFX11-GISEL-LABEL: v_mul_fabs_quarter_f64:8700; GFX11-GISEL: ; %bb.0:8701; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8702; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x3fd00000, |v[0:1]|8703; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8704 %fabs.x = call double @llvm.fabs.f64(double %x)8705 %mul = fmul double %fabs.x, 0.258706 ret double %mul8707}8708 8709define double @v_mul_fabs_half_f64(double %x) {8710; GCN-LABEL: v_mul_fabs_half_f64:8711; GCN: ; %bb.0:8712; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8713; GCN-NEXT: v_mul_f64 v[0:1], |v[0:1]|, 0.58714; GCN-NEXT: s_setpc_b64 s[30:31]8715 %fabs.x = call double @llvm.fabs.f64(double %x)8716 %mul = fmul double %fabs.x, 0.58717 ret double %mul8718}8719 8720define double @v_mul_fabs_1_f64(double %x) {8721; GCN-LABEL: v_mul_fabs_1_f64:8722; GCN: ; %bb.0:8723; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8724; GCN-NEXT: v_and_b32_e32 v1, 0x7fffffff, v18725; GCN-NEXT: s_setpc_b64 s[30:31]8726 %fabs.x = call double @llvm.fabs.f64(double %x)8727 %mul = fmul double %fabs.x, 1.08728 ret double %mul8729}8730 8731define double @v_mul_fabs_2_f64(double %x) {8732; GFX9-SDAG-LABEL: v_mul_fabs_2_f64:8733; GFX9-SDAG: ; %bb.0:8734; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8735; GFX9-SDAG-NEXT: v_add_f64 v[0:1], |v[0:1]|, |v[0:1]|8736; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8737;8738; GFX9-GISEL-LABEL: v_mul_fabs_2_f64:8739; GFX9-GISEL: ; %bb.0:8740; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8741; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, 2.08742; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8743;8744; GFX10-SDAG-LABEL: v_mul_fabs_2_f64:8745; GFX10-SDAG: ; %bb.0:8746; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8747; GFX10-SDAG-NEXT: v_add_f64 v[0:1], |v[0:1]|, |v[0:1]|8748; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8749;8750; GFX10-GISEL-LABEL: v_mul_fabs_2_f64:8751; GFX10-GISEL: ; %bb.0:8752; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8753; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, 2.08754; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8755;8756; GFX11-SDAG-LABEL: v_mul_fabs_2_f64:8757; GFX11-SDAG: ; %bb.0:8758; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8759; GFX11-SDAG-NEXT: v_add_f64 v[0:1], |v[0:1]|, |v[0:1]|8760; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8761;8762; GFX11-GISEL-LABEL: v_mul_fabs_2_f64:8763; GFX11-GISEL: ; %bb.0:8764; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8765; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, 2.08766; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8767 %fabs.x = call double @llvm.fabs.f64(double %x)8768 %mul = fmul double %fabs.x, 2.08769 ret double %mul8770}8771 8772define double @v_mul_fabs_4_f64(double %x) {8773; GCN-LABEL: v_mul_fabs_4_f64:8774; GCN: ; %bb.0:8775; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8776; GCN-NEXT: v_mul_f64 v[0:1], |v[0:1]|, 4.08777; GCN-NEXT: s_setpc_b64 s[30:31]8778 %fabs.x = call double @llvm.fabs.f64(double %x)8779 %mul = fmul double %fabs.x, 4.08780 ret double %mul8781}8782 8783define double @v_mul_fabs_8_f64(double %x) {8784; GFX9-SDAG-LABEL: v_mul_fabs_8_f64:8785; GFX9-SDAG: ; %bb.0:8786; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8787; GFX9-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 38788; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]8789;8790; GFX9-GISEL-LABEL: v_mul_fabs_8_f64:8791; GFX9-GISEL: ; %bb.0:8792; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8793; GFX9-GISEL-NEXT: v_mov_b32_e32 v2, 08794; GFX9-GISEL-NEXT: v_mov_b32_e32 v3, 0x402000008795; GFX9-GISEL-NEXT: v_mul_f64 v[0:1], |v[0:1]|, v[2:3]8796; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]8797;8798; GFX10-SDAG-LABEL: v_mul_fabs_8_f64:8799; GFX10-SDAG: ; %bb.0:8800; GFX10-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8801; GFX10-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 38802; GFX10-SDAG-NEXT: s_setpc_b64 s[30:31]8803;8804; GFX10-GISEL-LABEL: v_mul_fabs_8_f64:8805; GFX10-GISEL: ; %bb.0:8806; GFX10-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8807; GFX10-GISEL-NEXT: v_mul_f64 v[0:1], 0x40200000, |v[0:1]|8808; GFX10-GISEL-NEXT: s_setpc_b64 s[30:31]8809;8810; GFX11-SDAG-LABEL: v_mul_fabs_8_f64:8811; GFX11-SDAG: ; %bb.0:8812; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8813; GFX11-SDAG-NEXT: v_ldexp_f64 v[0:1], |v[0:1]|, 38814; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]8815;8816; GFX11-GISEL-LABEL: v_mul_fabs_8_f64:8817; GFX11-GISEL: ; %bb.0:8818; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8819; GFX11-GISEL-NEXT: v_mul_f64 v[0:1], 0x40200000, |v[0:1]|8820; GFX11-GISEL-NEXT: s_setpc_b64 s[30:31]8821 %fabs.x = call double @llvm.fabs.f64(double %x)8822 %mul = fmul double %fabs.x, 8.08823 ret double %mul8824}8825 8826declare half @llvm.experimental.constrained.fmul.f16(half, half, metadata, metadata)8827declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)8828declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)8829 8830attributes #0 = { strictfp }8831