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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -enable-var-scope -check-prefixes=SI %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,VI %s4; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -mattr=-flat-for-global < %s | FileCheck -enable-var-scope -check-prefixes=GFX89,GFX9 %s5; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,+real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,-real-true16 < %s | FileCheck -enable-var-scope -check-prefixes=GFX11,GFX11-FAKE16 %s7 8define amdgpu_kernel void @fmul_f16(9; SI-LABEL: fmul_f16:10; SI: ; %bb.0: ; %entry11; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x912; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd13; SI-NEXT: s_mov_b32 s7, 0xf00014; SI-NEXT: s_mov_b32 s6, -115; SI-NEXT: s_mov_b32 s14, s616; SI-NEXT: s_waitcnt lgkmcnt(0)17; SI-NEXT: s_mov_b32 s12, s218; SI-NEXT: s_mov_b32 s13, s319; SI-NEXT: s_mov_b32 s15, s720; SI-NEXT: s_mov_b32 s10, s621; SI-NEXT: s_mov_b32 s11, s722; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc23; SI-NEXT: s_waitcnt vmcnt(0)24; SI-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc25; SI-NEXT: s_waitcnt vmcnt(0)26; SI-NEXT: s_mov_b32 s4, s027; SI-NEXT: s_mov_b32 s5, s128; SI-NEXT: v_cvt_f32_f16_e32 v0, v029; SI-NEXT: v_cvt_f32_f16_e32 v1, v130; SI-NEXT: v_mul_f32_e32 v0, v0, v131; SI-NEXT: v_cvt_f16_f32_e32 v0, v032; SI-NEXT: buffer_store_short v0, off, s[4:7], 033; SI-NEXT: s_endpgm34;35; GFX89-LABEL: fmul_f16:36; GFX89: ; %bb.0: ; %entry37; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2438; GFX89-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x3439; GFX89-NEXT: s_mov_b32 s7, 0xf00040; GFX89-NEXT: s_mov_b32 s6, -141; GFX89-NEXT: s_mov_b32 s14, s642; GFX89-NEXT: s_waitcnt lgkmcnt(0)43; GFX89-NEXT: s_mov_b32 s12, s244; GFX89-NEXT: s_mov_b32 s13, s345; GFX89-NEXT: s_mov_b32 s15, s746; GFX89-NEXT: s_mov_b32 s10, s647; GFX89-NEXT: s_mov_b32 s11, s748; GFX89-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc49; GFX89-NEXT: s_waitcnt vmcnt(0)50; GFX89-NEXT: buffer_load_ushort v1, off, s[8:11], 0 glc51; GFX89-NEXT: s_waitcnt vmcnt(0)52; GFX89-NEXT: s_mov_b32 s4, s053; GFX89-NEXT: s_mov_b32 s5, s154; GFX89-NEXT: v_mul_f16_e32 v0, v0, v155; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 056; GFX89-NEXT: s_endpgm57;58; GFX11-TRUE16-LABEL: fmul_f16:59; GFX11-TRUE16: ; %bb.0: ; %entry60; GFX11-TRUE16-NEXT: s_clause 0x161; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2462; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x3463; GFX11-TRUE16-NEXT: s_mov_b32 s10, -164; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x3101600065; GFX11-TRUE16-NEXT: s_mov_b32 s14, s1066; GFX11-TRUE16-NEXT: s_mov_b32 s15, s1167; GFX11-TRUE16-NEXT: s_mov_b32 s6, s1068; GFX11-TRUE16-NEXT: s_mov_b32 s7, s1169; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)70; GFX11-TRUE16-NEXT: s_mov_b32 s12, s271; GFX11-TRUE16-NEXT: s_mov_b32 s13, s372; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc73; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)74; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc75; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)76; GFX11-TRUE16-NEXT: s_mov_b32 s8, s077; GFX11-TRUE16-NEXT: s_mov_b32 s9, s178; GFX11-TRUE16-NEXT: v_mul_f16_e32 v0.l, v0.l, v1.l79; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 080; GFX11-TRUE16-NEXT: s_endpgm81;82; GFX11-FAKE16-LABEL: fmul_f16:83; GFX11-FAKE16: ; %bb.0: ; %entry84; GFX11-FAKE16-NEXT: s_clause 0x185; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2486; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x3487; GFX11-FAKE16-NEXT: s_mov_b32 s10, -188; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x3101600089; GFX11-FAKE16-NEXT: s_mov_b32 s14, s1090; GFX11-FAKE16-NEXT: s_mov_b32 s15, s1191; GFX11-FAKE16-NEXT: s_mov_b32 s6, s1092; GFX11-FAKE16-NEXT: s_mov_b32 s7, s1193; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)94; GFX11-FAKE16-NEXT: s_mov_b32 s12, s295; GFX11-FAKE16-NEXT: s_mov_b32 s13, s396; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc97; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)98; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[4:7], 0 glc dlc99; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)100; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0101; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1102; GFX11-FAKE16-NEXT: v_mul_f16_e32 v0, v0, v1103; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0104; GFX11-FAKE16-NEXT: s_endpgm105 ptr addrspace(1) %r,106 ptr addrspace(1) %a,107 ptr addrspace(1) %b) {108entry:109 %a.val = load volatile half, ptr addrspace(1) %a110 %b.val = load volatile half, ptr addrspace(1) %b111 %r.val = fmul half %a.val, %b.val112 store half %r.val, ptr addrspace(1) %r113 ret void114}115 116define amdgpu_kernel void @fmul_f16_imm_a(117; SI-LABEL: fmul_f16_imm_a:118; SI: ; %bb.0: ; %entry119; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9120; SI-NEXT: s_mov_b32 s7, 0xf000121; SI-NEXT: s_mov_b32 s6, -1122; SI-NEXT: s_mov_b32 s10, s6123; SI-NEXT: s_mov_b32 s11, s7124; SI-NEXT: s_waitcnt lgkmcnt(0)125; SI-NEXT: s_mov_b32 s8, s2126; SI-NEXT: s_mov_b32 s9, s3127; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 glc128; SI-NEXT: s_waitcnt vmcnt(0)129; SI-NEXT: s_mov_b32 s4, s0130; SI-NEXT: s_mov_b32 s5, s1131; SI-NEXT: v_cvt_f32_f16_e32 v0, v0132; SI-NEXT: v_mul_f32_e32 v0, 0x40400000, v0133; SI-NEXT: v_cvt_f16_f32_e32 v0, v0134; SI-NEXT: buffer_store_short v0, off, s[4:7], 0135; SI-NEXT: s_endpgm136;137; GFX89-LABEL: fmul_f16_imm_a:138; GFX89: ; %bb.0: ; %entry139; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24140; GFX89-NEXT: s_mov_b32 s7, 0xf000141; GFX89-NEXT: s_mov_b32 s6, -1142; GFX89-NEXT: s_mov_b32 s10, s6143; GFX89-NEXT: s_mov_b32 s11, s7144; GFX89-NEXT: s_waitcnt lgkmcnt(0)145; GFX89-NEXT: s_mov_b32 s8, s2146; GFX89-NEXT: s_mov_b32 s9, s3147; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 glc148; GFX89-NEXT: s_waitcnt vmcnt(0)149; GFX89-NEXT: s_mov_b32 s4, s0150; GFX89-NEXT: s_mov_b32 s5, s1151; GFX89-NEXT: v_mul_f16_e32 v0, 0x4200, v0152; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0153; GFX89-NEXT: s_endpgm154;155; GFX11-TRUE16-LABEL: fmul_f16_imm_a:156; GFX11-TRUE16: ; %bb.0: ; %entry157; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24158; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1159; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000160; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6161; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7162; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)163; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2164; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3165; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0166; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 glc dlc167; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)168; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1169; GFX11-TRUE16-NEXT: v_mul_f16_e32 v0.l, 0x4200, v0.l170; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0171; GFX11-TRUE16-NEXT: s_endpgm172;173; GFX11-FAKE16-LABEL: fmul_f16_imm_a:174; GFX11-FAKE16: ; %bb.0: ; %entry175; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24176; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1177; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000178; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6179; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7180; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)181; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2182; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3183; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0184; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 glc dlc185; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)186; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1187; GFX11-FAKE16-NEXT: v_mul_f16_e32 v0, 0x4200, v0188; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0189; GFX11-FAKE16-NEXT: s_endpgm190 ptr addrspace(1) %r,191 ptr addrspace(1) %b) {192entry:193 %b.val = load volatile half, ptr addrspace(1) %b194 %r.val = fmul half 3.0, %b.val195 store half %r.val, ptr addrspace(1) %r196 ret void197}198 199define amdgpu_kernel void @fmul_f16_imm_b(200; SI-LABEL: fmul_f16_imm_b:201; SI: ; %bb.0: ; %entry202; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9203; SI-NEXT: s_mov_b32 s7, 0xf000204; SI-NEXT: s_mov_b32 s6, -1205; SI-NEXT: s_mov_b32 s10, s6206; SI-NEXT: s_mov_b32 s11, s7207; SI-NEXT: s_waitcnt lgkmcnt(0)208; SI-NEXT: s_mov_b32 s8, s2209; SI-NEXT: s_mov_b32 s9, s3210; SI-NEXT: buffer_load_ushort v0, off, s[8:11], 0 glc211; SI-NEXT: s_waitcnt vmcnt(0)212; SI-NEXT: s_mov_b32 s4, s0213; SI-NEXT: s_mov_b32 s5, s1214; SI-NEXT: v_cvt_f32_f16_e32 v0, v0215; SI-NEXT: v_mul_f32_e32 v0, 4.0, v0216; SI-NEXT: v_cvt_f16_f32_e32 v0, v0217; SI-NEXT: buffer_store_short v0, off, s[4:7], 0218; SI-NEXT: s_endpgm219;220; GFX89-LABEL: fmul_f16_imm_b:221; GFX89: ; %bb.0: ; %entry222; GFX89-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24223; GFX89-NEXT: s_mov_b32 s7, 0xf000224; GFX89-NEXT: s_mov_b32 s6, -1225; GFX89-NEXT: s_mov_b32 s10, s6226; GFX89-NEXT: s_mov_b32 s11, s7227; GFX89-NEXT: s_waitcnt lgkmcnt(0)228; GFX89-NEXT: s_mov_b32 s8, s2229; GFX89-NEXT: s_mov_b32 s9, s3230; GFX89-NEXT: buffer_load_ushort v0, off, s[8:11], 0 glc231; GFX89-NEXT: s_waitcnt vmcnt(0)232; GFX89-NEXT: s_mov_b32 s4, s0233; GFX89-NEXT: s_mov_b32 s5, s1234; GFX89-NEXT: v_mul_f16_e32 v0, 4.0, v0235; GFX89-NEXT: buffer_store_short v0, off, s[4:7], 0236; GFX89-NEXT: s_endpgm237;238; GFX11-TRUE16-LABEL: fmul_f16_imm_b:239; GFX11-TRUE16: ; %bb.0: ; %entry240; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24241; GFX11-TRUE16-NEXT: s_mov_b32 s6, -1242; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x31016000243; GFX11-TRUE16-NEXT: s_mov_b32 s10, s6244; GFX11-TRUE16-NEXT: s_mov_b32 s11, s7245; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)246; GFX11-TRUE16-NEXT: s_mov_b32 s8, s2247; GFX11-TRUE16-NEXT: s_mov_b32 s9, s3248; GFX11-TRUE16-NEXT: s_mov_b32 s4, s0249; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 glc dlc250; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)251; GFX11-TRUE16-NEXT: s_mov_b32 s5, s1252; GFX11-TRUE16-NEXT: v_mul_f16_e32 v0.l, 4.0, v0.l253; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0254; GFX11-TRUE16-NEXT: s_endpgm255;256; GFX11-FAKE16-LABEL: fmul_f16_imm_b:257; GFX11-FAKE16: ; %bb.0: ; %entry258; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24259; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1260; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000261; GFX11-FAKE16-NEXT: s_mov_b32 s10, s6262; GFX11-FAKE16-NEXT: s_mov_b32 s11, s7263; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)264; GFX11-FAKE16-NEXT: s_mov_b32 s8, s2265; GFX11-FAKE16-NEXT: s_mov_b32 s9, s3266; GFX11-FAKE16-NEXT: s_mov_b32 s4, s0267; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[8:11], 0 glc dlc268; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)269; GFX11-FAKE16-NEXT: s_mov_b32 s5, s1270; GFX11-FAKE16-NEXT: v_mul_f16_e32 v0, 4.0, v0271; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0272; GFX11-FAKE16-NEXT: s_endpgm273 ptr addrspace(1) %r,274 ptr addrspace(1) %a) {275entry:276 %a.val = load volatile half, ptr addrspace(1) %a277 %r.val = fmul half %a.val, 4.0278 store half %r.val, ptr addrspace(1) %r279 ret void280}281 282define amdgpu_kernel void @fmul_v2f16(283; SI-LABEL: fmul_v2f16:284; SI: ; %bb.0: ; %entry285; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9286; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd287; SI-NEXT: s_mov_b32 s7, 0xf000288; SI-NEXT: s_mov_b32 s6, -1289; SI-NEXT: s_mov_b32 s10, s6290; SI-NEXT: s_mov_b32 s11, s7291; SI-NEXT: s_waitcnt lgkmcnt(0)292; SI-NEXT: s_mov_b32 s12, s2293; SI-NEXT: s_mov_b32 s13, s3294; SI-NEXT: s_mov_b32 s14, s6295; SI-NEXT: s_mov_b32 s15, s7296; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0297; SI-NEXT: buffer_load_dword v1, off, s[12:15], 0298; SI-NEXT: s_mov_b32 s4, s0299; SI-NEXT: s_mov_b32 s5, s1300; SI-NEXT: s_waitcnt vmcnt(1)301; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0302; SI-NEXT: s_waitcnt vmcnt(0)303; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v1304; SI-NEXT: v_cvt_f32_f16_e32 v2, v2305; SI-NEXT: v_cvt_f32_f16_e32 v3, v3306; SI-NEXT: v_cvt_f32_f16_e32 v0, v0307; SI-NEXT: v_cvt_f32_f16_e32 v1, v1308; SI-NEXT: v_mul_f32_e32 v2, v3, v2309; SI-NEXT: v_cvt_f16_f32_e32 v2, v2310; SI-NEXT: v_mul_f32_e32 v0, v1, v0311; SI-NEXT: v_cvt_f16_f32_e32 v0, v0312; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v2313; SI-NEXT: v_or_b32_e32 v0, v0, v1314; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0315; SI-NEXT: s_endpgm316;317; VI-LABEL: fmul_v2f16:318; VI: ; %bb.0: ; %entry319; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24320; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34321; VI-NEXT: s_mov_b32 s7, 0xf000322; VI-NEXT: s_mov_b32 s6, -1323; VI-NEXT: s_mov_b32 s10, s6324; VI-NEXT: s_mov_b32 s11, s7325; VI-NEXT: s_waitcnt lgkmcnt(0)326; VI-NEXT: s_mov_b32 s12, s2327; VI-NEXT: s_mov_b32 s13, s3328; VI-NEXT: s_mov_b32 s14, s6329; VI-NEXT: s_mov_b32 s15, s7330; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0331; VI-NEXT: buffer_load_dword v1, off, s[12:15], 0332; VI-NEXT: s_mov_b32 s4, s0333; VI-NEXT: s_mov_b32 s5, s1334; VI-NEXT: s_waitcnt vmcnt(0)335; VI-NEXT: v_mul_f16_sdwa v2, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1336; VI-NEXT: v_mul_f16_e32 v0, v1, v0337; VI-NEXT: v_or_b32_e32 v0, v0, v2338; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0339; VI-NEXT: s_endpgm340;341; GFX9-LABEL: fmul_v2f16:342; GFX9: ; %bb.0: ; %entry343; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24344; GFX9-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34345; GFX9-NEXT: s_mov_b32 s7, 0xf000346; GFX9-NEXT: s_mov_b32 s6, -1347; GFX9-NEXT: s_mov_b32 s14, s6348; GFX9-NEXT: s_waitcnt lgkmcnt(0)349; GFX9-NEXT: s_mov_b32 s12, s2350; GFX9-NEXT: s_mov_b32 s13, s3351; GFX9-NEXT: s_mov_b32 s15, s7352; GFX9-NEXT: s_mov_b32 s10, s6353; GFX9-NEXT: s_mov_b32 s11, s7354; GFX9-NEXT: buffer_load_dword v0, off, s[12:15], 0355; GFX9-NEXT: buffer_load_dword v1, off, s[8:11], 0356; GFX9-NEXT: s_mov_b32 s4, s0357; GFX9-NEXT: s_mov_b32 s5, s1358; GFX9-NEXT: s_waitcnt vmcnt(0)359; GFX9-NEXT: v_pk_mul_f16 v0, v0, v1360; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0361; GFX9-NEXT: s_endpgm362;363; GFX11-LABEL: fmul_v2f16:364; GFX11: ; %bb.0: ; %entry365; GFX11-NEXT: s_clause 0x1366; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24367; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34368; GFX11-NEXT: s_mov_b32 s10, -1369; GFX11-NEXT: s_mov_b32 s11, 0x31016000370; GFX11-NEXT: s_mov_b32 s14, s10371; GFX11-NEXT: s_mov_b32 s15, s11372; GFX11-NEXT: s_mov_b32 s6, s10373; GFX11-NEXT: s_mov_b32 s7, s11374; GFX11-NEXT: s_waitcnt lgkmcnt(0)375; GFX11-NEXT: s_mov_b32 s12, s2376; GFX11-NEXT: s_mov_b32 s13, s3377; GFX11-NEXT: buffer_load_b32 v0, off, s[12:15], 0378; GFX11-NEXT: buffer_load_b32 v1, off, s[4:7], 0379; GFX11-NEXT: s_mov_b32 s8, s0380; GFX11-NEXT: s_mov_b32 s9, s1381; GFX11-NEXT: s_waitcnt vmcnt(0)382; GFX11-NEXT: v_pk_mul_f16 v0, v0, v1383; GFX11-NEXT: buffer_store_b32 v0, off, s[8:11], 0384; GFX11-NEXT: s_endpgm385 ptr addrspace(1) %r,386 ptr addrspace(1) %a,387 ptr addrspace(1) %b) {388entry:389 %a.val = load <2 x half>, ptr addrspace(1) %a390 %b.val = load <2 x half>, ptr addrspace(1) %b391 %r.val = fmul <2 x half> %a.val, %b.val392 store <2 x half> %r.val, ptr addrspace(1) %r393 ret void394}395 396define amdgpu_kernel void @fmul_v2f16_imm_a(397; SI-LABEL: fmul_v2f16_imm_a:398; SI: ; %bb.0: ; %entry399; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9400; SI-NEXT: s_mov_b32 s7, 0xf000401; SI-NEXT: s_mov_b32 s6, -1402; SI-NEXT: s_mov_b32 s10, s6403; SI-NEXT: s_mov_b32 s11, s7404; SI-NEXT: s_waitcnt lgkmcnt(0)405; SI-NEXT: s_mov_b32 s8, s2406; SI-NEXT: s_mov_b32 s9, s3407; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0408; SI-NEXT: s_mov_b32 s4, s0409; SI-NEXT: s_mov_b32 s5, s1410; SI-NEXT: s_waitcnt vmcnt(0)411; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0412; SI-NEXT: v_cvt_f32_f16_e32 v1, v1413; SI-NEXT: v_cvt_f32_f16_e32 v0, v0414; SI-NEXT: v_mul_f32_e32 v1, 4.0, v1415; SI-NEXT: v_cvt_f16_f32_e32 v1, v1416; SI-NEXT: v_mul_f32_e32 v0, 0x40400000, v0417; SI-NEXT: v_cvt_f16_f32_e32 v0, v0418; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1419; SI-NEXT: v_or_b32_e32 v0, v0, v1420; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0421; SI-NEXT: s_endpgm422;423; VI-LABEL: fmul_v2f16_imm_a:424; VI: ; %bb.0: ; %entry425; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24426; VI-NEXT: s_mov_b32 s7, 0xf000427; VI-NEXT: s_mov_b32 s6, -1428; VI-NEXT: s_mov_b32 s10, s6429; VI-NEXT: s_mov_b32 s11, s7430; VI-NEXT: s_waitcnt lgkmcnt(0)431; VI-NEXT: s_mov_b32 s8, s2432; VI-NEXT: s_mov_b32 s9, s3433; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0434; VI-NEXT: v_mov_b32_e32 v1, 0x4400435; VI-NEXT: s_mov_b32 s4, s0436; VI-NEXT: s_mov_b32 s5, s1437; VI-NEXT: s_waitcnt vmcnt(0)438; VI-NEXT: v_mul_f16_sdwa v1, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD439; VI-NEXT: v_mul_f16_e32 v0, 0x4200, v0440; VI-NEXT: v_or_b32_e32 v0, v0, v1441; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0442; VI-NEXT: s_endpgm443;444; GFX9-LABEL: fmul_v2f16_imm_a:445; GFX9: ; %bb.0: ; %entry446; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24447; GFX9-NEXT: s_mov_b32 s7, 0xf000448; GFX9-NEXT: s_mov_b32 s6, -1449; GFX9-NEXT: s_mov_b32 s10, s6450; GFX9-NEXT: s_mov_b32 s11, s7451; GFX9-NEXT: s_waitcnt lgkmcnt(0)452; GFX9-NEXT: s_mov_b32 s8, s2453; GFX9-NEXT: s_mov_b32 s9, s3454; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 0455; GFX9-NEXT: s_mov_b32 s4, s0456; GFX9-NEXT: s_mov_b32 s0, 0x44004200457; GFX9-NEXT: s_mov_b32 s5, s1458; GFX9-NEXT: s_waitcnt vmcnt(0)459; GFX9-NEXT: v_pk_mul_f16 v0, v0, s0460; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0461; GFX9-NEXT: s_endpgm462;463; GFX11-LABEL: fmul_v2f16_imm_a:464; GFX11: ; %bb.0: ; %entry465; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24466; GFX11-NEXT: s_mov_b32 s6, -1467; GFX11-NEXT: s_mov_b32 s7, 0x31016000468; GFX11-NEXT: s_mov_b32 s10, s6469; GFX11-NEXT: s_mov_b32 s11, s7470; GFX11-NEXT: s_waitcnt lgkmcnt(0)471; GFX11-NEXT: s_mov_b32 s8, s2472; GFX11-NEXT: s_mov_b32 s9, s3473; GFX11-NEXT: s_mov_b32 s4, s0474; GFX11-NEXT: buffer_load_b32 v0, off, s[8:11], 0475; GFX11-NEXT: s_mov_b32 s5, s1476; GFX11-NEXT: s_waitcnt vmcnt(0)477; GFX11-NEXT: v_pk_mul_f16 v0, 0x44004200, v0478; GFX11-NEXT: buffer_store_b32 v0, off, s[4:7], 0479; GFX11-NEXT: s_endpgm480 ptr addrspace(1) %r,481 ptr addrspace(1) %b) {482entry:483 %b.val = load <2 x half>, ptr addrspace(1) %b484 %r.val = fmul <2 x half> <half 3.0, half 4.0>, %b.val485 store <2 x half> %r.val, ptr addrspace(1) %r486 ret void487}488 489define amdgpu_kernel void @fmul_v2f16_imm_b(490; SI-LABEL: fmul_v2f16_imm_b:491; SI: ; %bb.0: ; %entry492; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9493; SI-NEXT: s_mov_b32 s7, 0xf000494; SI-NEXT: s_mov_b32 s6, -1495; SI-NEXT: s_mov_b32 s10, s6496; SI-NEXT: s_mov_b32 s11, s7497; SI-NEXT: s_waitcnt lgkmcnt(0)498; SI-NEXT: s_mov_b32 s8, s2499; SI-NEXT: s_mov_b32 s9, s3500; SI-NEXT: buffer_load_dword v0, off, s[8:11], 0501; SI-NEXT: s_mov_b32 s4, s0502; SI-NEXT: s_mov_b32 s5, s1503; SI-NEXT: s_waitcnt vmcnt(0)504; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v0505; SI-NEXT: v_cvt_f32_f16_e32 v1, v1506; SI-NEXT: v_cvt_f32_f16_e32 v0, v0507; SI-NEXT: v_mul_f32_e32 v1, 0x40400000, v1508; SI-NEXT: v_cvt_f16_f32_e32 v1, v1509; SI-NEXT: v_mul_f32_e32 v0, 4.0, v0510; SI-NEXT: v_cvt_f16_f32_e32 v0, v0511; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1512; SI-NEXT: v_or_b32_e32 v0, v0, v1513; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0514; SI-NEXT: s_endpgm515;516; VI-LABEL: fmul_v2f16_imm_b:517; VI: ; %bb.0: ; %entry518; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24519; VI-NEXT: s_mov_b32 s7, 0xf000520; VI-NEXT: s_mov_b32 s6, -1521; VI-NEXT: s_mov_b32 s10, s6522; VI-NEXT: s_mov_b32 s11, s7523; VI-NEXT: s_waitcnt lgkmcnt(0)524; VI-NEXT: s_mov_b32 s8, s2525; VI-NEXT: s_mov_b32 s9, s3526; VI-NEXT: buffer_load_dword v0, off, s[8:11], 0527; VI-NEXT: v_mov_b32_e32 v1, 0x4200528; VI-NEXT: s_mov_b32 s4, s0529; VI-NEXT: s_mov_b32 s5, s1530; VI-NEXT: s_waitcnt vmcnt(0)531; VI-NEXT: v_mul_f16_sdwa v1, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD532; VI-NEXT: v_mul_f16_e32 v0, 4.0, v0533; VI-NEXT: v_or_b32_e32 v0, v0, v1534; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0535; VI-NEXT: s_endpgm536;537; GFX9-LABEL: fmul_v2f16_imm_b:538; GFX9: ; %bb.0: ; %entry539; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24540; GFX9-NEXT: s_mov_b32 s7, 0xf000541; GFX9-NEXT: s_mov_b32 s6, -1542; GFX9-NEXT: s_mov_b32 s10, s6543; GFX9-NEXT: s_mov_b32 s11, s7544; GFX9-NEXT: s_waitcnt lgkmcnt(0)545; GFX9-NEXT: s_mov_b32 s8, s2546; GFX9-NEXT: s_mov_b32 s9, s3547; GFX9-NEXT: buffer_load_dword v0, off, s[8:11], 0548; GFX9-NEXT: s_mov_b32 s4, s0549; GFX9-NEXT: s_mov_b32 s0, 0x42004400550; GFX9-NEXT: s_mov_b32 s5, s1551; GFX9-NEXT: s_waitcnt vmcnt(0)552; GFX9-NEXT: v_pk_mul_f16 v0, v0, s0553; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0554; GFX9-NEXT: s_endpgm555;556; GFX11-LABEL: fmul_v2f16_imm_b:557; GFX11: ; %bb.0: ; %entry558; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24559; GFX11-NEXT: s_mov_b32 s6, -1560; GFX11-NEXT: s_mov_b32 s7, 0x31016000561; GFX11-NEXT: s_mov_b32 s10, s6562; GFX11-NEXT: s_mov_b32 s11, s7563; GFX11-NEXT: s_waitcnt lgkmcnt(0)564; GFX11-NEXT: s_mov_b32 s8, s2565; GFX11-NEXT: s_mov_b32 s9, s3566; GFX11-NEXT: s_mov_b32 s4, s0567; GFX11-NEXT: buffer_load_b32 v0, off, s[8:11], 0568; GFX11-NEXT: s_mov_b32 s5, s1569; GFX11-NEXT: s_waitcnt vmcnt(0)570; GFX11-NEXT: v_pk_mul_f16 v0, 0x42004400, v0571; GFX11-NEXT: buffer_store_b32 v0, off, s[4:7], 0572; GFX11-NEXT: s_endpgm573 ptr addrspace(1) %r,574 ptr addrspace(1) %a) {575entry:576 %a.val = load <2 x half>, ptr addrspace(1) %a577 %r.val = fmul <2 x half> %a.val, <half 4.0, half 3.0>578 store <2 x half> %r.val, ptr addrspace(1) %r579 ret void580}581 582define amdgpu_kernel void @fmul_v4f16(583; SI-LABEL: fmul_v4f16:584; SI: ; %bb.0: ; %entry585; SI-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x9586; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0xd587; SI-NEXT: s_mov_b32 s3, 0xf000588; SI-NEXT: s_mov_b32 s2, -1589; SI-NEXT: s_mov_b32 s6, s2590; SI-NEXT: s_waitcnt lgkmcnt(0)591; SI-NEXT: s_mov_b32 s12, s10592; SI-NEXT: s_mov_b32 s7, s3593; SI-NEXT: s_mov_b32 s13, s11594; SI-NEXT: s_mov_b32 s14, s2595; SI-NEXT: s_mov_b32 s15, s3596; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0597; SI-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 0598; SI-NEXT: s_mov_b32 s0, s8599; SI-NEXT: s_mov_b32 s1, s9600; SI-NEXT: s_waitcnt vmcnt(1)601; SI-NEXT: v_cvt_f32_f16_e32 v4, v0602; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0603; SI-NEXT: v_cvt_f32_f16_e32 v5, v1604; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1605; SI-NEXT: s_waitcnt vmcnt(0)606; SI-NEXT: v_cvt_f32_f16_e32 v6, v2607; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v2608; SI-NEXT: v_cvt_f32_f16_e32 v7, v3609; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3610; SI-NEXT: v_cvt_f32_f16_e32 v0, v0611; SI-NEXT: v_cvt_f32_f16_e32 v1, v1612; SI-NEXT: v_cvt_f32_f16_e32 v3, v3613; SI-NEXT: v_cvt_f32_f16_e32 v2, v2614; SI-NEXT: v_mul_f32_e32 v5, v7, v5615; SI-NEXT: v_mul_f32_e32 v4, v6, v4616; SI-NEXT: v_mul_f32_e32 v1, v3, v1617; SI-NEXT: v_mul_f32_e32 v0, v2, v0618; SI-NEXT: v_cvt_f16_f32_e32 v1, v1619; SI-NEXT: v_cvt_f16_f32_e32 v0, v0620; SI-NEXT: v_cvt_f16_f32_e32 v2, v5621; SI-NEXT: v_cvt_f16_f32_e32 v3, v4622; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1623; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0624; SI-NEXT: v_or_b32_e32 v1, v2, v1625; SI-NEXT: v_or_b32_e32 v0, v3, v0626; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0627; SI-NEXT: s_endpgm628;629; VI-LABEL: fmul_v4f16:630; VI: ; %bb.0: ; %entry631; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24632; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34633; VI-NEXT: s_mov_b32 s7, 0xf000634; VI-NEXT: s_mov_b32 s6, -1635; VI-NEXT: s_mov_b32 s10, s6636; VI-NEXT: s_mov_b32 s11, s7637; VI-NEXT: s_waitcnt lgkmcnt(0)638; VI-NEXT: s_mov_b32 s12, s2639; VI-NEXT: s_mov_b32 s13, s3640; VI-NEXT: s_mov_b32 s14, s6641; VI-NEXT: s_mov_b32 s15, s7642; VI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0643; VI-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 0644; VI-NEXT: s_mov_b32 s4, s0645; VI-NEXT: s_mov_b32 s5, s1646; VI-NEXT: s_waitcnt vmcnt(0)647; VI-NEXT: v_mul_f16_sdwa v4, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1648; VI-NEXT: v_mul_f16_e32 v1, v3, v1649; VI-NEXT: v_mul_f16_sdwa v3, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1650; VI-NEXT: v_mul_f16_e32 v0, v2, v0651; VI-NEXT: v_or_b32_e32 v1, v1, v4652; VI-NEXT: v_or_b32_e32 v0, v0, v3653; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0654; VI-NEXT: s_endpgm655;656; GFX9-LABEL: fmul_v4f16:657; GFX9: ; %bb.0: ; %entry658; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24659; GFX9-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x34660; GFX9-NEXT: s_mov_b32 s7, 0xf000661; GFX9-NEXT: s_mov_b32 s6, -1662; GFX9-NEXT: s_mov_b32 s10, s6663; GFX9-NEXT: s_mov_b32 s11, s7664; GFX9-NEXT: s_waitcnt lgkmcnt(0)665; GFX9-NEXT: s_mov_b32 s12, s2666; GFX9-NEXT: s_mov_b32 s13, s3667; GFX9-NEXT: s_mov_b32 s14, s6668; GFX9-NEXT: s_mov_b32 s15, s7669; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0670; GFX9-NEXT: buffer_load_dwordx2 v[2:3], off, s[12:15], 0671; GFX9-NEXT: s_mov_b32 s4, s0672; GFX9-NEXT: s_mov_b32 s5, s1673; GFX9-NEXT: s_waitcnt vmcnt(0)674; GFX9-NEXT: v_pk_mul_f16 v1, v3, v1675; GFX9-NEXT: v_pk_mul_f16 v0, v2, v0676; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0677; GFX9-NEXT: s_endpgm678;679; GFX11-LABEL: fmul_v4f16:680; GFX11: ; %bb.0: ; %entry681; GFX11-NEXT: s_clause 0x1682; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24683; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x34684; GFX11-NEXT: s_mov_b32 s10, -1685; GFX11-NEXT: s_mov_b32 s11, 0x31016000686; GFX11-NEXT: s_mov_b32 s6, s10687; GFX11-NEXT: s_mov_b32 s7, s11688; GFX11-NEXT: s_mov_b32 s14, s10689; GFX11-NEXT: s_mov_b32 s15, s11690; GFX11-NEXT: s_waitcnt lgkmcnt(0)691; GFX11-NEXT: s_mov_b32 s12, s2692; GFX11-NEXT: s_mov_b32 s13, s3693; GFX11-NEXT: buffer_load_b64 v[0:1], off, s[4:7], 0694; GFX11-NEXT: buffer_load_b64 v[2:3], off, s[12:15], 0695; GFX11-NEXT: s_mov_b32 s8, s0696; GFX11-NEXT: s_mov_b32 s9, s1697; GFX11-NEXT: s_waitcnt vmcnt(0)698; GFX11-NEXT: v_pk_mul_f16 v1, v3, v1699; GFX11-NEXT: v_pk_mul_f16 v0, v2, v0700; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[8:11], 0701; GFX11-NEXT: s_endpgm702 ptr addrspace(1) %r,703 ptr addrspace(1) %a,704 ptr addrspace(1) %b) {705entry:706 %a.val = load <4 x half>, ptr addrspace(1) %a707 %b.val = load <4 x half>, ptr addrspace(1) %b708 %r.val = fmul <4 x half> %a.val, %b.val709 store <4 x half> %r.val, ptr addrspace(1) %r710 ret void711}712 713define amdgpu_kernel void @fmul_v4f16_imm_a(714; SI-LABEL: fmul_v4f16_imm_a:715; SI: ; %bb.0: ; %entry716; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9717; SI-NEXT: s_mov_b32 s7, 0xf000718; SI-NEXT: s_mov_b32 s6, -1719; SI-NEXT: s_mov_b32 s10, s6720; SI-NEXT: s_mov_b32 s11, s7721; SI-NEXT: s_waitcnt lgkmcnt(0)722; SI-NEXT: s_mov_b32 s8, s2723; SI-NEXT: s_mov_b32 s9, s3724; SI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0725; SI-NEXT: s_mov_b32 s4, s0726; SI-NEXT: s_mov_b32 s5, s1727; SI-NEXT: s_waitcnt vmcnt(0)728; SI-NEXT: v_cvt_f32_f16_e32 v2, v0729; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0730; SI-NEXT: v_cvt_f32_f16_e32 v3, v1731; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1732; SI-NEXT: v_cvt_f32_f16_e32 v1, v1733; SI-NEXT: v_cvt_f32_f16_e32 v0, v0734; SI-NEXT: v_mul_f32_e32 v3, 0x40400000, v3735; SI-NEXT: v_mul_f32_e32 v2, 0x41000000, v2736; SI-NEXT: v_mul_f32_e32 v1, 4.0, v1737; SI-NEXT: v_add_f32_e32 v0, v0, v0738; SI-NEXT: v_cvt_f16_f32_e32 v1, v1739; SI-NEXT: v_cvt_f16_f32_e32 v0, v0740; SI-NEXT: v_cvt_f16_f32_e32 v3, v3741; SI-NEXT: v_cvt_f16_f32_e32 v2, v2742; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1743; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0744; SI-NEXT: v_or_b32_e32 v1, v3, v1745; SI-NEXT: v_or_b32_e32 v0, v2, v0746; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0747; SI-NEXT: s_endpgm748;749; VI-LABEL: fmul_v4f16_imm_a:750; VI: ; %bb.0: ; %entry751; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24752; VI-NEXT: s_mov_b32 s7, 0xf000753; VI-NEXT: s_mov_b32 s6, -1754; VI-NEXT: s_mov_b32 s10, s6755; VI-NEXT: s_mov_b32 s11, s7756; VI-NEXT: s_waitcnt lgkmcnt(0)757; VI-NEXT: s_mov_b32 s8, s2758; VI-NEXT: s_mov_b32 s9, s3759; VI-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0760; VI-NEXT: v_mov_b32_e32 v2, 0x4400761; VI-NEXT: s_mov_b32 s4, s0762; VI-NEXT: s_mov_b32 s5, s1763; VI-NEXT: s_waitcnt vmcnt(0)764; VI-NEXT: v_mul_f16_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD765; VI-NEXT: v_mul_f16_e32 v1, 0x4200, v1766; VI-NEXT: v_add_f16_sdwa v3, v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1767; VI-NEXT: v_mul_f16_e32 v0, 0x4800, v0768; VI-NEXT: v_or_b32_e32 v1, v1, v2769; VI-NEXT: v_or_b32_e32 v0, v0, v3770; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0771; VI-NEXT: s_endpgm772;773; GFX9-LABEL: fmul_v4f16_imm_a:774; GFX9: ; %bb.0: ; %entry775; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24776; GFX9-NEXT: s_mov_b32 s7, 0xf000777; GFX9-NEXT: s_mov_b32 s6, -1778; GFX9-NEXT: s_mov_b32 s10, s6779; GFX9-NEXT: s_mov_b32 s11, s7780; GFX9-NEXT: s_waitcnt lgkmcnt(0)781; GFX9-NEXT: s_mov_b32 s8, s2782; GFX9-NEXT: s_mov_b32 s9, s3783; GFX9-NEXT: buffer_load_dwordx2 v[0:1], off, s[8:11], 0784; GFX9-NEXT: s_mov_b32 s2, 0x44004200785; GFX9-NEXT: s_mov_b32 s3, 0x40004800786; GFX9-NEXT: s_mov_b32 s4, s0787; GFX9-NEXT: s_mov_b32 s5, s1788; GFX9-NEXT: s_waitcnt vmcnt(0)789; GFX9-NEXT: v_pk_mul_f16 v1, v1, s2790; GFX9-NEXT: v_pk_mul_f16 v0, v0, s3791; GFX9-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0792; GFX9-NEXT: s_endpgm793;794; GFX11-LABEL: fmul_v4f16_imm_a:795; GFX11: ; %bb.0: ; %entry796; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24797; GFX11-NEXT: s_mov_b32 s6, -1798; GFX11-NEXT: s_mov_b32 s7, 0x31016000799; GFX11-NEXT: s_mov_b32 s10, s6800; GFX11-NEXT: s_mov_b32 s11, s7801; GFX11-NEXT: s_waitcnt lgkmcnt(0)802; GFX11-NEXT: s_mov_b32 s8, s2803; GFX11-NEXT: s_mov_b32 s9, s3804; GFX11-NEXT: s_mov_b32 s4, s0805; GFX11-NEXT: buffer_load_b64 v[0:1], off, s[8:11], 0806; GFX11-NEXT: s_mov_b32 s5, s1807; GFX11-NEXT: s_waitcnt vmcnt(0)808; GFX11-NEXT: v_pk_mul_f16 v1, 0x44004200, v1809; GFX11-NEXT: v_pk_mul_f16 v0, 0x40004800, v0810; GFX11-NEXT: buffer_store_b64 v[0:1], off, s[4:7], 0811; GFX11-NEXT: s_endpgm812 ptr addrspace(1) %r,813 ptr addrspace(1) %b) {814entry:815 %b.val = load <4 x half>, ptr addrspace(1) %b816 %r.val = fmul <4 x half> <half 8.0, half 2.0, half 3.0, half 4.0>, %b.val817 store <4 x half> %r.val, ptr addrspace(1) %r818 ret void819}820