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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefixes=SICI,SI %s3; RUN: llc -mtriple=amdgcn -mcpu=bonaire < %s | FileCheck -check-prefixes=SICI,CI %s4; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=VI %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s7 8declare half @llvm.nearbyint.f16(half) #09declare float @llvm.nearbyint.f32(float) #010declare <2 x float> @llvm.nearbyint.v2f32(<2 x float>) #011declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>) #012declare double @llvm.nearbyint.f64(double) #013declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>) #014declare <4 x double> @llvm.nearbyint.v4f64(<4 x double>) #015 16define amdgpu_kernel void @fnearbyint_f16(ptr addrspace(1) %out, half %in) #1 {17; SI-LABEL: fnearbyint_f16:18; SI: ; %bb.0:19; SI-NEXT: s_load_dword s6, s[4:5], 0xb20; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x921; SI-NEXT: s_mov_b32 s3, 0xf00022; SI-NEXT: s_mov_b32 s2, -123; SI-NEXT: s_waitcnt lgkmcnt(0)24; SI-NEXT: v_cvt_f32_f16_e32 v0, s625; SI-NEXT: v_rndne_f32_e32 v0, v026; SI-NEXT: v_cvt_f16_f32_e32 v0, v027; SI-NEXT: buffer_store_short v0, off, s[0:3], 028; SI-NEXT: s_endpgm29;30; CI-LABEL: fnearbyint_f16:31; CI: ; %bb.0:32; CI-NEXT: s_load_dword s0, s[4:5], 0xb33; CI-NEXT: s_mov_b32 s3, 0xf00034; CI-NEXT: s_mov_b32 s2, -135; CI-NEXT: s_waitcnt lgkmcnt(0)36; CI-NEXT: v_cvt_f32_f16_e32 v0, s037; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x938; CI-NEXT: v_rndne_f32_e32 v0, v039; CI-NEXT: v_cvt_f16_f32_e32 v0, v040; CI-NEXT: s_waitcnt lgkmcnt(0)41; CI-NEXT: buffer_store_short v0, off, s[0:3], 042; CI-NEXT: s_endpgm43;44; VI-LABEL: fnearbyint_f16:45; VI: ; %bb.0:46; VI-NEXT: s_load_dword s2, s[4:5], 0x2c47; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2448; VI-NEXT: s_waitcnt lgkmcnt(0)49; VI-NEXT: v_rndne_f16_e32 v2, s250; VI-NEXT: v_mov_b32_e32 v0, s051; VI-NEXT: v_mov_b32_e32 v1, s152; VI-NEXT: flat_store_short v[0:1], v253; VI-NEXT: s_endpgm54;55; GFX11-TRUE16-LABEL: fnearbyint_f16:56; GFX11-TRUE16: ; %bb.0:57; GFX11-TRUE16-NEXT: s_clause 0x158; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x2c59; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2460; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 061; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)62; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, s263; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]64; GFX11-TRUE16-NEXT: s_endpgm65;66; GFX11-FAKE16-LABEL: fnearbyint_f16:67; GFX11-FAKE16: ; %bb.0:68; GFX11-FAKE16-NEXT: s_clause 0x169; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x2c70; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x2471; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 072; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)73; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v1, s274; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]75; GFX11-FAKE16-NEXT: s_endpgm76 %1 = call half @llvm.nearbyint.f16(half %in)77 store half %1, ptr addrspace(1) %out78 ret void79}80 81define amdgpu_kernel void @fnearbyint_f32(ptr addrspace(1) %out, float %in) #1 {82; SICI-LABEL: fnearbyint_f32:83; SICI: ; %bb.0: ; %entry84; SICI-NEXT: s_load_dword s6, s[4:5], 0xb85; SICI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x986; SICI-NEXT: s_mov_b32 s3, 0xf00087; SICI-NEXT: s_mov_b32 s2, -188; SICI-NEXT: s_waitcnt lgkmcnt(0)89; SICI-NEXT: v_rndne_f32_e32 v0, s690; SICI-NEXT: buffer_store_dword v0, off, s[0:3], 091; SICI-NEXT: s_endpgm92;93; VI-LABEL: fnearbyint_f32:94; VI: ; %bb.0: ; %entry95; VI-NEXT: s_load_dword s2, s[4:5], 0x2c96; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2497; VI-NEXT: s_waitcnt lgkmcnt(0)98; VI-NEXT: v_rndne_f32_e32 v2, s299; VI-NEXT: v_mov_b32_e32 v0, s0100; VI-NEXT: v_mov_b32_e32 v1, s1101; VI-NEXT: flat_store_dword v[0:1], v2102; VI-NEXT: s_endpgm103;104; GFX11-LABEL: fnearbyint_f32:105; GFX11: ; %bb.0: ; %entry106; GFX11-NEXT: s_clause 0x1107; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x2c108; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24109; GFX11-NEXT: v_mov_b32_e32 v0, 0110; GFX11-NEXT: s_waitcnt lgkmcnt(0)111; GFX11-NEXT: v_rndne_f32_e32 v1, s2112; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]113; GFX11-NEXT: s_endpgm114entry:115 %0 = call float @llvm.nearbyint.f32(float %in)116 store float %0, ptr addrspace(1) %out117 ret void118}119 120define amdgpu_kernel void @fnearbyint_v2f32(ptr addrspace(1) %out, <2 x float> %in) #1 {121; SICI-LABEL: fnearbyint_v2f32:122; SICI: ; %bb.0: ; %entry123; SICI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9124; SICI-NEXT: s_waitcnt lgkmcnt(0)125; SICI-NEXT: s_mov_b64 s[4:5], s[2:3]126; SICI-NEXT: s_mov_b32 s3, 0xf000127; SICI-NEXT: s_mov_b32 s2, -1128; SICI-NEXT: v_rndne_f32_e32 v1, s5129; SICI-NEXT: v_rndne_f32_e32 v0, s4130; SICI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0131; SICI-NEXT: s_endpgm132;133; VI-LABEL: fnearbyint_v2f32:134; VI: ; %bb.0: ; %entry135; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24136; VI-NEXT: s_waitcnt lgkmcnt(0)137; VI-NEXT: v_mov_b32_e32 v3, s1138; VI-NEXT: v_rndne_f32_e32 v1, s3139; VI-NEXT: v_rndne_f32_e32 v0, s2140; VI-NEXT: v_mov_b32_e32 v2, s0141; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]142; VI-NEXT: s_endpgm143;144; GFX11-LABEL: fnearbyint_v2f32:145; GFX11: ; %bb.0: ; %entry146; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24147; GFX11-NEXT: v_mov_b32_e32 v2, 0148; GFX11-NEXT: s_waitcnt lgkmcnt(0)149; GFX11-NEXT: v_rndne_f32_e32 v1, s3150; GFX11-NEXT: v_rndne_f32_e32 v0, s2151; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]152; GFX11-NEXT: s_endpgm153entry:154 %0 = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %in)155 store <2 x float> %0, ptr addrspace(1) %out156 ret void157}158 159define amdgpu_kernel void @fnearbyint_v4f32(ptr addrspace(1) %out, <4 x float> %in) #1 {160; SICI-LABEL: fnearbyint_v4f32:161; SICI: ; %bb.0: ; %entry162; SICI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd163; SICI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9164; SICI-NEXT: s_mov_b32 s7, 0xf000165; SICI-NEXT: s_mov_b32 s6, -1166; SICI-NEXT: s_waitcnt lgkmcnt(0)167; SICI-NEXT: v_rndne_f32_e32 v3, s3168; SICI-NEXT: v_rndne_f32_e32 v2, s2169; SICI-NEXT: v_rndne_f32_e32 v1, s1170; SICI-NEXT: v_rndne_f32_e32 v0, s0171; SICI-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0172; SICI-NEXT: s_endpgm173;174; VI-LABEL: fnearbyint_v4f32:175; VI: ; %bb.0: ; %entry176; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34177; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24178; VI-NEXT: s_waitcnt lgkmcnt(0)179; VI-NEXT: v_rndne_f32_e32 v3, s3180; VI-NEXT: v_mov_b32_e32 v4, s4181; VI-NEXT: v_rndne_f32_e32 v2, s2182; VI-NEXT: v_rndne_f32_e32 v1, s1183; VI-NEXT: v_rndne_f32_e32 v0, s0184; VI-NEXT: v_mov_b32_e32 v5, s5185; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]186; VI-NEXT: s_endpgm187;188; GFX11-LABEL: fnearbyint_v4f32:189; GFX11: ; %bb.0: ; %entry190; GFX11-NEXT: s_clause 0x1191; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x34192; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x24193; GFX11-NEXT: v_mov_b32_e32 v4, 0194; GFX11-NEXT: s_waitcnt lgkmcnt(0)195; GFX11-NEXT: v_rndne_f32_e32 v3, s3196; GFX11-NEXT: v_rndne_f32_e32 v2, s2197; GFX11-NEXT: v_rndne_f32_e32 v1, s1198; GFX11-NEXT: v_rndne_f32_e32 v0, s0199; GFX11-NEXT: global_store_b128 v4, v[0:3], s[4:5]200; GFX11-NEXT: s_endpgm201entry:202 %0 = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %in)203 store <4 x float> %0, ptr addrspace(1) %out204 ret void205}206 207define amdgpu_kernel void @nearbyint_f64(ptr addrspace(1) %out, double %in) {208; SI-LABEL: nearbyint_f64:209; SI: ; %bb.0: ; %entry210; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9211; SI-NEXT: s_mov_b32 s7, 0xf000212; SI-NEXT: s_mov_b32 s6, -1213; SI-NEXT: s_brev_b32 s8, -2214; SI-NEXT: v_mov_b32_e32 v1, 0x43300000215; SI-NEXT: v_mov_b32_e32 v0, 0216; SI-NEXT: v_mov_b32_e32 v2, -1217; SI-NEXT: v_mov_b32_e32 v3, 0x432fffff218; SI-NEXT: s_waitcnt lgkmcnt(0)219; SI-NEXT: s_mov_b32 s4, s0220; SI-NEXT: s_mov_b32 s5, s1221; SI-NEXT: v_mov_b32_e32 v6, s3222; SI-NEXT: v_bfi_b32 v1, s8, v1, v6223; SI-NEXT: v_mov_b32_e32 v7, s2224; SI-NEXT: v_add_f64 v[4:5], s[2:3], v[0:1]225; SI-NEXT: v_add_f64 v[0:1], v[4:5], -v[0:1]226; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[2:3]|, v[2:3]227; SI-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc228; SI-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc229; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0230; SI-NEXT: s_endpgm231;232; CI-LABEL: nearbyint_f64:233; CI: ; %bb.0: ; %entry234; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9235; CI-NEXT: s_waitcnt lgkmcnt(0)236; CI-NEXT: v_rndne_f64_e32 v[0:1], s[2:3]237; CI-NEXT: s_mov_b32 s3, 0xf000238; CI-NEXT: s_mov_b32 s2, -1239; CI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0240; CI-NEXT: s_endpgm241;242; VI-LABEL: nearbyint_f64:243; VI: ; %bb.0: ; %entry244; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24245; VI-NEXT: s_waitcnt lgkmcnt(0)246; VI-NEXT: v_rndne_f64_e32 v[0:1], s[2:3]247; VI-NEXT: v_mov_b32_e32 v2, s0248; VI-NEXT: v_mov_b32_e32 v3, s1249; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]250; VI-NEXT: s_endpgm251;252; GFX11-LABEL: nearbyint_f64:253; GFX11: ; %bb.0: ; %entry254; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24255; GFX11-NEXT: v_mov_b32_e32 v2, 0256; GFX11-NEXT: s_waitcnt lgkmcnt(0)257; GFX11-NEXT: v_rndne_f64_e32 v[0:1], s[2:3]258; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]259; GFX11-NEXT: s_endpgm260entry:261 %0 = call double @llvm.nearbyint.f64(double %in)262 store double %0, ptr addrspace(1) %out263 ret void264}265define amdgpu_kernel void @nearbyint_v2f64(ptr addrspace(1) %out, <2 x double> %in) {266; SI-LABEL: nearbyint_v2f64:267; SI: ; %bb.0: ; %entry268; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9269; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0xd270; SI-NEXT: s_mov_b32 s3, 0xf000271; SI-NEXT: s_mov_b32 s2, -1272; SI-NEXT: s_brev_b32 s10, -2273; SI-NEXT: v_mov_b32_e32 v6, 0x43300000274; SI-NEXT: s_mov_b32 s9, 0x432fffff275; SI-NEXT: v_mov_b32_e32 v0, 0276; SI-NEXT: s_mov_b32 s8, s2277; SI-NEXT: v_mov_b32_e32 v4, s8278; SI-NEXT: v_mov_b32_e32 v5, s9279; SI-NEXT: s_waitcnt lgkmcnt(0)280; SI-NEXT: v_mov_b32_e32 v7, s7281; SI-NEXT: v_bfi_b32 v1, s10, v6, v7282; SI-NEXT: v_mov_b32_e32 v8, s6283; SI-NEXT: v_mov_b32_e32 v9, s5284; SI-NEXT: v_mov_b32_e32 v10, s4285; SI-NEXT: v_add_f64 v[2:3], s[6:7], v[0:1]286; SI-NEXT: v_add_f64 v[2:3], v[2:3], -v[0:1]287; SI-NEXT: v_bfi_b32 v1, s10, v6, v9288; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[6:7]|, v[4:5]289; SI-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc290; SI-NEXT: v_cndmask_b32_e32 v2, v2, v8, vcc291; SI-NEXT: v_add_f64 v[6:7], s[4:5], v[0:1]292; SI-NEXT: v_add_f64 v[0:1], v[6:7], -v[0:1]293; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[4:5]|, v[4:5]294; SI-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc295; SI-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc296; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0297; SI-NEXT: s_endpgm298;299; CI-LABEL: nearbyint_v2f64:300; CI: ; %bb.0: ; %entry301; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0xd302; CI-NEXT: s_waitcnt lgkmcnt(0)303; CI-NEXT: v_rndne_f64_e32 v[2:3], s[2:3]304; CI-NEXT: v_rndne_f64_e32 v[0:1], s[0:1]305; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9306; CI-NEXT: s_mov_b32 s3, 0xf000307; CI-NEXT: s_mov_b32 s2, -1308; CI-NEXT: s_waitcnt lgkmcnt(0)309; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0310; CI-NEXT: s_endpgm311;312; VI-LABEL: nearbyint_v2f64:313; VI: ; %bb.0: ; %entry314; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34315; VI-NEXT: s_waitcnt lgkmcnt(0)316; VI-NEXT: v_rndne_f64_e32 v[2:3], s[2:3]317; VI-NEXT: v_rndne_f64_e32 v[0:1], s[0:1]318; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24319; VI-NEXT: s_waitcnt lgkmcnt(0)320; VI-NEXT: v_mov_b32_e32 v5, s1321; VI-NEXT: v_mov_b32_e32 v4, s0322; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]323; VI-NEXT: s_endpgm324;325; GFX11-LABEL: nearbyint_v2f64:326; GFX11: ; %bb.0: ; %entry327; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x34328; GFX11-NEXT: v_mov_b32_e32 v4, 0329; GFX11-NEXT: s_waitcnt lgkmcnt(0)330; GFX11-NEXT: v_rndne_f64_e32 v[2:3], s[2:3]331; GFX11-NEXT: v_rndne_f64_e32 v[0:1], s[0:1]332; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24333; GFX11-NEXT: s_waitcnt lgkmcnt(0)334; GFX11-NEXT: global_store_b128 v4, v[0:3], s[0:1]335; GFX11-NEXT: s_endpgm336entry:337 %0 = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %in)338 store <2 x double> %0, ptr addrspace(1) %out339 ret void340}341 342define amdgpu_kernel void @nearbyint_v4f64(ptr addrspace(1) %out, <4 x double> %in) {343; SI-LABEL: nearbyint_v4f64:344; SI: ; %bb.0: ; %entry345; SI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x9346; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x11347; SI-NEXT: s_mov_b32 s11, 0xf000348; SI-NEXT: s_mov_b32 s10, -1349; SI-NEXT: s_brev_b32 s14, -2350; SI-NEXT: v_mov_b32_e32 v10, 0x43300000351; SI-NEXT: s_mov_b32 s13, 0x432fffff352; SI-NEXT: v_mov_b32_e32 v4, 0353; SI-NEXT: s_mov_b32 s12, s10354; SI-NEXT: v_mov_b32_e32 v8, s12355; SI-NEXT: v_mov_b32_e32 v9, s13356; SI-NEXT: s_waitcnt lgkmcnt(0)357; SI-NEXT: v_mov_b32_e32 v2, s3358; SI-NEXT: v_bfi_b32 v5, s14, v10, v2359; SI-NEXT: v_mov_b32_e32 v6, s2360; SI-NEXT: v_mov_b32_e32 v7, s1361; SI-NEXT: v_mov_b32_e32 v11, s0362; SI-NEXT: v_mov_b32_e32 v12, s7363; SI-NEXT: v_mov_b32_e32 v13, s6364; SI-NEXT: v_mov_b32_e32 v14, s5365; SI-NEXT: v_mov_b32_e32 v15, s4366; SI-NEXT: v_add_f64 v[0:1], s[2:3], v[4:5]367; SI-NEXT: v_add_f64 v[0:1], v[0:1], -v[4:5]368; SI-NEXT: v_bfi_b32 v5, s14, v10, v7369; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[2:3]|, v[8:9]370; SI-NEXT: v_cndmask_b32_e32 v3, v1, v2, vcc371; SI-NEXT: v_cndmask_b32_e32 v2, v0, v6, vcc372; SI-NEXT: v_add_f64 v[0:1], s[0:1], v[4:5]373; SI-NEXT: v_add_f64 v[0:1], v[0:1], -v[4:5]374; SI-NEXT: v_bfi_b32 v5, s14, v10, v12375; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[0:1]|, v[8:9]376; SI-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc377; SI-NEXT: v_cndmask_b32_e32 v0, v0, v11, vcc378; SI-NEXT: v_add_f64 v[6:7], s[6:7], v[4:5]379; SI-NEXT: v_add_f64 v[6:7], v[6:7], -v[4:5]380; SI-NEXT: v_bfi_b32 v5, s14, v10, v14381; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[6:7]|, v[8:9]382; SI-NEXT: v_cndmask_b32_e32 v7, v7, v12, vcc383; SI-NEXT: v_cndmask_b32_e32 v6, v6, v13, vcc384; SI-NEXT: v_add_f64 v[10:11], s[4:5], v[4:5]385; SI-NEXT: v_add_f64 v[4:5], v[10:11], -v[4:5]386; SI-NEXT: v_cmp_gt_f64_e64 vcc, |s[4:5]|, v[8:9]387; SI-NEXT: v_cndmask_b32_e32 v5, v5, v14, vcc388; SI-NEXT: v_cndmask_b32_e32 v4, v4, v15, vcc389; SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 offset:16390; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0391; SI-NEXT: s_endpgm392;393; CI-LABEL: nearbyint_v4f64:394; CI: ; %bb.0: ; %entry395; CI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x11396; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9397; CI-NEXT: s_mov_b32 s3, 0xf000398; CI-NEXT: s_mov_b32 s2, -1399; CI-NEXT: s_waitcnt lgkmcnt(0)400; CI-NEXT: v_rndne_f64_e32 v[6:7], s[14:15]401; CI-NEXT: v_rndne_f64_e32 v[4:5], s[12:13]402; CI-NEXT: v_rndne_f64_e32 v[2:3], s[10:11]403; CI-NEXT: v_rndne_f64_e32 v[0:1], s[8:9]404; CI-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0 offset:16405; CI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0406; CI-NEXT: s_endpgm407;408; VI-LABEL: nearbyint_v4f64:409; VI: ; %bb.0: ; %entry410; VI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x44411; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24412; VI-NEXT: s_waitcnt lgkmcnt(0)413; VI-NEXT: v_rndne_f64_e32 v[6:7], s[14:15]414; VI-NEXT: v_rndne_f64_e32 v[4:5], s[12:13]415; VI-NEXT: v_rndne_f64_e32 v[2:3], s[10:11]416; VI-NEXT: v_rndne_f64_e32 v[0:1], s[8:9]417; VI-NEXT: s_add_u32 s2, s0, 16418; VI-NEXT: s_addc_u32 s3, s1, 0419; VI-NEXT: v_mov_b32_e32 v11, s3420; VI-NEXT: v_mov_b32_e32 v9, s1421; VI-NEXT: v_mov_b32_e32 v10, s2422; VI-NEXT: v_mov_b32_e32 v8, s0423; VI-NEXT: flat_store_dwordx4 v[10:11], v[4:7]424; VI-NEXT: flat_store_dwordx4 v[8:9], v[0:3]425; VI-NEXT: s_endpgm426;427; GFX11-LABEL: nearbyint_v4f64:428; GFX11: ; %bb.0: ; %entry429; GFX11-NEXT: s_clause 0x1430; GFX11-NEXT: s_load_b256 s[8:15], s[4:5], 0x44431; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x24432; GFX11-NEXT: v_mov_b32_e32 v8, 0433; GFX11-NEXT: s_waitcnt lgkmcnt(0)434; GFX11-NEXT: v_rndne_f64_e32 v[6:7], s[14:15]435; GFX11-NEXT: v_rndne_f64_e32 v[4:5], s[12:13]436; GFX11-NEXT: v_rndne_f64_e32 v[2:3], s[10:11]437; GFX11-NEXT: v_rndne_f64_e32 v[0:1], s[8:9]438; GFX11-NEXT: s_clause 0x1439; GFX11-NEXT: global_store_b128 v8, v[4:7], s[0:1] offset:16440; GFX11-NEXT: global_store_b128 v8, v[0:3], s[0:1]441; GFX11-NEXT: s_endpgm442entry:443 %0 = call <4 x double> @llvm.nearbyint.v4f64(<4 x double> %in)444 store <4 x double> %0, ptr addrspace(1) %out445 ret void446}447 448attributes #0 = { nounwind readonly }449attributes #1 = { nounwind }450