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1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -start-before=amdgpu-unify-divergent-exit-nodes < %s | FileCheck -enable-var-scope -check-prefix=GCN %s2; RUN: llc -enable-no-signed-zeros-fp-math -mtriple=amdgcn -mcpu=tahiti -start-before=amdgpu-unify-divergent-exit-nodes < %s | FileCheck -enable-var-scope -check-prefix=GCN %s3 4; --------------------------------------------------------------------------------5; rcp_legacy tests6; --------------------------------------------------------------------------------7 8; GCN-LABEL: {{^}}v_fneg_rcp_legacy_f32:9; GCN: {{buffer|flat}}_load_dword [[A:v[0-9]+]]10; GCN: v_rcp_legacy_f32_e64 [[RESULT:v[0-9]+]], -[[A]]11; GCN: {{buffer|flat}}_store_dword [[RESULT]]12define amdgpu_kernel void @v_fneg_rcp_legacy_f32(ptr addrspace(1) %out, ptr addrspace(1) %a.ptr) #0 {13 %tid = call i32 @llvm.amdgcn.workitem.id.x()14 %tid.ext = sext i32 %tid to i6415 %a.gep = getelementptr inbounds float, ptr addrspace(1) %a.ptr, i64 %tid.ext16 %out.gep = getelementptr inbounds float, ptr addrspace(1) %out, i64 %tid.ext17 %a = load volatile float, ptr addrspace(1) %a.gep18 %rcp = call float @llvm.amdgcn.rcp.legacy(float %a)19 %fneg = fsub float -0.000000e+00, %rcp20 store float %fneg, ptr addrspace(1) %out.gep21 ret void22}23 24declare i32 @llvm.amdgcn.workitem.id.x() #125declare float @llvm.amdgcn.rcp.legacy(float) #126 27attributes #0 = { nounwind }28attributes #1 = { nounwind readnone }29