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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri < %s | FileCheck --check-prefixes=CIVI,CI %s3; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=tonga < %s | FileCheck --check-prefixes=CIVI,VI %s4; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 < %s | FileCheck --check-prefixes=GFX9 %s5; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-FAKE16 %s7 8define amdgpu_kernel void @fneg_fabs_fadd_f16(ptr addrspace(1) %out, half %x, half %y) {9; CI-LABEL: fneg_fabs_fadd_f16:10; CI: ; %bb.0:11; CI-NEXT: s_load_dword s0, s[8:9], 0x212; CI-NEXT: s_add_i32 s12, s12, s1713; CI-NEXT: s_mov_b32 flat_scratch_lo, s1314; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 815; CI-NEXT: s_waitcnt lgkmcnt(0)16; CI-NEXT: v_cvt_f32_f16_e64 v0, |s0|17; CI-NEXT: s_lshr_b32 s0, s0, 1618; CI-NEXT: v_cvt_f32_f16_e32 v1, s019; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x020; CI-NEXT: v_sub_f32_e32 v0, v1, v021; CI-NEXT: v_cvt_f16_f32_e32 v2, v022; CI-NEXT: s_waitcnt lgkmcnt(0)23; CI-NEXT: v_mov_b32_e32 v0, s024; CI-NEXT: v_mov_b32_e32 v1, s125; CI-NEXT: flat_store_short v[0:1], v226; CI-NEXT: s_endpgm27;28; VI-LABEL: fneg_fabs_fadd_f16:29; VI: ; %bb.0:30; VI-NEXT: s_load_dword s2, s[8:9], 0x831; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x032; VI-NEXT: s_add_i32 s12, s12, s1733; VI-NEXT: s_mov_b32 flat_scratch_lo, s1334; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 835; VI-NEXT: s_waitcnt lgkmcnt(0)36; VI-NEXT: s_lshr_b32 s3, s2, 1637; VI-NEXT: v_mov_b32_e32 v0, s238; VI-NEXT: v_sub_f16_e64 v2, s3, |v0|39; VI-NEXT: v_mov_b32_e32 v0, s040; VI-NEXT: v_mov_b32_e32 v1, s141; VI-NEXT: flat_store_short v[0:1], v242; VI-NEXT: s_endpgm43;44; GFX9-LABEL: fneg_fabs_fadd_f16:45; GFX9: ; %bb.0:46; GFX9-NEXT: s_load_dword s2, s[8:9], 0x847; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x048; GFX9-NEXT: v_mov_b32_e32 v0, 049; GFX9-NEXT: s_waitcnt lgkmcnt(0)50; GFX9-NEXT: s_lshr_b32 s3, s2, 1651; GFX9-NEXT: v_mov_b32_e32 v1, s252; GFX9-NEXT: v_sub_f16_e64 v1, s3, |v1|53; GFX9-NEXT: global_store_short v0, v1, s[0:1]54; GFX9-NEXT: s_endpgm55;56; GFX11-TRUE16-LABEL: fneg_fabs_fadd_f16:57; GFX11-TRUE16: ; %bb.0:58; GFX11-TRUE16-NEXT: s_clause 0x159; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x860; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x061; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 062; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)63; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 1664; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)65; GFX11-TRUE16-NEXT: v_sub_f16_e64 v0.l, s3, |s2|66; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]67; GFX11-TRUE16-NEXT: s_endpgm68;69; GFX11-FAKE16-LABEL: fneg_fabs_fadd_f16:70; GFX11-FAKE16: ; %bb.0:71; GFX11-FAKE16-NEXT: s_clause 0x172; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x873; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x074; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 075; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)76; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 1677; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)78; GFX11-FAKE16-NEXT: v_sub_f16_e64 v1, s3, |s2|79; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]80; GFX11-FAKE16-NEXT: s_endpgm81 %fabs = call half @llvm.fabs.f16(half %x)82 %fsub = fsub half -0.0, %fabs83 %fadd = fadd half %y, %fsub84 store half %fadd, ptr addrspace(1) %out, align 285 ret void86}87 88define amdgpu_kernel void @fneg_fabs_fmul_f16(ptr addrspace(1) %out, half %x, half %y) {89; CI-LABEL: fneg_fabs_fmul_f16:90; CI: ; %bb.0:91; CI-NEXT: s_load_dword s0, s[8:9], 0x292; CI-NEXT: s_add_i32 s12, s12, s1793; CI-NEXT: s_mov_b32 flat_scratch_lo, s1394; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 895; CI-NEXT: s_waitcnt lgkmcnt(0)96; CI-NEXT: s_and_b32 s1, s0, 0x7fff97; CI-NEXT: s_lshr_b32 s0, s0, 1698; CI-NEXT: v_cvt_f32_f16_e32 v0, s099; CI-NEXT: v_cvt_f32_f16_e64 v1, -|s1|100; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0101; CI-NEXT: v_mul_f32_e32 v0, v0, v1102; CI-NEXT: v_cvt_f16_f32_e32 v2, v0103; CI-NEXT: s_waitcnt lgkmcnt(0)104; CI-NEXT: v_mov_b32_e32 v0, s0105; CI-NEXT: v_mov_b32_e32 v1, s1106; CI-NEXT: flat_store_short v[0:1], v2107; CI-NEXT: s_endpgm108;109; VI-LABEL: fneg_fabs_fmul_f16:110; VI: ; %bb.0:111; VI-NEXT: s_load_dword s2, s[8:9], 0x8112; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0113; VI-NEXT: s_add_i32 s12, s12, s17114; VI-NEXT: s_mov_b32 flat_scratch_lo, s13115; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8116; VI-NEXT: s_waitcnt lgkmcnt(0)117; VI-NEXT: s_lshr_b32 s3, s2, 16118; VI-NEXT: v_mov_b32_e32 v0, s2119; VI-NEXT: v_mul_f16_e64 v2, s3, -|v0|120; VI-NEXT: v_mov_b32_e32 v0, s0121; VI-NEXT: v_mov_b32_e32 v1, s1122; VI-NEXT: flat_store_short v[0:1], v2123; VI-NEXT: s_endpgm124;125; GFX9-LABEL: fneg_fabs_fmul_f16:126; GFX9: ; %bb.0:127; GFX9-NEXT: s_load_dword s2, s[8:9], 0x8128; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0129; GFX9-NEXT: v_mov_b32_e32 v0, 0130; GFX9-NEXT: s_waitcnt lgkmcnt(0)131; GFX9-NEXT: s_lshr_b32 s3, s2, 16132; GFX9-NEXT: v_mov_b32_e32 v1, s2133; GFX9-NEXT: v_mul_f16_e64 v1, s3, -|v1|134; GFX9-NEXT: global_store_short v0, v1, s[0:1]135; GFX9-NEXT: s_endpgm136;137; GFX11-TRUE16-LABEL: fneg_fabs_fmul_f16:138; GFX11-TRUE16: ; %bb.0:139; GFX11-TRUE16-NEXT: s_clause 0x1140; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8141; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0142; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0143; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)144; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s2, 16145; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)146; GFX11-TRUE16-NEXT: v_mul_f16_e64 v0.l, s3, -|s2|147; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]148; GFX11-TRUE16-NEXT: s_endpgm149;150; GFX11-FAKE16-LABEL: fneg_fabs_fmul_f16:151; GFX11-FAKE16: ; %bb.0:152; GFX11-FAKE16-NEXT: s_clause 0x1153; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8154; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0155; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0156; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)157; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s2, 16158; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)159; GFX11-FAKE16-NEXT: v_mul_f16_e64 v1, s3, -|s2|160; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]161; GFX11-FAKE16-NEXT: s_endpgm162 %fabs = call half @llvm.fabs.f16(half %x)163 %fsub = fsub half -0.0, %fabs164 %fmul = fmul half %y, %fsub165 store half %fmul, ptr addrspace(1) %out, align 2166 ret void167}168 169; DAGCombiner will transform:170; (fabs (f16 bitcast (i16 a))) => (f16 bitcast (and (i16 a), 0x7FFFFFFF))171; unless isFabsFree returns true172define amdgpu_kernel void @fneg_fabs_free_f16(ptr addrspace(1) %out, i16 %in) {173; CI-LABEL: fneg_fabs_free_f16:174; CI: ; %bb.0:175; CI-NEXT: s_load_dword s2, s[8:9], 0x2176; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0177; CI-NEXT: s_add_i32 s12, s12, s17178; CI-NEXT: s_mov_b32 flat_scratch_lo, s13179; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8180; CI-NEXT: s_waitcnt lgkmcnt(0)181; CI-NEXT: s_bitset1_b32 s2, 15182; CI-NEXT: v_mov_b32_e32 v0, s0183; CI-NEXT: v_mov_b32_e32 v1, s1184; CI-NEXT: v_mov_b32_e32 v2, s2185; CI-NEXT: flat_store_short v[0:1], v2186; CI-NEXT: s_endpgm187;188; VI-LABEL: fneg_fabs_free_f16:189; VI: ; %bb.0:190; VI-NEXT: s_load_dword s2, s[8:9], 0x8191; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0192; VI-NEXT: s_add_i32 s12, s12, s17193; VI-NEXT: s_mov_b32 flat_scratch_lo, s13194; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8195; VI-NEXT: s_waitcnt lgkmcnt(0)196; VI-NEXT: s_bitset1_b32 s2, 15197; VI-NEXT: v_mov_b32_e32 v0, s0198; VI-NEXT: v_mov_b32_e32 v1, s1199; VI-NEXT: v_mov_b32_e32 v2, s2200; VI-NEXT: flat_store_short v[0:1], v2201; VI-NEXT: s_endpgm202;203; GFX9-LABEL: fneg_fabs_free_f16:204; GFX9: ; %bb.0:205; GFX9-NEXT: s_load_dword s2, s[8:9], 0x8206; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0207; GFX9-NEXT: v_mov_b32_e32 v0, 0208; GFX9-NEXT: s_waitcnt lgkmcnt(0)209; GFX9-NEXT: s_bitset1_b32 s2, 15210; GFX9-NEXT: v_mov_b32_e32 v1, s2211; GFX9-NEXT: global_store_short v0, v1, s[0:1]212; GFX9-NEXT: s_endpgm213;214; GFX11-TRUE16-LABEL: fneg_fabs_free_f16:215; GFX11-TRUE16: ; %bb.0:216; GFX11-TRUE16-NEXT: s_clause 0x1217; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8218; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0219; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0220; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)221; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 15222; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)223; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2224; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]225; GFX11-TRUE16-NEXT: s_endpgm226;227; GFX11-FAKE16-LABEL: fneg_fabs_free_f16:228; GFX11-FAKE16: ; %bb.0:229; GFX11-FAKE16-NEXT: s_clause 0x1230; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8231; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0232; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)233; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15234; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)235; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2236; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]237; GFX11-FAKE16-NEXT: s_endpgm238 %bc = bitcast i16 %in to half239 %fabs = call half @llvm.fabs.f16(half %bc)240 %fsub = fsub half -0.0, %fabs241 store half %fsub, ptr addrspace(1) %out242 ret void243}244 245define amdgpu_kernel void @fneg_fabs_f16(ptr addrspace(1) %out, half %in) {246; CI-LABEL: fneg_fabs_f16:247; CI: ; %bb.0:248; CI-NEXT: s_load_dword s2, s[8:9], 0x2249; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0250; CI-NEXT: s_add_i32 s12, s12, s17251; CI-NEXT: s_mov_b32 flat_scratch_lo, s13252; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8253; CI-NEXT: s_waitcnt lgkmcnt(0)254; CI-NEXT: s_bitset1_b32 s2, 15255; CI-NEXT: v_mov_b32_e32 v0, s0256; CI-NEXT: v_mov_b32_e32 v1, s1257; CI-NEXT: v_mov_b32_e32 v2, s2258; CI-NEXT: flat_store_short v[0:1], v2259; CI-NEXT: s_endpgm260;261; VI-LABEL: fneg_fabs_f16:262; VI: ; %bb.0:263; VI-NEXT: s_load_dword s2, s[8:9], 0x8264; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0265; VI-NEXT: s_add_i32 s12, s12, s17266; VI-NEXT: s_mov_b32 flat_scratch_lo, s13267; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8268; VI-NEXT: s_waitcnt lgkmcnt(0)269; VI-NEXT: s_bitset1_b32 s2, 15270; VI-NEXT: v_mov_b32_e32 v0, s0271; VI-NEXT: v_mov_b32_e32 v1, s1272; VI-NEXT: v_mov_b32_e32 v2, s2273; VI-NEXT: flat_store_short v[0:1], v2274; VI-NEXT: s_endpgm275;276; GFX9-LABEL: fneg_fabs_f16:277; GFX9: ; %bb.0:278; GFX9-NEXT: s_load_dword s2, s[8:9], 0x8279; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0280; GFX9-NEXT: v_mov_b32_e32 v0, 0281; GFX9-NEXT: s_waitcnt lgkmcnt(0)282; GFX9-NEXT: s_bitset1_b32 s2, 15283; GFX9-NEXT: v_mov_b32_e32 v1, s2284; GFX9-NEXT: global_store_short v0, v1, s[0:1]285; GFX9-NEXT: s_endpgm286;287; GFX11-TRUE16-LABEL: fneg_fabs_f16:288; GFX11-TRUE16: ; %bb.0:289; GFX11-TRUE16-NEXT: s_clause 0x1290; GFX11-TRUE16-NEXT: s_load_b32 s2, s[4:5], 0x8291; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0292; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0293; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)294; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 15295; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)296; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2297; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]298; GFX11-TRUE16-NEXT: s_endpgm299;300; GFX11-FAKE16-LABEL: fneg_fabs_f16:301; GFX11-FAKE16: ; %bb.0:302; GFX11-FAKE16-NEXT: s_clause 0x1303; GFX11-FAKE16-NEXT: s_load_b32 s2, s[4:5], 0x8304; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x0305; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)306; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 15307; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)308; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2309; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]310; GFX11-FAKE16-NEXT: s_endpgm311 %fabs = call half @llvm.fabs.f16(half %in)312 %fsub = fsub half -0.0, %fabs313 store half %fsub, ptr addrspace(1) %out, align 2314 ret void315}316 317define amdgpu_kernel void @v_fneg_fabs_f16(ptr addrspace(1) %out, ptr addrspace(1) %in) {318; CIVI-LABEL: v_fneg_fabs_f16:319; CIVI: ; %bb.0:320; CIVI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0321; CIVI-NEXT: s_add_i32 s12, s12, s17322; CIVI-NEXT: s_mov_b32 flat_scratch_lo, s13323; CIVI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8324; CIVI-NEXT: s_waitcnt lgkmcnt(0)325; CIVI-NEXT: v_mov_b32_e32 v0, s2326; CIVI-NEXT: v_mov_b32_e32 v1, s3327; CIVI-NEXT: flat_load_ushort v2, v[0:1]328; CIVI-NEXT: v_mov_b32_e32 v0, s0329; CIVI-NEXT: v_mov_b32_e32 v1, s1330; CIVI-NEXT: s_waitcnt vmcnt(0)331; CIVI-NEXT: v_or_b32_e32 v2, 0x8000, v2332; CIVI-NEXT: flat_store_short v[0:1], v2333; CIVI-NEXT: s_endpgm334;335; GFX9-LABEL: v_fneg_fabs_f16:336; GFX9: ; %bb.0:337; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0338; GFX9-NEXT: v_mov_b32_e32 v0, 0339; GFX9-NEXT: s_waitcnt lgkmcnt(0)340; GFX9-NEXT: global_load_ushort v1, v0, s[2:3]341; GFX9-NEXT: s_waitcnt vmcnt(0)342; GFX9-NEXT: v_or_b32_e32 v1, 0x8000, v1343; GFX9-NEXT: global_store_short v0, v1, s[0:1]344; GFX9-NEXT: s_endpgm345;346; GFX11-TRUE16-LABEL: v_fneg_fabs_f16:347; GFX11-TRUE16: ; %bb.0:348; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0349; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0350; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)351; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v1, s[2:3]352; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)353; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, 0x8000, v0354; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]355; GFX11-TRUE16-NEXT: s_endpgm356;357; GFX11-FAKE16-LABEL: v_fneg_fabs_f16:358; GFX11-FAKE16: ; %bb.0:359; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x0360; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0361; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)362; GFX11-FAKE16-NEXT: global_load_u16 v1, v0, s[2:3]363; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)364; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, 0x8000, v1365; GFX11-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]366; GFX11-FAKE16-NEXT: s_endpgm367 %val = load half, ptr addrspace(1) %in, align 2368 %fabs = call half @llvm.fabs.f16(half %val)369 %fsub = fsub half -0.0, %fabs370 store half %fsub, ptr addrspace(1) %out, align 2371 ret void372}373 374define amdgpu_kernel void @s_fneg_fabs_v2f16_non_bc_src(ptr addrspace(1) %out, <2 x half> %in) {375; CI-LABEL: s_fneg_fabs_v2f16_non_bc_src:376; CI: ; %bb.0:377; CI-NEXT: s_load_dword s0, s[8:9], 0x2378; CI-NEXT: s_add_i32 s12, s12, s17379; CI-NEXT: s_mov_b32 flat_scratch_lo, s13380; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8381; CI-NEXT: s_waitcnt lgkmcnt(0)382; CI-NEXT: s_lshr_b32 s1, s0, 16383; CI-NEXT: v_cvt_f32_f16_e32 v1, s1384; CI-NEXT: v_cvt_f32_f16_e32 v0, s0385; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0386; CI-NEXT: v_add_f32_e32 v1, 2.0, v1387; CI-NEXT: v_add_f32_e32 v0, 1.0, v0388; CI-NEXT: v_cvt_f16_f32_e32 v1, v1389; CI-NEXT: v_cvt_f16_f32_e32 v0, v0390; CI-NEXT: v_lshlrev_b32_e32 v1, 16, v1391; CI-NEXT: v_or_b32_e32 v0, v0, v1392; CI-NEXT: v_or_b32_e32 v2, 0x80008000, v0393; CI-NEXT: s_waitcnt lgkmcnt(0)394; CI-NEXT: v_mov_b32_e32 v0, s0395; CI-NEXT: v_mov_b32_e32 v1, s1396; CI-NEXT: flat_store_dword v[0:1], v2397; CI-NEXT: s_endpgm398;399; VI-LABEL: s_fneg_fabs_v2f16_non_bc_src:400; VI: ; %bb.0:401; VI-NEXT: s_load_dword s2, s[8:9], 0x8402; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0403; VI-NEXT: s_add_i32 s12, s12, s17404; VI-NEXT: v_mov_b32_e32 v0, 0x4000405; VI-NEXT: s_mov_b32 flat_scratch_lo, s13406; VI-NEXT: s_waitcnt lgkmcnt(0)407; VI-NEXT: s_lshr_b32 s3, s2, 16408; VI-NEXT: v_mov_b32_e32 v2, s3409; VI-NEXT: v_add_f16_e64 v1, s2, 1.0410; VI-NEXT: v_add_f16_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD411; VI-NEXT: v_or_b32_e32 v0, v1, v0412; VI-NEXT: v_or_b32_e32 v2, 0x80008000, v0413; VI-NEXT: v_mov_b32_e32 v0, s0414; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8415; VI-NEXT: v_mov_b32_e32 v1, s1416; VI-NEXT: flat_store_dword v[0:1], v2417; VI-NEXT: s_endpgm418;419; GFX9-LABEL: s_fneg_fabs_v2f16_non_bc_src:420; GFX9: ; %bb.0:421; GFX9-NEXT: s_load_dword s2, s[8:9], 0x8422; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0423; GFX9-NEXT: v_mov_b32_e32 v1, 0x40003c00424; GFX9-NEXT: v_mov_b32_e32 v0, 0425; GFX9-NEXT: s_waitcnt lgkmcnt(0)426; GFX9-NEXT: v_pk_add_f16 v1, s2, v1427; GFX9-NEXT: v_or_b32_e32 v1, 0x80008000, v1428; GFX9-NEXT: global_store_dword v0, v1, s[0:1]429; GFX9-NEXT: s_endpgm430;431; GFX11-LABEL: s_fneg_fabs_v2f16_non_bc_src:432; GFX11: ; %bb.0:433; GFX11-NEXT: s_clause 0x1434; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8435; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0436; GFX11-NEXT: v_mov_b32_e32 v1, 0437; GFX11-NEXT: s_waitcnt lgkmcnt(0)438; GFX11-NEXT: v_pk_add_f16 v0, 0x40003c00, s2439; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)440; GFX11-NEXT: v_or_b32_e32 v0, 0x80008000, v0441; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]442; GFX11-NEXT: s_endpgm443 %add = fadd <2 x half> %in, <half 1.0, half 2.0>444 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %add)445 %fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs446 store <2 x half> %fneg.fabs, ptr addrspace(1) %out447 ret void448}449 450; FIXME: single bit op451; Combine turns this into integer op when bitcast source (from load)452define amdgpu_kernel void @s_fneg_fabs_v2f16_bc_src(ptr addrspace(1) %out, <2 x half> %in) {453; CI-LABEL: s_fneg_fabs_v2f16_bc_src:454; CI: ; %bb.0:455; CI-NEXT: s_load_dword s2, s[8:9], 0x2456; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0457; CI-NEXT: s_add_i32 s12, s12, s17458; CI-NEXT: s_mov_b32 flat_scratch_lo, s13459; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8460; CI-NEXT: s_waitcnt lgkmcnt(0)461; CI-NEXT: s_or_b32 s2, s2, 0x80008000462; CI-NEXT: v_mov_b32_e32 v0, s0463; CI-NEXT: v_mov_b32_e32 v1, s1464; CI-NEXT: v_mov_b32_e32 v2, s2465; CI-NEXT: flat_store_dword v[0:1], v2466; CI-NEXT: s_endpgm467;468; VI-LABEL: s_fneg_fabs_v2f16_bc_src:469; VI: ; %bb.0:470; VI-NEXT: s_load_dword s2, s[8:9], 0x8471; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0472; VI-NEXT: s_add_i32 s12, s12, s17473; VI-NEXT: s_mov_b32 flat_scratch_lo, s13474; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8475; VI-NEXT: s_waitcnt lgkmcnt(0)476; VI-NEXT: s_or_b32 s2, s2, 0x80008000477; VI-NEXT: v_mov_b32_e32 v0, s0478; VI-NEXT: v_mov_b32_e32 v1, s1479; VI-NEXT: v_mov_b32_e32 v2, s2480; VI-NEXT: flat_store_dword v[0:1], v2481; VI-NEXT: s_endpgm482;483; GFX9-LABEL: s_fneg_fabs_v2f16_bc_src:484; GFX9: ; %bb.0:485; GFX9-NEXT: s_load_dword s2, s[8:9], 0x8486; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0487; GFX9-NEXT: v_mov_b32_e32 v0, 0488; GFX9-NEXT: s_waitcnt lgkmcnt(0)489; GFX9-NEXT: s_or_b32 s2, s2, 0x80008000490; GFX9-NEXT: v_mov_b32_e32 v1, s2491; GFX9-NEXT: global_store_dword v0, v1, s[0:1]492; GFX9-NEXT: s_endpgm493;494; GFX11-LABEL: s_fneg_fabs_v2f16_bc_src:495; GFX11: ; %bb.0:496; GFX11-NEXT: s_clause 0x1497; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8498; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0499; GFX11-NEXT: s_waitcnt lgkmcnt(0)500; GFX11-NEXT: s_or_b32 s2, s2, 0x80008000501; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)502; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s2503; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]504; GFX11-NEXT: s_endpgm505 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)506 %fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs507 store <2 x half> %fneg.fabs, ptr addrspace(1) %out508 ret void509}510 511define amdgpu_kernel void @fneg_fabs_v4f16(ptr addrspace(1) %out, <4 x half> %in) {512; CIVI-LABEL: fneg_fabs_v4f16:513; CIVI: ; %bb.0:514; CIVI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0515; CIVI-NEXT: s_add_i32 s12, s12, s17516; CIVI-NEXT: s_mov_b32 flat_scratch_lo, s13517; CIVI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8518; CIVI-NEXT: s_waitcnt lgkmcnt(0)519; CIVI-NEXT: s_or_b32 s3, s3, 0x80008000520; CIVI-NEXT: s_or_b32 s2, s2, 0x80008000521; CIVI-NEXT: v_mov_b32_e32 v3, s1522; CIVI-NEXT: v_mov_b32_e32 v0, s2523; CIVI-NEXT: v_mov_b32_e32 v1, s3524; CIVI-NEXT: v_mov_b32_e32 v2, s0525; CIVI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]526; CIVI-NEXT: s_endpgm527;528; GFX9-LABEL: fneg_fabs_v4f16:529; GFX9: ; %bb.0:530; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0531; GFX9-NEXT: v_mov_b32_e32 v2, 0532; GFX9-NEXT: s_waitcnt lgkmcnt(0)533; GFX9-NEXT: s_or_b32 s3, s3, 0x80008000534; GFX9-NEXT: s_or_b32 s2, s2, 0x80008000535; GFX9-NEXT: v_mov_b32_e32 v0, s2536; GFX9-NEXT: v_mov_b32_e32 v1, s3537; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]538; GFX9-NEXT: s_endpgm539;540; GFX11-LABEL: fneg_fabs_v4f16:541; GFX11: ; %bb.0:542; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0543; GFX11-NEXT: s_waitcnt lgkmcnt(0)544; GFX11-NEXT: s_or_b32 s2, s2, 0x80008000545; GFX11-NEXT: s_or_b32 s3, s3, 0x80008000546; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)547; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, s3548; GFX11-NEXT: v_mov_b32_e32 v0, s2549; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1]550; GFX11-NEXT: s_endpgm551 %fabs = call <4 x half> @llvm.fabs.v4f16(<4 x half> %in)552 %fsub = fsub <4 x half> <half -0.0, half -0.0, half -0.0, half -0.0>, %fabs553 store <4 x half> %fsub, ptr addrspace(1) %out554 ret void555}556 557define amdgpu_kernel void @fold_user_fneg_fabs_v2f16(ptr addrspace(1) %out, <2 x half> %in) #0 {558; CI-LABEL: fold_user_fneg_fabs_v2f16:559; CI: ; %bb.0:560; CI-NEXT: s_load_dword s0, s[8:9], 0x2561; CI-NEXT: s_add_i32 s12, s12, s17562; CI-NEXT: s_mov_b32 flat_scratch_lo, s13563; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8564; CI-NEXT: s_waitcnt lgkmcnt(0)565; CI-NEXT: s_lshr_b32 s1, s0, 16566; CI-NEXT: v_cvt_f32_f16_e64 v1, |s1|567; CI-NEXT: v_cvt_f32_f16_e64 v0, |s0|568; CI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0569; CI-NEXT: v_mul_f32_e32 v1, -4.0, v1570; CI-NEXT: v_mul_f32_e32 v0, -4.0, v0571; CI-NEXT: v_cvt_f16_f32_e32 v1, v1572; CI-NEXT: v_cvt_f16_f32_e32 v0, v0573; CI-NEXT: v_lshlrev_b32_e32 v1, 16, v1574; CI-NEXT: v_or_b32_e32 v2, v0, v1575; CI-NEXT: s_waitcnt lgkmcnt(0)576; CI-NEXT: v_mov_b32_e32 v0, s0577; CI-NEXT: v_mov_b32_e32 v1, s1578; CI-NEXT: flat_store_dword v[0:1], v2579; CI-NEXT: s_endpgm580;581; VI-LABEL: fold_user_fneg_fabs_v2f16:582; VI: ; %bb.0:583; VI-NEXT: s_load_dword s2, s[8:9], 0x8584; VI-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0585; VI-NEXT: s_add_i32 s12, s12, s17586; VI-NEXT: v_mov_b32_e32 v0, 0xc400587; VI-NEXT: s_mov_b32 flat_scratch_lo, s13588; VI-NEXT: s_waitcnt lgkmcnt(0)589; VI-NEXT: s_lshr_b32 s3, s2, 16590; VI-NEXT: v_mov_b32_e32 v2, s3591; VI-NEXT: v_mul_f16_e64 v1, |s2|, -4.0592; VI-NEXT: v_mul_f16_sdwa v0, |v2|, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD593; VI-NEXT: v_or_b32_e32 v2, v1, v0594; VI-NEXT: v_mov_b32_e32 v0, s0595; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8596; VI-NEXT: v_mov_b32_e32 v1, s1597; VI-NEXT: flat_store_dword v[0:1], v2598; VI-NEXT: s_endpgm599;600; GFX9-LABEL: fold_user_fneg_fabs_v2f16:601; GFX9: ; %bb.0:602; GFX9-NEXT: s_load_dword s2, s[8:9], 0x8603; GFX9-NEXT: s_load_dwordx2 s[0:1], s[8:9], 0x0604; GFX9-NEXT: v_mov_b32_e32 v0, 0605; GFX9-NEXT: s_waitcnt lgkmcnt(0)606; GFX9-NEXT: s_and_b32 s2, s2, 0x7fff7fff607; GFX9-NEXT: v_pk_mul_f16 v1, s2, -4.0 op_sel_hi:[1,0]608; GFX9-NEXT: global_store_dword v0, v1, s[0:1]609; GFX9-NEXT: s_endpgm610;611; GFX11-LABEL: fold_user_fneg_fabs_v2f16:612; GFX11: ; %bb.0:613; GFX11-NEXT: s_clause 0x1614; GFX11-NEXT: s_load_b32 s2, s[4:5], 0x8615; GFX11-NEXT: s_load_b64 s[0:1], s[4:5], 0x0616; GFX11-NEXT: v_mov_b32_e32 v0, 0617; GFX11-NEXT: s_waitcnt lgkmcnt(0)618; GFX11-NEXT: s_and_b32 s2, s2, 0x7fff7fff619; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)620; GFX11-NEXT: v_pk_mul_f16 v1, s2, -4.0 op_sel_hi:[1,0]621; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]622; GFX11-NEXT: s_endpgm623 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)624 %fneg.fabs = fsub <2 x half> <half -0.0, half -0.0>, %fabs625 %mul = fmul <2 x half> %fneg.fabs, <half 4.0, half 4.0>626 store <2 x half> %mul, ptr addrspace(1) %out627 ret void628}629 630define amdgpu_kernel void @s_fneg_multi_use_fabs_v2f16(ptr addrspace(1) %out0, ptr addrspace(1) %out1, <2 x half> %in) {631; CI-LABEL: s_fneg_multi_use_fabs_v2f16:632; CI: ; %bb.0:633; CI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0634; CI-NEXT: s_load_dword s4, s[8:9], 0x4635; CI-NEXT: s_add_i32 s12, s12, s17636; CI-NEXT: s_mov_b32 flat_scratch_lo, s13637; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8638; CI-NEXT: s_waitcnt lgkmcnt(0)639; CI-NEXT: v_mov_b32_e32 v0, s0640; CI-NEXT: s_and_b32 s0, s4, 0x7fff7fff641; CI-NEXT: v_mov_b32_e32 v1, s1642; CI-NEXT: s_or_b32 s1, s0, 0x80008000643; CI-NEXT: v_mov_b32_e32 v4, s0644; CI-NEXT: v_mov_b32_e32 v2, s2645; CI-NEXT: v_mov_b32_e32 v3, s3646; CI-NEXT: flat_store_dword v[0:1], v4647; CI-NEXT: v_mov_b32_e32 v0, s1648; CI-NEXT: flat_store_dword v[2:3], v0649; CI-NEXT: s_endpgm650;651; VI-LABEL: s_fneg_multi_use_fabs_v2f16:652; VI: ; %bb.0:653; VI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0654; VI-NEXT: s_load_dword s4, s[8:9], 0x10655; VI-NEXT: s_add_i32 s12, s12, s17656; VI-NEXT: s_mov_b32 flat_scratch_lo, s13657; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8658; VI-NEXT: s_waitcnt lgkmcnt(0)659; VI-NEXT: v_mov_b32_e32 v0, s0660; VI-NEXT: s_and_b32 s0, s4, 0x7fff7fff661; VI-NEXT: v_mov_b32_e32 v1, s1662; VI-NEXT: s_xor_b32 s1, s0, 0x80008000663; VI-NEXT: v_mov_b32_e32 v4, s0664; VI-NEXT: v_mov_b32_e32 v2, s2665; VI-NEXT: v_mov_b32_e32 v3, s3666; VI-NEXT: flat_store_dword v[0:1], v4667; VI-NEXT: v_mov_b32_e32 v0, s1668; VI-NEXT: flat_store_dword v[2:3], v0669; VI-NEXT: s_endpgm670;671; GFX9-LABEL: s_fneg_multi_use_fabs_v2f16:672; GFX9: ; %bb.0:673; GFX9-NEXT: s_load_dword s4, s[8:9], 0x10674; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0675; GFX9-NEXT: v_mov_b32_e32 v0, 0676; GFX9-NEXT: s_waitcnt lgkmcnt(0)677; GFX9-NEXT: s_and_b32 s4, s4, 0x7fff7fff678; GFX9-NEXT: s_xor_b32 s5, s4, 0x80008000679; GFX9-NEXT: v_mov_b32_e32 v1, s4680; GFX9-NEXT: global_store_dword v0, v1, s[0:1]681; GFX9-NEXT: v_mov_b32_e32 v1, s5682; GFX9-NEXT: global_store_dword v0, v1, s[2:3]683; GFX9-NEXT: s_endpgm684;685; GFX11-LABEL: s_fneg_multi_use_fabs_v2f16:686; GFX11: ; %bb.0:687; GFX11-NEXT: s_clause 0x1688; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x10689; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0690; GFX11-NEXT: s_waitcnt lgkmcnt(0)691; GFX11-NEXT: s_and_b32 s4, s6, 0x7fff7fff692; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)693; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4694; GFX11-NEXT: s_xor_b32 s5, s4, 0x80008000695; GFX11-NEXT: v_mov_b32_e32 v2, s5696; GFX11-NEXT: s_clause 0x1697; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]698; GFX11-NEXT: global_store_b32 v0, v2, s[2:3]699; GFX11-NEXT: s_endpgm700 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)701 %fneg = fsub <2 x half> <half -0.0, half -0.0>, %fabs702 store <2 x half> %fabs, ptr addrspace(1) %out0703 store <2 x half> %fneg, ptr addrspace(1) %out1704 ret void705}706 707define amdgpu_kernel void @s_fneg_multi_use_fabs_foldable_neg_v2f16(ptr addrspace(1) %out0, ptr addrspace(1) %out1, <2 x half> %in) {708; CI-LABEL: s_fneg_multi_use_fabs_foldable_neg_v2f16:709; CI: ; %bb.0:710; CI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0711; CI-NEXT: s_load_dword s4, s[8:9], 0x4712; CI-NEXT: s_add_i32 s12, s12, s17713; CI-NEXT: s_mov_b32 flat_scratch_lo, s13714; CI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8715; CI-NEXT: s_waitcnt lgkmcnt(0)716; CI-NEXT: v_mov_b32_e32 v0, s0717; CI-NEXT: s_bfe_u32 s0, s4, 0xf0010718; CI-NEXT: v_cvt_f32_f16_e32 v5, s0719; CI-NEXT: v_cvt_f32_f16_e64 v4, |s4|720; CI-NEXT: s_and_b32 s0, s4, 0x7fff7fff721; CI-NEXT: v_mov_b32_e32 v1, s1722; CI-NEXT: v_mul_f32_e32 v5, -4.0, v5723; CI-NEXT: v_mul_f32_e32 v4, -4.0, v4724; CI-NEXT: v_cvt_f16_f32_e32 v5, v5725; CI-NEXT: v_cvt_f16_f32_e32 v4, v4726; CI-NEXT: v_mov_b32_e32 v6, s0727; CI-NEXT: v_mov_b32_e32 v2, s2728; CI-NEXT: v_lshlrev_b32_e32 v5, 16, v5729; CI-NEXT: v_mov_b32_e32 v3, s3730; CI-NEXT: v_or_b32_e32 v4, v4, v5731; CI-NEXT: flat_store_dword v[0:1], v6732; CI-NEXT: flat_store_dword v[2:3], v4733; CI-NEXT: s_endpgm734;735; VI-LABEL: s_fneg_multi_use_fabs_foldable_neg_v2f16:736; VI: ; %bb.0:737; VI-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0738; VI-NEXT: s_load_dword s4, s[8:9], 0x10739; VI-NEXT: s_add_i32 s12, s12, s17740; VI-NEXT: v_mov_b32_e32 v5, 0xc400741; VI-NEXT: s_mov_b32 flat_scratch_lo, s13742; VI-NEXT: s_waitcnt lgkmcnt(0)743; VI-NEXT: v_mov_b32_e32 v1, s1744; VI-NEXT: s_lshr_b32 s1, s4, 16745; VI-NEXT: v_mov_b32_e32 v4, s1746; VI-NEXT: v_mov_b32_e32 v0, s0747; VI-NEXT: s_and_b32 s0, s4, 0x7fff7fff748; VI-NEXT: v_mul_f16_sdwa v4, |v4|, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD749; VI-NEXT: v_mul_f16_e64 v5, |s4|, -4.0750; VI-NEXT: s_lshr_b32 flat_scratch_hi, s12, 8751; VI-NEXT: v_or_b32_e32 v4, v5, v4752; VI-NEXT: v_mov_b32_e32 v5, s0753; VI-NEXT: v_mov_b32_e32 v2, s2754; VI-NEXT: v_mov_b32_e32 v3, s3755; VI-NEXT: flat_store_dword v[0:1], v5756; VI-NEXT: flat_store_dword v[2:3], v4757; VI-NEXT: s_endpgm758;759; GFX9-LABEL: s_fneg_multi_use_fabs_foldable_neg_v2f16:760; GFX9: ; %bb.0:761; GFX9-NEXT: s_load_dword s4, s[8:9], 0x10762; GFX9-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0763; GFX9-NEXT: v_mov_b32_e32 v0, 0764; GFX9-NEXT: s_waitcnt lgkmcnt(0)765; GFX9-NEXT: s_and_b32 s4, s4, 0x7fff7fff766; GFX9-NEXT: v_mov_b32_e32 v2, s4767; GFX9-NEXT: v_pk_mul_f16 v1, s4, -4.0 op_sel_hi:[1,0]768; GFX9-NEXT: global_store_dword v0, v2, s[0:1]769; GFX9-NEXT: global_store_dword v0, v1, s[2:3]770; GFX9-NEXT: s_endpgm771;772; GFX11-LABEL: s_fneg_multi_use_fabs_foldable_neg_v2f16:773; GFX11: ; %bb.0:774; GFX11-NEXT: s_clause 0x1775; GFX11-NEXT: s_load_b32 s6, s[4:5], 0x10776; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x0777; GFX11-NEXT: s_waitcnt lgkmcnt(0)778; GFX11-NEXT: s_and_b32 s4, s6, 0x7fff7fff779; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)780; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s4781; GFX11-NEXT: v_pk_mul_f16 v2, s4, -4.0 op_sel_hi:[1,0]782; GFX11-NEXT: s_clause 0x1783; GFX11-NEXT: global_store_b32 v0, v1, s[0:1]784; GFX11-NEXT: global_store_b32 v0, v2, s[2:3]785; GFX11-NEXT: s_endpgm786 %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)787 %fneg = fsub <2 x half> <half -0.0, half -0.0>, %fabs788 %mul = fmul <2 x half> %fneg, <half 4.0, half 4.0>789 store <2 x half> %fabs, ptr addrspace(1) %out0790 store <2 x half> %mul, ptr addrspace(1) %out1791 ret void792}793 794declare half @llvm.fabs.f16(half) #1795declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #1796declare <4 x half> @llvm.fabs.v4f16(<4 x half>) #1797 798attributes #0 = { nounwind }799attributes #1 = { nounwind readnone }800