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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck %s --check-prefixes=GFX9083# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck %s --check-prefixes=GFX90A4# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -verify-machineinstrs -run-pass si-fold-operands %s -o - | FileCheck %s --check-prefixes=GFX90A5 6---7name: test_sgpr_init_multiuse8tracksRegLiveness: true9 10body: |11 ; GFX908-LABEL: name: test_sgpr_init_multiuse12 ; GFX908: bb.0:13 ; GFX908-NEXT: successors: %bb.1(0x80000000)14 ; GFX908-NEXT: liveins: $sgpr0, $scc15 ; GFX908-NEXT: {{ $}}16 ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr017 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]]18 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY1]], implicit $exec19 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY1]], implicit $exec20 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY1]], implicit $exec21 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY1]], implicit $exec22 ; GFX908-NEXT: {{ $}}23 ; GFX908-NEXT: bb.1:24 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)25 ; GFX908-NEXT: liveins: $scc26 ; GFX908-NEXT: {{ $}}27 ; GFX908-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[V_ACCVGPR_WRITE_B32_e64_3]], %bb.0, %13.sub0, %bb.128 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[V_ACCVGPR_WRITE_B32_e64_2]], %bb.0, %13.sub1, %bb.129 ; GFX908-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[V_ACCVGPR_WRITE_B32_e64_1]], %bb.0, %13.sub2, %bb.130 ; GFX908-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[V_ACCVGPR_WRITE_B32_e64_]], %bb.0, %13.sub3, %bb.131 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]32 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]33 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]34 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI]]35 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY2]], %subreg.sub336 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec37 ; GFX908-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec38 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec39 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc40 ; GFX908-NEXT: {{ $}}41 ; GFX908-NEXT: bb.2:42 ; GFX908-NEXT: S_ENDPGM 043 ;44 ; GFX90A-LABEL: name: test_sgpr_init_multiuse45 ; GFX90A: bb.0:46 ; GFX90A-NEXT: successors: %bb.1(0x80000000)47 ; GFX90A-NEXT: liveins: $sgpr0, $scc48 ; GFX90A-NEXT: {{ $}}49 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr050 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]]51 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY1]]52 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[COPY1]]53 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY1]]54 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:agpr_32 = COPY [[COPY1]]55 ; GFX90A-NEXT: {{ $}}56 ; GFX90A-NEXT: bb.1:57 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)58 ; GFX90A-NEXT: liveins: $scc59 ; GFX90A-NEXT: {{ $}}60 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY5]], %bb.0, %13.sub0, %bb.161 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %13.sub1, %bb.162 ; GFX90A-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.0, %13.sub2, %bb.163 ; GFX90A-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %13.sub3, %bb.164 ; GFX90A-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]65 ; GFX90A-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]66 ; GFX90A-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]67 ; GFX90A-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[PHI]]68 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY9]], %subreg.sub0, [[COPY8]], %subreg.sub1, [[COPY7]], %subreg.sub2, [[COPY6]], %subreg.sub369 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec70 ; GFX90A-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec71 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec72 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc73 ; GFX90A-NEXT: {{ $}}74 ; GFX90A-NEXT: bb.2:75 ; GFX90A-NEXT: S_ENDPGM 076 bb.0:77 liveins: $sgpr0, $scc78 successors: %bb.179 80 %0:sgpr_32 = COPY $sgpr081 %1:vgpr_32 = COPY %082 83 bb.1:84 liveins: $scc85 successors: %bb.1, %bb.286 87 %8:vgpr_32 = PHI %1, %bb.0, %16, %bb.188 %9:vgpr_32 = PHI %1, %bb.0, %17, %bb.189 %10:vgpr_32 = PHI %1, %bb.0, %18, %bb.190 %11:vgpr_32 = PHI %1, %bb.0, %19, %bb.191 %12:areg_128_align2 = REG_SEQUENCE %8, %subreg.sub0, %9, %subreg.sub1, %10, %subreg.sub2, %11, %subreg.sub392 %13:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec93 %14:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec94 %15:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %14:vgpr_32, %13:vgpr_32, %12:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec95 %16:vgpr_32 = COPY %15.sub096 %17:vgpr_32 = COPY %15.sub197 %18:vgpr_32 = COPY %15.sub298 %19:vgpr_32 = COPY %15.sub399 S_CBRANCH_SCC1 %bb.1, implicit $scc100 101 bb.2:102 S_ENDPGM 0103...104 105---106name: test_sgpr_init_multiuse_agprtuple107tracksRegLiveness: true108 109body: |110 ; GFX908-LABEL: name: test_sgpr_init_multiuse_agprtuple111 ; GFX908: bb.0:112 ; GFX908-NEXT: successors: %bb.1(0x80000000)113 ; GFX908-NEXT: liveins: $sgpr0_sgpr1, $scc114 ; GFX908-NEXT: {{ $}}115 ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1116 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vreg_64_align2 = COPY [[COPY]]117 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:areg_64_align2 = COPY [[COPY1]]118 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:areg_64_align2 = COPY [[COPY1]]119 ; GFX908-NEXT: {{ $}}120 ; GFX908-NEXT: bb.1:121 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)122 ; GFX908-NEXT: liveins: $scc123 ; GFX908-NEXT: {{ $}}124 ; GFX908-NEXT: [[PHI:%[0-9]+]]:areg_64_align2 = PHI [[COPY3]], %bb.0, %9.sub0_sub1, %bb.1125 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:areg_64_align2 = PHI [[COPY2]], %bb.0, %9.sub2_sub3, %bb.1126 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:vreg_64_align2 = COPY [[PHI1]]127 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:vreg_64_align2 = COPY [[PHI]]128 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY5]].sub0, %subreg.sub0, [[COPY5]].sub1, %subreg.sub1, [[COPY4]].sub0, %subreg.sub2, [[COPY4]].sub1, %subreg.sub3129 ; GFX908-NEXT: [[V_MOV_B64_e32_:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1073741824, implicit $exec130 ; GFX908-NEXT: [[V_MOV_B64_e32_1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1065353216, implicit $exec131 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B64_e32_1]].sub0, [[V_MOV_B64_e32_]].sub1, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec132 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc133 ; GFX908-NEXT: {{ $}}134 ; GFX908-NEXT: bb.2:135 ; GFX908-NEXT: S_ENDPGM 0136 ;137 ; GFX90A-LABEL: name: test_sgpr_init_multiuse_agprtuple138 ; GFX90A: bb.0:139 ; GFX90A-NEXT: successors: %bb.1(0x80000000)140 ; GFX90A-NEXT: liveins: $sgpr0_sgpr1, $scc141 ; GFX90A-NEXT: {{ $}}142 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1143 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:vreg_64_align2 = COPY [[COPY]]144 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:areg_64_align2 = COPY [[COPY1]]145 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:areg_64_align2 = COPY [[COPY1]]146 ; GFX90A-NEXT: {{ $}}147 ; GFX90A-NEXT: bb.1:148 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)149 ; GFX90A-NEXT: liveins: $scc150 ; GFX90A-NEXT: {{ $}}151 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:areg_64_align2 = PHI [[COPY3]], %bb.0, %9.sub0_sub1, %bb.1152 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:areg_64_align2 = PHI [[COPY2]], %bb.0, %9.sub2_sub3, %bb.1153 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:vreg_64_align2 = COPY [[PHI1]]154 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:vreg_64_align2 = COPY [[PHI]]155 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY5]].sub0, %subreg.sub0, [[COPY5]].sub1, %subreg.sub1, [[COPY4]].sub0, %subreg.sub2, [[COPY4]].sub1, %subreg.sub3156 ; GFX90A-NEXT: [[V_MOV_B64_e32_:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1073741824, implicit $exec157 ; GFX90A-NEXT: [[V_MOV_B64_e32_1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_e32 1065353216, implicit $exec158 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B64_e32_1]].sub0, [[V_MOV_B64_e32_]].sub1, [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec159 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc160 ; GFX90A-NEXT: {{ $}}161 ; GFX90A-NEXT: bb.2:162 ; GFX90A-NEXT: S_ENDPGM 0163 bb.0:164 successors: %bb.1165 liveins: $sgpr0_sgpr1, $scc166 167 %0:sgpr_64 = COPY $sgpr0_sgpr1168 %1:vreg_64_align2 = COPY %0:sgpr_64169 170 bb.1:171 successors: %bb.1, %bb.2172 liveins: $scc173 174 %2:vreg_64_align2 = PHI %1, %bb.0, %3, %bb.1175 %4:vreg_64_align2 = PHI %1, %bb.0, %5, %bb.1176 %6:areg_128_align2 = REG_SEQUENCE %2.sub0, %subreg.sub0, %2.sub1, %subreg.sub1, %4.sub0, %subreg.sub2, %4.sub1, %subreg.sub3177 %7:vreg_64_align2 = V_MOV_B64_e32 1073741824, implicit $exec178 %8:vreg_64_align2 = V_MOV_B64_e32 1065353216, implicit $exec179 %9:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %8.sub0, %7.sub1, %6:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec180 %3:vreg_64_align2 = COPY %9.sub0_sub1:areg_128_align2181 %5:vreg_64_align2 = COPY %9.sub2_sub3:areg_128_align2182 S_CBRANCH_SCC1 %bb.1, implicit $scc183 184 bb.2:185 186 S_ENDPGM 0187...188 189---190name: test_sgpr_init_singleuse191tracksRegLiveness: true192 193body: |194 ; GFX908-LABEL: name: test_sgpr_init_singleuse195 ; GFX908: bb.0:196 ; GFX908-NEXT: successors: %bb.1(0x80000000)197 ; GFX908-NEXT: liveins: $sgpr0, $scc198 ; GFX908-NEXT: {{ $}}199 ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr0200 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]]201 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY1]]202 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]]203 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY3]]204 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY]]205 ; GFX908-NEXT: [[COPY6:%[0-9]+]]:agpr_32 = COPY [[COPY5]]206 ; GFX908-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[COPY]]207 ; GFX908-NEXT: [[COPY8:%[0-9]+]]:agpr_32 = COPY [[COPY7]]208 ; GFX908-NEXT: {{ $}}209 ; GFX908-NEXT: bb.1:210 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)211 ; GFX908-NEXT: liveins: $scc212 ; GFX908-NEXT: {{ $}}213 ; GFX908-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %16.sub0, %bb.1214 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %16.sub1, %bb.1215 ; GFX908-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY6]], %bb.0, %16.sub2, %bb.1216 ; GFX908-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY8]], %bb.0, %16.sub3, %bb.1217 ; GFX908-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]218 ; GFX908-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]219 ; GFX908-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]220 ; GFX908-NEXT: [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[PHI]]221 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY12]], %subreg.sub0, [[COPY11]], %subreg.sub1, [[COPY10]], %subreg.sub2, [[COPY9]], %subreg.sub3222 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec223 ; GFX908-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec224 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec225 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc226 ; GFX908-NEXT: {{ $}}227 ; GFX908-NEXT: bb.2:228 ; GFX908-NEXT: S_ENDPGM 0229 ;230 ; GFX90A-LABEL: name: test_sgpr_init_singleuse231 ; GFX90A: bb.0:232 ; GFX90A-NEXT: successors: %bb.1(0x80000000)233 ; GFX90A-NEXT: liveins: $sgpr0, $scc234 ; GFX90A-NEXT: {{ $}}235 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_32 = COPY $sgpr0236 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]]237 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY1]]238 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY]]239 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY3]]240 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY]]241 ; GFX90A-NEXT: [[COPY6:%[0-9]+]]:agpr_32 = COPY [[COPY5]]242 ; GFX90A-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[COPY]]243 ; GFX90A-NEXT: [[COPY8:%[0-9]+]]:agpr_32 = COPY [[COPY7]]244 ; GFX90A-NEXT: {{ $}}245 ; GFX90A-NEXT: bb.1:246 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)247 ; GFX90A-NEXT: liveins: $scc248 ; GFX90A-NEXT: {{ $}}249 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %16.sub0, %bb.1250 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %16.sub1, %bb.1251 ; GFX90A-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY6]], %bb.0, %16.sub2, %bb.1252 ; GFX90A-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY8]], %bb.0, %16.sub3, %bb.1253 ; GFX90A-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]254 ; GFX90A-NEXT: [[COPY10:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]255 ; GFX90A-NEXT: [[COPY11:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]256 ; GFX90A-NEXT: [[COPY12:%[0-9]+]]:vgpr_32 = COPY [[PHI]]257 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY12]], %subreg.sub0, [[COPY11]], %subreg.sub1, [[COPY10]], %subreg.sub2, [[COPY9]], %subreg.sub3258 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec259 ; GFX90A-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec260 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec261 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc262 ; GFX90A-NEXT: {{ $}}263 ; GFX90A-NEXT: bb.2:264 ; GFX90A-NEXT: S_ENDPGM 0265 bb.0:266 liveins: $sgpr0, $scc267 successors: %bb.1268 269 %0:sgpr_32 = COPY $sgpr0270 %1:vgpr_32 = COPY %0271 %2:vgpr_32 = COPY %0272 %3:vgpr_32 = COPY %0273 %4:vgpr_32 = COPY %0274 275 bb.1:276 liveins: $scc277 successors: %bb.1, %bb.2278 279 %8:vgpr_32 = PHI %1, %bb.0, %16, %bb.1280 %9:vgpr_32 = PHI %2, %bb.0, %17, %bb.1281 %10:vgpr_32 = PHI %3, %bb.0, %18, %bb.1282 %11:vgpr_32 = PHI %4, %bb.0, %19, %bb.1283 %12:areg_128_align2 = REG_SEQUENCE %8, %subreg.sub0, %9, %subreg.sub1, %10, %subreg.sub2, %11, %subreg.sub3284 %13:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec285 %14:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec286 %15:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %14:vgpr_32, %13:vgpr_32, %12:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec287 %16:vgpr_32 = COPY %15.sub0288 %17:vgpr_32 = COPY %15.sub1289 %18:vgpr_32 = COPY %15.sub2290 %19:vgpr_32 = COPY %15.sub3291 S_CBRANCH_SCC1 %bb.1, implicit $scc292 293 bb.2:294 S_ENDPGM 0295...296 297---298name: test_vgpr_init299tracksRegLiveness: true300 301body: |302 ; GFX908-LABEL: name: test_vgpr_init303 ; GFX908: bb.0:304 ; GFX908-NEXT: successors: %bb.1(0x80000000)305 ; GFX908-NEXT: liveins: $vgpr0, $scc306 ; GFX908-NEXT: {{ $}}307 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0308 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:agpr_32 = COPY [[COPY]]309 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY]]310 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[COPY]]311 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY]]312 ; GFX908-NEXT: {{ $}}313 ; GFX908-NEXT: bb.1:314 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)315 ; GFX908-NEXT: liveins: $scc316 ; GFX908-NEXT: {{ $}}317 ; GFX908-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %12.sub0, %bb.1318 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.0, %12.sub1, %bb.1319 ; GFX908-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %12.sub2, %bb.1320 ; GFX908-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %12.sub3, %bb.1321 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]322 ; GFX908-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]323 ; GFX908-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]324 ; GFX908-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI]]325 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY8]], %subreg.sub0, [[COPY7]], %subreg.sub1, [[COPY6]], %subreg.sub2, [[COPY5]], %subreg.sub3326 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec327 ; GFX908-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec328 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec329 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc330 ; GFX908-NEXT: {{ $}}331 ; GFX908-NEXT: bb.2:332 ; GFX908-NEXT: S_ENDPGM 0333 ;334 ; GFX90A-LABEL: name: test_vgpr_init335 ; GFX90A: bb.0:336 ; GFX90A-NEXT: successors: %bb.1(0x80000000)337 ; GFX90A-NEXT: liveins: $vgpr0, $scc338 ; GFX90A-NEXT: {{ $}}339 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0340 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:agpr_32 = COPY [[COPY]]341 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY]]342 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[COPY]]343 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY]]344 ; GFX90A-NEXT: {{ $}}345 ; GFX90A-NEXT: bb.1:346 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)347 ; GFX90A-NEXT: liveins: $scc348 ; GFX90A-NEXT: {{ $}}349 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %12.sub0, %bb.1350 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.0, %12.sub1, %bb.1351 ; GFX90A-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %12.sub2, %bb.1352 ; GFX90A-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %12.sub3, %bb.1353 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]354 ; GFX90A-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]355 ; GFX90A-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]356 ; GFX90A-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI]]357 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY8]], %subreg.sub0, [[COPY7]], %subreg.sub1, [[COPY6]], %subreg.sub2, [[COPY5]], %subreg.sub3358 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec359 ; GFX90A-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec360 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec361 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc362 ; GFX90A-NEXT: {{ $}}363 ; GFX90A-NEXT: bb.2:364 ; GFX90A-NEXT: S_ENDPGM 0365 bb.0:366 liveins: $vgpr0, $scc367 successors: %bb.1368 369 %0:vgpr_32 = COPY $vgpr0370 371 bb.1:372 liveins: $scc373 successors: %bb.1, %bb.2374 375 %8:vgpr_32 = PHI %0, %bb.0, %16, %bb.1376 %9:vgpr_32 = PHI %0, %bb.0, %17, %bb.1377 %10:vgpr_32 = PHI %0, %bb.0, %18, %bb.1378 %11:vgpr_32 = PHI %0, %bb.0, %19, %bb.1379 %12:areg_128_align2 = REG_SEQUENCE %8, %subreg.sub0, %9, %subreg.sub1, %10, %subreg.sub2, %11, %subreg.sub3380 %13:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec381 %14:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec382 %15:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %14:vgpr_32, %13:vgpr_32, %12:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec383 %16:vgpr_32 = COPY %15.sub0384 %17:vgpr_32 = COPY %15.sub1385 %18:vgpr_32 = COPY %15.sub2386 %19:vgpr_32 = COPY %15.sub3387 S_CBRANCH_SCC1 %bb.1, implicit $scc388 389 bb.2:390 S_ENDPGM 0391...392 393---394name: test_use_vgpr_temp395tracksRegLiveness: true396 397body: |398 ; GFX908-LABEL: name: test_use_vgpr_temp399 ; GFX908: bb.0:400 ; GFX908-NEXT: successors: %bb.1(0x80000000)401 ; GFX908-NEXT: liveins: $sgpr0, $scc402 ; GFX908-NEXT: {{ $}}403 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $sgpr0404 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec405 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec406 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec407 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec408 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3409 ; GFX908-NEXT: [[V_ACCVGPR_READ_B32_e64_:%[0-9]+]]:vgpr_32 = V_ACCVGPR_READ_B32_e64 [[REG_SEQUENCE]].sub0, implicit $exec410 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:agpr_32 = COPY [[V_ACCVGPR_READ_B32_e64_]]411 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0412 ; GFX908-NEXT: {{ $}}413 ; GFX908-NEXT: bb.1:414 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)415 ; GFX908-NEXT: liveins: $scc416 ; GFX908-NEXT: {{ $}}417 ; GFX908-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %18.sub0, %bb.1418 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %18.sub1, %bb.1419 ; GFX908-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %18.sub2, %bb.1420 ; GFX908-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %18.sub3, %bb.1421 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]422 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]423 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]424 ; GFX908-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI]]425 ; GFX908-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY6]], %subreg.sub0, [[COPY5]], %subreg.sub1, [[COPY4]], %subreg.sub2, [[COPY3]], %subreg.sub3426 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec427 ; GFX908-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec428 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], 0, 0, 0, implicit $mode, implicit $exec429 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc430 ; GFX908-NEXT: {{ $}}431 ; GFX908-NEXT: bb.2:432 ; GFX908-NEXT: S_ENDPGM 0433 ;434 ; GFX90A-LABEL: name: test_use_vgpr_temp435 ; GFX90A: bb.0:436 ; GFX90A-NEXT: successors: %bb.1(0x80000000)437 ; GFX90A-NEXT: liveins: $sgpr0, $scc438 ; GFX90A-NEXT: {{ $}}439 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $sgpr0440 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec441 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec442 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec443 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 [[COPY]], implicit $exec444 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3445 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[REG_SEQUENCE]].sub0446 ; GFX90A-NEXT: {{ $}}447 ; GFX90A-NEXT: bb.1:448 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)449 ; GFX90A-NEXT: liveins: $scc450 ; GFX90A-NEXT: {{ $}}451 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[REG_SEQUENCE]].sub0, %bb.0, %18.sub0, %bb.1452 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[REG_SEQUENCE]].sub0, %bb.0, %18.sub1, %bb.1453 ; GFX90A-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[REG_SEQUENCE]].sub0, %bb.0, %18.sub2, %bb.1454 ; GFX90A-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[REG_SEQUENCE]].sub0, %bb.0, %18.sub3, %bb.1455 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]456 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]457 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]458 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI]]459 ; GFX90A-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY5]], %subreg.sub0, [[COPY4]], %subreg.sub1, [[COPY3]], %subreg.sub2, [[COPY2]], %subreg.sub3460 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec461 ; GFX90A-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec462 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], 0, 0, 0, implicit $mode, implicit $exec463 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc464 ; GFX90A-NEXT: {{ $}}465 ; GFX90A-NEXT: bb.2:466 ; GFX90A-NEXT: S_ENDPGM 0467 bb.0:468 liveins: $sgpr0, $scc469 successors: %bb.1470 471 %1:vgpr_32 = COPY $sgpr0472 %2:agpr_32 = V_ACCVGPR_WRITE_B32_e64 %1, implicit $exec473 %3:agpr_32 = V_ACCVGPR_WRITE_B32_e64 %1, implicit $exec474 %4:agpr_32 = V_ACCVGPR_WRITE_B32_e64 %1, implicit $exec475 %5:agpr_32 = V_ACCVGPR_WRITE_B32_e64 %1, implicit $exec476 %6:areg_128_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1, %4, %subreg.sub2, %5, %subreg.sub3477 %7:vgpr_32 = COPY %6.sub0478 bb.1:479 liveins: $scc480 successors: %bb.1, %bb.2481 482 %8:vgpr_32 = PHI %7, %bb.0, %16, %bb.1483 %9:vgpr_32 = PHI %7, %bb.0, %17, %bb.1484 %10:vgpr_32 = PHI %7, %bb.0, %18, %bb.1485 %11:vgpr_32 = PHI %7, %bb.0, %19, %bb.1486 %12:areg_128_align2 = REG_SEQUENCE %8, %subreg.sub0, %9, %subreg.sub1, %10, %subreg.sub2, %11, %subreg.sub3487 %13:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec488 %14:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec489 %15:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %14:vgpr_32, %13:vgpr_32, %12:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec490 %16:vgpr_32 = COPY %15.sub0491 %17:vgpr_32 = COPY %15.sub1492 %18:vgpr_32 = COPY %15.sub2493 %19:vgpr_32 = COPY %15.sub3494 S_CBRANCH_SCC1 %bb.1, implicit $scc495 bb.2:496 S_ENDPGM 0497...498 499---500name: test_vgpr_init_two_copies501tracksRegLiveness: true502 503body: |504 ; GFX908-LABEL: name: test_vgpr_init_two_copies505 ; GFX908: bb.0:506 ; GFX908-NEXT: successors: %bb.1(0x80000000)507 ; GFX908-NEXT: liveins: $vgpr0, $scc508 ; GFX908-NEXT: {{ $}}509 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0510 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:agpr_32 = COPY [[COPY]]511 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY]]512 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[COPY]]513 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY]]514 ; GFX908-NEXT: {{ $}}515 ; GFX908-NEXT: bb.1:516 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)517 ; GFX908-NEXT: liveins: $scc518 ; GFX908-NEXT: {{ $}}519 ; GFX908-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %12.sub0, %bb.1520 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.0, %12.sub1, %bb.1521 ; GFX908-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %12.sub2, %bb.1522 ; GFX908-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %12.sub3, %bb.1523 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]524 ; GFX908-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]525 ; GFX908-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]526 ; GFX908-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI]]527 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY8]], %subreg.sub0, [[COPY7]], %subreg.sub1, [[COPY6]], %subreg.sub2, [[COPY5]], %subreg.sub3528 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec529 ; GFX908-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec530 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec531 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc532 ; GFX908-NEXT: {{ $}}533 ; GFX908-NEXT: bb.2:534 ; GFX908-NEXT: S_ENDPGM 0535 ;536 ; GFX90A-LABEL: name: test_vgpr_init_two_copies537 ; GFX90A: bb.0:538 ; GFX90A-NEXT: successors: %bb.1(0x80000000)539 ; GFX90A-NEXT: liveins: $vgpr0, $scc540 ; GFX90A-NEXT: {{ $}}541 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0542 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:agpr_32 = COPY [[COPY]]543 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[COPY]]544 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[COPY]]545 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[COPY]]546 ; GFX90A-NEXT: {{ $}}547 ; GFX90A-NEXT: bb.1:548 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)549 ; GFX90A-NEXT: liveins: $scc550 ; GFX90A-NEXT: {{ $}}551 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.0, %12.sub0, %bb.1552 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.0, %12.sub1, %bb.1553 ; GFX90A-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.0, %12.sub2, %bb.1554 ; GFX90A-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY1]], %bb.0, %12.sub3, %bb.1555 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]556 ; GFX90A-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]557 ; GFX90A-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI1]]558 ; GFX90A-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI]]559 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY8]], %subreg.sub0, [[COPY7]], %subreg.sub1, [[COPY6]], %subreg.sub2, [[COPY5]], %subreg.sub3560 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec561 ; GFX90A-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec562 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec563 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc564 ; GFX90A-NEXT: {{ $}}565 ; GFX90A-NEXT: bb.2:566 ; GFX90A-NEXT: S_ENDPGM 0567 bb.0:568 liveins: $vgpr0, $scc569 successors: %bb.1570 571 %0:vgpr_32 = COPY $vgpr0572 573 bb.1:574 liveins: $scc575 successors: %bb.1, %bb.2576 577 %8:vgpr_32 = PHI %0, %bb.0, %17, %bb.1578 %9:vgpr_32 = PHI %0, %bb.0, %18, %bb.1579 %10:vgpr_32 = PHI %0, %bb.0, %19, %bb.1580 %11:vgpr_32 = PHI %0, %bb.0, %20, %bb.1581 %12:areg_128_align2 = REG_SEQUENCE %8, %subreg.sub0, %9, %subreg.sub1, %10, %subreg.sub2, %11, %subreg.sub3582 %13:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec583 %14:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec584 %15:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %14:vgpr_32, %13:vgpr_32, %12:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec585 %16:vreg_128_align2 = COPY %15:areg_128_align2586 %17:vgpr_32 = COPY %16.sub0:vreg_128_align2587 %18:vgpr_32 = COPY %16.sub1:vreg_128_align2588 %19:vgpr_32 = COPY %16.sub2:vreg_128_align2589 %20:vgpr_32 = COPY %16.sub3:vreg_128_align2590 S_CBRANCH_SCC1 %bb.1, implicit $scc591 592 bb.2:593 S_ENDPGM 0594...595 596---597name: test_vgpr_init_skip_phis_insertpt598tracksRegLiveness: true599 600body: |601 ; GFX908-LABEL: name: test_vgpr_init_skip_phis_insertpt602 ; GFX908: bb.0:603 ; GFX908-NEXT: successors: %bb.1(0x80000000)604 ; GFX908-NEXT: liveins: $vgpr0, $vgpr1, $scc605 ; GFX908-NEXT: {{ $}}606 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0607 ; GFX908-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0608 ; GFX908-NEXT: {{ $}}609 ; GFX908-NEXT: bb.1:610 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)611 ; GFX908-NEXT: liveins: $scc612 ; GFX908-NEXT: {{ $}}613 ; GFX908-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1614 ; GFX908-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1615 ; GFX908-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[PHI]]616 ; GFX908-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[PHI]]617 ; GFX908-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[PHI]]618 ; GFX908-NEXT: [[COPY5:%[0-9]+]]:agpr_32 = COPY [[PHI]]619 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc620 ; GFX908-NEXT: {{ $}}621 ; GFX908-NEXT: bb.2:622 ; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)623 ; GFX908-NEXT: liveins: $scc624 ; GFX908-NEXT: {{ $}}625 ; GFX908-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY5]], %bb.1, %15.sub0, %bb.2626 ; GFX908-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.1, %15.sub1, %bb.2627 ; GFX908-NEXT: [[PHI4:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.1, %15.sub2, %bb.2628 ; GFX908-NEXT: [[PHI5:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.1, %15.sub3, %bb.2629 ; GFX908-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI5]]630 ; GFX908-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI4]]631 ; GFX908-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]632 ; GFX908-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]633 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY9]], %subreg.sub0, [[COPY8]], %subreg.sub1, [[COPY7]], %subreg.sub2, [[COPY6]], %subreg.sub3634 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec635 ; GFX908-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec636 ; GFX908-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec637 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc638 ; GFX908-NEXT: {{ $}}639 ; GFX908-NEXT: bb.3:640 ; GFX908-NEXT: S_ENDPGM 0641 ;642 ; GFX90A-LABEL: name: test_vgpr_init_skip_phis_insertpt643 ; GFX90A: bb.0:644 ; GFX90A-NEXT: successors: %bb.1(0x80000000)645 ; GFX90A-NEXT: liveins: $vgpr0, $vgpr1, $scc646 ; GFX90A-NEXT: {{ $}}647 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0648 ; GFX90A-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0649 ; GFX90A-NEXT: {{ $}}650 ; GFX90A-NEXT: bb.1:651 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)652 ; GFX90A-NEXT: liveins: $scc653 ; GFX90A-NEXT: {{ $}}654 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1655 ; GFX90A-NEXT: [[PHI1:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.0, [[COPY1]], %bb.1656 ; GFX90A-NEXT: [[COPY2:%[0-9]+]]:agpr_32 = COPY [[PHI]]657 ; GFX90A-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[PHI]]658 ; GFX90A-NEXT: [[COPY4:%[0-9]+]]:agpr_32 = COPY [[PHI]]659 ; GFX90A-NEXT: [[COPY5:%[0-9]+]]:agpr_32 = COPY [[PHI]]660 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc661 ; GFX90A-NEXT: {{ $}}662 ; GFX90A-NEXT: bb.2:663 ; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)664 ; GFX90A-NEXT: liveins: $scc665 ; GFX90A-NEXT: {{ $}}666 ; GFX90A-NEXT: [[PHI2:%[0-9]+]]:agpr_32 = PHI [[COPY5]], %bb.1, %15.sub0, %bb.2667 ; GFX90A-NEXT: [[PHI3:%[0-9]+]]:agpr_32 = PHI [[COPY4]], %bb.1, %15.sub1, %bb.2668 ; GFX90A-NEXT: [[PHI4:%[0-9]+]]:agpr_32 = PHI [[COPY3]], %bb.1, %15.sub2, %bb.2669 ; GFX90A-NEXT: [[PHI5:%[0-9]+]]:agpr_32 = PHI [[COPY2]], %bb.1, %15.sub3, %bb.2670 ; GFX90A-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[PHI5]]671 ; GFX90A-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[PHI4]]672 ; GFX90A-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[PHI3]]673 ; GFX90A-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[PHI2]]674 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[COPY9]], %subreg.sub0, [[COPY8]], %subreg.sub1, [[COPY7]], %subreg.sub2, [[COPY6]], %subreg.sub3675 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec676 ; GFX90A-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec677 ; GFX90A-NEXT: [[V_MFMA_F32_4X4X1F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 [[V_MOV_B32_e32_1]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE]], 0, 0, 0, implicit $mode, implicit $exec678 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.2, implicit $scc679 ; GFX90A-NEXT: {{ $}}680 ; GFX90A-NEXT: bb.3:681 ; GFX90A-NEXT: S_ENDPGM 0682 bb.0:683 liveins: $vgpr0, $vgpr1, $scc684 successors: %bb.1685 686 %0:vgpr_32 = COPY $vgpr0687 %1:vgpr_32 = COPY $vgpr0688 689 bb.1:690 liveins: $scc691 successors: %bb.1, %bb.2692 693 %6:vgpr_32 = PHI %0, %bb.0, %1, %bb.1694 %7:vgpr_32 = PHI %0, %bb.0, %1, %bb.1695 S_CBRANCH_SCC1 %bb.1, implicit $scc696 697 bb.2:698 liveins: $scc699 successors: %bb.2, %bb.3700 %8:vgpr_32 = PHI %6, %bb.1, %16, %bb.2701 %9:vgpr_32 = PHI %6, %bb.1, %17, %bb.2702 %10:vgpr_32 = PHI %6, %bb.1, %18, %bb.2703 %11:vgpr_32 = PHI %6, %bb.1, %19, %bb.2704 %12:areg_128_align2 = REG_SEQUENCE %8, %subreg.sub0, %9, %subreg.sub1, %10, %subreg.sub2, %11, %subreg.sub3705 %13:vgpr_32 = V_MOV_B32_e32 1073741824, implicit $exec706 %14:vgpr_32 = V_MOV_B32_e32 1065353216, implicit $exec707 %15:areg_128_align2 = V_MFMA_F32_4X4X1F32_e64 %14:vgpr_32, %13:vgpr_32, %12:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec708 %16:vgpr_32 = COPY %15.sub0709 %17:vgpr_32 = COPY %15.sub1710 %18:vgpr_32 = COPY %15.sub2711 %19:vgpr_32 = COPY %15.sub3712 S_CBRANCH_SCC1 %bb.2, implicit $scc713 714 bb.3:715 S_ENDPGM 0716...717 718---719name: skip_optimize_agpr_phi_without_subreg_use720tracksRegLiveness: true721body: |722 ; GFX908-LABEL: name: skip_optimize_agpr_phi_without_subreg_use723 ; GFX908: bb.0:724 ; GFX908-NEXT: successors: %bb.1(0x80000000)725 ; GFX908-NEXT: liveins: $scc726 ; GFX908-NEXT: {{ $}}727 ; GFX908-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec728 ; GFX908-NEXT: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0729 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec730 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec731 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec732 ; GFX908-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec733 ; GFX908-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3734 ; GFX908-NEXT: {{ $}}735 ; GFX908-NEXT: bb.1:736 ; GFX908-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)737 ; GFX908-NEXT: liveins: $scc738 ; GFX908-NEXT: {{ $}}739 ; GFX908-NEXT: [[PHI:%[0-9]+]]:areg_128_align2 = PHI [[REG_SEQUENCE]], %bb.0, %7, %bb.1740 ; GFX908-NEXT: [[V_MFMA_F32_16X16X4F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_16X16X4F32_e64 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], [[PHI]], 0, 0, 0, implicit $mode, implicit $exec741 ; GFX908-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY [[V_MFMA_F32_16X16X4F32_e64_]], implicit $exec742 ; GFX908-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc743 ; GFX908-NEXT: {{ $}}744 ; GFX908-NEXT: bb.2:745 ; GFX908-NEXT: S_ENDPGM 0746 ;747 ; GFX90A-LABEL: name: skip_optimize_agpr_phi_without_subreg_use748 ; GFX90A: bb.0:749 ; GFX90A-NEXT: successors: %bb.1(0x80000000)750 ; GFX90A-NEXT: liveins: $scc751 ; GFX90A-NEXT: {{ $}}752 ; GFX90A-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec753 ; GFX90A-NEXT: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0754 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec755 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec756 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec757 ; GFX90A-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec758 ; GFX90A-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128_align2 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3759 ; GFX90A-NEXT: {{ $}}760 ; GFX90A-NEXT: bb.1:761 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)762 ; GFX90A-NEXT: liveins: $scc763 ; GFX90A-NEXT: {{ $}}764 ; GFX90A-NEXT: [[PHI:%[0-9]+]]:areg_128_align2 = PHI [[REG_SEQUENCE]], %bb.0, %7, %bb.1765 ; GFX90A-NEXT: [[V_MFMA_F32_16X16X4F32_e64_:%[0-9]+]]:areg_128_align2 = V_MFMA_F32_16X16X4F32_e64 [[V_MOV_B32_e32_]], [[V_MOV_B32_e32_]], [[PHI]], 0, 0, 0, implicit $mode, implicit $exec766 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY [[V_MFMA_F32_16X16X4F32_e64_]], implicit $exec767 ; GFX90A-NEXT: S_CBRANCH_SCC1 %bb.1, implicit $scc768 ; GFX90A-NEXT: {{ $}}769 ; GFX90A-NEXT: bb.2:770 ; GFX90A-NEXT: S_ENDPGM 0771 bb.0:772 liveins: $scc773 successors: %bb.1774 775 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec776 %1:sgpr_32 = S_MOV_B32 0777 %2:sgpr_128 = REG_SEQUENCE %1, %subreg.sub0, %1, %subreg.sub1, %1, %subreg.sub2, %1, %subreg.sub3778 %3:vreg_128 = COPY %2779 %4:sreg_64 = S_MOV_B64 0780 %5:areg_128_align2 = COPY %3, implicit $exec781 782 bb.1:783 liveins: $scc784 successors: %bb.1, %bb.2785 786 %9:areg_128_align2 = PHI %5, %bb.0, %10, %bb.1787 %11:areg_128_align2 = V_MFMA_F32_16X16X4F32_e64 %0:vgpr_32, %0:vgpr_32, %9:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec788 %12:vgpr_32 = COPY %11.sub3789 %13:vgpr_32 = COPY %11.sub2790 %14:vgpr_32 = COPY %11.sub1791 %15:vgpr_32 = COPY %11.sub0792 %10:areg_128_align2 = COPY %11, implicit $exec793 S_CBRANCH_SCC1 %bb.1, implicit $scc794 795 bb.2:796 S_ENDPGM 0797 798...799 800 801 802 803---804name: phi_output_reg_type_is_vgpr805tracksRegLiveness: true806body: |807 bb.0:808 liveins: $scc809 successors: %bb.1810 811 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec812 %1:sgpr_32 = S_MOV_B32 0813 %2:sgpr_128 = REG_SEQUENCE %1, %subreg.sub0, %1, %subreg.sub1, %1, %subreg.sub2, %1, %subreg.sub3814 %3:vreg_128 = COPY %2815 %4:sreg_64 = S_MOV_B64 0816 %5:areg_128_align2 = COPY %3, implicit $exec817 818 bb.1:819 liveins: $scc820 successors: %bb.1, %bb.2821 822 %9:areg_128_align2 = PHI %5, %bb.0, %10, %bb.1823 %11:areg_128_align2 = V_MFMA_F32_16X16X4F32_e64 %0:vgpr_32, %0:vgpr_32, %9:areg_128_align2, 0, 0, 0, implicit $mode, implicit $exec824 %12:vgpr_32 = COPY %11.sub3825 %13:vgpr_32 = COPY %11.sub2826 %14:vgpr_32 = COPY %11.sub1827 %15:vgpr_32 = COPY %11.sub0828 %10:areg_128_align2 = COPY %11, implicit $exec829 S_CBRANCH_SCC1 %bb.1, implicit $scc830 831 bb.2:832 S_ENDPGM 0833 834...835