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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 -disable-machine-sink=1 - < %s | FileCheck -check-prefix=GFX10 %s3 4define float @fold_abs_in_branch(float %arg1, float %arg2) {5; GFX10-LABEL: fold_abs_in_branch:6; GFX10: ; %bb.0: ; %entry7; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)8; GFX10-NEXT: v_add_f32_e32 v0, v0, v19; GFX10-NEXT: s_mov_b32 s4, exec_lo10; GFX10-NEXT: v_add_f32_e32 v1, v0, v111; GFX10-NEXT: v_add_f32_e64 v0, |v1|, |v1|12; GFX10-NEXT: v_cmpx_nlt_f32_e32 1.0, v013; GFX10-NEXT: ; %bb.1: ; %if14; GFX10-NEXT: v_mul_f32_e64 v0, 0x3e4ccccd, |v1|15; GFX10-NEXT: ; %bb.2: ; %exit16; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s417; GFX10-NEXT: s_setpc_b64 s[30:31]18entry:19 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg220 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg221 %2 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %1)22 %3 = fmul reassoc nnan nsz arcp contract afn float %2, 2.000000e+0023 %4 = fcmp ule float %3, 1.000000e+0024 br i1 %4, label %if, label %exit25 26if:27 %if.3 = fmul reassoc nnan nsz arcp contract afn float %2, 0x3FC99999A000000028 br label %exit29 30exit:31 %ret = phi float [ %3, %entry ], [ %if.3, %if ]32 ret float %ret33}34 35define float @fold_abs_in_branch_multiple_users(float %arg1, float %arg2) {36; GFX10-LABEL: fold_abs_in_branch_multiple_users:37; GFX10: ; %bb.0: ; %entry38; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; GFX10-NEXT: v_add_f32_e32 v0, v0, v140; GFX10-NEXT: s_mov_b32 s4, exec_lo41; GFX10-NEXT: v_add_f32_e32 v0, v0, v142; GFX10-NEXT: v_add_f32_e64 v1, |v0|, |v0|43; GFX10-NEXT: v_cmpx_nlt_f32_e32 1.0, v144; GFX10-NEXT: ; %bb.1: ; %if45; GFX10-NEXT: v_mul_f32_e64 v1, 0x3e4ccccd, |v0|46; GFX10-NEXT: ; %bb.2: ; %exit47; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s448; GFX10-NEXT: v_add_f32_e64 v0, |v0|, 2.049; GFX10-NEXT: v_mul_f32_e32 v0, v0, v150; GFX10-NEXT: s_setpc_b64 s[30:31]51entry:52 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg253 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg254 %2 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %1)55 %3 = fmul reassoc nnan nsz arcp contract afn float %2, 2.000000e+0056 %4 = fcmp ule float %3, 1.000000e+0057 br i1 %4, label %if, label %exit58 59if:60 %if.3 = fmul reassoc nnan nsz arcp contract afn float %2, 0x3FC99999A000000061 br label %exit62 63exit:64 %exit.phi = phi float [ %3, %entry ], [ %if.3, %if ]65 %ret.0 = fadd reassoc nnan nsz arcp contract afn float %2, 2.000000e+0066 %ret.1 = fmul float %ret.0, %exit.phi67 ret float %ret.168}69 70define float @fold_abs_in_branch_undef(float %arg1, float %arg2) {71; GFX10-LABEL: fold_abs_in_branch_undef:72; GFX10: ; %bb.0: ; %entry73; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)74; GFX10-NEXT: v_add_f32_e64 v0, |s4|, |s4|75; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, 1.0, v076; GFX10-NEXT: s_cbranch_vccnz .LBB2_277; GFX10-NEXT: ; %bb.1: ; %if78; GFX10-NEXT: v_mul_f32_e64 v0, 0x3e4ccccd, |s4|79; GFX10-NEXT: .LBB2_2: ; %exit80; GFX10-NEXT: s_setpc_b64 s[30:31]81entry:82 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg283 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg284 %undef = freeze float poison85 %2 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %undef)86 %3 = fmul reassoc nnan nsz arcp contract afn float %2, 2.000000e+0087 %4 = fcmp ule float %3, 1.000000e+0088 br i1 %4, label %if, label %exit89 90if:91 %if.3 = fmul reassoc nnan nsz arcp contract afn float %2, 0x3FC99999A000000092 br label %exit93 94exit:95 %ret = phi float [ %3, %entry ], [ %if.3, %if ]96 ret float %ret97}98 99define float @fold_abs_in_branch_poison(float %arg1, float %arg2) {100; GFX10-LABEL: fold_abs_in_branch_poison:101; GFX10: ; %bb.0: ; %entry102; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)103; GFX10-NEXT: s_setpc_b64 s[30:31]104entry:105 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg2106 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg2107 %2 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float poison)108 %3 = fmul reassoc nnan nsz arcp contract afn float %2, 2.000000e+00109 %4 = fcmp ule float %3, 1.000000e+00110 br i1 %4, label %if, label %exit111 112if:113 %if.3 = fmul reassoc nnan nsz arcp contract afn float %2, 0x3FC99999A0000000114 br label %exit115 116exit:117 %ret = phi float [ %3, %entry ], [ %if.3, %if ]118 ret float %ret119}120 121define float @fold_abs_in_branch_fabs(float %arg1, float %arg2) {122; GFX10-LABEL: fold_abs_in_branch_fabs:123; GFX10: ; %bb.0: ; %entry124; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)125; GFX10-NEXT: v_add_f32_e32 v0, v0, v1126; GFX10-NEXT: s_mov_b32 s4, exec_lo127; GFX10-NEXT: v_add_f32_e32 v1, v0, v1128; GFX10-NEXT: v_add_f32_e64 v0, |v1|, |v1|129; GFX10-NEXT: v_cmpx_nlt_f32_e32 1.0, v0130; GFX10-NEXT: ; %bb.1: ; %if131; GFX10-NEXT: v_mul_f32_e64 v0, 0x3e4ccccd, |v1|132; GFX10-NEXT: ; %bb.2: ; %exit133; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4134; GFX10-NEXT: s_setpc_b64 s[30:31]135entry:136 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg2137 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg2138 %2 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %1)139 %3 = fmul reassoc nnan nsz arcp contract afn float %2, 2.000000e+00140 %4 = fcmp ule float %3, 1.000000e+00141 br i1 %4, label %if, label %exit142 143if:144 %if.fabs = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %2)145 %if.3 = fmul reassoc nnan nsz arcp contract afn float %if.fabs, 0x3FC99999A0000000146 br label %exit147 148exit:149 %ret = phi float [ %3, %entry ], [ %if.3, %if ]150 ret float %ret151}152 153define float @fold_abs_in_branch_phi(float %arg1, float %arg2) {154; GFX10-LABEL: fold_abs_in_branch_phi:155; GFX10: ; %bb.0: ; %entry156; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)157; GFX10-NEXT: v_add_f32_e32 v0, v0, v1158; GFX10-NEXT: s_mov_b32 s4, exec_lo159; GFX10-NEXT: v_add_f32_e32 v0, v0, v1160; GFX10-NEXT: v_add_f32_e64 v0, |v0|, |v0|161; GFX10-NEXT: v_cmpx_nlt_f32_e32 1.0, v0162; GFX10-NEXT: s_cbranch_execz .LBB5_3163; GFX10-NEXT: ; %bb.1: ; %header.preheader164; GFX10-NEXT: ; implicit-def: $vgpr0165; GFX10-NEXT: .LBB5_2: ; %header166; GFX10-NEXT: ; =>This Inner Loop Header: Depth=1167; GFX10-NEXT: v_mul_f32_e32 v0, 0x40400000, v0168; GFX10-NEXT: v_cmp_lt_f32_e32 vcc_lo, -1.0, v0169; GFX10-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0170; GFX10-NEXT: s_cbranch_vccnz .LBB5_2171; GFX10-NEXT: .LBB5_3: ; %Flow1172; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4173; GFX10-NEXT: s_setpc_b64 s[30:31]174entry:175 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg2176 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg2177 %2 = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %1)178 %3 = fmul reassoc nnan nsz arcp contract afn float %2, 2.000000e+00179 %4 = fcmp ule float %3, 1.000000e+00180 br i1 %4, label %header, label %exit181 182header:183 %h.fabs.phi = phi float [ poison, %entry ], [ %l.fabs, %l ]184 %h.fmul = fmul reassoc nnan nsz arcp contract afn float %h.fabs.phi, 2.000000e+00185 %l.1 = fmul reassoc nnan nsz arcp contract afn float %h.fabs.phi, 3.000000e+00186 br label %l187 188l:189 %l.e = fcmp ule float %l.1, -1.000000e+00190 %l.fabs = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %l.1)191 br i1 %l.e, label %exit, label %header192 193exit:194 %ret = phi float [ %3, %entry ], [ %l.fabs, %l ]195 ret float %ret196}197 198define float @fold_neg_in_branch(float %arg1, float %arg2) {199; GFX10-LABEL: fold_neg_in_branch:200; GFX10: ; %bb.0: ; %entry201; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)202; GFX10-NEXT: v_add_f32_e32 v0, v0, v1203; GFX10-NEXT: s_mov_b32 s4, exec_lo204; GFX10-NEXT: v_add_f32_e32 v0, v0, v1205; GFX10-NEXT: v_mov_b32_e32 v1, v0206; GFX10-NEXT: v_cmpx_nlt_f32_e32 1.0, v0207; GFX10-NEXT: ; %bb.1: ; %if208; GFX10-NEXT: v_rcp_f32_e64 v1, -v0209; GFX10-NEXT: v_mul_f32_e64 v1, |v0|, v1210; GFX10-NEXT: ; %bb.2: ; %exit211; GFX10-NEXT: s_or_b32 exec_lo, exec_lo, s4212; GFX10-NEXT: v_mul_f32_e64 v0, -v0, v1213; GFX10-NEXT: s_setpc_b64 s[30:31]214entry:215 %0 = fadd reassoc nnan nsz arcp contract afn float %arg1, %arg2216 %1 = fadd reassoc nnan nsz arcp contract afn float %0, %arg2217 %2 = fneg reassoc nnan nsz arcp contract afn float %1218 %3 = fcmp ule float %1, 1.000000e+00219 br i1 %3, label %if, label %exit220 221if:222 %if.fabs = call reassoc nnan nsz arcp contract afn float @llvm.fabs.f32(float %1)223 %if.3 = fdiv reassoc nnan nsz arcp contract afn float %if.fabs, %2224 br label %exit225 226exit:227 %ret = phi float [ %1, %entry ], [ %if.3, %if ]228 %ret.2 = fmul reassoc nnan nsz arcp contract afn float %2, %ret229 ret float %ret.2230}231 232declare float @llvm.fabs.f32(float)233declare float @llvm.fmuladd.f32(float, float, float) #0234