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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn -mcpu=gfx1101 -run-pass si-fold-operands %s -o - | FileCheck %s3---4name: test_tryFoldZeroHighBits_skips_nonreg5tracksRegLiveness: true6body: |7 bb.0:8 ; CHECK-LABEL: name: test_tryFoldZeroHighBits_skips_nonreg9 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec10 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub111 ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec12 ; CHECK-NEXT: S_NOP 0, implicit [[V_MOV_B32_e32_1]]13 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec14 %1:vreg_64 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub115 %2:vgpr_32 = V_AND_B32_e64 65535, %1.sub0, implicit $exec16 S_NOP 0, implicit %217...18