93 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx950 -global-isel=0 | FileCheck %s -check-prefix=GFX950-SDAG3; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx950 -global-isel=1 -global-isel-abort=2 | FileCheck %s -check-prefix=GFX950-GISEL4 5declare <2 x bfloat> @llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16(<2 x bfloat>, <4 x i32>, i32, i32, i32, i32 immarg)6declare <2 x bfloat> @llvm.amdgcn.raw.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32, i32, i32)7 8define amdgpu_ps float @struct_buffer_atomic_add_v2bf16_ret(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {9; GFX950-SDAG-LABEL: struct_buffer_atomic_add_v2bf16_ret:10; GFX950-SDAG: ; %bb.0:11; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, v212; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, v113; GFX950-SDAG-NEXT: buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen sc014; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], 015; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)16; GFX950-SDAG-NEXT: flat_store_dword v[2:3], v017; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 1.018; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)19; GFX950-SDAG-NEXT: ; return to shader part epilog20;21; GFX950-GISEL-LABEL: struct_buffer_atomic_add_v2bf16_ret:22; GFX950-GISEL: ; %bb.0:23; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, v224; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, v125; GFX950-GISEL-NEXT: buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen sc026; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], 027; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)28; GFX950-GISEL-NEXT: flat_store_dword v[2:3], v029; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, 1.030; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)31; GFX950-GISEL-NEXT: ; return to shader part epilog32 %orig = call <2 x bfloat> @llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)33 store <2 x bfloat> %orig, ptr null34 ret float 1.035}36 37define amdgpu_ps void @struct_buffer_atomic_add_v2bf16_noret(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {38; GFX950-SDAG-LABEL: struct_buffer_atomic_add_v2bf16_noret:39; GFX950-SDAG: ; %bb.0:40; GFX950-SDAG-NEXT: v_mov_b32_e32 v3, v241; GFX950-SDAG-NEXT: v_mov_b32_e32 v2, v142; GFX950-SDAG-NEXT: buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen43; GFX950-SDAG-NEXT: s_endpgm44;45; GFX950-GISEL-LABEL: struct_buffer_atomic_add_v2bf16_noret:46; GFX950-GISEL: ; %bb.0:47; GFX950-GISEL-NEXT: v_mov_b32_e32 v3, v248; GFX950-GISEL-NEXT: v_mov_b32_e32 v2, v149; GFX950-GISEL-NEXT: buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen50; GFX950-GISEL-NEXT: s_endpgm51 %orig = call <2 x bfloat> @llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)52 ret void53}54 55define amdgpu_ps void @raw_buffer_atomic_add_v2bf16(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {56; GFX950-SDAG-LABEL: raw_buffer_atomic_add_v2bf16:57; GFX950-SDAG: ; %bb.0:58; GFX950-SDAG-NEXT: buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen59; GFX950-SDAG-NEXT: s_endpgm60;61; GFX950-GISEL-LABEL: raw_buffer_atomic_add_v2bf16:62; GFX950-GISEL: ; %bb.0:63; GFX950-GISEL-NEXT: buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen64; GFX950-GISEL-NEXT: s_endpgm65 %ret = call <2 x bfloat> @llvm.amdgcn.raw.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)66 ret void67}68 69define amdgpu_ps float @raw_buffer_atomic_add_v2bf16_ret(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {70; GFX950-SDAG-LABEL: raw_buffer_atomic_add_v2bf16_ret:71; GFX950-SDAG: ; %bb.0:72; GFX950-SDAG-NEXT: buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen sc073; GFX950-SDAG-NEXT: v_mov_b64_e32 v[2:3], 074; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)75; GFX950-SDAG-NEXT: flat_store_dword v[2:3], v076; GFX950-SDAG-NEXT: v_mov_b32_e32 v0, 1.077; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)78; GFX950-SDAG-NEXT: ; return to shader part epilog79;80; GFX950-GISEL-LABEL: raw_buffer_atomic_add_v2bf16_ret:81; GFX950-GISEL: ; %bb.0:82; GFX950-GISEL-NEXT: buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen sc083; GFX950-GISEL-NEXT: v_mov_b64_e32 v[2:3], 084; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0)85; GFX950-GISEL-NEXT: flat_store_dword v[2:3], v086; GFX950-GISEL-NEXT: v_mov_b32_e32 v0, 1.087; GFX950-GISEL-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)88; GFX950-GISEL-NEXT: ; return to shader part epilog89 %orig = call <2 x bfloat> @llvm.amdgcn.raw.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)90 store <2 x bfloat> %orig, ptr null91 ret float 1.092}93