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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx90a < %s | FileCheck -check-prefix=GFX90A %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s8; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s9 10define float @v_pow_f32(float %x, float %y) {11; GFX6-LABEL: v_pow_f32:12; GFX6: ; %bb.0:13; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)14; GFX6-NEXT: v_log_f32_e32 v0, v015; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v1, v016; GFX6-NEXT: v_exp_f32_e32 v0, v017; GFX6-NEXT: s_setpc_b64 s[30:31]18;19; GFX8-LABEL: v_pow_f32:20; GFX8: ; %bb.0:21; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)22; GFX8-NEXT: v_log_f32_e32 v0, v023; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v024; GFX8-NEXT: v_exp_f32_e32 v0, v025; GFX8-NEXT: s_setpc_b64 s[30:31]26;27; GFX9-LABEL: v_pow_f32:28; GFX9: ; %bb.0:29; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)30; GFX9-NEXT: v_log_f32_e32 v0, v031; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v032; GFX9-NEXT: v_exp_f32_e32 v0, v033; GFX9-NEXT: s_setpc_b64 s[30:31]34;35; GFX90A-LABEL: v_pow_f32:36; GFX90A: ; %bb.0:37; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; GFX90A-NEXT: v_log_f32_e32 v0, v039; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v040; GFX90A-NEXT: v_exp_f32_e32 v0, v041; GFX90A-NEXT: s_setpc_b64 s[30:31]42;43; GFX10-LABEL: v_pow_f32:44; GFX10: ; %bb.0:45; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)46; GFX10-NEXT: v_log_f32_e32 v0, v047; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v048; GFX10-NEXT: v_exp_f32_e32 v0, v049; GFX10-NEXT: s_setpc_b64 s[30:31]50;51; GFX11-LABEL: v_pow_f32:52; GFX11: ; %bb.0:53; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)54; GFX11-NEXT: v_log_f32_e32 v0, v055; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)56; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v057; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)58; GFX11-NEXT: v_exp_f32_e32 v0, v059; GFX11-NEXT: s_setpc_b64 s[30:31]60 %pow = call float @llvm.pow.f32(float %x, float %y)61 ret float %pow62}63 64define <2 x float> @v_pow_v2f32(<2 x float> %x, <2 x float> %y) {65; GFX6-LABEL: v_pow_v2f32:66; GFX6: ; %bb.0:67; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)68; GFX6-NEXT: v_log_f32_e32 v0, v069; GFX6-NEXT: v_log_f32_e32 v1, v170; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v2, v071; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v3, v172; GFX6-NEXT: v_exp_f32_e32 v0, v073; GFX6-NEXT: v_exp_f32_e32 v1, v174; GFX6-NEXT: s_setpc_b64 s[30:31]75;76; GFX8-LABEL: v_pow_v2f32:77; GFX8: ; %bb.0:78; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)79; GFX8-NEXT: v_log_f32_e32 v0, v080; GFX8-NEXT: v_log_f32_e32 v1, v181; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v2, v082; GFX8-NEXT: v_mul_legacy_f32_e32 v1, v3, v183; GFX8-NEXT: v_exp_f32_e32 v0, v084; GFX8-NEXT: v_exp_f32_e32 v1, v185; GFX8-NEXT: s_setpc_b64 s[30:31]86;87; GFX9-LABEL: v_pow_v2f32:88; GFX9: ; %bb.0:89; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)90; GFX9-NEXT: v_log_f32_e32 v0, v091; GFX9-NEXT: v_log_f32_e32 v1, v192; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v2, v093; GFX9-NEXT: v_mul_legacy_f32_e32 v1, v3, v194; GFX9-NEXT: v_exp_f32_e32 v0, v095; GFX9-NEXT: v_exp_f32_e32 v1, v196; GFX9-NEXT: s_setpc_b64 s[30:31]97;98; GFX90A-LABEL: v_pow_v2f32:99; GFX90A: ; %bb.0:100; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)101; GFX90A-NEXT: v_log_f32_e32 v0, v0102; GFX90A-NEXT: v_log_f32_e32 v1, v1103; GFX90A-NEXT: v_mul_legacy_f32 v0, v2, v0104; GFX90A-NEXT: v_mul_legacy_f32 v1, v3, v1105; GFX90A-NEXT: v_exp_f32_e32 v0, v0106; GFX90A-NEXT: v_exp_f32_e32 v1, v1107; GFX90A-NEXT: s_setpc_b64 s[30:31]108;109; GFX10-LABEL: v_pow_v2f32:110; GFX10: ; %bb.0:111; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)112; GFX10-NEXT: v_log_f32_e32 v0, v0113; GFX10-NEXT: v_log_f32_e32 v1, v1114; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v2, v0115; GFX10-NEXT: v_mul_legacy_f32_e32 v1, v3, v1116; GFX10-NEXT: v_exp_f32_e32 v0, v0117; GFX10-NEXT: v_exp_f32_e32 v1, v1118; GFX10-NEXT: s_setpc_b64 s[30:31]119;120; GFX11-LABEL: v_pow_v2f32:121; GFX11: ; %bb.0:122; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)123; GFX11-NEXT: v_log_f32_e32 v0, v0124; GFX11-NEXT: v_log_f32_e32 v1, v1125; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)126; GFX11-NEXT: v_dual_mul_dx9_zero_f32 v0, v2, v0 :: v_dual_mul_dx9_zero_f32 v1, v3, v1127; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)128; GFX11-NEXT: v_exp_f32_e32 v0, v0129; GFX11-NEXT: v_exp_f32_e32 v1, v1130; GFX11-NEXT: s_setpc_b64 s[30:31]131 %pow = call <2 x float> @llvm.pow.v2f32(<2 x float> %x, <2 x float> %y)132 ret <2 x float> %pow133}134 135define half @v_pow_f16(half %x, half %y) {136; GFX6-LABEL: v_pow_f16:137; GFX6: ; %bb.0:138; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)139; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0140; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1141; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0142; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1143; GFX6-NEXT: v_log_f32_e32 v0, v0144; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v1, v0145; GFX6-NEXT: v_exp_f32_e32 v0, v0146; GFX6-NEXT: s_setpc_b64 s[30:31]147;148; GFX8-LABEL: v_pow_f16:149; GFX8: ; %bb.0:150; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)151; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0152; GFX8-NEXT: v_cvt_f32_f16_e32 v1, v1153; GFX8-NEXT: v_log_f32_e32 v0, v0154; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v0155; GFX8-NEXT: v_exp_f32_e32 v0, v0156; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0157; GFX8-NEXT: s_setpc_b64 s[30:31]158;159; GFX9-LABEL: v_pow_f16:160; GFX9: ; %bb.0:161; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)162; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0163; GFX9-NEXT: v_cvt_f32_f16_e32 v1, v1164; GFX9-NEXT: v_log_f32_e32 v0, v0165; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v0166; GFX9-NEXT: v_exp_f32_e32 v0, v0167; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0168; GFX9-NEXT: s_setpc_b64 s[30:31]169;170; GFX90A-LABEL: v_pow_f16:171; GFX90A: ; %bb.0:172; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)173; GFX90A-NEXT: v_cvt_f32_f16_e32 v0, v0174; GFX90A-NEXT: v_cvt_f32_f16_e32 v1, v1175; GFX90A-NEXT: v_log_f32_e32 v0, v0176; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v0177; GFX90A-NEXT: v_exp_f32_e32 v0, v0178; GFX90A-NEXT: v_cvt_f16_f32_e32 v0, v0179; GFX90A-NEXT: s_setpc_b64 s[30:31]180;181; GFX10-LABEL: v_pow_f16:182; GFX10: ; %bb.0:183; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)184; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0185; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v1186; GFX10-NEXT: v_log_f32_e32 v0, v0187; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v0188; GFX10-NEXT: v_exp_f32_e32 v0, v0189; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0190; GFX10-NEXT: s_setpc_b64 s[30:31]191;192; GFX11-TRUE16-LABEL: v_pow_f16:193; GFX11-TRUE16: ; %bb.0:194; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)195; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l196; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l197; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)198; GFX11-TRUE16-NEXT: v_log_f32_e32 v0, v0199; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)200; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0201; GFX11-TRUE16-NEXT: v_exp_f32_e32 v0, v0202; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)203; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0204; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]205;206; GFX11-FAKE16-LABEL: v_pow_f16:207; GFX11-FAKE16: ; %bb.0:208; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)209; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0210; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1211; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)212; GFX11-FAKE16-NEXT: v_log_f32_e32 v0, v0213; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)214; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0215; GFX11-FAKE16-NEXT: v_exp_f32_e32 v0, v0216; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)217; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0218; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]219 %pow = call half @llvm.pow.f16(half %x, half %y)220 ret half %pow221}222 223define <2 x half> @v_pow_v2f16(<2 x half> %x, <2 x half> %y) {224; GFX6-LABEL: v_pow_v2f16:225; GFX6: ; %bb.0:226; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)227; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0228; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1229; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2230; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v3231; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0232; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1233; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2234; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v3235; GFX6-NEXT: v_log_f32_e32 v0, v0236; GFX6-NEXT: v_log_f32_e32 v1, v1237; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v2, v0238; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v3, v1239; GFX6-NEXT: v_exp_f32_e32 v0, v0240; GFX6-NEXT: v_exp_f32_e32 v1, v1241; GFX6-NEXT: s_setpc_b64 s[30:31]242;243; GFX8-LABEL: v_pow_v2f16:244; GFX8: ; %bb.0:245; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)246; GFX8-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1247; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0248; GFX8-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1249; GFX8-NEXT: v_cvt_f32_f16_e32 v1, v1250; GFX8-NEXT: v_log_f32_e32 v2, v2251; GFX8-NEXT: v_log_f32_e32 v0, v0252; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v3, v2253; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v0254; GFX8-NEXT: v_exp_f32_e32 v1, v2255; GFX8-NEXT: v_exp_f32_e32 v0, v0256; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD257; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0258; GFX8-NEXT: v_or_b32_e32 v0, v0, v1259; GFX8-NEXT: s_setpc_b64 s[30:31]260;261; GFX9-LABEL: v_pow_v2f16:262; GFX9: ; %bb.0:263; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)264; GFX9-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1265; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0266; GFX9-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1267; GFX9-NEXT: v_cvt_f32_f16_e32 v1, v1268; GFX9-NEXT: v_log_f32_e32 v2, v2269; GFX9-NEXT: v_log_f32_e32 v0, v0270; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v3, v2271; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v0272; GFX9-NEXT: v_exp_f32_e32 v1, v2273; GFX9-NEXT: v_exp_f32_e32 v0, v0274; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1275; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0276; GFX9-NEXT: v_pack_b32_f16 v0, v0, v1277; GFX9-NEXT: s_setpc_b64 s[30:31]278;279; GFX90A-LABEL: v_pow_v2f16:280; GFX90A: ; %bb.0:281; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)282; GFX90A-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1283; GFX90A-NEXT: v_cvt_f32_f16_e32 v0, v0284; GFX90A-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1285; GFX90A-NEXT: v_cvt_f32_f16_e32 v1, v1286; GFX90A-NEXT: v_log_f32_e32 v2, v2287; GFX90A-NEXT: v_log_f32_e32 v0, v0288; GFX90A-NEXT: v_mul_legacy_f32 v2, v3, v2289; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v0290; GFX90A-NEXT: v_exp_f32_e32 v1, v2291; GFX90A-NEXT: v_exp_f32_e32 v0, v0292; GFX90A-NEXT: v_cvt_f16_f32_e32 v1, v1293; GFX90A-NEXT: v_cvt_f16_f32_e32 v0, v0294; GFX90A-NEXT: v_pack_b32_f16 v0, v0, v1295; GFX90A-NEXT: s_setpc_b64 s[30:31]296;297; GFX10-LABEL: v_pow_v2f16:298; GFX10: ; %bb.0:299; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)300; GFX10-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1301; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0302; GFX10-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1303; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v1304; GFX10-NEXT: v_log_f32_e32 v2, v2305; GFX10-NEXT: v_log_f32_e32 v0, v0306; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v3, v2307; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v0308; GFX10-NEXT: v_exp_f32_e32 v1, v2309; GFX10-NEXT: v_exp_f32_e32 v0, v0310; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1311; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0312; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1313; GFX10-NEXT: s_setpc_b64 s[30:31]314;315; GFX11-TRUE16-LABEL: v_pow_v2f16:316; GFX11-TRUE16: ; %bb.0:317; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)318; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v0.h319; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l320; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v1.h321; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l322; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)323; GFX11-TRUE16-NEXT: v_log_f32_e32 v2, v2324; GFX11-TRUE16-NEXT: v_log_f32_e32 v0, v0325; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)326; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2327; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0328; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)329; GFX11-TRUE16-NEXT: v_exp_f32_e32 v1, v2330; GFX11-TRUE16-NEXT: v_exp_f32_e32 v2, v0331; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)332; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v1333; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v2334; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)335; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l336; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]337;338; GFX11-FAKE16-LABEL: v_pow_v2f16:339; GFX11-FAKE16: ; %bb.0:340; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)341; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0342; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0343; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1344; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1345; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)346; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2347; GFX11-FAKE16-NEXT: v_log_f32_e32 v0, v0348; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)349; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3350; GFX11-FAKE16-NEXT: v_log_f32_e32 v2, v2351; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)352; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0353; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2354; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)355; GFX11-FAKE16-NEXT: v_exp_f32_e32 v0, v0356; GFX11-FAKE16-NEXT: v_exp_f32_e32 v1, v2357; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)358; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0359; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1360; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)361; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1362; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]363 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x, <2 x half> %y)364 ret <2 x half> %pow365}366 367define <2 x half> @v_pow_v2f16_fneg_lhs(<2 x half> %x, <2 x half> %y) {368; GFX6-LABEL: v_pow_v2f16_fneg_lhs:369; GFX6: ; %bb.0:370; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)371; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1372; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0373; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2374; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1375; GFX6-NEXT: v_or_b32_e32 v0, v0, v1376; GFX6-NEXT: v_xor_b32_e32 v0, 0x80008000, v0377; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v3378; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v0379; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0380; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0381; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2382; GFX6-NEXT: v_log_f32_e32 v3, v3383; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1384; GFX6-NEXT: v_log_f32_e32 v4, v0385; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v2, v3386; GFX6-NEXT: v_exp_f32_e32 v0, v0387; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v1, v4388; GFX6-NEXT: v_exp_f32_e32 v1, v1389; GFX6-NEXT: s_setpc_b64 s[30:31]390;391; GFX8-LABEL: v_pow_v2f16_fneg_lhs:392; GFX8: ; %bb.0:393; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)394; GFX8-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1395; GFX8-NEXT: v_cvt_f32_f16_e64 v0, -v0396; GFX8-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1397; GFX8-NEXT: v_cvt_f32_f16_e32 v1, v1398; GFX8-NEXT: v_log_f32_e32 v2, v2399; GFX8-NEXT: v_log_f32_e32 v0, v0400; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v3, v2401; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v0402; GFX8-NEXT: v_exp_f32_e32 v1, v2403; GFX8-NEXT: v_exp_f32_e32 v0, v0404; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD405; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0406; GFX8-NEXT: v_or_b32_e32 v0, v0, v1407; GFX8-NEXT: s_setpc_b64 s[30:31]408;409; GFX9-LABEL: v_pow_v2f16_fneg_lhs:410; GFX9: ; %bb.0:411; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)412; GFX9-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1413; GFX9-NEXT: v_cvt_f32_f16_e64 v0, -v0414; GFX9-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1415; GFX9-NEXT: v_cvt_f32_f16_e32 v1, v1416; GFX9-NEXT: v_log_f32_e32 v2, v2417; GFX9-NEXT: v_log_f32_e32 v0, v0418; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v3, v2419; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v0420; GFX9-NEXT: v_exp_f32_e32 v1, v2421; GFX9-NEXT: v_exp_f32_e32 v0, v0422; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1423; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0424; GFX9-NEXT: v_pack_b32_f16 v0, v0, v1425; GFX9-NEXT: s_setpc_b64 s[30:31]426;427; GFX90A-LABEL: v_pow_v2f16_fneg_lhs:428; GFX90A: ; %bb.0:429; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)430; GFX90A-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1431; GFX90A-NEXT: v_cvt_f32_f16_e64 v0, -v0432; GFX90A-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1433; GFX90A-NEXT: v_cvt_f32_f16_e32 v1, v1434; GFX90A-NEXT: v_log_f32_e32 v2, v2435; GFX90A-NEXT: v_log_f32_e32 v0, v0436; GFX90A-NEXT: v_mul_legacy_f32 v2, v3, v2437; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v0438; GFX90A-NEXT: v_exp_f32_e32 v1, v2439; GFX90A-NEXT: v_exp_f32_e32 v0, v0440; GFX90A-NEXT: v_cvt_f16_f32_e32 v1, v1441; GFX90A-NEXT: v_cvt_f16_f32_e32 v0, v0442; GFX90A-NEXT: v_pack_b32_f16 v0, v0, v1443; GFX90A-NEXT: s_setpc_b64 s[30:31]444;445; GFX10-LABEL: v_pow_v2f16_fneg_lhs:446; GFX10: ; %bb.0:447; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)448; GFX10-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1449; GFX10-NEXT: v_cvt_f32_f16_e64 v0, -v0450; GFX10-NEXT: v_cvt_f32_f16_sdwa v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1451; GFX10-NEXT: v_cvt_f32_f16_e32 v1, v1452; GFX10-NEXT: v_log_f32_e32 v2, v2453; GFX10-NEXT: v_log_f32_e32 v0, v0454; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v3, v2455; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v0456; GFX10-NEXT: v_exp_f32_e32 v1, v2457; GFX10-NEXT: v_exp_f32_e32 v0, v0458; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1459; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0460; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1461; GFX10-NEXT: s_setpc_b64 s[30:31]462;463; GFX11-TRUE16-LABEL: v_pow_v2f16_fneg_lhs:464; GFX11-TRUE16: ; %bb.0:465; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)466; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, -v0.h467; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v0, -v0.l468; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v3, v1.h469; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v1, v1.l470; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)471; GFX11-TRUE16-NEXT: v_log_f32_e32 v2, v2472; GFX11-TRUE16-NEXT: v_log_f32_e32 v0, v0473; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)474; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2475; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0476; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)477; GFX11-TRUE16-NEXT: v_exp_f32_e32 v1, v2478; GFX11-TRUE16-NEXT: v_exp_f32_e32 v2, v0479; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)480; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v1481; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v2482; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)483; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l484; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]485;486; GFX11-FAKE16-LABEL: v_pow_v2f16_fneg_lhs:487; GFX11-FAKE16: ; %bb.0:488; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)489; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0490; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v0, -v0491; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1492; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v1, v1493; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)494; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v2, -v2495; GFX11-FAKE16-NEXT: v_log_f32_e32 v0, v0496; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)497; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v3, v3498; GFX11-FAKE16-NEXT: v_log_f32_e32 v2, v2499; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)500; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0501; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2502; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)503; GFX11-FAKE16-NEXT: v_exp_f32_e32 v0, v0504; GFX11-FAKE16-NEXT: v_exp_f32_e32 v1, v2505; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)506; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0507; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1508; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)509; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1510; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]511 %x.fneg = fneg <2 x half> %x512 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x.fneg, <2 x half> %y)513 ret <2 x half> %pow514}515 516define <2 x half> @v_pow_v2f16_fneg_rhs(<2 x half> %x, <2 x half> %y) {517; GFX6-LABEL: v_pow_v2f16_fneg_rhs:518; GFX6: ; %bb.0:519; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)520; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v3521; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1522; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0523; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2524; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3525; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1526; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0527; GFX6-NEXT: v_or_b32_e32 v2, v2, v3528; GFX6-NEXT: v_xor_b32_e32 v2, 0x80008000, v2529; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v2530; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2531; GFX6-NEXT: v_log_f32_e32 v0, v0532; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v3533; GFX6-NEXT: v_log_f32_e32 v1, v1534; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v2, v0535; GFX6-NEXT: v_exp_f32_e32 v0, v0536; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v3, v1537; GFX6-NEXT: v_exp_f32_e32 v1, v1538; GFX6-NEXT: s_setpc_b64 s[30:31]539;540; GFX8-LABEL: v_pow_v2f16_fneg_rhs:541; GFX8: ; %bb.0:542; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)543; GFX8-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1544; GFX8-NEXT: v_cvt_f32_f16_e32 v0, v0545; GFX8-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1546; GFX8-NEXT: v_cvt_f32_f16_e64 v1, -v1547; GFX8-NEXT: v_log_f32_e32 v2, v2548; GFX8-NEXT: v_log_f32_e32 v0, v0549; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v3, v2550; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v0551; GFX8-NEXT: v_exp_f32_e32 v1, v2552; GFX8-NEXT: v_exp_f32_e32 v0, v0553; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD554; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0555; GFX8-NEXT: v_or_b32_e32 v0, v0, v1556; GFX8-NEXT: s_setpc_b64 s[30:31]557;558; GFX9-LABEL: v_pow_v2f16_fneg_rhs:559; GFX9: ; %bb.0:560; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)561; GFX9-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1562; GFX9-NEXT: v_cvt_f32_f16_e32 v0, v0563; GFX9-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1564; GFX9-NEXT: v_cvt_f32_f16_e64 v1, -v1565; GFX9-NEXT: v_log_f32_e32 v2, v2566; GFX9-NEXT: v_log_f32_e32 v0, v0567; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v3, v2568; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v0569; GFX9-NEXT: v_exp_f32_e32 v1, v2570; GFX9-NEXT: v_exp_f32_e32 v0, v0571; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1572; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0573; GFX9-NEXT: v_pack_b32_f16 v0, v0, v1574; GFX9-NEXT: s_setpc_b64 s[30:31]575;576; GFX90A-LABEL: v_pow_v2f16_fneg_rhs:577; GFX90A: ; %bb.0:578; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)579; GFX90A-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1580; GFX90A-NEXT: v_cvt_f32_f16_e32 v0, v0581; GFX90A-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1582; GFX90A-NEXT: v_cvt_f32_f16_e64 v1, -v1583; GFX90A-NEXT: v_log_f32_e32 v2, v2584; GFX90A-NEXT: v_log_f32_e32 v0, v0585; GFX90A-NEXT: v_mul_legacy_f32 v2, v3, v2586; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v0587; GFX90A-NEXT: v_exp_f32_e32 v1, v2588; GFX90A-NEXT: v_exp_f32_e32 v0, v0589; GFX90A-NEXT: v_cvt_f16_f32_e32 v1, v1590; GFX90A-NEXT: v_cvt_f16_f32_e32 v0, v0591; GFX90A-NEXT: v_pack_b32_f16 v0, v0, v1592; GFX90A-NEXT: s_setpc_b64 s[30:31]593;594; GFX10-LABEL: v_pow_v2f16_fneg_rhs:595; GFX10: ; %bb.0:596; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; GFX10-NEXT: v_cvt_f32_f16_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1598; GFX10-NEXT: v_cvt_f32_f16_e32 v0, v0599; GFX10-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1600; GFX10-NEXT: v_cvt_f32_f16_e64 v1, -v1601; GFX10-NEXT: v_log_f32_e32 v2, v2602; GFX10-NEXT: v_log_f32_e32 v0, v0603; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v3, v2604; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v0605; GFX10-NEXT: v_exp_f32_e32 v1, v2606; GFX10-NEXT: v_exp_f32_e32 v0, v0607; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1608; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0609; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1610; GFX10-NEXT: s_setpc_b64 s[30:31]611;612; GFX11-TRUE16-LABEL: v_pow_v2f16_fneg_rhs:613; GFX11-TRUE16: ; %bb.0:614; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)615; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v2, v0.h616; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e32 v0, v0.l617; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v3, -v1.h618; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, -v1.l619; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)620; GFX11-TRUE16-NEXT: v_log_f32_e32 v2, v2621; GFX11-TRUE16-NEXT: v_log_f32_e32 v0, v0622; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)623; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2624; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0625; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)626; GFX11-TRUE16-NEXT: v_exp_f32_e32 v1, v2627; GFX11-TRUE16-NEXT: v_exp_f32_e32 v2, v0628; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)629; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v1630; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v2631; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)632; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l633; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]634;635; GFX11-FAKE16-LABEL: v_pow_v2f16_fneg_rhs:636; GFX11-FAKE16: ; %bb.0:637; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)638; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0639; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v0, v0640; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1641; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, -v1642; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)643; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e32 v2, v2644; GFX11-FAKE16-NEXT: v_log_f32_e32 v0, v0645; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)646; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v3, -v3647; GFX11-FAKE16-NEXT: v_log_f32_e32 v2, v2648; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)649; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0650; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2651; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)652; GFX11-FAKE16-NEXT: v_exp_f32_e32 v0, v0653; GFX11-FAKE16-NEXT: v_exp_f32_e32 v1, v2654; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)655; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0656; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1657; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)658; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1659; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]660 %y.fneg = fneg <2 x half> %y661 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x, <2 x half> %y.fneg)662 ret <2 x half> %pow663}664 665define <2 x half> @v_pow_v2f16_fneg_lhs_rhs(<2 x half> %x, <2 x half> %y) {666; GFX6-LABEL: v_pow_v2f16_fneg_lhs_rhs:667; GFX6: ; %bb.0:668; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)669; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1670; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0671; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v3672; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2673; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1674; GFX6-NEXT: v_or_b32_e32 v0, v0, v1675; GFX6-NEXT: v_xor_b32_e32 v0, 0x80008000, v0676; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v0677; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3678; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1679; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0680; GFX6-NEXT: v_or_b32_e32 v2, v2, v3681; GFX6-NEXT: v_xor_b32_e32 v2, 0x80008000, v2682; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v2683; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2684; GFX6-NEXT: v_log_f32_e32 v0, v0685; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v3686; GFX6-NEXT: v_log_f32_e32 v1, v1687; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v2, v0688; GFX6-NEXT: v_exp_f32_e32 v0, v0689; GFX6-NEXT: v_mul_legacy_f32_e32 v1, v3, v1690; GFX6-NEXT: v_exp_f32_e32 v1, v1691; GFX6-NEXT: s_setpc_b64 s[30:31]692;693; GFX8-LABEL: v_pow_v2f16_fneg_lhs_rhs:694; GFX8: ; %bb.0:695; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)696; GFX8-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1697; GFX8-NEXT: v_cvt_f32_f16_e64 v0, -v0698; GFX8-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1699; GFX8-NEXT: v_cvt_f32_f16_e64 v1, -v1700; GFX8-NEXT: v_log_f32_e32 v2, v2701; GFX8-NEXT: v_log_f32_e32 v0, v0702; GFX8-NEXT: v_mul_legacy_f32_e32 v2, v3, v2703; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v0704; GFX8-NEXT: v_exp_f32_e32 v1, v2705; GFX8-NEXT: v_exp_f32_e32 v0, v0706; GFX8-NEXT: v_cvt_f16_f32_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD707; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0708; GFX8-NEXT: v_or_b32_e32 v0, v0, v1709; GFX8-NEXT: s_setpc_b64 s[30:31]710;711; GFX9-LABEL: v_pow_v2f16_fneg_lhs_rhs:712; GFX9: ; %bb.0:713; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)714; GFX9-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1715; GFX9-NEXT: v_cvt_f32_f16_e64 v0, -v0716; GFX9-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1717; GFX9-NEXT: v_cvt_f32_f16_e64 v1, -v1718; GFX9-NEXT: v_log_f32_e32 v2, v2719; GFX9-NEXT: v_log_f32_e32 v0, v0720; GFX9-NEXT: v_mul_legacy_f32_e32 v2, v3, v2721; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v0722; GFX9-NEXT: v_exp_f32_e32 v1, v2723; GFX9-NEXT: v_exp_f32_e32 v0, v0724; GFX9-NEXT: v_cvt_f16_f32_e32 v1, v1725; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0726; GFX9-NEXT: v_pack_b32_f16 v0, v0, v1727; GFX9-NEXT: s_setpc_b64 s[30:31]728;729; GFX90A-LABEL: v_pow_v2f16_fneg_lhs_rhs:730; GFX90A: ; %bb.0:731; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)732; GFX90A-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1733; GFX90A-NEXT: v_cvt_f32_f16_e64 v0, -v0734; GFX90A-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1735; GFX90A-NEXT: v_cvt_f32_f16_e64 v1, -v1736; GFX90A-NEXT: v_log_f32_e32 v2, v2737; GFX90A-NEXT: v_log_f32_e32 v0, v0738; GFX90A-NEXT: v_mul_legacy_f32 v2, v3, v2739; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v0740; GFX90A-NEXT: v_exp_f32_e32 v1, v2741; GFX90A-NEXT: v_exp_f32_e32 v0, v0742; GFX90A-NEXT: v_cvt_f16_f32_e32 v1, v1743; GFX90A-NEXT: v_cvt_f16_f32_e32 v0, v0744; GFX90A-NEXT: v_pack_b32_f16 v0, v0, v1745; GFX90A-NEXT: s_setpc_b64 s[30:31]746;747; GFX10-LABEL: v_pow_v2f16_fneg_lhs_rhs:748; GFX10: ; %bb.0:749; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)750; GFX10-NEXT: v_cvt_f32_f16_sdwa v2, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1751; GFX10-NEXT: v_cvt_f32_f16_e64 v0, -v0752; GFX10-NEXT: v_cvt_f32_f16_sdwa v3, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1753; GFX10-NEXT: v_cvt_f32_f16_e64 v1, -v1754; GFX10-NEXT: v_log_f32_e32 v2, v2755; GFX10-NEXT: v_log_f32_e32 v0, v0756; GFX10-NEXT: v_mul_legacy_f32_e32 v2, v3, v2757; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v0758; GFX10-NEXT: v_exp_f32_e32 v1, v2759; GFX10-NEXT: v_exp_f32_e32 v0, v0760; GFX10-NEXT: v_cvt_f16_f32_e32 v1, v1761; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0762; GFX10-NEXT: v_pack_b32_f16 v0, v0, v1763; GFX10-NEXT: s_setpc_b64 s[30:31]764;765; GFX11-TRUE16-LABEL: v_pow_v2f16_fneg_lhs_rhs:766; GFX11-TRUE16: ; %bb.0:767; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)768; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v2, -v0.h769; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v0, -v0.l770; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v3, -v1.h771; GFX11-TRUE16-NEXT: v_cvt_f32_f16_e64 v1, -v1.l772; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)773; GFX11-TRUE16-NEXT: v_log_f32_e32 v2, v2774; GFX11-TRUE16-NEXT: v_log_f32_e32 v0, v0775; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)776; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2777; GFX11-TRUE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0778; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)779; GFX11-TRUE16-NEXT: v_exp_f32_e32 v1, v2780; GFX11-TRUE16-NEXT: v_exp_f32_e32 v2, v0781; GFX11-TRUE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)782; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v1783; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v2784; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)785; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l786; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]787;788; GFX11-FAKE16-LABEL: v_pow_v2f16_fneg_lhs_rhs:789; GFX11-FAKE16: ; %bb.0:790; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)791; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0792; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v0, -v0793; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1794; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v1, -v1795; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)796; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v2, -v2797; GFX11-FAKE16-NEXT: v_log_f32_e32 v0, v0798; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)799; GFX11-FAKE16-NEXT: v_cvt_f32_f16_e64 v3, -v3800; GFX11-FAKE16-NEXT: v_log_f32_e32 v2, v2801; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)802; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0803; GFX11-FAKE16-NEXT: v_mul_dx9_zero_f32_e32 v2, v3, v2804; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)805; GFX11-FAKE16-NEXT: v_exp_f32_e32 v0, v0806; GFX11-FAKE16-NEXT: v_exp_f32_e32 v1, v2807; GFX11-FAKE16-NEXT: s_waitcnt_depctr depctr_va_vdst(0)808; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0809; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1810; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)811; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1812; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]813 %x.fneg = fneg <2 x half> %x814 %y.fneg = fneg <2 x half> %y815 %pow = call <2 x half> @llvm.pow.v2f16(<2 x half> %x.fneg, <2 x half> %y.fneg)816 ret <2 x half> %pow817}818 819; FIXME820; define double @v_pow_f64(double %x, double %y) {821; %pow = call double @llvm.pow.f64(double %x, double %y)822; ret double %pow823; }824 825define float @v_pow_f32_fabs_lhs(float %x, float %y) {826; GFX6-LABEL: v_pow_f32_fabs_lhs:827; GFX6: ; %bb.0:828; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)829; GFX6-NEXT: v_log_f32_e64 v0, |v0|830; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v1, v0831; GFX6-NEXT: v_exp_f32_e32 v0, v0832; GFX6-NEXT: s_setpc_b64 s[30:31]833;834; GFX8-LABEL: v_pow_f32_fabs_lhs:835; GFX8: ; %bb.0:836; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)837; GFX8-NEXT: v_log_f32_e64 v0, |v0|838; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v1, v0839; GFX8-NEXT: v_exp_f32_e32 v0, v0840; GFX8-NEXT: s_setpc_b64 s[30:31]841;842; GFX9-LABEL: v_pow_f32_fabs_lhs:843; GFX9: ; %bb.0:844; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)845; GFX9-NEXT: v_log_f32_e64 v0, |v0|846; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v1, v0847; GFX9-NEXT: v_exp_f32_e32 v0, v0848; GFX9-NEXT: s_setpc_b64 s[30:31]849;850; GFX90A-LABEL: v_pow_f32_fabs_lhs:851; GFX90A: ; %bb.0:852; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)853; GFX90A-NEXT: v_log_f32_e64 v0, |v0|854; GFX90A-NEXT: v_mul_legacy_f32 v0, v1, v0855; GFX90A-NEXT: v_exp_f32_e32 v0, v0856; GFX90A-NEXT: s_setpc_b64 s[30:31]857;858; GFX10-LABEL: v_pow_f32_fabs_lhs:859; GFX10: ; %bb.0:860; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)861; GFX10-NEXT: v_log_f32_e64 v0, |v0|862; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v1, v0863; GFX10-NEXT: v_exp_f32_e32 v0, v0864; GFX10-NEXT: s_setpc_b64 s[30:31]865;866; GFX11-LABEL: v_pow_f32_fabs_lhs:867; GFX11: ; %bb.0:868; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)869; GFX11-NEXT: v_log_f32_e64 v0, |v0|870; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)871; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v1, v0872; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)873; GFX11-NEXT: v_exp_f32_e32 v0, v0874; GFX11-NEXT: s_setpc_b64 s[30:31]875 %fabs.x = call float @llvm.fabs.f32(float %x)876 %pow = call float @llvm.pow.f32(float %fabs.x, float %y)877 ret float %pow878}879 880define float @v_pow_f32_fabs_rhs(float %x, float %y) {881; GFX6-LABEL: v_pow_f32_fabs_rhs:882; GFX6: ; %bb.0:883; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)884; GFX6-NEXT: v_log_f32_e32 v0, v0885; GFX6-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0886; GFX6-NEXT: v_exp_f32_e32 v0, v0887; GFX6-NEXT: s_setpc_b64 s[30:31]888;889; GFX8-LABEL: v_pow_f32_fabs_rhs:890; GFX8: ; %bb.0:891; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)892; GFX8-NEXT: v_log_f32_e32 v0, v0893; GFX8-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0894; GFX8-NEXT: v_exp_f32_e32 v0, v0895; GFX8-NEXT: s_setpc_b64 s[30:31]896;897; GFX9-LABEL: v_pow_f32_fabs_rhs:898; GFX9: ; %bb.0:899; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; GFX9-NEXT: v_log_f32_e32 v0, v0901; GFX9-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0902; GFX9-NEXT: v_exp_f32_e32 v0, v0903; GFX9-NEXT: s_setpc_b64 s[30:31]904;905; GFX90A-LABEL: v_pow_f32_fabs_rhs:906; GFX90A: ; %bb.0:907; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)908; GFX90A-NEXT: v_log_f32_e32 v0, v0909; GFX90A-NEXT: v_mul_legacy_f32 v0, |v1|, v0910; GFX90A-NEXT: v_exp_f32_e32 v0, v0911; GFX90A-NEXT: s_setpc_b64 s[30:31]912;913; GFX10-LABEL: v_pow_f32_fabs_rhs:914; GFX10: ; %bb.0:915; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)916; GFX10-NEXT: v_log_f32_e32 v0, v0917; GFX10-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0918; GFX10-NEXT: v_exp_f32_e32 v0, v0919; GFX10-NEXT: s_setpc_b64 s[30:31]920;921; GFX11-LABEL: v_pow_f32_fabs_rhs:922; GFX11: ; %bb.0:923; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)924; GFX11-NEXT: v_log_f32_e32 v0, v0925; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)926; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, |v1|, v0927; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)928; GFX11-NEXT: v_exp_f32_e32 v0, v0929; GFX11-NEXT: s_setpc_b64 s[30:31]930 %fabs.y = call float @llvm.fabs.f32(float %y)931 %pow = call float @llvm.pow.f32(float %x, float %fabs.y)932 ret float %pow933}934 935define float @v_pow_f32_fabs_lhs_rhs(float %x, float %y) {936; GFX6-LABEL: v_pow_f32_fabs_lhs_rhs:937; GFX6: ; %bb.0:938; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GFX6-NEXT: v_log_f32_e64 v0, |v0|940; GFX6-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0941; GFX6-NEXT: v_exp_f32_e32 v0, v0942; GFX6-NEXT: s_setpc_b64 s[30:31]943;944; GFX8-LABEL: v_pow_f32_fabs_lhs_rhs:945; GFX8: ; %bb.0:946; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)947; GFX8-NEXT: v_log_f32_e64 v0, |v0|948; GFX8-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0949; GFX8-NEXT: v_exp_f32_e32 v0, v0950; GFX8-NEXT: s_setpc_b64 s[30:31]951;952; GFX9-LABEL: v_pow_f32_fabs_lhs_rhs:953; GFX9: ; %bb.0:954; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)955; GFX9-NEXT: v_log_f32_e64 v0, |v0|956; GFX9-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0957; GFX9-NEXT: v_exp_f32_e32 v0, v0958; GFX9-NEXT: s_setpc_b64 s[30:31]959;960; GFX90A-LABEL: v_pow_f32_fabs_lhs_rhs:961; GFX90A: ; %bb.0:962; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)963; GFX90A-NEXT: v_log_f32_e64 v0, |v0|964; GFX90A-NEXT: v_mul_legacy_f32 v0, |v1|, v0965; GFX90A-NEXT: v_exp_f32_e32 v0, v0966; GFX90A-NEXT: s_setpc_b64 s[30:31]967;968; GFX10-LABEL: v_pow_f32_fabs_lhs_rhs:969; GFX10: ; %bb.0:970; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)971; GFX10-NEXT: v_log_f32_e64 v0, |v0|972; GFX10-NEXT: v_mul_legacy_f32_e64 v0, |v1|, v0973; GFX10-NEXT: v_exp_f32_e32 v0, v0974; GFX10-NEXT: s_setpc_b64 s[30:31]975;976; GFX11-LABEL: v_pow_f32_fabs_lhs_rhs:977; GFX11: ; %bb.0:978; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)979; GFX11-NEXT: v_log_f32_e64 v0, |v0|980; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)981; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, |v1|, v0982; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)983; GFX11-NEXT: v_exp_f32_e32 v0, v0984; GFX11-NEXT: s_setpc_b64 s[30:31]985 %fabs.x = call float @llvm.fabs.f32(float %x)986 %fabs.y = call float @llvm.fabs.f32(float %y)987 %pow = call float @llvm.pow.f32(float %fabs.x, float %fabs.y)988 ret float %pow989}990 991define amdgpu_ps float @v_pow_f32_sgpr_vgpr(float inreg %x, float %y) {992; GFX6-LABEL: v_pow_f32_sgpr_vgpr:993; GFX6: ; %bb.0:994; GFX6-NEXT: v_log_f32_e32 v1, s0995; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v1996; GFX6-NEXT: v_exp_f32_e32 v0, v0997; GFX6-NEXT: ; return to shader part epilog998;999; GFX8-LABEL: v_pow_f32_sgpr_vgpr:1000; GFX8: ; %bb.0:1001; GFX8-NEXT: v_log_f32_e32 v1, s01002; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v11003; GFX8-NEXT: v_exp_f32_e32 v0, v01004; GFX8-NEXT: ; return to shader part epilog1005;1006; GFX9-LABEL: v_pow_f32_sgpr_vgpr:1007; GFX9: ; %bb.0:1008; GFX9-NEXT: v_log_f32_e32 v1, s01009; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v11010; GFX9-NEXT: v_exp_f32_e32 v0, v01011; GFX9-NEXT: ; return to shader part epilog1012;1013; GFX90A-LABEL: v_pow_f32_sgpr_vgpr:1014; GFX90A: ; %bb.0:1015; GFX90A-NEXT: v_log_f32_e32 v1, s01016; GFX90A-NEXT: v_mul_legacy_f32 v0, v0, v11017; GFX90A-NEXT: v_exp_f32_e32 v0, v01018; GFX90A-NEXT: ; return to shader part epilog1019;1020; GFX10-LABEL: v_pow_f32_sgpr_vgpr:1021; GFX10: ; %bb.0:1022; GFX10-NEXT: v_log_f32_e32 v1, s01023; GFX10-NEXT: v_mul_legacy_f32_e32 v0, v0, v11024; GFX10-NEXT: v_exp_f32_e32 v0, v01025; GFX10-NEXT: ; return to shader part epilog1026;1027; GFX11-LABEL: v_pow_f32_sgpr_vgpr:1028; GFX11: ; %bb.0:1029; GFX11-NEXT: v_log_f32_e32 v1, s01030; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1031; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v11032; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1033; GFX11-NEXT: v_exp_f32_e32 v0, v01034; GFX11-NEXT: ; return to shader part epilog1035 %pow = call float @llvm.pow.f32(float %x, float %y)1036 ret float %pow1037}1038 1039define amdgpu_ps float @v_pow_f32_vgpr_sgpr(float %x, float inreg %y) {1040; GFX6-LABEL: v_pow_f32_vgpr_sgpr:1041; GFX6: ; %bb.0:1042; GFX6-NEXT: v_log_f32_e32 v0, v01043; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s0, v01044; GFX6-NEXT: v_exp_f32_e32 v0, v01045; GFX6-NEXT: ; return to shader part epilog1046;1047; GFX8-LABEL: v_pow_f32_vgpr_sgpr:1048; GFX8: ; %bb.0:1049; GFX8-NEXT: v_log_f32_e32 v0, v01050; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s0, v01051; GFX8-NEXT: v_exp_f32_e32 v0, v01052; GFX8-NEXT: ; return to shader part epilog1053;1054; GFX9-LABEL: v_pow_f32_vgpr_sgpr:1055; GFX9: ; %bb.0:1056; GFX9-NEXT: v_log_f32_e32 v0, v01057; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s0, v01058; GFX9-NEXT: v_exp_f32_e32 v0, v01059; GFX9-NEXT: ; return to shader part epilog1060;1061; GFX90A-LABEL: v_pow_f32_vgpr_sgpr:1062; GFX90A: ; %bb.0:1063; GFX90A-NEXT: v_log_f32_e32 v0, v01064; GFX90A-NEXT: v_mul_legacy_f32 v0, s0, v01065; GFX90A-NEXT: v_exp_f32_e32 v0, v01066; GFX90A-NEXT: ; return to shader part epilog1067;1068; GFX10-LABEL: v_pow_f32_vgpr_sgpr:1069; GFX10: ; %bb.0:1070; GFX10-NEXT: v_log_f32_e32 v0, v01071; GFX10-NEXT: v_mul_legacy_f32_e32 v0, s0, v01072; GFX10-NEXT: v_exp_f32_e32 v0, v01073; GFX10-NEXT: ; return to shader part epilog1074;1075; GFX11-LABEL: v_pow_f32_vgpr_sgpr:1076; GFX11: ; %bb.0:1077; GFX11-NEXT: v_log_f32_e32 v0, v01078; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1079; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, s0, v01080; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1081; GFX11-NEXT: v_exp_f32_e32 v0, v01082; GFX11-NEXT: ; return to shader part epilog1083 %pow = call float @llvm.pow.f32(float %x, float %y)1084 ret float %pow1085}1086 1087define amdgpu_ps float @v_pow_f32_sgpr_sgpr(float inreg %x, float inreg %y) {1088; GFX6-LABEL: v_pow_f32_sgpr_sgpr:1089; GFX6: ; %bb.0:1090; GFX6-NEXT: v_log_f32_e32 v0, s01091; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s1, v01092; GFX6-NEXT: v_exp_f32_e32 v0, v01093; GFX6-NEXT: ; return to shader part epilog1094;1095; GFX8-LABEL: v_pow_f32_sgpr_sgpr:1096; GFX8: ; %bb.0:1097; GFX8-NEXT: v_log_f32_e32 v0, s01098; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s1, v01099; GFX8-NEXT: v_exp_f32_e32 v0, v01100; GFX8-NEXT: ; return to shader part epilog1101;1102; GFX9-LABEL: v_pow_f32_sgpr_sgpr:1103; GFX9: ; %bb.0:1104; GFX9-NEXT: v_log_f32_e32 v0, s01105; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s1, v01106; GFX9-NEXT: v_exp_f32_e32 v0, v01107; GFX9-NEXT: ; return to shader part epilog1108;1109; GFX90A-LABEL: v_pow_f32_sgpr_sgpr:1110; GFX90A: ; %bb.0:1111; GFX90A-NEXT: v_log_f32_e32 v0, s01112; GFX90A-NEXT: v_mul_legacy_f32 v0, s1, v01113; GFX90A-NEXT: v_exp_f32_e32 v0, v01114; GFX90A-NEXT: ; return to shader part epilog1115;1116; GFX10-LABEL: v_pow_f32_sgpr_sgpr:1117; GFX10: ; %bb.0:1118; GFX10-NEXT: v_log_f32_e32 v0, s01119; GFX10-NEXT: v_mul_legacy_f32_e32 v0, s1, v01120; GFX10-NEXT: v_exp_f32_e32 v0, v01121; GFX10-NEXT: ; return to shader part epilog1122;1123; GFX11-LABEL: v_pow_f32_sgpr_sgpr:1124; GFX11: ; %bb.0:1125; GFX11-NEXT: v_log_f32_e32 v0, s01126; GFX11-NEXT: s_waitcnt_depctr depctr_va_vdst(0)1127; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, s1, v01128; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)1129; GFX11-NEXT: v_exp_f32_e32 v0, v01130; GFX11-NEXT: ; return to shader part epilog1131 %pow = call float @llvm.pow.f32(float %x, float %y)1132 ret float %pow1133}1134 1135declare half @llvm.pow.f16(half, half)1136declare float @llvm.pow.f32(float, float)1137declare double @llvm.pow.f64(double, double)1138 1139declare half @llvm.fabs.f16(half)1140declare float @llvm.fabs.f32(float)1141 1142declare <2 x half> @llvm.pow.v2f16(<2 x half>, <2 x half>)1143declare <2 x float> @llvm.pow.v2f32(<2 x float>, <2 x float>)1144