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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,SDAG,GCN-IEEE,SDAG-IEEE %s3; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,GISEL,GCN-IEEE,GISEL-IEEE %s4 5; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,SDAG,GCN-DAZ,SDAG-DAZ %s6; RUN: llc -global-isel=1 -mtriple=amdgcn -mcpu=tahiti -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=GCN,GISEL,GCN-DAZ,GISEL-DAZ %s7 8define float @v_sqrt_f32(float %x) {9; SDAG-IEEE-LABEL: v_sqrt_f32:10; SDAG-IEEE: ; %bb.0:11; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf80000013; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v014; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v015; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc16; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v017; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v118; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v019; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v320; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]21; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v122; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v023; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v124; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]25; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v126; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc27; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x26028; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v229; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc30; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]31;32; GISEL-IEEE-LABEL: v_sqrt_f32:33; GISEL-IEEE: ; %bb.0:34; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf80000036; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v037; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v138; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc39; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v040; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v141; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v042; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v143; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v044; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v345; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]46; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v547; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]48; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v149; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc50; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x26051; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v252; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc53; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]54;55; SDAG-DAZ-LABEL: v_sqrt_f32:56; SDAG-DAZ: ; %bb.0:57; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)58; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf80000059; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v060; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v061; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc62; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v063; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v164; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v165; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.566; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v267; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v068; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v169; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v270; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v171; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc72; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x26073; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v274; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc75; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]76;77; GISEL-DAZ-LABEL: v_sqrt_f32:78; GISEL-DAZ: ; %bb.0:79; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)80; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf80000081; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v082; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v183; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc84; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v085; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v186; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v187; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.588; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v289; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v190; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v091; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v292; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v193; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc94; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x26095; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v296; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc97; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]98 %result = call float @llvm.sqrt.f32(float %x)99 ret float %result100}101 102define float @v_sqrt_f32_fneg(float %x) {103; SDAG-IEEE-LABEL: v_sqrt_f32_fneg:104; SDAG-IEEE: ; %bb.0:105; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)106; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8f800000107; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0xcf800000, v0108; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0109; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, -v0, v1, vcc110; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0111; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1112; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0113; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3114; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]115; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1116; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0117; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1118; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]119; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1120; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc121; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260122; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2123; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc124; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]125;126; GISEL-IEEE-LABEL: v_sqrt_f32_fneg:127; GISEL-IEEE: ; %bb.0:128; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)129; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000130; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x4f800000131; GISEL-IEEE-NEXT: v_mul_f32_e64 v2, -v0, v2132; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v1133; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, -v0, v2, vcc134; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0135; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1136; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0137; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1138; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0139; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3140; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]141; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5142; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]143; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1144; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc145; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260146; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2147; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc148; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]149;150; SDAG-DAZ-LABEL: v_sqrt_f32_fneg:151; SDAG-DAZ: ; %bb.0:152; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)153; SDAG-DAZ-NEXT: s_mov_b32 s4, 0x8f800000154; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0xcf800000, v0155; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s4, v0156; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v0, -v0, v1, vcc157; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0158; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1159; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1160; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5161; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2162; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0163; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1164; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2165; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1166; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc167; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260168; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2169; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc170; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]171;172; GISEL-DAZ-LABEL: v_sqrt_f32_fneg:173; GISEL-DAZ: ; %bb.0:174; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)175; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000176; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x4f800000177; GISEL-DAZ-NEXT: v_mul_f32_e64 v2, -v0, v2178; GISEL-DAZ-NEXT: v_cmp_lt_f32_e64 vcc, -v0, v1179; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v0, -v0, v2, vcc180; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0181; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1182; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1183; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5184; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2185; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1186; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0187; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2188; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1189; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc190; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260191; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2192; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc193; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]194 %x.neg = fneg float %x195 %result = call float @llvm.sqrt.f32(float %x.neg)196 ret float %result197}198 199define float @v_sqrt_f32_fabs(float %x) {200; SDAG-IEEE-LABEL: v_sqrt_f32_fabs:201; SDAG-IEEE: ; %bb.0:202; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)203; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf800000204; SDAG-IEEE-NEXT: s_mov_b32 s5, 0x4f800000205; SDAG-IEEE-NEXT: v_mul_f32_e64 v1, |v0|, s5206; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4207; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, |v0|, v1, vcc208; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0209; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1210; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0211; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3212; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]213; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1214; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0215; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1216; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]217; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1218; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc219; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260220; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2221; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc222; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]223;224; GISEL-IEEE-LABEL: v_sqrt_f32_fabs:225; GISEL-IEEE: ; %bb.0:226; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)227; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000228; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x4f800000229; GISEL-IEEE-NEXT: v_mul_f32_e64 v2, |v0|, v2230; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1231; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, |v0|, v2, vcc232; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0233; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1234; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0235; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1236; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0237; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3238; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]239; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5240; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]241; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1242; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc243; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260244; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2245; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc246; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]247;248; SDAG-DAZ-LABEL: v_sqrt_f32_fabs:249; SDAG-DAZ: ; %bb.0:250; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)251; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf800000252; SDAG-DAZ-NEXT: s_mov_b32 s5, 0x4f800000253; SDAG-DAZ-NEXT: v_mul_f32_e64 v1, |v0|, s5254; SDAG-DAZ-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4255; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v0, |v0|, v1, vcc256; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0257; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1258; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1259; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5260; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2261; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0262; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1263; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2264; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1265; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc266; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260267; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2268; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc269; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]270;271; GISEL-DAZ-LABEL: v_sqrt_f32_fabs:272; GISEL-DAZ: ; %bb.0:273; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)274; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000275; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x4f800000276; GISEL-DAZ-NEXT: v_mul_f32_e64 v2, |v0|, v2277; GISEL-DAZ-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1278; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v0, |v0|, v2, vcc279; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0280; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1281; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1282; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5283; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2284; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1285; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0286; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2287; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1288; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc289; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260290; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2291; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc292; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]293 %x.fabs = call float @llvm.fabs.f32(float %x)294 %result = call float @llvm.sqrt.f32(float %x.fabs)295 ret float %result296}297 298define float @v_sqrt_f32_fneg_fabs(float %x) {299; SDAG-IEEE-LABEL: v_sqrt_f32_fneg_fabs:300; SDAG-IEEE: ; %bb.0:301; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)302; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8f800000303; SDAG-IEEE-NEXT: s_mov_b32 s5, 0xcf800000304; SDAG-IEEE-NEXT: v_mul_f32_e64 v1, |v0|, s5305; SDAG-IEEE-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s4306; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, -|v0|, v1, vcc307; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0308; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1309; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0310; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3311; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]312; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1313; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0314; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1315; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]316; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1317; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc318; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260319; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2320; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc321; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]322;323; GISEL-IEEE-LABEL: v_sqrt_f32_fneg_fabs:324; GISEL-IEEE: ; %bb.0:325; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)326; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000327; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x4f800000328; GISEL-IEEE-NEXT: v_mul_f32_e64 v2, -|v0|, v2329; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v1330; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, -|v0|, v2, vcc331; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0332; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1333; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0334; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1335; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0336; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3337; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]338; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5339; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]340; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1341; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc342; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260343; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2344; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc345; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]346;347; SDAG-DAZ-LABEL: v_sqrt_f32_fneg_fabs:348; SDAG-DAZ: ; %bb.0:349; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)350; SDAG-DAZ-NEXT: s_mov_b32 s4, 0x8f800000351; SDAG-DAZ-NEXT: s_mov_b32 s5, 0xcf800000352; SDAG-DAZ-NEXT: v_mul_f32_e64 v1, |v0|, s5353; SDAG-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s4354; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v0, -|v0|, v1, vcc355; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0356; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1357; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1358; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5359; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2360; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0361; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1362; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2363; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1364; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc365; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260366; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2367; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc368; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]369;370; GISEL-DAZ-LABEL: v_sqrt_f32_fneg_fabs:371; GISEL-DAZ: ; %bb.0:372; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)373; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000374; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x4f800000375; GISEL-DAZ-NEXT: v_mul_f32_e64 v2, -|v0|, v2376; GISEL-DAZ-NEXT: v_cmp_lt_f32_e64 vcc, -|v0|, v1377; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v0, -|v0|, v2, vcc378; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0379; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1380; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1381; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5382; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2383; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1384; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0385; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2386; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1387; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc388; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260389; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2390; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc391; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]392 %x.fabs = call float @llvm.fabs.f32(float %x)393 %x.fabs.neg = fneg float %x.fabs394 %result = call float @llvm.sqrt.f32(float %x.fabs.neg)395 ret float %result396}397 398define float @v_sqrt_f32_ninf(float %x) {399; SDAG-IEEE-LABEL: v_sqrt_f32_ninf:400; SDAG-IEEE: ; %bb.0:401; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)402; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf800000403; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0404; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0405; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc406; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0407; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1408; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0409; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3410; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]411; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1412; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0413; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1414; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]415; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1416; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc417; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260418; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2419; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc420; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]421;422; GISEL-IEEE-LABEL: v_sqrt_f32_ninf:423; GISEL-IEEE: ; %bb.0:424; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)425; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000426; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0427; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1428; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc429; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0430; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1431; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0432; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1433; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0434; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3435; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]436; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5437; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]438; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1439; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc440; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260441; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2442; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc443; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]444;445; SDAG-DAZ-LABEL: v_sqrt_f32_ninf:446; SDAG-DAZ: ; %bb.0:447; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)448; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf800000449; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0450; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0451; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc452; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0453; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1454; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1455; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5456; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2457; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0458; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1459; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2460; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1461; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc462; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260463; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2464; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc465; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]466;467; GISEL-DAZ-LABEL: v_sqrt_f32_ninf:468; GISEL-DAZ: ; %bb.0:469; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)470; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000471; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0472; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1473; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc474; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0475; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1476; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1477; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5478; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2479; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1480; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0481; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2482; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1483; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc484; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260485; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2486; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc487; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]488 %result = call ninf float @llvm.sqrt.f32(float %x)489 ret float %result490}491 492define float @v_sqrt_f32_no_infs_attribute(float %x) #5 {493; SDAG-IEEE-LABEL: v_sqrt_f32_no_infs_attribute:494; SDAG-IEEE: ; %bb.0:495; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)496; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf800000497; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0498; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0499; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc500; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0501; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1502; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0503; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3504; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]505; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1506; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0507; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1508; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]509; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1510; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc511; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260512; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2513; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc514; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]515;516; GISEL-IEEE-LABEL: v_sqrt_f32_no_infs_attribute:517; GISEL-IEEE: ; %bb.0:518; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)519; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000520; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0521; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1522; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc523; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0524; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1525; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0526; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1527; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0528; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3529; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]530; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5531; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]532; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1533; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc534; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260535; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2536; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc537; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]538;539; SDAG-DAZ-LABEL: v_sqrt_f32_no_infs_attribute:540; SDAG-DAZ: ; %bb.0:541; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)542; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf800000543; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0544; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0545; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc546; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0547; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1548; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1549; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5550; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2551; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0552; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1553; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2554; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1555; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc556; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260557; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2558; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc559; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]560;561; GISEL-DAZ-LABEL: v_sqrt_f32_no_infs_attribute:562; GISEL-DAZ: ; %bb.0:563; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)564; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000565; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0566; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1567; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc568; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0569; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1570; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1571; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5572; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2573; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1574; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0575; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2576; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1577; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc578; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260579; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2580; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc581; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]582 %result = call ninf float @llvm.sqrt.f32(float %x)583 ret float %result584}585 586define float @v_sqrt_f32_nnan(float %x) {587; SDAG-IEEE-LABEL: v_sqrt_f32_nnan:588; SDAG-IEEE: ; %bb.0:589; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)590; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf800000591; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0592; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0593; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc594; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0595; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1596; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0597; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3598; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]599; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1600; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0601; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1602; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]603; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1604; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc605; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260606; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2607; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc608; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]609;610; GISEL-IEEE-LABEL: v_sqrt_f32_nnan:611; GISEL-IEEE: ; %bb.0:612; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)613; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000614; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0615; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1616; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc617; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0618; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1619; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0620; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1621; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0622; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3623; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]624; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5625; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]626; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1627; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc628; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260629; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2630; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc631; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]632;633; SDAG-DAZ-LABEL: v_sqrt_f32_nnan:634; SDAG-DAZ: ; %bb.0:635; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)636; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf800000637; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0638; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0639; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc640; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0641; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1642; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1643; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5644; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2645; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0646; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1647; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2648; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1649; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc650; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260651; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2652; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc653; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]654;655; GISEL-DAZ-LABEL: v_sqrt_f32_nnan:656; GISEL-DAZ: ; %bb.0:657; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)658; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000659; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0660; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1661; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc662; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0663; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1664; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1665; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5666; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2667; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1668; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0669; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2670; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1671; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc672; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260673; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2674; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc675; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]676 %result = call nnan float @llvm.sqrt.f32(float %x)677 ret float %result678}679 680define amdgpu_ps i32 @s_sqrt_f32(float inreg %x) {681; SDAG-IEEE-LABEL: s_sqrt_f32:682; SDAG-IEEE: ; %bb.0:683; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf800000684; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f800000685; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s0, v1686; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, s0687; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, v0688; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]689; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0690; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v1691; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0692; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v3693; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc694; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v1695; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0696; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v1697; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc698; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1699; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]700; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260701; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2702; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc703; SDAG-IEEE-NEXT: v_readfirstlane_b32 s0, v0704; SDAG-IEEE-NEXT: ; return to shader part epilog705;706; GISEL-IEEE-LABEL: s_sqrt_f32:707; GISEL-IEEE: ; %bb.0:708; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000709; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x4f800000710; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, s0711; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, s0, v2712; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1713; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc714; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0715; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[0:1], -1, v1716; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0717; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], 1, v1718; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0719; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v3720; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]721; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v5722; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1]723; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1724; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc725; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260726; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2727; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc728; GISEL-IEEE-NEXT: v_readfirstlane_b32 s0, v0729; GISEL-IEEE-NEXT: ; return to shader part epilog730;731; SDAG-DAZ-LABEL: s_sqrt_f32:732; SDAG-DAZ: ; %bb.0:733; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf800000734; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f800000735; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s0, v1736; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, s0737; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0738; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc739; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0740; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1741; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1742; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5743; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2744; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0745; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1746; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2747; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1748; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc749; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260750; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2751; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc752; SDAG-DAZ-NEXT: v_readfirstlane_b32 s0, v0753; SDAG-DAZ-NEXT: ; return to shader part epilog754;755; GISEL-DAZ-LABEL: s_sqrt_f32:756; GISEL-DAZ: ; %bb.0:757; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000758; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x4f800000759; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, s0760; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, s0, v2761; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1762; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc763; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0764; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1765; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1766; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5767; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2768; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1769; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0770; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2771; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1772; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc773; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260774; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2775; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc776; GISEL-DAZ-NEXT: v_readfirstlane_b32 s0, v0777; GISEL-DAZ-NEXT: ; return to shader part epilog778 %result = call float @llvm.sqrt.f32(float %x)779 %cast = bitcast float %result to i32780 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)781 ret i32 %firstlane782}783 784define amdgpu_ps i32 @s_sqrt_f32_ninf(float inreg %x) {785; SDAG-IEEE-LABEL: s_sqrt_f32_ninf:786; SDAG-IEEE: ; %bb.0:787; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf800000788; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f800000789; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s0, v1790; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, s0791; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, v0792; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]793; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0794; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v1795; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0796; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v3797; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc798; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v1799; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0800; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v1801; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc802; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1803; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]804; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260805; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2806; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc807; SDAG-IEEE-NEXT: v_readfirstlane_b32 s0, v0808; SDAG-IEEE-NEXT: ; return to shader part epilog809;810; GISEL-IEEE-LABEL: s_sqrt_f32_ninf:811; GISEL-IEEE: ; %bb.0:812; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000813; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x4f800000814; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, s0815; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, s0, v2816; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1817; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc818; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0819; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[0:1], -1, v1820; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0821; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], 1, v1822; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0823; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v3824; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]825; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v5826; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1]827; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1828; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc829; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260830; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2831; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc832; GISEL-IEEE-NEXT: v_readfirstlane_b32 s0, v0833; GISEL-IEEE-NEXT: ; return to shader part epilog834;835; SDAG-DAZ-LABEL: s_sqrt_f32_ninf:836; SDAG-DAZ: ; %bb.0:837; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf800000838; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f800000839; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s0, v1840; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, s0841; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v0842; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc843; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0844; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1845; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1846; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5847; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2848; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0849; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1850; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2851; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1852; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc853; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260854; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2855; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc856; SDAG-DAZ-NEXT: v_readfirstlane_b32 s0, v0857; SDAG-DAZ-NEXT: ; return to shader part epilog858;859; GISEL-DAZ-LABEL: s_sqrt_f32_ninf:860; GISEL-DAZ: ; %bb.0:861; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000862; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x4f800000863; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, s0864; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, s0, v2865; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v1866; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc867; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0868; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1869; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1870; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5871; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2872; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1873; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0874; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2875; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1876; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc877; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260878; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2879; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc880; GISEL-DAZ-NEXT: v_readfirstlane_b32 s0, v0881; GISEL-DAZ-NEXT: ; return to shader part epilog882 %result = call ninf float @llvm.sqrt.f32(float %x)883 %cast = bitcast float %result to i32884 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)885 ret i32 %firstlane886}887 888define amdgpu_ps i32 @s_sqrt_f32_afn(float inreg %x) {889; GCN-LABEL: s_sqrt_f32_afn:890; GCN: ; %bb.0:891; GCN-NEXT: v_sqrt_f32_e32 v0, s0892; GCN-NEXT: v_readfirstlane_b32 s0, v0893; GCN-NEXT: ; return to shader part epilog894 %result = call afn float @llvm.sqrt.f32(float %x)895 %cast = bitcast float %result to i32896 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)897 ret i32 %firstlane898}899 900define amdgpu_ps i32 @s_sqrt_f32_afn_nnan_ninf(float inreg %x) {901; GCN-LABEL: s_sqrt_f32_afn_nnan_ninf:902; GCN: ; %bb.0:903; GCN-NEXT: v_sqrt_f32_e32 v0, s0904; GCN-NEXT: v_readfirstlane_b32 s0, v0905; GCN-NEXT: ; return to shader part epilog906 %result = call afn nnan ninf float @llvm.sqrt.f32(float %x)907 %cast = bitcast float %result to i32908 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)909 ret i32 %firstlane910}911 912define float @v_sqrt_f32_nsz(float %x) {913; SDAG-IEEE-LABEL: v_sqrt_f32_nsz:914; SDAG-IEEE: ; %bb.0:915; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)916; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf800000917; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0918; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0919; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc920; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v0921; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1922; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0923; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3924; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]925; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v1926; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v0927; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v1928; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]929; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1930; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc931; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x260932; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2933; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc934; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]935;936; GISEL-IEEE-LABEL: v_sqrt_f32_nsz:937; GISEL-IEEE: ; %bb.0:938; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf800000940; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0941; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1942; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc943; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v0944; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v1945; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v0946; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v1947; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v0948; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v3949; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]950; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v5951; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]952; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v1953; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc954; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x260955; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v2956; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc957; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]958;959; SDAG-DAZ-LABEL: v_sqrt_f32_nsz:960; SDAG-DAZ: ; %bb.0:961; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)962; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf800000963; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v0964; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v0965; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc966; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v0967; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1968; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1969; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5970; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2971; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v0972; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1973; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v2974; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1975; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc976; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x260977; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v2978; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc979; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]980;981; GISEL-DAZ-LABEL: v_sqrt_f32_nsz:982; GISEL-DAZ: ; %bb.0:983; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)984; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf800000985; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v0986; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1987; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc988; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v0989; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v1990; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v1991; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.5992; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v2993; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v1994; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v0995; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v2996; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v1997; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc998; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x260999; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21000; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1001; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]1002 %result = call nsz float @llvm.sqrt.f32(float %x)1003 ret float %result1004}1005 1006define float @v_sqrt_f32_nnan_ninf(float %x) {1007; SDAG-IEEE-LABEL: v_sqrt_f32_nnan_ninf:1008; SDAG-IEEE: ; %bb.0:1009; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1010; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000001011; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01012; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01013; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1014; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v01015; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11016; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01017; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31018; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]1019; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v11020; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v01021; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v11022; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]1023; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11024; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1025; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601026; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21027; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1028; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1029;1030; GISEL-IEEE-LABEL: v_sqrt_f32_nnan_ninf:1031; GISEL-IEEE: ; %bb.0:1032; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1033; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000001034; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01035; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11036; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1037; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v01038; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11039; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01040; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v11041; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v01042; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31043; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]1044; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v51045; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]1046; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11047; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1048; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601049; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21050; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1051; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1052;1053; SDAG-DAZ-LABEL: v_sqrt_f32_nnan_ninf:1054; SDAG-DAZ: ; %bb.0:1055; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1056; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000001057; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01058; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01059; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1060; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v01061; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v11062; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v11063; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.51064; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v21065; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v01066; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v11067; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v21068; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v11069; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1070; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2601071; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21072; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1073; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]1074;1075; GISEL-DAZ-LABEL: v_sqrt_f32_nnan_ninf:1076; GISEL-DAZ: ; %bb.0:1077; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1078; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000001079; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01080; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11081; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1082; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v01083; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v11084; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v11085; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.51086; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v21087; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v11088; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v01089; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v21090; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v11091; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1092; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2601093; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21094; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1095; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]1096 %result = call nnan ninf float @llvm.sqrt.f32(float %x)1097 ret float %result1098}1099 1100define float @v_sqrt_f32_nnan_ninf_nsz(float %x) {1101; SDAG-IEEE-LABEL: v_sqrt_f32_nnan_ninf_nsz:1102; SDAG-IEEE: ; %bb.0:1103; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1104; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000001105; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01106; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01107; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1108; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v01109; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11110; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01111; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31112; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]1113; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v11114; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v01115; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v11116; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]1117; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11118; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1119; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601120; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21121; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1122; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1123;1124; GISEL-IEEE-LABEL: v_sqrt_f32_nnan_ninf_nsz:1125; GISEL-IEEE: ; %bb.0:1126; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1127; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000001128; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01129; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11130; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1131; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v01132; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11133; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01134; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v11135; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v01136; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31137; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]1138; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v51139; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]1140; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11141; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1142; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601143; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21144; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1145; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1146;1147; SDAG-DAZ-LABEL: v_sqrt_f32_nnan_ninf_nsz:1148; SDAG-DAZ: ; %bb.0:1149; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1150; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000001151; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01152; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01153; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1154; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v01155; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v11156; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v11157; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.51158; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v21159; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v01160; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v11161; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v21162; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v11163; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1164; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2601165; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21166; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1167; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]1168;1169; GISEL-DAZ-LABEL: v_sqrt_f32_nnan_ninf_nsz:1170; GISEL-DAZ: ; %bb.0:1171; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1172; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000001173; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01174; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11175; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1176; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v01177; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v11178; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v11179; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.51180; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v21181; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v11182; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v01183; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v21184; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v11185; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1186; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2601187; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21188; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1189; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]1190 %result = call nnan ninf nsz float @llvm.sqrt.f32(float %x)1191 ret float %result1192}1193 1194define float @v_sqrt_f32_afn(float %x) {1195; GCN-LABEL: v_sqrt_f32_afn:1196; GCN: ; %bb.0:1197; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1198; GCN-NEXT: v_sqrt_f32_e32 v0, v01199; GCN-NEXT: s_setpc_b64 s[30:31]1200 %result = call afn float @llvm.sqrt.f32(float %x)1201 ret float %result1202}1203 1204define float @v_sqrt_f32_afn_nsz(float %x) {1205; GCN-LABEL: v_sqrt_f32_afn_nsz:1206; GCN: ; %bb.0:1207; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1208; GCN-NEXT: v_sqrt_f32_e32 v0, v01209; GCN-NEXT: s_setpc_b64 s[30:31]1210 %result = call afn nsz float @llvm.sqrt.f32(float %x)1211 ret float %result1212}1213 1214define <2 x float> @v_sqrt_v2f32_afn(<2 x float> %x) {1215; GCN-LABEL: v_sqrt_v2f32_afn:1216; GCN: ; %bb.0:1217; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1218; GCN-NEXT: v_sqrt_f32_e32 v0, v01219; GCN-NEXT: v_sqrt_f32_e32 v1, v11220; GCN-NEXT: s_setpc_b64 s[30:31]1221 %result = call afn <2 x float> @llvm.sqrt.v2f32(<2 x float> %x)1222 ret <2 x float> %result1223}1224 1225define float @v_sqrt_f32_afn_nnan(float %x) {1226; GCN-LABEL: v_sqrt_f32_afn_nnan:1227; GCN: ; %bb.0:1228; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1229; GCN-NEXT: v_sqrt_f32_e32 v0, v01230; GCN-NEXT: s_setpc_b64 s[30:31]1231 %result = call afn nnan float @llvm.sqrt.f32(float %x)1232 ret float %result1233}1234 1235define float @v_sqrt_f32_fabs_afn_ninf(float %x) {1236; GCN-LABEL: v_sqrt_f32_fabs_afn_ninf:1237; GCN: ; %bb.0:1238; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1239; GCN-NEXT: v_sqrt_f32_e64 v0, |v0|1240; GCN-NEXT: s_setpc_b64 s[30:31]1241 %fabs = call float @llvm.fabs.f32(float %x)1242 %result = call afn ninf float @llvm.sqrt.f32(float %fabs)1243 ret float %result1244}1245 1246define float @v_sqrt_f32_afn_nnan_ninf(float %x) {1247; GCN-LABEL: v_sqrt_f32_afn_nnan_ninf:1248; GCN: ; %bb.0:1249; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1250; GCN-NEXT: v_sqrt_f32_e32 v0, v01251; GCN-NEXT: s_setpc_b64 s[30:31]1252 %result = call afn nnan ninf float @llvm.sqrt.f32(float %x)1253 ret float %result1254}1255 1256define <2 x float> @v_sqrt_v2f32_afn_nnan_ninf(<2 x float> %x) {1257; GCN-LABEL: v_sqrt_v2f32_afn_nnan_ninf:1258; GCN: ; %bb.0:1259; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1260; GCN-NEXT: v_sqrt_f32_e32 v0, v01261; GCN-NEXT: v_sqrt_f32_e32 v1, v11262; GCN-NEXT: s_setpc_b64 s[30:31]1263 %result = call afn nnan ninf <2 x float> @llvm.sqrt.v2f32(<2 x float> %x)1264 ret <2 x float> %result1265}1266 1267define float @v_sqrt_f32_afn_nnan_ninf_nsz(float %x) {1268; GCN-LABEL: v_sqrt_f32_afn_nnan_ninf_nsz:1269; GCN: ; %bb.0:1270; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1271; GCN-NEXT: v_sqrt_f32_e32 v0, v01272; GCN-NEXT: s_setpc_b64 s[30:31]1273 %result = call afn nnan ninf nsz float @llvm.sqrt.f32(float %x)1274 ret float %result1275}1276 1277define float @v_sqrt_f32__approx_func_fp_math(float %x) {1278; GCN-LABEL: v_sqrt_f32__approx_func_fp_math:1279; GCN: ; %bb.0:1280; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1281; GCN-NEXT: v_sqrt_f32_e32 v0, v01282; GCN-NEXT: s_setpc_b64 s[30:31]1283 %result = call afn nsz float @llvm.sqrt.f32(float %x)1284 ret float %result1285}1286 1287define float @v_sqrt_f32__enough_unsafe_attrs(float %x) #3 {1288; GCN-LABEL: v_sqrt_f32__enough_unsafe_attrs:1289; GCN: ; %bb.0:1290; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1291; GCN-NEXT: v_sqrt_f32_e32 v0, v01292; GCN-NEXT: s_setpc_b64 s[30:31]1293 %result = call afn nsz float @llvm.sqrt.f32(float %x)1294 ret float %result1295}1296 1297define float @v_sqrt_f32__unsafe_attr(float %x) {1298; GCN-LABEL: v_sqrt_f32__unsafe_attr:1299; GCN: ; %bb.0:1300; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1301; GCN-NEXT: v_sqrt_f32_e32 v0, v01302; GCN-NEXT: s_setpc_b64 s[30:31]1303 %result = call afn nsz float @llvm.sqrt.f32(float %x)1304 ret float %result1305}1306 1307define <2 x float> @v_sqrt_v2f32(<2 x float> %x) {1308; SDAG-IEEE-LABEL: v_sqrt_v2f32:1309; SDAG-IEEE: ; %bb.0:1310; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1311; SDAG-IEEE-NEXT: s_mov_b32 s6, 0xf8000001312; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01313; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v01314; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1315; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v2, v01316; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v21317; SDAG-IEEE-NEXT: v_fma_f32 v4, -v3, v2, v01318; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v41319; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v2, v3, s[4:5]1320; SDAG-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v21321; SDAG-IEEE-NEXT: v_fma_f32 v2, -v4, v2, v01322; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v21323; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[4:5]1324; SDAG-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v21325; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1326; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x4f800000, v11327; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v11328; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc1329; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v4, v11330; SDAG-IEEE-NEXT: v_mov_b32_e32 v3, 0x2601331; SDAG-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v31332; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]1333; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v41334; SDAG-IEEE-NEXT: v_fma_f32 v5, -v2, v4, v11335; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v51336; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v4, v2, s[4:5]1337; SDAG-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], 1, v41338; SDAG-IEEE-NEXT: v_fma_f32 v4, -v5, v4, v11339; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v41340; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5]1341; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v21342; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc1343; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v31344; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc1345; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1346;1347; GISEL-IEEE-LABEL: v_sqrt_v2f32:1348; GISEL-IEEE: ; %bb.0:1349; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1350; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0xf8000001351; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x4f800000, v01352; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21353; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc1354; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v3, v01355; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], -1, v31356; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v3, v01357; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v31358; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v3, v01359; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v51360; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[4:5]1361; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v71362; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[4:5]1363; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v31364; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1365; GISEL-IEEE-NEXT: v_mul_f32_e32 v5, 0x4f800000, v11366; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v1, v21367; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc1368; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v2, v11369; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x2601370; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v41371; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[4:5]1372; GISEL-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v21373; GISEL-IEEE-NEXT: v_fma_f32 v5, -v3, v2, v11374; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v21375; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v2, v11376; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v51377; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[4:5]1378; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v71379; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[4:5]1380; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v21381; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1382; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v41383; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc1384; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1385;1386; SDAG-DAZ-LABEL: v_sqrt_v2f32:1387; SDAG-DAZ: ; %bb.0:1388; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1389; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000001390; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01391; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01392; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1393; SDAG-DAZ-NEXT: v_rsq_f32_e32 v2, v01394; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, v0, v21395; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0.5, v21396; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v3, 0.51397; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v4, v31398; SDAG-DAZ-NEXT: v_fma_f32 v5, -v3, v3, v01399; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v4, v21400; SDAG-DAZ-NEXT: v_fma_f32 v2, v5, v2, v31401; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v21402; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1403; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0x4f800000, v11404; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v11405; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc1406; SDAG-DAZ-NEXT: v_rsq_f32_e32 v3, v11407; SDAG-DAZ-NEXT: v_mov_b32_e32 v4, 0x2601408; SDAG-DAZ-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v41409; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]1410; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v1, v31411; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v31412; SDAG-DAZ-NEXT: v_fma_f32 v5, -v3, v2, 0.51413; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v5, v21414; SDAG-DAZ-NEXT: v_fma_f32 v6, -v2, v2, v11415; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v5, v31416; SDAG-DAZ-NEXT: v_fma_f32 v2, v6, v3, v21417; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v21418; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1419; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v1, v41420; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc1421; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]1422;1423; GISEL-DAZ-LABEL: v_sqrt_v2f32:1424; GISEL-DAZ: ; %bb.0:1425; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1426; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0xf8000001427; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0x4f800000, v01428; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v21429; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc1430; GISEL-DAZ-NEXT: v_rsq_f32_e32 v3, v01431; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, v0, v31432; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v31433; GISEL-DAZ-NEXT: v_fma_f32 v5, -v3, v4, 0.51434; GISEL-DAZ-NEXT: v_fma_f32 v4, v4, v5, v41435; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v5, v31436; GISEL-DAZ-NEXT: v_fma_f32 v5, -v4, v4, v01437; GISEL-DAZ-NEXT: v_fma_f32 v3, v5, v3, v41438; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v31439; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1440; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, 0x4f800000, v11441; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v1, v21442; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc1443; GISEL-DAZ-NEXT: v_rsq_f32_e32 v2, v11444; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, 0x2601445; GISEL-DAZ-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v41446; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[4:5]1447; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, v1, v21448; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0.5, v21449; GISEL-DAZ-NEXT: v_fma_f32 v5, -v2, v3, 0.51450; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v5, v31451; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v5, v21452; GISEL-DAZ-NEXT: v_fma_f32 v5, -v3, v3, v11453; GISEL-DAZ-NEXT: v_fma_f32 v2, v5, v2, v31454; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v21455; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1456; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v1, v41457; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc1458; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]1459 %result = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %x)1460 ret <2 x float> %result1461}1462 1463define <3 x float> @v_sqrt_v3f32(<3 x float> %x) {1464; SDAG-IEEE-LABEL: v_sqrt_v3f32:1465; SDAG-IEEE: ; %bb.0:1466; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1467; SDAG-IEEE-NEXT: s_mov_b32 s6, 0xf8000001468; SDAG-IEEE-NEXT: v_mul_f32_e32 v3, 0x4f800000, v01469; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v01470; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc1471; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v3, v01472; SDAG-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], -1, v31473; SDAG-IEEE-NEXT: v_fma_f32 v5, -v4, v3, v01474; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v51475; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, v3, v4, s[4:5]1476; SDAG-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], 1, v31477; SDAG-IEEE-NEXT: v_fma_f32 v3, -v5, v3, v01478; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v31479; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v4, v5, s[4:5]1480; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v31481; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1482; SDAG-IEEE-NEXT: v_mul_f32_e32 v5, 0x4f800000, v11483; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v11484; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc1485; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v5, v11486; SDAG-IEEE-NEXT: v_mov_b32_e32 v4, 0x2601487; SDAG-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v41488; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[4:5]1489; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v51490; SDAG-IEEE-NEXT: v_fma_f32 v6, -v3, v5, v11491; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v61492; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v5, v3, s[4:5]1493; SDAG-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v51494; SDAG-IEEE-NEXT: v_fma_f32 v5, -v6, v5, v11495; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v51496; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[4:5]1497; SDAG-IEEE-NEXT: v_mul_f32_e32 v5, 0x37800000, v31498; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc1499; SDAG-IEEE-NEXT: v_mul_f32_e32 v5, 0x4f800000, v21500; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v21501; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v5, vcc1502; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v5, v21503; SDAG-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v1, v41504; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]1505; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v51506; SDAG-IEEE-NEXT: v_fma_f32 v6, -v3, v5, v21507; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v61508; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v5, v3, s[4:5]1509; SDAG-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v51510; SDAG-IEEE-NEXT: v_fma_f32 v5, -v6, v5, v21511; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v51512; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[4:5]1513; SDAG-IEEE-NEXT: v_mul_f32_e32 v5, 0x37800000, v31514; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc1515; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v2, v41516; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1517; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1518;1519; GISEL-IEEE-LABEL: v_sqrt_v3f32:1520; GISEL-IEEE: ; %bb.0:1521; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1522; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0xf8000001523; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, 0x4f800000, v01524; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v31525; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc1526; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v4, v01527; GISEL-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], -1, v41528; GISEL-IEEE-NEXT: v_fma_f32 v6, -v5, v4, v01529; GISEL-IEEE-NEXT: v_add_i32_e64 v7, s[4:5], 1, v41530; GISEL-IEEE-NEXT: v_fma_f32 v8, -v7, v4, v01531; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v61532; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, v4, v5, s[4:5]1533; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v81534; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5]1535; GISEL-IEEE-NEXT: v_mul_f32_e32 v5, 0x37800000, v41536; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc1537; GISEL-IEEE-NEXT: v_mul_f32_e32 v6, 0x4f800000, v11538; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v1, v31539; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc1540; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v6, v11541; GISEL-IEEE-NEXT: v_mov_b32_e32 v5, 0x2601542; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v51543; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, v4, v0, s[4:5]1544; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], -1, v61545; GISEL-IEEE-NEXT: v_fma_f32 v7, -v4, v6, v11546; GISEL-IEEE-NEXT: v_add_i32_e64 v8, s[4:5], 1, v61547; GISEL-IEEE-NEXT: v_fma_f32 v9, -v8, v6, v11548; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v71549; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, v6, v4, s[4:5]1550; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v91551; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[4:5]1552; GISEL-IEEE-NEXT: v_mul_f32_e32 v6, 0x37800000, v41553; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v4, v4, v6, vcc1554; GISEL-IEEE-NEXT: v_mul_f32_e32 v6, 0x4f800000, v21555; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v2, v31556; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc1557; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v3, v21558; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v1, v51559; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v4, v1, s[4:5]1560; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], -1, v31561; GISEL-IEEE-NEXT: v_fma_f32 v6, -v4, v3, v21562; GISEL-IEEE-NEXT: v_add_i32_e64 v7, s[4:5], 1, v31563; GISEL-IEEE-NEXT: v_fma_f32 v8, -v7, v3, v21564; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v61565; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[4:5]1566; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v81567; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v7, s[4:5]1568; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v31569; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1570; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v2, v51571; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1572; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1573;1574; SDAG-DAZ-LABEL: v_sqrt_v3f32:1575; SDAG-DAZ: ; %bb.0:1576; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1577; SDAG-DAZ-NEXT: s_mov_b32 s6, 0xf8000001578; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0x4f800000, v01579; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s6, v01580; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc1581; SDAG-DAZ-NEXT: v_rsq_f32_e32 v3, v01582; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, v0, v31583; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v31584; SDAG-DAZ-NEXT: v_fma_f32 v5, -v3, v4, 0.51585; SDAG-DAZ-NEXT: v_fma_f32 v4, v4, v5, v41586; SDAG-DAZ-NEXT: v_fma_f32 v6, -v4, v4, v01587; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v5, v31588; SDAG-DAZ-NEXT: v_fma_f32 v3, v6, v3, v41589; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v31590; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1591; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0x4f800000, v11592; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s6, v11593; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc1594; SDAG-DAZ-NEXT: v_rsq_f32_e32 v4, v11595; SDAG-DAZ-NEXT: v_mov_b32_e32 v5, 0x2601596; SDAG-DAZ-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v51597; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[4:5]1598; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, v1, v41599; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0.5, v41600; SDAG-DAZ-NEXT: v_fma_f32 v6, -v4, v3, 0.51601; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v6, v31602; SDAG-DAZ-NEXT: v_fma_f32 v4, v4, v6, v41603; SDAG-DAZ-NEXT: v_mul_f32_e32 v6, 0x4f800000, v21604; SDAG-DAZ-NEXT: v_cmp_gt_f32_e64 s[4:5], s6, v21605; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[4:5]1606; SDAG-DAZ-NEXT: v_fma_f32 v7, -v3, v3, v11607; SDAG-DAZ-NEXT: v_rsq_f32_e32 v6, v21608; SDAG-DAZ-NEXT: v_fma_f32 v3, v7, v4, v31609; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v31610; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc1611; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v1, v51612; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc1613; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, v2, v61614; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0.5, v61615; SDAG-DAZ-NEXT: v_fma_f32 v6, -v4, v3, 0.51616; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v6, v31617; SDAG-DAZ-NEXT: v_fma_f32 v7, -v3, v3, v21618; SDAG-DAZ-NEXT: v_fma_f32 v4, v4, v6, v41619; SDAG-DAZ-NEXT: v_fma_f32 v3, v7, v4, v31620; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v31621; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[4:5]1622; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v2, v51623; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1624; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]1625;1626; GISEL-DAZ-LABEL: v_sqrt_v3f32:1627; GISEL-DAZ: ; %bb.0:1628; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1629; GISEL-DAZ-NEXT: v_mov_b32_e32 v3, 0xf8000001630; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, 0x4f800000, v01631; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v31632; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc1633; GISEL-DAZ-NEXT: v_rsq_f32_e32 v4, v01634; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, v0, v41635; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, 0.5, v41636; GISEL-DAZ-NEXT: v_fma_f32 v6, -v4, v5, 0.51637; GISEL-DAZ-NEXT: v_fma_f32 v5, v5, v6, v51638; GISEL-DAZ-NEXT: v_fma_f32 v4, v4, v6, v41639; GISEL-DAZ-NEXT: v_fma_f32 v6, -v5, v5, v01640; GISEL-DAZ-NEXT: v_fma_f32 v4, v6, v4, v51641; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, 0x37800000, v41642; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc1643; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, 0x4f800000, v11644; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v1, v31645; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc1646; GISEL-DAZ-NEXT: v_rsq_f32_e32 v5, v11647; GISEL-DAZ-NEXT: v_mov_b32_e32 v6, 0x2601648; GISEL-DAZ-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v61649; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v0, v4, v0, s[4:5]1650; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, v1, v51651; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, 0.5, v51652; GISEL-DAZ-NEXT: v_fma_f32 v7, -v5, v4, 0.51653; GISEL-DAZ-NEXT: v_fma_f32 v4, v4, v7, v41654; GISEL-DAZ-NEXT: v_fma_f32 v5, v5, v7, v51655; GISEL-DAZ-NEXT: v_fma_f32 v7, -v4, v4, v11656; GISEL-DAZ-NEXT: v_fma_f32 v4, v7, v5, v41657; GISEL-DAZ-NEXT: v_mul_f32_e32 v7, 0x4f800000, v21658; GISEL-DAZ-NEXT: v_cmp_lt_f32_e64 s[4:5], v2, v31659; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v2, v2, v7, s[4:5]1660; GISEL-DAZ-NEXT: v_rsq_f32_e32 v3, v21661; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, 0x37800000, v41662; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc1663; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v1, v61664; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v4, v1, vcc1665; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, v2, v31666; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v31667; GISEL-DAZ-NEXT: v_fma_f32 v5, -v3, v4, 0.51668; GISEL-DAZ-NEXT: v_fma_f32 v4, v4, v5, v41669; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v5, v31670; GISEL-DAZ-NEXT: v_fma_f32 v5, -v4, v4, v21671; GISEL-DAZ-NEXT: v_fma_f32 v3, v5, v3, v41672; GISEL-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v31673; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[4:5]1674; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v2, v61675; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc1676; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]1677 %result = call <3 x float> @llvm.sqrt.v3f32(<3 x float> %x)1678 ret <3 x float> %result1679}1680 1681; fpmath should be ignored1682define float @v_sqrt_f32_ulp05(float %x) {1683; SDAG-IEEE-LABEL: v_sqrt_f32_ulp05:1684; SDAG-IEEE: ; %bb.0:1685; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1686; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000001687; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01688; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01689; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1690; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v01691; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11692; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01693; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31694; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]1695; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v11696; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v01697; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v11698; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]1699; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11700; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1701; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601702; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21703; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1704; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1705;1706; GISEL-IEEE-LABEL: v_sqrt_f32_ulp05:1707; GISEL-IEEE: ; %bb.0:1708; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1709; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000001710; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01711; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11712; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1713; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v01714; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11715; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01716; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v11717; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v01718; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31719; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]1720; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v51721; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]1722; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11723; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1724; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601725; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21726; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1727; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1728;1729; SDAG-DAZ-LABEL: v_sqrt_f32_ulp05:1730; SDAG-DAZ: ; %bb.0:1731; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1732; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000001733; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01734; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01735; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1736; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v01737; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v11738; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v11739; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.51740; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v21741; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v01742; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v11743; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v21744; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v11745; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1746; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2601747; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21748; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1749; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]1750;1751; GISEL-DAZ-LABEL: v_sqrt_f32_ulp05:1752; GISEL-DAZ: ; %bb.0:1753; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1754; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000001755; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01756; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11757; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1758; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v01759; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v11760; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v11761; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.51762; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v21763; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v11764; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v01765; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v21766; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v11767; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1768; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2601769; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v21770; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1771; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]1772 %result = call float @llvm.sqrt.f32(float %x), !fpmath !01773 ret float %result1774}1775 1776; fpmath should be used with DAZ only1777define float @v_sqrt_f32_ulp1(float %x) {1778; SDAG-IEEE-LABEL: v_sqrt_f32_ulp1:1779; SDAG-IEEE: ; %bb.0:1780; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1781; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000001782; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v01783; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01784; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc1785; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v01786; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11787; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01788; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31789; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]1790; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v11791; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v01792; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v11793; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]1794; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11795; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1796; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601797; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21798; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1799; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1800;1801; GISEL-IEEE-LABEL: v_sqrt_f32_ulp1:1802; GISEL-IEEE: ; %bb.0:1803; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1804; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000001805; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01806; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11807; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1808; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v01809; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v11810; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v01811; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v11812; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v01813; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v31814; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]1815; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v51816; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]1817; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v11818; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc1819; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2601820; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v21821; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc1822; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1823;1824; GCN-DAZ-LABEL: v_sqrt_f32_ulp1:1825; GCN-DAZ: ; %bb.0:1826; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1827; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v01828; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]1829 %result = call float @llvm.sqrt.f32(float %x), !fpmath !11830 ret float %result1831}1832 1833; fpmath should always be used1834define float @v_sqrt_f32_ulp2(float %x) {1835; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2:1836; SDAG-IEEE: ; %bb.0:1837; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1838; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000001839; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01840; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc1841; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11842; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v01843; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc1844; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11845; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1846;1847; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2:1848; GISEL-IEEE: ; %bb.0:1849; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1850; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000001851; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11852; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1853; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v11854; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11855; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v01856; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc1857; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11858; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1859;1860; GCN-DAZ-LABEL: v_sqrt_f32_ulp2:1861; GCN-DAZ: ; %bb.0:1862; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1863; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v01864; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]1865 %result = call float @llvm.sqrt.f32(float %x), !fpmath !21866 ret float %result1867}1868 1869; fpmath should always be used1870define float @v_sqrt_f32_ulp25(float %x) {1871; SDAG-IEEE-LABEL: v_sqrt_f32_ulp25:1872; SDAG-IEEE: ; %bb.0:1873; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1874; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000001875; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01876; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc1877; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11878; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v01879; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc1880; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11881; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1882;1883; GISEL-IEEE-LABEL: v_sqrt_f32_ulp25:1884; GISEL-IEEE: ; %bb.0:1885; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1886; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000001887; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11888; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1889; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v11890; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11891; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v01892; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc1893; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11894; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1895;1896; GCN-DAZ-LABEL: v_sqrt_f32_ulp25:1897; GCN-DAZ: ; %bb.0:1898; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1899; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v01900; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]1901 %result = call float @llvm.sqrt.f32(float %x), !fpmath !31902 ret float %result1903}1904 1905; fpmath should always be used1906define float @v_sqrt_f32_ulp3(float %x) {1907; SDAG-IEEE-LABEL: v_sqrt_f32_ulp3:1908; SDAG-IEEE: ; %bb.0:1909; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1910; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000001911; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v01912; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc1913; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11914; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v01915; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc1916; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11917; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1918;1919; GISEL-IEEE-LABEL: v_sqrt_f32_ulp3:1920; GISEL-IEEE: ; %bb.0:1921; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1922; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000001923; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11924; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc1925; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v11926; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11927; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v01928; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc1929; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11930; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1931;1932; GCN-DAZ-LABEL: v_sqrt_f32_ulp3:1933; GCN-DAZ: ; %bb.0:1934; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1935; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v01936; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]1937 %result = call float @llvm.sqrt.f32(float %x), !fpmath !41938 ret float %result1939}1940 1941define float @v_sqrt_f32_ulp2_fabs(float %x) {1942; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2_fabs:1943; SDAG-IEEE: ; %bb.0:1944; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1945; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000001946; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s41947; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, s[4:5]1948; SDAG-IEEE-NEXT: v_ldexp_f32_e64 v0, |v0|, v11949; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v01950; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, s[4:5]1951; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11952; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]1953;1954; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2_fabs:1955; GISEL-IEEE: ; %bb.0:1956; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1957; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000001958; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v11959; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5]1960; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v11961; GISEL-IEEE-NEXT: v_ldexp_f32_e64 v0, |v0|, v11962; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v01963; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, s[4:5]1964; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v11965; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]1966;1967; GCN-DAZ-LABEL: v_sqrt_f32_ulp2_fabs:1968; GCN-DAZ: ; %bb.0:1969; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1970; GCN-DAZ-NEXT: v_sqrt_f32_e64 v0, |v0|1971; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]1972 %x.fabs = call float @llvm.fabs.f32(float %x)1973 %result = call float @llvm.sqrt.f32(float %x.fabs), !fpmath !21974 ret float %result1975}1976 1977define <2 x float> @v_sqrt_v2f32_ulp1(<2 x float> %x) {1978; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp1:1979; SDAG-IEEE: ; %bb.0:1980; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1981; SDAG-IEEE-NEXT: s_mov_b32 s6, 0xf8000001982; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v01983; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v01984; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc1985; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v2, v01986; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v21987; SDAG-IEEE-NEXT: v_fma_f32 v4, -v3, v2, v01988; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v41989; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v2, v3, s[4:5]1990; SDAG-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v21991; SDAG-IEEE-NEXT: v_fma_f32 v2, -v4, v2, v01992; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v21993; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[4:5]1994; SDAG-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v21995; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc1996; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x4f800000, v11997; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s6, v11998; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc1999; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v4, v12000; SDAG-IEEE-NEXT: v_mov_b32_e32 v3, 0x2602001; SDAG-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v32002; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]2003; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v42004; SDAG-IEEE-NEXT: v_fma_f32 v5, -v2, v4, v12005; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v52006; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v4, v2, s[4:5]2007; SDAG-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], 1, v42008; SDAG-IEEE-NEXT: v_fma_f32 v4, -v5, v4, v12009; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v42010; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5]2011; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v22012; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2013; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v32014; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc2015; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2016;2017; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp1:2018; GISEL-IEEE: ; %bb.0:2019; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2020; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0xf8000002021; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x4f800000, v02022; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22023; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc2024; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v3, v02025; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], -1, v32026; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v3, v02027; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v32028; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v3, v02029; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v52030; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[4:5]2031; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v72032; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[4:5]2033; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v32034; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc2035; GISEL-IEEE-NEXT: v_mul_f32_e32 v5, 0x4f800000, v12036; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v1, v22037; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc2038; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v2, v12039; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x2602040; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v42041; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, v3, v0, s[4:5]2042; GISEL-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v22043; GISEL-IEEE-NEXT: v_fma_f32 v5, -v3, v2, v12044; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v22045; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v2, v12046; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v52047; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[4:5]2048; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v72049; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[4:5]2050; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v22051; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc2052; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v42053; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc2054; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2055;2056; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp1:2057; GCN-DAZ: ; %bb.0:2058; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2059; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v02060; GCN-DAZ-NEXT: v_sqrt_f32_e32 v1, v12061; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2062 %result = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !12063 ret <2 x float> %result2064}2065 2066; fpmath should always be used2067define <2 x float> @v_sqrt_v2f32_ulp2(<2 x float> %x) {2068; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp2:2069; SDAG-IEEE: ; %bb.0:2070; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2071; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002072; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02073; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2074; SDAG-IEEE-NEXT: v_cmp_gt_f32_e64 s[4:5], s4, v12075; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22076; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, s[4:5]2077; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02078; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22079; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v12080; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2081; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22082; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[4:5]2083; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22084; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2085;2086; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp2:2087; GISEL-IEEE: ; %bb.0:2088; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2089; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002090; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22091; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc2092; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v22093; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v3, 5, v32094; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[4:5]2095; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v32096; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v2, 5, v22097; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02098; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22099; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v12100; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2101; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22102; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[4:5]2103; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22104; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2105;2106; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp2:2107; GCN-DAZ: ; %bb.0:2108; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2109; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v02110; GCN-DAZ-NEXT: v_sqrt_f32_e32 v1, v12111; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2112 %result = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !22113 ret <2 x float> %result2114}2115 2116define <2 x float> @v_sqrt_v2f32_ulp1_fabs(<2 x float> %x) {2117; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp1_fabs:2118; SDAG-IEEE: ; %bb.0:2119; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2120; SDAG-IEEE-NEXT: s_mov_b32 s6, 0xf8000002121; SDAG-IEEE-NEXT: s_mov_b32 s7, 0x4f8000002122; SDAG-IEEE-NEXT: v_mul_f32_e64 v2, |v0|, s72123; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s62124; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, |v0|, v2, vcc2125; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v2, v02126; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v22127; SDAG-IEEE-NEXT: v_fma_f32 v4, -v3, v2, v02128; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v42129; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v2, v3, s[4:5]2130; SDAG-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v22131; SDAG-IEEE-NEXT: v_fma_f32 v2, -v4, v2, v02132; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v22133; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[4:5]2134; SDAG-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v22135; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc2136; SDAG-IEEE-NEXT: v_mul_f32_e64 v4, |v1|, s72137; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s62138; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, |v1|, v4, vcc2139; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v4, v12140; SDAG-IEEE-NEXT: v_mov_b32_e32 v3, 0x2602141; SDAG-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v32142; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v0, s[4:5]2143; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v42144; SDAG-IEEE-NEXT: v_fma_f32 v5, -v2, v4, v12145; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v52146; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v4, v2, s[4:5]2147; SDAG-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], 1, v42148; SDAG-IEEE-NEXT: v_fma_f32 v4, -v5, v4, v12149; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v42150; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5]2151; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v22152; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc2153; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v32154; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc2155; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2156;2157; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp1_fabs:2158; GISEL-IEEE: ; %bb.0:2159; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2160; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0xf8000002161; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x4f8000002162; GISEL-IEEE-NEXT: v_mul_f32_e64 v4, |v0|, v32163; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v22164; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, |v0|, v4, vcc2165; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v4, v02166; GISEL-IEEE-NEXT: v_mul_f32_e64 v3, |v1|, v32167; GISEL-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], -1, v42168; GISEL-IEEE-NEXT: v_fma_f32 v6, -v5, v4, v02169; GISEL-IEEE-NEXT: v_add_i32_e64 v7, s[4:5], 1, v42170; GISEL-IEEE-NEXT: v_fma_f32 v8, -v7, v4, v02171; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v62172; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, v4, v5, s[4:5]2173; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v82174; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, v4, v7, s[4:5]2175; GISEL-IEEE-NEXT: v_mul_f32_e32 v5, 0x37800000, v42176; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v4, v4, v5, vcc2177; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, v22178; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, |v1|, v3, vcc2179; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v2, v12180; GISEL-IEEE-NEXT: v_mov_b32_e32 v5, 0x2602181; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[4:5], v0, v52182; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v0, v4, v0, s[4:5]2183; GISEL-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v22184; GISEL-IEEE-NEXT: v_fma_f32 v4, -v3, v2, v12185; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[4:5], 1, v22186; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v2, v12187; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v42188; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[4:5]2189; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v72190; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[4:5]2191; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v22192; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc2193; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v52194; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc2195; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2196;2197; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp1_fabs:2198; GCN-DAZ: ; %bb.0:2199; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2200; GCN-DAZ-NEXT: v_sqrt_f32_e64 v0, |v0|2201; GCN-DAZ-NEXT: v_sqrt_f32_e64 v1, |v1|2202; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2203 %x.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %x)2204 %result = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %x.fabs), !fpmath !12205 ret <2 x float> %result2206}2207 2208; fpmath should always be used2209define <2 x float> @v_sqrt_v2f32_ulp2_fabs(<2 x float> %x) {2210; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp2_fabs:2211; SDAG-IEEE: ; %bb.0:2212; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2213; SDAG-IEEE-NEXT: s_mov_b32 s6, 0x8000002214; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, s62215; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, s[4:5]2216; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[6:7], |v1|, s62217; SDAG-IEEE-NEXT: v_ldexp_f32_e64 v0, |v0|, v22218; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, s[6:7]2219; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02220; SDAG-IEEE-NEXT: v_ldexp_f32_e64 v1, |v1|, v22221; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v12222; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[4:5]2223; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22224; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[6:7]2225; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22226; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2227;2228; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp2_fabs:2229; GISEL-IEEE: ; %bb.0:2230; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2231; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002232; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], |v0|, v22233; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, 0, 1, s[4:5]2234; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[6:7], |v1|, v22235; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v3, 5, v32236; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[6:7]2237; GISEL-IEEE-NEXT: v_ldexp_f32_e64 v0, |v0|, v32238; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v2, 5, v22239; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02240; GISEL-IEEE-NEXT: v_ldexp_f32_e64 v1, |v1|, v22241; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v12242; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[4:5]2243; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22244; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[6:7]2245; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22246; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2247;2248; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp2_fabs:2249; GCN-DAZ: ; %bb.0:2250; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2251; GCN-DAZ-NEXT: v_sqrt_f32_e64 v0, |v0|2252; GCN-DAZ-NEXT: v_sqrt_f32_e64 v1, |v1|2253; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2254 %x.fabs = call <2 x float> @llvm.fabs.v2f32(<2 x float> %x)2255 %result = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %x.fabs), !fpmath !22256 ret <2 x float> %result2257}2258 2259; afn is stronger than the fpmath2260define float @v_sqrt_f32_afn_ulp1(float %x) {2261; GCN-LABEL: v_sqrt_f32_afn_ulp1:2262; GCN: ; %bb.0:2263; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2264; GCN-NEXT: v_sqrt_f32_e32 v0, v02265; GCN-NEXT: s_setpc_b64 s[30:31]2266 %result = call afn float @llvm.sqrt.f32(float %x), !fpmath !12267 ret float %result2268}2269 2270; afn is stronger than the fpmath2271define float @v_sqrt_f32_afn_ulp2(float %x) {2272; GCN-LABEL: v_sqrt_f32_afn_ulp2:2273; GCN: ; %bb.0:2274; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2275; GCN-NEXT: v_sqrt_f32_e32 v0, v02276; GCN-NEXT: s_setpc_b64 s[30:31]2277 %result = call afn float @llvm.sqrt.f32(float %x), !fpmath !22278 ret float %result2279}2280 2281define <2 x float> @v_sqrt_v2f32_afn_ulp1(<2 x float> %x) {2282; GCN-LABEL: v_sqrt_v2f32_afn_ulp1:2283; GCN: ; %bb.0:2284; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2285; GCN-NEXT: v_sqrt_f32_e32 v0, v02286; GCN-NEXT: v_sqrt_f32_e32 v1, v12287; GCN-NEXT: s_setpc_b64 s[30:31]2288 %result = call afn <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !12289 ret <2 x float> %result2290}2291 2292; fpmath should always be used2293define <2 x float> @v_sqrt_v2f32_afn_ulp2(<2 x float> %x) {2294; GCN-LABEL: v_sqrt_v2f32_afn_ulp2:2295; GCN: ; %bb.0:2296; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2297; GCN-NEXT: v_sqrt_f32_e32 v0, v02298; GCN-NEXT: v_sqrt_f32_e32 v1, v12299; GCN-NEXT: s_setpc_b64 s[30:31]2300 %result = call afn <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !22301 ret <2 x float> %result2302}2303 2304define float @v_sqrt_f32_ulp2_noncontractable_rcp(float %x) {2305; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2_noncontractable_rcp:2306; SDAG-IEEE: ; %bb.0:2307; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2308; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002309; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02310; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc2311; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12312; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02313; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc2314; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002315; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12316; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v1, v02317; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42318; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc2319; SDAG-IEEE-NEXT: v_rcp_f32_e32 v1, v12320; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02321; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02322; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v1, v02323; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2324;2325; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2_noncontractable_rcp:2326; GISEL-IEEE: ; %bb.0:2327; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2328; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000002329; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12330; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc2331; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v12332; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12333; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02334; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc2335; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x7f8000002336; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12337; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v1, v02338; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v22339; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc2340; GISEL-IEEE-NEXT: v_rcp_f32_e32 v1, v12341; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02342; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02343; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v1, v02344; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2345;2346; GCN-DAZ-LABEL: v_sqrt_f32_ulp2_noncontractable_rcp:2347; GCN-DAZ: ; %bb.0:2348; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2349; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v02350; GCN-DAZ-NEXT: v_rcp_f32_e32 v0, v02351; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2352 %sqrt = call contract float @llvm.sqrt.f32(float %x), !fpmath !42353 %result = fdiv float 1.0, %sqrt, !fpmath !32354 ret float %result2355}2356 2357define float @v_sqrt_f32_ulp2_contractable_rcp(float %x) {2358; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2_contractable_rcp:2359; SDAG-IEEE: ; %bb.0:2360; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2361; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002362; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02363; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 24, vcc2364; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12365; SDAG-IEEE-NEXT: v_rsq_f32_e32 v0, v02366; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 12, vcc2367; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12368; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2369;2370; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2_contractable_rcp:2371; GISEL-IEEE: ; %bb.0:2372; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2373; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000002374; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v12375; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 24, vcc2376; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12377; GISEL-IEEE-NEXT: v_rsq_f32_e32 v0, v02378; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 12, vcc2379; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v12380; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2381;2382; GCN-DAZ-LABEL: v_sqrt_f32_ulp2_contractable_rcp:2383; GCN-DAZ: ; %bb.0:2384; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2385; GCN-DAZ-NEXT: v_rsq_f32_e32 v0, v02386; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2387 %sqrt = call contract float @llvm.sqrt.f32(float %x), !fpmath !42388 %result = fdiv contract float 1.0, %sqrt, !fpmath !32389 ret float %result2390}2391 2392define float @v_sqrt_f32_ulp2_noncontractable_fdiv(float %x, float %y) {2393; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2_noncontractable_fdiv:2394; SDAG-IEEE: ; %bb.0:2395; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2396; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002397; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02398; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2399; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22400; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02401; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2402; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002403; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v3, v12404; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22405; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02406; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42407; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2408; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22409; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42410; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02411; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc2412; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12413; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, v3, v22414; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, v1, v02415; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02416; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2417;2418; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2_noncontractable_fdiv:2419; GISEL-IEEE: ; %bb.0:2420; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2421; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002422; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22423; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc2424; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v2, 5, v22425; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22426; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02427; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2428; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x7f8000002429; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v12430; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22431; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02432; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v32433; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2434; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22435; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, v32436; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02437; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v1, v4, vcc2438; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12439; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, v3, v22440; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, v1, v02441; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02442; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2443;2444; SDAG-DAZ-LABEL: v_sqrt_f32_ulp2_noncontractable_fdiv:2445; SDAG-DAZ: ; %bb.0:2446; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2447; SDAG-DAZ-NEXT: v_sqrt_f32_e32 v0, v02448; SDAG-DAZ-NEXT: s_mov_b32 s4, 0x6f8000002449; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2f8000002450; SDAG-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s42451; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc2452; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v0, v22453; SDAG-DAZ-NEXT: v_rcp_f32_e32 v0, v02454; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v1, v02455; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02456; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]2457;2458; GISEL-DAZ-LABEL: v_sqrt_f32_ulp2_noncontractable_fdiv:2459; GISEL-DAZ: ; %bb.0:2460; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2461; GISEL-DAZ-NEXT: v_sqrt_f32_e32 v0, v02462; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x6f8000002463; GISEL-DAZ-NEXT: v_mov_b32_e32 v3, 0x2f8000002464; GISEL-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, v22465; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, 1.0, v3, vcc2466; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v0, v22467; GISEL-DAZ-NEXT: v_rcp_f32_e32 v0, v02468; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v1, v02469; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02470; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]2471 %sqrt = call contract float @llvm.sqrt.f32(float %x), !fpmath !42472 %result = fdiv float %y, %sqrt, !fpmath !32473 ret float %result2474}2475 2476define float @v_sqrt_f32_ulp2_contractable_fdiv(float %x, float %y) {2477; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2_contractable_fdiv:2478; SDAG-IEEE: ; %bb.0:2479; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2480; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002481; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02482; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2483; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22484; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02485; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2486; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002487; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v3, v12488; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22489; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02490; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42491; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2492; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22493; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42494; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02495; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v1, v3, vcc2496; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12497; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, v3, v22498; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, v1, v02499; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02500; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2501;2502; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2_contractable_fdiv:2503; GISEL-IEEE: ; %bb.0:2504; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2505; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002506; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22507; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc2508; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v2, 5, v22509; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22510; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02511; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2512; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x7f8000002513; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v12514; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22515; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02516; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v32517; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2518; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22519; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, v32520; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02521; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v1, v4, vcc2522; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12523; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, v3, v22524; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, v1, v02525; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02526; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2527;2528; SDAG-DAZ-LABEL: v_sqrt_f32_ulp2_contractable_fdiv:2529; SDAG-DAZ: ; %bb.0:2530; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2531; SDAG-DAZ-NEXT: v_sqrt_f32_e32 v0, v02532; SDAG-DAZ-NEXT: s_mov_b32 s4, 0x6f8000002533; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2f8000002534; SDAG-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s42535; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, 1.0, v2, vcc2536; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v0, v22537; SDAG-DAZ-NEXT: v_rcp_f32_e32 v0, v02538; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v1, v02539; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02540; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]2541;2542; GISEL-DAZ-LABEL: v_sqrt_f32_ulp2_contractable_fdiv:2543; GISEL-DAZ: ; %bb.0:2544; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2545; GISEL-DAZ-NEXT: v_sqrt_f32_e32 v0, v02546; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x6f8000002547; GISEL-DAZ-NEXT: v_mov_b32_e32 v3, 0x2f8000002548; GISEL-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, v22549; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, 1.0, v3, vcc2550; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v0, v22551; GISEL-DAZ-NEXT: v_rcp_f32_e32 v0, v02552; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v1, v02553; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02554; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]2555 %sqrt = call contract float @llvm.sqrt.f32(float %x), !fpmath !42556 %result = fdiv contract float %y, %sqrt, !fpmath !32557 ret float %result2558}2559 2560define float @v_sqrt_f32_ulp2_contractable_fdiv_arcp(float %x, float %y) {2561; SDAG-IEEE-LABEL: v_sqrt_f32_ulp2_contractable_fdiv_arcp:2562; SDAG-IEEE: ; %bb.0:2563; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2564; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002565; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02566; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2567; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22568; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02569; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2570; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002571; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22572; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02573; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42574; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2575; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22576; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02577; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02578; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02579; SDAG-IEEE-NEXT: v_mul_f32_e32 v0, v1, v02580; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2581;2582; GISEL-IEEE-LABEL: v_sqrt_f32_ulp2_contractable_fdiv_arcp:2583; GISEL-IEEE: ; %bb.0:2584; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2585; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002586; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22587; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc2588; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v2, 5, v22589; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22590; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02591; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2592; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x7f8000002593; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22594; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02595; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v32596; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2597; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22598; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02599; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02600; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02601; GISEL-IEEE-NEXT: v_mul_f32_e32 v0, v1, v02602; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2603;2604; GCN-DAZ-LABEL: v_sqrt_f32_ulp2_contractable_fdiv_arcp:2605; GCN-DAZ: ; %bb.0:2606; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2607; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v02608; GCN-DAZ-NEXT: v_rcp_f32_e32 v0, v02609; GCN-DAZ-NEXT: v_mul_f32_e32 v0, v1, v02610; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2611 %sqrt = call contract float @llvm.sqrt.f32(float %x), !fpmath !42612 %result = fdiv arcp contract float %y, %sqrt, !fpmath !32613 ret float %result2614}2615 2616define <2 x float> @v_sqrt_v2f32_ulp2_noncontractable_rcp(<2 x float> %x) {2617; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp2_noncontractable_rcp:2618; SDAG-IEEE: ; %bb.0:2619; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2620; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002621; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02622; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, vcc2623; SDAG-IEEE-NEXT: v_cmp_gt_f32_e64 s[4:5], s4, v12624; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22625; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 32, s[4:5]2626; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02627; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22628; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v12629; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2630; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22631; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[4:5]2632; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002633; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22634; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02635; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42636; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2637; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22638; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02639; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02640; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02641; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v12642; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42643; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2644; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22645; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12646; SDAG-IEEE-NEXT: v_sub_i32_e32 v1, vcc, 0, v12647; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v2, v12648; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2649;2650; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp2_noncontractable_rcp:2651; GISEL-IEEE: ; %bb.0:2652; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2653; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002654; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22655; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc2656; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v22657; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v3, 5, v32658; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[4:5]2659; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v32660; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v2, 5, v22661; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02662; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22663; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v12664; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc2665; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22666; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, s[4:5]2667; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x7f8000002668; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22669; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v02670; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v32671; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc2672; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22673; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02674; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02675; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v2, v02676; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v12677; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, v32678; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2679; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22680; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12681; GISEL-IEEE-NEXT: v_sub_i32_e32 v1, vcc, 0, v12682; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v2, v12683; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2684;2685; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp2_noncontractable_rcp:2686; GCN-DAZ: ; %bb.0:2687; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2688; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v02689; GCN-DAZ-NEXT: v_sqrt_f32_e32 v1, v12690; GCN-DAZ-NEXT: v_rcp_f32_e32 v0, v02691; GCN-DAZ-NEXT: v_rcp_f32_e32 v1, v12692; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2693 %sqrt = call contract <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !42694 %result = fdiv <2 x float> <float 1.0, float 1.0>, %sqrt, !fpmath !32695 ret <2 x float> %result2696}2697 2698define <2 x float> @v_sqrt_v2f32_ulp2_contractable_rcp(<2 x float> %x) {2699; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp2_contractable_rcp:2700; SDAG-IEEE: ; %bb.0:2701; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2702; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002703; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02704; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 24, vcc2705; SDAG-IEEE-NEXT: v_cmp_gt_f32_e64 s[4:5], s4, v12706; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22707; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 24, s[4:5]2708; SDAG-IEEE-NEXT: v_rsq_f32_e32 v0, v02709; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22710; SDAG-IEEE-NEXT: v_rsq_f32_e32 v1, v12711; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 12, vcc2712; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22713; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 12, s[4:5]2714; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22715; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2716;2717; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp2_contractable_rcp:2718; GISEL-IEEE: ; %bb.0:2719; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2720; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x8000002721; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v22722; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, 0, 24, vcc2723; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v22724; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v32725; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 24, s[4:5]2726; GISEL-IEEE-NEXT: v_rsq_f32_e32 v0, v02727; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22728; GISEL-IEEE-NEXT: v_rsq_f32_e32 v1, v12729; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 12, vcc2730; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v22731; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, 12, s[4:5]2732; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v22733; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2734;2735; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp2_contractable_rcp:2736; GCN-DAZ: ; %bb.0:2737; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2738; GCN-DAZ-NEXT: v_rsq_f32_e32 v0, v02739; GCN-DAZ-NEXT: v_rsq_f32_e32 v1, v12740; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2741 %sqrt = call contract <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !42742 %result = fdiv contract <2 x float> <float 1.0, float 1.0>, %sqrt, !fpmath !32743 ret <2 x float> %result2744}2745 2746define <2 x float> @v_sqrt_v2f32_ulp2_contractable_fdiv(<2 x float> %x, <2 x float> %y) {2747; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv:2748; SDAG-IEEE: ; %bb.0:2749; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2750; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002751; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02752; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, 32, vcc2753; SDAG-IEEE-NEXT: v_cmp_gt_f32_e64 s[4:5], s4, v12754; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v42755; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, 32, s[4:5]2756; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02757; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42758; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v12759; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, vcc2760; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v42761; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, s[4:5]2762; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002763; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42764; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v02765; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42766; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc2767; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v5, v22768; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v2|, s42769; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02770; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v5, v2, v5, vcc2771; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v2, v22772; SDAG-IEEE-NEXT: v_rcp_f32_e32 v4, v42773; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, v2, v02774; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v12775; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42776; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2777; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22778; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, v5, v42779; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v4, v02780; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v32781; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, s42782; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12783; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc2784; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v3, v32785; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, v4, v22786; SDAG-IEEE-NEXT: v_sub_i32_e32 v1, vcc, v3, v12787; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v2, v12788; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2789;2790; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv:2791; GISEL-IEEE: ; %bb.0:2792; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2793; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x8000002794; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v42795; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc2796; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v42797; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v5, 5, v52798; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[4:5]2799; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v52800; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v4, 5, v42801; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02802; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42803; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v12804; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, vcc2805; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v42806; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, s[4:5]2807; GISEL-IEEE-NEXT: v_mov_b32_e32 v5, 0x7f8000002808; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42809; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v02810; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v52811; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc2812; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v6, v22813; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v2|, v52814; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02815; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v6, v2, v6, vcc2816; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v2, v22817; GISEL-IEEE-NEXT: v_rcp_f32_e32 v4, v42818; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, v2, v02819; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v12820; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, v52821; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2822; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22823; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, v6, v42824; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v4, v02825; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v32826; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v3|, v52827; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12828; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc2829; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v3, v32830; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, v4, v22831; GISEL-IEEE-NEXT: v_sub_i32_e32 v1, vcc, v3, v12832; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v2, v12833; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2834;2835; SDAG-DAZ-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv:2836; SDAG-DAZ: ; %bb.0:2837; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2838; SDAG-DAZ-NEXT: v_sqrt_f32_e32 v0, v02839; SDAG-DAZ-NEXT: v_sqrt_f32_e32 v1, v12840; SDAG-DAZ-NEXT: s_mov_b32 s4, 0x6f8000002841; SDAG-DAZ-NEXT: v_mov_b32_e32 v4, 0x2f8000002842; SDAG-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, s42843; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v5, 1.0, v4, vcc2844; SDAG-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, s42845; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v4, 1.0, v4, vcc2846; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v0, v52847; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, v1, v42848; SDAG-DAZ-NEXT: v_rcp_f32_e32 v0, v02849; SDAG-DAZ-NEXT: v_rcp_f32_e32 v1, v12850; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02851; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, v3, v12852; SDAG-DAZ-NEXT: v_mul_f32_e32 v0, v5, v02853; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, v4, v12854; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]2855;2856; GISEL-DAZ-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv:2857; GISEL-DAZ: ; %bb.0:2858; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2859; GISEL-DAZ-NEXT: v_sqrt_f32_e32 v0, v02860; GISEL-DAZ-NEXT: v_sqrt_f32_e32 v1, v12861; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, 0x6f8000002862; GISEL-DAZ-NEXT: v_mov_b32_e32 v5, 0x2f8000002863; GISEL-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v0|, v42864; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v6, 1.0, v5, vcc2865; GISEL-DAZ-NEXT: v_cmp_gt_f32_e64 vcc, |v1|, v42866; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v4, 1.0, v5, vcc2867; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v0, v62868; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, v1, v42869; GISEL-DAZ-NEXT: v_rcp_f32_e32 v0, v02870; GISEL-DAZ-NEXT: v_rcp_f32_e32 v1, v12871; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02872; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, v3, v12873; GISEL-DAZ-NEXT: v_mul_f32_e32 v0, v6, v02874; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, v4, v12875; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]2876 %sqrt = call contract <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !42877 %result = fdiv contract <2 x float> %y, %sqrt, !fpmath !32878 ret <2 x float> %result2879}2880 2881define <2 x float> @v_sqrt_v2f32_ulp2_contractable_fdiv_arcp(<2 x float> %x, <2 x float> %y) {2882; SDAG-IEEE-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv_arcp:2883; SDAG-IEEE: ; %bb.0:2884; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2885; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000002886; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v02887; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, 32, vcc2888; SDAG-IEEE-NEXT: v_cmp_gt_f32_e64 s[4:5], s4, v12889; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v42890; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, 32, s[4:5]2891; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v02892; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42893; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v12894; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, vcc2895; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v42896; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, s[4:5]2897; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x7f8000002898; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42899; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v02900; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s42901; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc2902; SDAG-IEEE-NEXT: v_rcp_f32_e32 v4, v42903; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02904; SDAG-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02905; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v4, v02906; SDAG-IEEE-NEXT: v_mul_f32_e32 v0, v2, v02907; SDAG-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v12908; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s42909; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2910; SDAG-IEEE-NEXT: v_rcp_f32_e32 v2, v22911; SDAG-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12912; SDAG-IEEE-NEXT: v_sub_i32_e32 v1, vcc, 0, v12913; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v2, v12914; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, v3, v12915; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]2916;2917; GISEL-IEEE-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv_arcp:2918; GISEL-IEEE: ; %bb.0:2919; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2920; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x8000002921; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v42922; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v5, 0, 1, vcc2923; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], v1, v42924; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v5, 5, v52925; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, 1, s[4:5]2926; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v52927; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v4, 5, v42928; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v02929; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42930; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v12931; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, vcc2932; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v42933; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v4, 0, -16, s[4:5]2934; GISEL-IEEE-NEXT: v_mov_b32_e32 v5, 0x7f8000002935; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v42936; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v4, v02937; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v52938; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc2939; GISEL-IEEE-NEXT: v_rcp_f32_e32 v4, v42940; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v0, v02941; GISEL-IEEE-NEXT: v_sub_i32_e32 v0, vcc, 0, v02942; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v4, v02943; GISEL-IEEE-NEXT: v_mul_f32_e32 v0, v2, v02944; GISEL-IEEE-NEXT: v_frexp_mant_f32_e32 v2, v12945; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, v52946; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc2947; GISEL-IEEE-NEXT: v_rcp_f32_e32 v2, v22948; GISEL-IEEE-NEXT: v_frexp_exp_i32_f32_e32 v1, v12949; GISEL-IEEE-NEXT: v_sub_i32_e32 v1, vcc, 0, v12950; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v2, v12951; GISEL-IEEE-NEXT: v_mul_f32_e32 v1, v3, v12952; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]2953;2954; GCN-DAZ-LABEL: v_sqrt_v2f32_ulp2_contractable_fdiv_arcp:2955; GCN-DAZ: ; %bb.0:2956; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2957; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v02958; GCN-DAZ-NEXT: v_sqrt_f32_e32 v1, v12959; GCN-DAZ-NEXT: v_rcp_f32_e32 v0, v02960; GCN-DAZ-NEXT: v_rcp_f32_e32 v1, v12961; GCN-DAZ-NEXT: v_mul_f32_e32 v0, v2, v02962; GCN-DAZ-NEXT: v_mul_f32_e32 v1, v3, v12963; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]2964 %sqrt = call contract <2 x float> @llvm.sqrt.v2f32(<2 x float> %x), !fpmath !42965 %result = fdiv arcp contract <2 x float> %y, %sqrt, !fpmath !32966 ret <2 x float> %result2967}2968 2969define amdgpu_ps i32 @s_sqrt_f32_ulp1(float inreg %x) {2970; GCN-LABEL: s_sqrt_f32_ulp1:2971; GCN: ; %bb.0:2972; GCN-NEXT: v_sqrt_f32_e32 v0, s02973; GCN-NEXT: v_readfirstlane_b32 s0, v02974; GCN-NEXT: ; return to shader part epilog2975 %result = call afn float @llvm.sqrt.f32(float %x), !fpmath !12976 %cast = bitcast float %result to i322977 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)2978 ret i32 %firstlane2979}2980 2981define amdgpu_ps i32 @s_sqrt_f32_ulp2(float inreg %x) {2982; GCN-LABEL: s_sqrt_f32_ulp2:2983; GCN: ; %bb.0:2984; GCN-NEXT: v_sqrt_f32_e32 v0, s02985; GCN-NEXT: v_readfirstlane_b32 s0, v02986; GCN-NEXT: ; return to shader part epilog2987 %result = call afn float @llvm.sqrt.f32(float %x), !fpmath !22988 %cast = bitcast float %result to i322989 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)2990 ret i32 %firstlane2991}2992 2993define amdgpu_ps i32 @s_sqrt_f32_ulp3(float inreg %x) {2994; GCN-LABEL: s_sqrt_f32_ulp3:2995; GCN: ; %bb.0:2996; GCN-NEXT: v_sqrt_f32_e32 v0, s02997; GCN-NEXT: v_readfirstlane_b32 s0, v02998; GCN-NEXT: ; return to shader part epilog2999 %result = call afn float @llvm.sqrt.f32(float %x), !fpmath !43000 %cast = bitcast float %result to i323001 %firstlane = call i32 @llvm.amdgcn.readfirstlane(i32 %cast)3002 ret i32 %firstlane3003}3004 3005define float @v_sqrt_f32_known_never_posdenormal_ulp2(float nofpclass(psub) %x) {3006; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_posdenormal_ulp2:3007; SDAG-IEEE: ; %bb.0:3008; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3009; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003010; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03011; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3012; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13013; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v03014; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3015; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13016; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3017;3018; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_posdenormal_ulp2:3019; GISEL-IEEE: ; %bb.0:3020; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3021; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003022; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13023; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3024; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13025; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13026; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v03027; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3028; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13029; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3030;3031; GCN-DAZ-LABEL: v_sqrt_f32_known_never_posdenormal_ulp2:3032; GCN-DAZ: ; %bb.0:3033; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3034; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v03035; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]3036 %result = call float @llvm.sqrt.f32(float %x), !fpmath !23037 ret float %result3038}3039 3040define float @v_sqrt_f32_nsz_known_never_posdenormal_ulp2(float nofpclass(psub) %x) {3041; SDAG-IEEE-LABEL: v_sqrt_f32_nsz_known_never_posdenormal_ulp2:3042; SDAG-IEEE: ; %bb.0:3043; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3044; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003045; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03046; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3047; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13048; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v03049; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3050; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13051; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3052;3053; GISEL-IEEE-LABEL: v_sqrt_f32_nsz_known_never_posdenormal_ulp2:3054; GISEL-IEEE: ; %bb.0:3055; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3056; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003057; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13058; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3059; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13060; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13061; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v03062; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3063; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13064; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3065;3066; GCN-DAZ-LABEL: v_sqrt_f32_nsz_known_never_posdenormal_ulp2:3067; GCN-DAZ: ; %bb.0:3068; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3069; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v03070; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]3071 %result = call nsz float @llvm.sqrt.f32(float %x), !fpmath !23072 ret float %result3073}3074 3075define float @v_sqrt_f32_known_never_negdenormal(float nofpclass(nsub) %x) {3076; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_negdenormal:3077; SDAG-IEEE: ; %bb.0:3078; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3079; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003080; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03081; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3082; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13083; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v03084; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3085; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13086; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3087;3088; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_negdenormal:3089; GISEL-IEEE: ; %bb.0:3090; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3091; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003092; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13093; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3094; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13095; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13096; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v03097; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3098; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13099; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3100;3101; GCN-DAZ-LABEL: v_sqrt_f32_known_never_negdenormal:3102; GCN-DAZ: ; %bb.0:3103; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3104; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v03105; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]3106 %result = call float @llvm.sqrt.f32(float %x), !fpmath !23107 ret float %result3108}3109 3110define float @v_sqrt_f32_known_never_denormal(float nofpclass(sub) %x) {3111; GCN-LABEL: v_sqrt_f32_known_never_denormal:3112; GCN: ; %bb.0:3113; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3114; GCN-NEXT: v_sqrt_f32_e32 v0, v03115; GCN-NEXT: s_setpc_b64 s[30:31]3116 %result = call float @llvm.sqrt.f32(float %x), !fpmath !23117 ret float %result3118}3119 3120define float @v_sqrt_f32_ninf_known_never_zero(float nofpclass(zero) %x) {3121; SDAG-IEEE-LABEL: v_sqrt_f32_ninf_known_never_zero:3122; SDAG-IEEE: ; %bb.0:3123; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3124; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000003125; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03126; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03127; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3128; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03129; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13130; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03131; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33132; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]3133; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v13134; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03135; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v13136; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]3137; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13138; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3139; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603140; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23141; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3142; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3143;3144; GISEL-IEEE-LABEL: v_sqrt_f32_ninf_known_never_zero:3145; GISEL-IEEE: ; %bb.0:3146; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3147; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000003148; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03149; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13150; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3151; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v03152; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13153; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03154; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v13155; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v03156; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33157; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]3158; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v53159; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]3160; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13161; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3162; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603163; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23164; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3165; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3166;3167; SDAG-DAZ-LABEL: v_sqrt_f32_ninf_known_never_zero:3168; SDAG-DAZ: ; %bb.0:3169; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3170; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000003171; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03172; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03173; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3174; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v03175; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13176; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13177; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53178; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23179; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v03180; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13181; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v23182; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13183; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3184; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603185; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23186; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3187; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3188;3189; GISEL-DAZ-LABEL: v_sqrt_f32_ninf_known_never_zero:3190; GISEL-DAZ: ; %bb.0:3191; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3192; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000003193; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03194; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13195; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3196; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v03197; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13198; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13199; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53200; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23201; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13202; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v03203; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v23204; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13205; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3206; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603207; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23208; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3209; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3210 %result = call ninf float @llvm.sqrt.f32(float %x)3211 ret float %result3212}3213 3214define float @v_sqrt_f32_known_never_zero(float nofpclass(zero) %x) {3215; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_zero:3216; SDAG-IEEE: ; %bb.0:3217; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3218; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000003219; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03220; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03221; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3222; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03223; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13224; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03225; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33226; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]3227; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v13228; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03229; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v13230; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]3231; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13232; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3233; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603234; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23235; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3236; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3237;3238; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_zero:3239; GISEL-IEEE: ; %bb.0:3240; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3241; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000003242; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03243; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13244; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3245; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v03246; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13247; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03248; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v13249; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v03250; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33251; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]3252; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v53253; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]3254; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13255; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3256; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603257; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23258; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3259; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3260;3261; SDAG-DAZ-LABEL: v_sqrt_f32_known_never_zero:3262; SDAG-DAZ: ; %bb.0:3263; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3264; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000003265; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03266; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03267; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3268; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v03269; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13270; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13271; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53272; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23273; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v03274; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13275; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v23276; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13277; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3278; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603279; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23280; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3281; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3282;3283; GISEL-DAZ-LABEL: v_sqrt_f32_known_never_zero:3284; GISEL-DAZ: ; %bb.0:3285; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3286; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000003287; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03288; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13289; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3290; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v03291; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13292; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13293; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53294; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23295; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13296; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v03297; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v23298; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13299; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3300; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603301; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23302; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3303; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3304 %result = call float @llvm.sqrt.f32(float %x)3305 ret float %result3306}3307 3308define float @v_sqrt_f32_known_never_zero_never_inf(float nofpclass(zero inf) %x) {3309; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_inf:3310; SDAG-IEEE: ; %bb.0:3311; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3312; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000003313; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03314; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03315; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3316; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03317; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13318; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03319; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33320; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]3321; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v13322; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03323; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v13324; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]3325; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13326; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3327; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603328; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23329; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3330; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3331;3332; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_inf:3333; GISEL-IEEE: ; %bb.0:3334; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3335; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000003336; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03337; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13338; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3339; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v03340; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13341; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03342; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v13343; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v03344; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33345; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]3346; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v53347; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]3348; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13349; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3350; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603351; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23352; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3353; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3354;3355; SDAG-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_inf:3356; SDAG-DAZ: ; %bb.0:3357; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3358; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000003359; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03360; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03361; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3362; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v03363; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13364; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13365; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53366; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23367; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v03368; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13369; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v23370; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13371; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3372; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603373; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23374; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3375; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3376;3377; GISEL-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_inf:3378; GISEL-DAZ: ; %bb.0:3379; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3380; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000003381; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03382; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13383; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3384; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v03385; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13386; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13387; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53388; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23389; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13390; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v03391; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v23392; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13393; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3394; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603395; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23396; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3397; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3398 %result = call float @llvm.sqrt.f32(float %x)3399 ret float %result3400}3401 3402define float @v_sqrt_f32_known_never_zero_never_ninf(float nofpclass(zero ninf) %x) {3403; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_ninf:3404; SDAG-IEEE: ; %bb.0:3405; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3406; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000003407; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03408; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03409; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3410; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03411; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13412; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03413; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33414; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]3415; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v13416; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03417; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v13418; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]3419; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13420; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3421; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603422; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23423; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3424; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3425;3426; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_ninf:3427; GISEL-IEEE: ; %bb.0:3428; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3429; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000003430; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03431; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13432; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3433; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v03434; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13435; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03436; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v13437; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v03438; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33439; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]3440; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v53441; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]3442; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13443; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3444; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603445; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23446; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3447; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3448;3449; SDAG-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_ninf:3450; SDAG-DAZ: ; %bb.0:3451; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3452; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000003453; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03454; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03455; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3456; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v03457; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13458; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13459; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53460; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23461; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v03462; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13463; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v23464; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13465; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3466; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603467; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23468; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3469; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3470;3471; GISEL-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_ninf:3472; GISEL-DAZ: ; %bb.0:3473; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3474; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000003475; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03476; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13477; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3478; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v03479; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13480; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13481; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53482; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23483; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13484; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v03485; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v23486; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13487; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3488; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603489; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23490; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3491; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3492 %result = call float @llvm.sqrt.f32(float %x)3493 ret float %result3494}3495 3496define float @v_sqrt_f32_known_never_zero_never_pinf(float nofpclass(zero pinf) %x) {3497; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_pinf:3498; SDAG-IEEE: ; %bb.0:3499; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3500; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000003501; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03502; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03503; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3504; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03505; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13506; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03507; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33508; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]3509; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v13510; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03511; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v13512; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]3513; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13514; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3515; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603516; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23517; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3518; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3519;3520; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_pinf:3521; GISEL-IEEE: ; %bb.0:3522; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3523; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000003524; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03525; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13526; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3527; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v03528; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13529; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03530; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[4:5], 1, v13531; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v03532; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33533; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]3534; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v53535; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[4:5]3536; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13537; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3538; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603539; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23540; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3541; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3542;3543; SDAG-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_pinf:3544; SDAG-DAZ: ; %bb.0:3545; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3546; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000003547; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03548; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03549; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3550; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v03551; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13552; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13553; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53554; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23555; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v03556; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13557; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v23558; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13559; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3560; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603561; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23562; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3563; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3564;3565; GISEL-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_pinf:3566; GISEL-DAZ: ; %bb.0:3567; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3568; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000003569; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03570; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13571; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3572; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v03573; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13574; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13575; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53576; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23577; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13578; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v03579; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v23580; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13581; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3582; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603583; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23584; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3585; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3586 %result = call float @llvm.sqrt.f32(float %x)3587 ret float %result3588}3589 3590define float @v_sqrt_f32_frexp_src(float %x) {3591; SDAG-LABEL: v_sqrt_f32_frexp_src:3592; SDAG: ; %bb.0:3593; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3594; SDAG-NEXT: s_mov_b32 s4, 0x7f8000003595; SDAG-NEXT: v_frexp_mant_f32_e32 v1, v03596; SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43597; SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3598; SDAG-NEXT: s_mov_b32 s4, 0xf8000003599; SDAG-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03600; SDAG-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03601; SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3602; SDAG-NEXT: v_rsq_f32_e32 v1, v03603; SDAG-NEXT: v_mul_f32_e32 v2, v0, v13604; SDAG-NEXT: v_mul_f32_e32 v1, 0.5, v13605; SDAG-NEXT: v_fma_f32 v3, -v1, v2, 0.53606; SDAG-NEXT: v_fma_f32 v2, v2, v3, v23607; SDAG-NEXT: v_fma_f32 v4, -v2, v2, v03608; SDAG-NEXT: v_fma_f32 v1, v1, v3, v13609; SDAG-NEXT: v_fma_f32 v1, v4, v1, v23610; SDAG-NEXT: v_mul_f32_e32 v2, 0x37800000, v13611; SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3612; SDAG-NEXT: v_mov_b32_e32 v2, 0x2603613; SDAG-NEXT: v_cmp_class_f32_e32 vcc, v0, v23614; SDAG-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3615; SDAG-NEXT: s_setpc_b64 s[30:31]3616;3617; GISEL-LABEL: v_sqrt_f32_frexp_src:3618; GISEL: ; %bb.0:3619; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3620; GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003621; GISEL-NEXT: v_frexp_mant_f32_e32 v1, v03622; GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v23623; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3624; GISEL-NEXT: v_mov_b32_e32 v1, 0xf8000003625; GISEL-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03626; GISEL-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13627; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc3628; GISEL-NEXT: v_rsq_f32_e32 v1, v03629; GISEL-NEXT: v_mul_f32_e32 v2, v0, v13630; GISEL-NEXT: v_mul_f32_e32 v1, 0.5, v13631; GISEL-NEXT: v_fma_f32 v3, -v1, v2, 0.53632; GISEL-NEXT: v_fma_f32 v2, v2, v3, v23633; GISEL-NEXT: v_fma_f32 v1, v1, v3, v13634; GISEL-NEXT: v_fma_f32 v3, -v2, v2, v03635; GISEL-NEXT: v_fma_f32 v1, v3, v1, v23636; GISEL-NEXT: v_mul_f32_e32 v2, 0x37800000, v13637; GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3638; GISEL-NEXT: v_mov_b32_e32 v2, 0x2603639; GISEL-NEXT: v_cmp_class_f32_e32 vcc, v0, v23640; GISEL-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3641; GISEL-NEXT: s_setpc_b64 s[30:31]3642 %frexp = call { float, i32 } @llvm.frexp.f32.i32(float %x)3643 %frexp.mant = extractvalue { float, i32 } %frexp, 03644 %result = call float @llvm.sqrt.f32(float %frexp.mant)3645 ret float %result3646}3647 3648define float @v_sqrt_f32_ulp3_frexp_src(float %x) {3649; SDAG-LABEL: v_sqrt_f32_ulp3_frexp_src:3650; SDAG: ; %bb.0:3651; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3652; SDAG-NEXT: s_mov_b32 s4, 0x7f8000003653; SDAG-NEXT: v_frexp_mant_f32_e32 v1, v03654; SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s43655; SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3656; SDAG-NEXT: v_sqrt_f32_e32 v0, v03657; SDAG-NEXT: s_setpc_b64 s[30:31]3658;3659; GISEL-LABEL: v_sqrt_f32_ulp3_frexp_src:3660; GISEL: ; %bb.0:3661; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3662; GISEL-NEXT: v_mov_b32_e32 v2, 0x7f8000003663; GISEL-NEXT: v_frexp_mant_f32_e32 v1, v03664; GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v23665; GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3666; GISEL-NEXT: v_sqrt_f32_e32 v0, v03667; GISEL-NEXT: s_setpc_b64 s[30:31]3668 %frexp = call { float, i32 } @llvm.frexp.f32.i32(float %x)3669 %frexp.mant = extractvalue { float, i32 } %frexp, 03670 %result = call float @llvm.sqrt.f32(float %frexp.mant), !fpmath !43671 ret float %result3672}3673 3674define float @v_sqrt_f32_known_never_zero_never_ninf_ulp2(float nofpclass(zero ninf) %x) {3675; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_ninf_ulp2:3676; SDAG-IEEE: ; %bb.0:3677; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3678; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003679; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03680; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3681; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13682; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v03683; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3684; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13685; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3686;3687; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_zero_never_ninf_ulp2:3688; GISEL-IEEE: ; %bb.0:3689; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3690; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003691; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13692; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3693; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13694; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13695; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v03696; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3697; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13698; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3699;3700; GCN-DAZ-LABEL: v_sqrt_f32_known_never_zero_never_ninf_ulp2:3701; GCN-DAZ: ; %bb.0:3702; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3703; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v03704; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]3705 %result = call float @llvm.sqrt.f32(float %x), !fpmath !23706 ret float %result3707}3708 3709define float @v_sqrt_f32_known_never_ninf_ulp2(float nofpclass(ninf) %x) {3710; SDAG-IEEE-LABEL: v_sqrt_f32_known_never_ninf_ulp2:3711; SDAG-IEEE: ; %bb.0:3712; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3713; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003714; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03715; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3716; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13717; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v03718; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3719; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13720; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3721;3722; GISEL-IEEE-LABEL: v_sqrt_f32_known_never_ninf_ulp2:3723; GISEL-IEEE: ; %bb.0:3724; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3725; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003726; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13727; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3728; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13729; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13730; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v03731; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3732; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13733; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3734;3735; GCN-DAZ-LABEL: v_sqrt_f32_known_never_ninf_ulp2:3736; GCN-DAZ: ; %bb.0:3737; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3738; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v03739; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]3740 %result = call float @llvm.sqrt.f32(float %x), !fpmath !23741 ret float %result3742}3743 3744define float @v_sqrt_f32_nsz_known_never_ninf_ulp2(float nofpclass(ninf) %x) {3745; SDAG-IEEE-LABEL: v_sqrt_f32_nsz_known_never_ninf_ulp2:3746; SDAG-IEEE: ; %bb.0:3747; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3748; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003749; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03750; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3751; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13752; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v0, v03753; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3754; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13755; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3756;3757; GISEL-IEEE-LABEL: v_sqrt_f32_nsz_known_never_ninf_ulp2:3758; GISEL-IEEE: ; %bb.0:3759; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3760; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003761; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13762; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3763; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13764; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13765; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v0, v03766; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, -16, vcc3767; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v0, v0, v13768; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3769;3770; GCN-DAZ-LABEL: v_sqrt_f32_nsz_known_never_ninf_ulp2:3771; GCN-DAZ: ; %bb.0:3772; GCN-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3773; GCN-DAZ-NEXT: v_sqrt_f32_e32 v0, v03774; GCN-DAZ-NEXT: s_setpc_b64 s[30:31]3775 %result = call nsz float @llvm.sqrt.f32(float %x), !fpmath !23776 ret float %result3777}3778 3779define float @v_elim_redun_check_ult_sqrt(float %in) {3780; SDAG-IEEE-LABEL: v_elim_redun_check_ult_sqrt:3781; SDAG-IEEE: ; %bb.0:3782; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3783; SDAG-IEEE-NEXT: s_mov_b32 s4, 0xf8000003784; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03785; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03786; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3787; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03788; SDAG-IEEE-NEXT: v_add_i32_e64 v2, s[4:5], -1, v13789; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03790; SDAG-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v33791; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v1, v2, s[4:5]3792; SDAG-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], 1, v13793; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03794; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v13795; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v2, v3, s[4:5]3796; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13797; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3798; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603799; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23800; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3801; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3802;3803; GISEL-IEEE-LABEL: v_elim_redun_check_ult_sqrt:3804; GISEL-IEEE: ; %bb.0:3805; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3806; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0xf8000003807; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03808; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13809; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v0, v2, vcc3810; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v2, v13811; GISEL-IEEE-NEXT: v_add_i32_e64 v3, s[4:5], -1, v23812; GISEL-IEEE-NEXT: v_fma_f32 v4, -v3, v2, v13813; GISEL-IEEE-NEXT: v_add_i32_e64 v5, s[4:5], 1, v23814; GISEL-IEEE-NEXT: v_fma_f32 v6, -v5, v2, v13815; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[4:5], 0, v43816; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[4:5]3817; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[4:5], 0, v63818; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[4:5]3819; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v23820; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc3821; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x2603822; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v1, v33823; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc3824; GISEL-IEEE-NEXT: v_bfrev_b32_e32 v2, 13825; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x7fc000003826; GISEL-IEEE-NEXT: v_cmp_nge_f32_e32 vcc, v0, v23827; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc3828; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3829;3830; SDAG-DAZ-LABEL: v_elim_redun_check_ult_sqrt:3831; SDAG-DAZ: ; %bb.0:3832; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3833; SDAG-DAZ-NEXT: s_mov_b32 s4, 0xf8000003834; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0x4f800000, v03835; SDAG-DAZ-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03836; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc3837; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v03838; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v13839; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v13840; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.53841; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v23842; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v03843; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v13844; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v23845; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v13846; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3847; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2603848; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v23849; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3850; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3851;3852; GISEL-DAZ-LABEL: v_elim_redun_check_ult_sqrt:3853; GISEL-DAZ: ; %bb.0:3854; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3855; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0xf8000003856; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x4f800000, v03857; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13858; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v0, v2, vcc3859; GISEL-DAZ-NEXT: v_rsq_f32_e32 v2, v13860; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, v1, v23861; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0.5, v23862; GISEL-DAZ-NEXT: v_fma_f32 v4, -v2, v3, 0.53863; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v4, v33864; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v4, v23865; GISEL-DAZ-NEXT: v_fma_f32 v4, -v3, v3, v13866; GISEL-DAZ-NEXT: v_fma_f32 v2, v4, v2, v33867; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v23868; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc3869; GISEL-DAZ-NEXT: v_mov_b32_e32 v3, 0x2603870; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v1, v33871; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v2, v1, vcc3872; GISEL-DAZ-NEXT: v_bfrev_b32_e32 v2, 13873; GISEL-DAZ-NEXT: v_mov_b32_e32 v3, 0x7fc000003874; GISEL-DAZ-NEXT: v_cmp_nge_f32_e32 vcc, v0, v23875; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc3876; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3877 %sqrt = call float @llvm.sqrt.f32(float %in)3878 %cmp = fcmp ult float %in, -0.000000e+003879 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt3880 ret float %res3881}3882 3883define float @v_elim_redun_check_ult_sqrt_ulp3(float %in) {3884; SDAG-IEEE-LABEL: v_elim_redun_check_ult_sqrt_ulp3:3885; SDAG-IEEE: ; %bb.0:3886; SDAG-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3887; SDAG-IEEE-NEXT: s_mov_b32 s4, 0x8000003888; SDAG-IEEE-NEXT: v_cmp_gt_f32_e32 vcc, s4, v03889; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 32, vcc3890; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v0, v13891; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v13892; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc3893; SDAG-IEEE-NEXT: s_brev_b32 s4, 13894; SDAG-IEEE-NEXT: v_cmp_le_f32_e32 vcc, s4, v03895; SDAG-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v23896; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x7fc000003897; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc3898; SDAG-IEEE-NEXT: s_setpc_b64 s[30:31]3899;3900; GISEL-IEEE-LABEL: v_elim_redun_check_ult_sqrt_ulp3:3901; GISEL-IEEE: ; %bb.0:3902; GISEL-IEEE-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3903; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x8000003904; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, v0, v13905; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, 0, 1, vcc3906; GISEL-IEEE-NEXT: v_lshlrev_b32_e32 v1, 5, v13907; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v0, v13908; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v13909; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, 0, -16, vcc3910; GISEL-IEEE-NEXT: v_mov_b32_e32 v3, 0x7fc000003911; GISEL-IEEE-NEXT: v_ldexp_f32_e32 v1, v1, v23912; GISEL-IEEE-NEXT: v_bfrev_b32_e32 v2, 13913; GISEL-IEEE-NEXT: v_cmp_nge_f32_e32 vcc, v0, v23914; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc3915; GISEL-IEEE-NEXT: s_setpc_b64 s[30:31]3916;3917; SDAG-DAZ-LABEL: v_elim_redun_check_ult_sqrt_ulp3:3918; SDAG-DAZ: ; %bb.0:3919; SDAG-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3920; SDAG-DAZ-NEXT: v_sqrt_f32_e32 v1, v03921; SDAG-DAZ-NEXT: s_brev_b32 s4, 13922; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x7fc000003923; SDAG-DAZ-NEXT: v_cmp_le_f32_e32 vcc, s4, v03924; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc3925; SDAG-DAZ-NEXT: s_setpc_b64 s[30:31]3926;3927; GISEL-DAZ-LABEL: v_elim_redun_check_ult_sqrt_ulp3:3928; GISEL-DAZ: ; %bb.0:3929; GISEL-DAZ-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3930; GISEL-DAZ-NEXT: v_sqrt_f32_e32 v1, v03931; GISEL-DAZ-NEXT: v_bfrev_b32_e32 v2, 13932; GISEL-DAZ-NEXT: v_mov_b32_e32 v3, 0x7fc000003933; GISEL-DAZ-NEXT: v_cmp_nge_f32_e32 vcc, v0, v23934; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v3, vcc3935; GISEL-DAZ-NEXT: s_setpc_b64 s[30:31]3936 %sqrt = call float @llvm.sqrt.f32(float %in), !fpmath !43937 %cmp = fcmp ult float %in, -0.000000e+003938 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt3939 ret float %res3940}3941 3942define amdgpu_kernel void @elim_redun_check_neg0(ptr addrspace(1) %out, float %in) {3943; SDAG-IEEE-LABEL: elim_redun_check_neg0:3944; SDAG-IEEE: ; %bb.0: ; %entry3945; SDAG-IEEE-NEXT: s_load_dword s0, s[4:5], 0xb3946; SDAG-IEEE-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x93947; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000003948; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000003949; SDAG-IEEE-NEXT: s_mov_b32 s7, 0xf0003950; SDAG-IEEE-NEXT: s_waitcnt lgkmcnt(0)3951; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s0, v13952; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, s03953; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, v03954; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]3955; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v03956; SDAG-IEEE-NEXT: s_mov_b32 s6, -13957; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v13958; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03959; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v33960; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc3961; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v13962; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v03963; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v13964; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc3965; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13966; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]3967; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603968; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23969; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc3970; SDAG-IEEE-NEXT: buffer_store_dword v0, off, s[4:7], 03971; SDAG-IEEE-NEXT: s_endpgm3972;3973; GISEL-IEEE-LABEL: elim_redun_check_neg0:3974; GISEL-IEEE: ; %bb.0: ; %entry3975; GISEL-IEEE-NEXT: s_load_dword s2, s[4:5], 0xb3976; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000003977; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000003978; GISEL-IEEE-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x93979; GISEL-IEEE-NEXT: s_mov_b32 s6, -13980; GISEL-IEEE-NEXT: s_waitcnt lgkmcnt(0)3981; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, s23982; GISEL-IEEE-NEXT: v_mul_f32_e32 v1, s2, v13983; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s2, v03984; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc3985; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v03986; GISEL-IEEE-NEXT: s_mov_b32 s7, 0xf0003987; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[0:1], -1, v13988; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v03989; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], 1, v13990; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v03991; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v33992; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]3993; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v53994; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1]3995; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v13996; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc3997; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2603998; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v23999; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4000; GISEL-IEEE-NEXT: v_bfrev_b32_e32 v1, 14001; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x7fc000004002; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s2, v14003; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc4004; GISEL-IEEE-NEXT: buffer_store_dword v0, off, s[4:7], 04005; GISEL-IEEE-NEXT: s_endpgm4006;4007; SDAG-DAZ-LABEL: elim_redun_check_neg0:4008; SDAG-DAZ: ; %bb.0: ; %entry4009; SDAG-DAZ-NEXT: s_load_dword s0, s[4:5], 0xb4010; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004011; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004012; SDAG-DAZ-NEXT: s_mov_b32 s3, 0xf0004013; SDAG-DAZ-NEXT: s_mov_b32 s2, -14014; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4015; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s0, v14016; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, s04017; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v04018; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4019; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v04020; SDAG-DAZ-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x94021; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v14022; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14023; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.54024; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v24025; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v04026; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v14027; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v24028; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v14029; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4030; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2604031; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v24032; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4033; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4034; SDAG-DAZ-NEXT: buffer_store_dword v0, off, s[0:3], 04035; SDAG-DAZ-NEXT: s_endpgm4036;4037; GISEL-DAZ-LABEL: elim_redun_check_neg0:4038; GISEL-DAZ: ; %bb.0: ; %entry4039; GISEL-DAZ-NEXT: s_load_dword s2, s[4:5], 0xb4040; GISEL-DAZ-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x94041; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004042; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004043; GISEL-DAZ-NEXT: s_mov_b32 s3, 0xf0004044; GISEL-DAZ-NEXT: s_waitcnt lgkmcnt(0)4045; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, s24046; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, s2, v14047; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04048; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4049; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v04050; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v14051; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14052; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.54053; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v24054; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v14055; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v04056; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v24057; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v14058; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4059; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2604060; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v24061; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4062; GISEL-DAZ-NEXT: v_bfrev_b32_e32 v1, 14063; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x7fc000004064; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s2, v14065; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc4066; GISEL-DAZ-NEXT: s_mov_b32 s2, -14067; GISEL-DAZ-NEXT: buffer_store_dword v0, off, s[0:3], 04068; GISEL-DAZ-NEXT: s_endpgm4069entry:4070 %sqrt = call float @llvm.sqrt.f32(float %in)4071 %cmp = fcmp olt float %in, -0.000000e+004072 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt4073 store float %res, ptr addrspace(1) %out4074 ret void4075}4076 4077define amdgpu_kernel void @elim_redun_check_pos0(ptr addrspace(1) %out, float %in) {4078; SDAG-IEEE-LABEL: elim_redun_check_pos0:4079; SDAG-IEEE: ; %bb.0: ; %entry4080; SDAG-IEEE-NEXT: s_load_dword s0, s[4:5], 0xb4081; SDAG-IEEE-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x94082; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004083; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004084; SDAG-IEEE-NEXT: s_mov_b32 s7, 0xf0004085; SDAG-IEEE-NEXT: s_waitcnt lgkmcnt(0)4086; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s0, v14087; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, s04088; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, v04089; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]4090; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v04091; SDAG-IEEE-NEXT: s_mov_b32 s6, -14092; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v14093; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v04094; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v34095; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc4096; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v14097; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v04098; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v14099; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc4100; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v14101; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]4102; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2604103; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v24104; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4105; SDAG-IEEE-NEXT: buffer_store_dword v0, off, s[4:7], 04106; SDAG-IEEE-NEXT: s_endpgm4107;4108; GISEL-IEEE-LABEL: elim_redun_check_pos0:4109; GISEL-IEEE: ; %bb.0: ; %entry4110; GISEL-IEEE-NEXT: s_load_dword s2, s[4:5], 0xb4111; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004112; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004113; GISEL-IEEE-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x94114; GISEL-IEEE-NEXT: s_mov_b32 s6, -14115; GISEL-IEEE-NEXT: s_waitcnt lgkmcnt(0)4116; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, s24117; GISEL-IEEE-NEXT: v_mul_f32_e32 v1, s2, v14118; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04119; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4120; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v04121; GISEL-IEEE-NEXT: s_mov_b32 s7, 0xf0004122; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[0:1], -1, v14123; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v04124; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], 1, v14125; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v04126; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v34127; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]4128; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v54129; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1]4130; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v14131; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4132; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2604133; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v24134; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4135; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x7fc000004136; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 vcc, s2, 04137; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4138; GISEL-IEEE-NEXT: buffer_store_dword v0, off, s[4:7], 04139; GISEL-IEEE-NEXT: s_endpgm4140;4141; SDAG-DAZ-LABEL: elim_redun_check_pos0:4142; SDAG-DAZ: ; %bb.0: ; %entry4143; SDAG-DAZ-NEXT: s_load_dword s0, s[4:5], 0xb4144; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004145; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004146; SDAG-DAZ-NEXT: s_mov_b32 s3, 0xf0004147; SDAG-DAZ-NEXT: s_mov_b32 s2, -14148; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4149; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s0, v14150; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, s04151; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v04152; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4153; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v04154; SDAG-DAZ-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x94155; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v14156; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14157; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.54158; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v24159; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v04160; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v14161; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v24162; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v14163; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4164; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2604165; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v24166; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4167; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4168; SDAG-DAZ-NEXT: buffer_store_dword v0, off, s[0:3], 04169; SDAG-DAZ-NEXT: s_endpgm4170;4171; GISEL-DAZ-LABEL: elim_redun_check_pos0:4172; GISEL-DAZ: ; %bb.0: ; %entry4173; GISEL-DAZ-NEXT: s_load_dword s2, s[4:5], 0xb4174; GISEL-DAZ-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x94175; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004176; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004177; GISEL-DAZ-NEXT: s_mov_b32 s3, 0xf0004178; GISEL-DAZ-NEXT: s_waitcnt lgkmcnt(0)4179; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, s24180; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, s2, v14181; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04182; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4183; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v04184; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v14185; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14186; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.54187; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v24188; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v14189; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v04190; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v24191; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v14192; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4193; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2604194; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v24195; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4196; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0x7fc000004197; GISEL-DAZ-NEXT: v_cmp_lt_f32_e64 vcc, s2, 04198; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc4199; GISEL-DAZ-NEXT: s_mov_b32 s2, -14200; GISEL-DAZ-NEXT: buffer_store_dword v0, off, s[0:3], 04201; GISEL-DAZ-NEXT: s_endpgm4202entry:4203 %sqrt = call float @llvm.sqrt.f32(float %in)4204 %cmp = fcmp olt float %in, 0.000000e+004205 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt4206 store float %res, ptr addrspace(1) %out4207 ret void4208}4209 4210define amdgpu_kernel void @elim_redun_check_ult(ptr addrspace(1) %out, float %in) {4211; SDAG-IEEE-LABEL: elim_redun_check_ult:4212; SDAG-IEEE: ; %bb.0: ; %entry4213; SDAG-IEEE-NEXT: s_load_dword s0, s[4:5], 0xb4214; SDAG-IEEE-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x94215; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004216; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004217; SDAG-IEEE-NEXT: s_mov_b32 s7, 0xf0004218; SDAG-IEEE-NEXT: s_waitcnt lgkmcnt(0)4219; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s0, v14220; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, s04221; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s0, v04222; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]4223; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v1, v04224; SDAG-IEEE-NEXT: s_mov_b32 s6, -14225; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v14226; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v04227; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v34228; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v1, v2, vcc4229; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v14230; SDAG-IEEE-NEXT: v_fma_f32 v1, -v3, v1, v04231; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v14232; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc4233; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v14234; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]4235; SDAG-IEEE-NEXT: v_mov_b32_e32 v2, 0x2604236; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v24237; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4238; SDAG-IEEE-NEXT: buffer_store_dword v0, off, s[4:7], 04239; SDAG-IEEE-NEXT: s_endpgm4240;4241; GISEL-IEEE-LABEL: elim_redun_check_ult:4242; GISEL-IEEE: ; %bb.0: ; %entry4243; GISEL-IEEE-NEXT: s_load_dword s2, s[4:5], 0xb4244; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004245; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004246; GISEL-IEEE-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x94247; GISEL-IEEE-NEXT: s_mov_b32 s6, -14248; GISEL-IEEE-NEXT: s_waitcnt lgkmcnt(0)4249; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, s24250; GISEL-IEEE-NEXT: v_mul_f32_e32 v1, s2, v14251; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04252; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4253; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v04254; GISEL-IEEE-NEXT: s_mov_b32 s7, 0xf0004255; GISEL-IEEE-NEXT: v_add_i32_e64 v2, s[0:1], -1, v14256; GISEL-IEEE-NEXT: v_fma_f32 v3, -v2, v1, v04257; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], 1, v14258; GISEL-IEEE-NEXT: v_fma_f32 v5, -v4, v1, v04259; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v34260; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[0:1]4261; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v54262; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v4, s[0:1]4263; GISEL-IEEE-NEXT: v_mul_f32_e32 v2, 0x37800000, v14264; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4265; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x2604266; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v24267; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4268; GISEL-IEEE-NEXT: v_bfrev_b32_e32 v1, 14269; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, 0x7fc000004270; GISEL-IEEE-NEXT: v_cmp_nge_f32_e32 vcc, s2, v14271; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc4272; GISEL-IEEE-NEXT: buffer_store_dword v0, off, s[4:7], 04273; GISEL-IEEE-NEXT: s_endpgm4274;4275; SDAG-DAZ-LABEL: elim_redun_check_ult:4276; SDAG-DAZ: ; %bb.0: ; %entry4277; SDAG-DAZ-NEXT: s_load_dword s0, s[4:5], 0xb4278; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004279; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004280; SDAG-DAZ-NEXT: s_mov_b32 s3, 0xf0004281; SDAG-DAZ-NEXT: s_mov_b32 s2, -14282; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4283; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s0, v14284; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, s04285; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s0, v04286; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4287; SDAG-DAZ-NEXT: v_rsq_f32_e32 v1, v04288; SDAG-DAZ-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x94289; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v14290; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14291; SDAG-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.54292; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v3, v24293; SDAG-DAZ-NEXT: v_fma_f32 v4, -v2, v2, v04294; SDAG-DAZ-NEXT: v_fma_f32 v1, v1, v3, v14295; SDAG-DAZ-NEXT: v_fma_f32 v1, v4, v1, v24296; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v14297; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4298; SDAG-DAZ-NEXT: v_mov_b32_e32 v2, 0x2604299; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v24300; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4301; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4302; SDAG-DAZ-NEXT: buffer_store_dword v0, off, s[0:3], 04303; SDAG-DAZ-NEXT: s_endpgm4304;4305; GISEL-DAZ-LABEL: elim_redun_check_ult:4306; GISEL-DAZ: ; %bb.0: ; %entry4307; GISEL-DAZ-NEXT: s_load_dword s2, s[4:5], 0xb4308; GISEL-DAZ-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x94309; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004310; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004311; GISEL-DAZ-NEXT: s_mov_b32 s3, 0xf0004312; GISEL-DAZ-NEXT: s_waitcnt lgkmcnt(0)4313; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, s24314; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, s2, v14315; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04316; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc4317; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v04318; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, v0, v14319; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14320; GISEL-DAZ-NEXT: v_fma_f32 v3, -v1, v2, 0.54321; GISEL-DAZ-NEXT: v_fma_f32 v2, v2, v3, v24322; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v3, v14323; GISEL-DAZ-NEXT: v_fma_f32 v3, -v2, v2, v04324; GISEL-DAZ-NEXT: v_fma_f32 v1, v3, v1, v24325; GISEL-DAZ-NEXT: v_mul_f32_e32 v2, 0x37800000, v14326; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc4327; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x2604328; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v24329; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc4330; GISEL-DAZ-NEXT: v_bfrev_b32_e32 v1, 14331; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, 0x7fc000004332; GISEL-DAZ-NEXT: v_cmp_nge_f32_e32 vcc, s2, v14333; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc4334; GISEL-DAZ-NEXT: s_mov_b32 s2, -14335; GISEL-DAZ-NEXT: buffer_store_dword v0, off, s[0:3], 04336; GISEL-DAZ-NEXT: s_endpgm4337entry:4338 %sqrt = call float @llvm.sqrt.f32(float %in)4339 %cmp = fcmp ult float %in, -0.000000e+004340 %res = select i1 %cmp, float 0x7FF8000000000000, float %sqrt4341 store float %res, ptr addrspace(1) %out4342 ret void4343}4344 4345define amdgpu_kernel void @elim_redun_check_v2(ptr addrspace(1) %out, <2 x float> %in) {4346; SDAG-IEEE-LABEL: elim_redun_check_v2:4347; SDAG-IEEE: ; %bb.0: ; %entry4348; SDAG-IEEE-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x94349; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004350; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004351; SDAG-IEEE-NEXT: s_mov_b32 s7, 0xf0004352; SDAG-IEEE-NEXT: s_mov_b32 s6, -14353; SDAG-IEEE-NEXT: s_waitcnt lgkmcnt(0)4354; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, s11, v14355; SDAG-IEEE-NEXT: v_mov_b32_e32 v3, s114356; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v04357; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]4358; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v3, v24359; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s10, v14360; SDAG-IEEE-NEXT: s_mov_b32 s4, s84361; SDAG-IEEE-NEXT: s_mov_b32 s5, s94362; SDAG-IEEE-NEXT: v_add_i32_e32 v4, vcc, -1, v34363; SDAG-IEEE-NEXT: v_fma_f32 v5, -v4, v3, v24364; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v54365; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc4366; SDAG-IEEE-NEXT: v_add_i32_e32 v5, vcc, 1, v34367; SDAG-IEEE-NEXT: v_fma_f32 v3, -v5, v3, v24368; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v34369; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc4370; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v34371; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1]4372; SDAG-IEEE-NEXT: v_mov_b32_e32 v5, s104373; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s10, v04374; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v5, v1, s[0:1]4375; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v5, v04376; SDAG-IEEE-NEXT: v_mov_b32_e32 v4, 0x2604377; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v2, v44378; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc4379; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v54380; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v5, v04381; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v34382; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc4383; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v54384; SDAG-IEEE-NEXT: v_fma_f32 v5, -v3, v5, v04385; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v54386; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4387; SDAG-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v24388; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]4389; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v44390; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc4391; SDAG-IEEE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04392; SDAG-IEEE-NEXT: s_endpgm4393;4394; GISEL-IEEE-LABEL: elim_redun_check_v2:4395; GISEL-IEEE: ; %bb.0: ; %entry4396; GISEL-IEEE-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x94397; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004398; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004399; GISEL-IEEE-NEXT: s_waitcnt lgkmcnt(0)4400; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, s64401; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, s6, v14402; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s6, v04403; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4404; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v3, v24405; GISEL-IEEE-NEXT: v_mul_f32_e32 v1, s7, v14406; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], -1, v34407; GISEL-IEEE-NEXT: v_add_i32_e64 v5, s[0:1], 1, v34408; GISEL-IEEE-NEXT: v_fma_f32 v6, -v4, v3, v24409; GISEL-IEEE-NEXT: v_fma_f32 v7, -v5, v3, v24410; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v64411; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1]4412; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v74413; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[0:1]4414; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v34415; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc4416; GISEL-IEEE-NEXT: v_mov_b32_e32 v5, s74417; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s7, v04418; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v5, v1, vcc4419; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v04420; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x2604421; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[0:1], v2, v44422; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]4423; GISEL-IEEE-NEXT: v_add_i32_e64 v3, s[0:1], -1, v14424; GISEL-IEEE-NEXT: v_fma_f32 v5, -v3, v1, v04425; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[0:1], 1, v14426; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v1, v04427; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v54428; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]4429; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v74430; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v6, s[0:1]4431; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v14432; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc4433; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v44434; GISEL-IEEE-NEXT: v_bfrev_b32_e32 v3, 14435; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc4436; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x7fc000004437; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s6, v34438; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc4439; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s7, v34440; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc4441; GISEL-IEEE-NEXT: s_mov_b32 s6, -14442; GISEL-IEEE-NEXT: s_mov_b32 s7, 0xf0004443; GISEL-IEEE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04444; GISEL-IEEE-NEXT: s_endpgm4445;4446; SDAG-DAZ-LABEL: elim_redun_check_v2:4447; SDAG-DAZ: ; %bb.0: ; %entry4448; SDAG-DAZ-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x94449; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004450; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004451; SDAG-DAZ-NEXT: s_mov_b32 s7, 0xf0004452; SDAG-DAZ-NEXT: s_mov_b32 s6, -14453; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4454; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, s3, v14455; SDAG-DAZ-NEXT: v_mov_b32_e32 v3, s34456; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s3, v04457; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc4458; SDAG-DAZ-NEXT: v_rsq_f32_e32 v3, v24459; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s2, v14460; SDAG-DAZ-NEXT: s_mov_b32 s4, s04461; SDAG-DAZ-NEXT: s_mov_b32 s5, s14462; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, v2, v34463; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v34464; SDAG-DAZ-NEXT: v_fma_f32 v5, -v3, v4, 0.54465; SDAG-DAZ-NEXT: v_fma_f32 v4, v4, v5, v44466; SDAG-DAZ-NEXT: v_fma_f32 v6, -v4, v4, v24467; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v5, v34468; SDAG-DAZ-NEXT: v_fma_f32 v3, v6, v3, v44469; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v34470; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc4471; SDAG-DAZ-NEXT: v_mov_b32_e32 v4, s24472; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04473; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc4474; SDAG-DAZ-NEXT: v_rsq_f32_e32 v4, v04475; SDAG-DAZ-NEXT: v_mov_b32_e32 v5, 0x2604476; SDAG-DAZ-NEXT: v_cmp_class_f32_e64 s[0:1], v2, v54477; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v1, v3, v2, s[0:1]4478; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v44479; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v44480; SDAG-DAZ-NEXT: v_fma_f32 v4, -v3, v2, 0.54481; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v4, v24482; SDAG-DAZ-NEXT: v_fma_f32 v6, -v2, v2, v04483; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v4, v34484; SDAG-DAZ-NEXT: v_fma_f32 v2, v6, v3, v24485; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v24486; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4487; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v54488; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc4489; SDAG-DAZ-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04490; SDAG-DAZ-NEXT: s_endpgm4491;4492; GISEL-DAZ-LABEL: elim_redun_check_v2:4493; GISEL-DAZ: ; %bb.0: ; %entry4494; GISEL-DAZ-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x94495; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004496; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004497; GISEL-DAZ-NEXT: s_waitcnt lgkmcnt(0)4498; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, s64499; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, s6, v14500; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s6, v04501; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4502; GISEL-DAZ-NEXT: v_rsq_f32_e32 v3, v24503; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, s74504; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, s7, v14505; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, v2, v34506; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v34507; GISEL-DAZ-NEXT: v_fma_f32 v6, -v3, v5, 0.54508; GISEL-DAZ-NEXT: v_fma_f32 v5, v5, v6, v54509; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v6, v34510; GISEL-DAZ-NEXT: v_fma_f32 v6, -v5, v5, v24511; GISEL-DAZ-NEXT: v_fma_f32 v3, v6, v3, v54512; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, 0x37800000, v34513; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc4514; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s7, v04515; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc4516; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v04517; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, 0x2604518; GISEL-DAZ-NEXT: v_cmp_class_f32_e64 s[0:1], v2, v44519; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]4520; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, v0, v14521; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14522; GISEL-DAZ-NEXT: v_fma_f32 v5, -v1, v3, 0.54523; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v5, v34524; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v5, v14525; GISEL-DAZ-NEXT: v_fma_f32 v5, -v3, v3, v04526; GISEL-DAZ-NEXT: v_fma_f32 v1, v5, v1, v34527; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v14528; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc4529; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v44530; GISEL-DAZ-NEXT: v_bfrev_b32_e32 v3, 14531; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc4532; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, 0x7fc000004533; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s6, v34534; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc4535; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s7, v34536; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc4537; GISEL-DAZ-NEXT: s_mov_b32 s6, -14538; GISEL-DAZ-NEXT: s_mov_b32 s7, 0xf0004539; GISEL-DAZ-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04540; GISEL-DAZ-NEXT: s_endpgm4541entry:4542 %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)4543 %cmp = fcmp olt <2 x float> %in, <float -0.000000e+00, float -0.000000e+00>4544 %res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt4545 store <2 x float> %res, ptr addrspace(1) %out4546 ret void4547}4548 4549define amdgpu_kernel void @elim_redun_check_v2_ult(ptr addrspace(1) %out, <2 x float> %in) {4550; SDAG-IEEE-LABEL: elim_redun_check_v2_ult:4551; SDAG-IEEE: ; %bb.0: ; %entry4552; SDAG-IEEE-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x94553; SDAG-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004554; SDAG-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004555; SDAG-IEEE-NEXT: s_mov_b32 s7, 0xf0004556; SDAG-IEEE-NEXT: s_mov_b32 s6, -14557; SDAG-IEEE-NEXT: s_waitcnt lgkmcnt(0)4558; SDAG-IEEE-NEXT: v_mul_f32_e32 v2, s11, v14559; SDAG-IEEE-NEXT: v_mov_b32_e32 v3, s114560; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s11, v04561; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]4562; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v3, v24563; SDAG-IEEE-NEXT: v_mul_f32_e32 v1, s10, v14564; SDAG-IEEE-NEXT: s_mov_b32 s4, s84565; SDAG-IEEE-NEXT: s_mov_b32 s5, s94566; SDAG-IEEE-NEXT: v_add_i32_e32 v4, vcc, -1, v34567; SDAG-IEEE-NEXT: v_fma_f32 v5, -v4, v3, v24568; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v54569; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v4, v3, v4, vcc4570; SDAG-IEEE-NEXT: v_add_i32_e32 v5, vcc, 1, v34571; SDAG-IEEE-NEXT: v_fma_f32 v3, -v5, v3, v24572; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v34573; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc4574; SDAG-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v34575; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1]4576; SDAG-IEEE-NEXT: v_mov_b32_e32 v5, s104577; SDAG-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], s10, v04578; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v0, v5, v1, s[0:1]4579; SDAG-IEEE-NEXT: v_sqrt_f32_e32 v5, v04580; SDAG-IEEE-NEXT: v_mov_b32_e32 v4, 0x2604581; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v2, v44582; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v1, v3, v2, vcc4583; SDAG-IEEE-NEXT: v_add_i32_e32 v2, vcc, -1, v54584; SDAG-IEEE-NEXT: v_fma_f32 v3, -v2, v5, v04585; SDAG-IEEE-NEXT: v_cmp_ge_f32_e32 vcc, 0, v34586; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v5, v2, vcc4587; SDAG-IEEE-NEXT: v_add_i32_e32 v3, vcc, 1, v54588; SDAG-IEEE-NEXT: v_fma_f32 v5, -v3, v5, v04589; SDAG-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, 0, v54590; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4591; SDAG-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v24592; SDAG-IEEE-NEXT: v_cndmask_b32_e64 v2, v2, v3, s[0:1]4593; SDAG-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v44594; SDAG-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc4595; SDAG-IEEE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04596; SDAG-IEEE-NEXT: s_endpgm4597;4598; GISEL-IEEE-LABEL: elim_redun_check_v2_ult:4599; GISEL-IEEE: ; %bb.0: ; %entry4600; GISEL-IEEE-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x94601; GISEL-IEEE-NEXT: v_mov_b32_e32 v0, 0xf8000004602; GISEL-IEEE-NEXT: v_mov_b32_e32 v1, 0x4f8000004603; GISEL-IEEE-NEXT: s_waitcnt lgkmcnt(0)4604; GISEL-IEEE-NEXT: v_mov_b32_e32 v2, s64605; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, s6, v14606; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s6, v04607; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4608; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v3, v24609; GISEL-IEEE-NEXT: v_mul_f32_e32 v1, s7, v14610; GISEL-IEEE-NEXT: v_add_i32_e64 v4, s[0:1], -1, v34611; GISEL-IEEE-NEXT: v_add_i32_e64 v5, s[0:1], 1, v34612; GISEL-IEEE-NEXT: v_fma_f32 v6, -v4, v3, v24613; GISEL-IEEE-NEXT: v_fma_f32 v7, -v5, v3, v24614; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v64615; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1]4616; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v74617; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[0:1]4618; GISEL-IEEE-NEXT: v_mul_f32_e32 v4, 0x37800000, v34619; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc4620; GISEL-IEEE-NEXT: v_mov_b32_e32 v5, s74621; GISEL-IEEE-NEXT: v_cmp_lt_f32_e32 vcc, s7, v04622; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v5, v1, vcc4623; GISEL-IEEE-NEXT: v_sqrt_f32_e32 v1, v04624; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x2604625; GISEL-IEEE-NEXT: v_cmp_class_f32_e64 s[0:1], v2, v44626; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]4627; GISEL-IEEE-NEXT: v_add_i32_e64 v3, s[0:1], -1, v14628; GISEL-IEEE-NEXT: v_fma_f32 v5, -v3, v1, v04629; GISEL-IEEE-NEXT: v_add_i32_e64 v6, s[0:1], 1, v14630; GISEL-IEEE-NEXT: v_fma_f32 v7, -v6, v1, v04631; GISEL-IEEE-NEXT: v_cmp_ge_f32_e64 s[0:1], 0, v54632; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]4633; GISEL-IEEE-NEXT: v_cmp_lt_f32_e64 s[0:1], 0, v74634; GISEL-IEEE-NEXT: v_cndmask_b32_e64 v1, v1, v6, s[0:1]4635; GISEL-IEEE-NEXT: v_mul_f32_e32 v3, 0x37800000, v14636; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc4637; GISEL-IEEE-NEXT: v_cmp_class_f32_e32 vcc, v0, v44638; GISEL-IEEE-NEXT: v_bfrev_b32_e32 v3, 14639; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc4640; GISEL-IEEE-NEXT: v_mov_b32_e32 v4, 0x7fc000004641; GISEL-IEEE-NEXT: v_cmp_nge_f32_e32 vcc, s6, v34642; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc4643; GISEL-IEEE-NEXT: v_cmp_nge_f32_e32 vcc, s7, v34644; GISEL-IEEE-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc4645; GISEL-IEEE-NEXT: s_mov_b32 s6, -14646; GISEL-IEEE-NEXT: s_mov_b32 s7, 0xf0004647; GISEL-IEEE-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04648; GISEL-IEEE-NEXT: s_endpgm4649;4650; SDAG-DAZ-LABEL: elim_redun_check_v2_ult:4651; SDAG-DAZ: ; %bb.0: ; %entry4652; SDAG-DAZ-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x94653; SDAG-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004654; SDAG-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004655; SDAG-DAZ-NEXT: s_mov_b32 s7, 0xf0004656; SDAG-DAZ-NEXT: s_mov_b32 s6, -14657; SDAG-DAZ-NEXT: s_waitcnt lgkmcnt(0)4658; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, s3, v14659; SDAG-DAZ-NEXT: v_mov_b32_e32 v3, s34660; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s3, v04661; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc4662; SDAG-DAZ-NEXT: v_rsq_f32_e32 v3, v24663; SDAG-DAZ-NEXT: v_mul_f32_e32 v1, s2, v14664; SDAG-DAZ-NEXT: s_mov_b32 s4, s04665; SDAG-DAZ-NEXT: s_mov_b32 s5, s14666; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, v2, v34667; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v34668; SDAG-DAZ-NEXT: v_fma_f32 v5, -v3, v4, 0.54669; SDAG-DAZ-NEXT: v_fma_f32 v4, v4, v5, v44670; SDAG-DAZ-NEXT: v_fma_f32 v6, -v4, v4, v24671; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v5, v34672; SDAG-DAZ-NEXT: v_fma_f32 v3, v6, v3, v44673; SDAG-DAZ-NEXT: v_mul_f32_e32 v4, 0x37800000, v34674; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc4675; SDAG-DAZ-NEXT: v_mov_b32_e32 v4, s24676; SDAG-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s2, v04677; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc4678; SDAG-DAZ-NEXT: v_rsq_f32_e32 v4, v04679; SDAG-DAZ-NEXT: v_mov_b32_e32 v5, 0x2604680; SDAG-DAZ-NEXT: v_cmp_class_f32_e64 s[0:1], v2, v54681; SDAG-DAZ-NEXT: v_cndmask_b32_e64 v1, v3, v2, s[0:1]4682; SDAG-DAZ-NEXT: v_mul_f32_e32 v2, v0, v44683; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v44684; SDAG-DAZ-NEXT: v_fma_f32 v4, -v3, v2, 0.54685; SDAG-DAZ-NEXT: v_fma_f32 v2, v2, v4, v24686; SDAG-DAZ-NEXT: v_fma_f32 v6, -v2, v2, v04687; SDAG-DAZ-NEXT: v_fma_f32 v3, v3, v4, v34688; SDAG-DAZ-NEXT: v_fma_f32 v2, v6, v3, v24689; SDAG-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v24690; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4691; SDAG-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v54692; SDAG-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc4693; SDAG-DAZ-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04694; SDAG-DAZ-NEXT: s_endpgm4695;4696; GISEL-DAZ-LABEL: elim_redun_check_v2_ult:4697; GISEL-DAZ: ; %bb.0: ; %entry4698; GISEL-DAZ-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x94699; GISEL-DAZ-NEXT: v_mov_b32_e32 v0, 0xf8000004700; GISEL-DAZ-NEXT: v_mov_b32_e32 v1, 0x4f8000004701; GISEL-DAZ-NEXT: s_waitcnt lgkmcnt(0)4702; GISEL-DAZ-NEXT: v_mov_b32_e32 v2, s64703; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, s6, v14704; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s6, v04705; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc4706; GISEL-DAZ-NEXT: v_rsq_f32_e32 v3, v24707; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, s74708; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, s7, v14709; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, v2, v34710; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0.5, v34711; GISEL-DAZ-NEXT: v_fma_f32 v6, -v3, v5, 0.54712; GISEL-DAZ-NEXT: v_fma_f32 v5, v5, v6, v54713; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v6, v34714; GISEL-DAZ-NEXT: v_fma_f32 v6, -v5, v5, v24715; GISEL-DAZ-NEXT: v_fma_f32 v3, v6, v3, v54716; GISEL-DAZ-NEXT: v_mul_f32_e32 v5, 0x37800000, v34717; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc4718; GISEL-DAZ-NEXT: v_cmp_lt_f32_e32 vcc, s7, v04719; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v4, v1, vcc4720; GISEL-DAZ-NEXT: v_rsq_f32_e32 v1, v04721; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, 0x2604722; GISEL-DAZ-NEXT: v_cmp_class_f32_e64 s[0:1], v2, v44723; GISEL-DAZ-NEXT: v_cndmask_b32_e64 v2, v3, v2, s[0:1]4724; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, v0, v14725; GISEL-DAZ-NEXT: v_mul_f32_e32 v1, 0.5, v14726; GISEL-DAZ-NEXT: v_fma_f32 v5, -v1, v3, 0.54727; GISEL-DAZ-NEXT: v_fma_f32 v3, v3, v5, v34728; GISEL-DAZ-NEXT: v_fma_f32 v1, v1, v5, v14729; GISEL-DAZ-NEXT: v_fma_f32 v5, -v3, v3, v04730; GISEL-DAZ-NEXT: v_fma_f32 v1, v5, v1, v34731; GISEL-DAZ-NEXT: v_mul_f32_e32 v3, 0x37800000, v14732; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc4733; GISEL-DAZ-NEXT: v_cmp_class_f32_e32 vcc, v0, v44734; GISEL-DAZ-NEXT: v_bfrev_b32_e32 v3, 14735; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc4736; GISEL-DAZ-NEXT: v_mov_b32_e32 v4, 0x7fc000004737; GISEL-DAZ-NEXT: v_cmp_nge_f32_e32 vcc, s6, v34738; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v0, v2, v4, vcc4739; GISEL-DAZ-NEXT: v_cmp_nge_f32_e32 vcc, s7, v34740; GISEL-DAZ-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc4741; GISEL-DAZ-NEXT: s_mov_b32 s6, -14742; GISEL-DAZ-NEXT: s_mov_b32 s7, 0xf0004743; GISEL-DAZ-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 04744; GISEL-DAZ-NEXT: s_endpgm4745entry:4746 %sqrt = call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in)4747 %cmp = fcmp ult <2 x float> %in, <float -0.000000e+00, float -0.000000e+00>4748 %res = select <2 x i1> %cmp, <2 x float> <float 0x7FF8000000000000, float 0x7FF8000000000000>, <2 x float> %sqrt4749 store <2 x float> %res, ptr addrspace(1) %out4750 ret void4751}4752 4753declare float @llvm.fabs.f32(float) #04754declare float @llvm.sqrt.f32(float) #04755declare <2 x float> @llvm.fabs.v2f32(<2 x float>) #04756declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) #04757declare <3 x float> @llvm.sqrt.v3f32(<3 x float>) #04758declare i32 @llvm.amdgcn.readfirstlane(i32) #14759 4760declare { float, i32 } @llvm.frexp.f32.i32(float) #04761 4762attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }4763attributes #1 = { convergent nounwind willreturn memory(none) }4764attributes #3 = { "no-nans-fp-math"="true" "no-infs-fp-math"="true" }4765attributes #5 = { "no-infs-fp-math"="true" }4766 4767!0 = !{float 0.5}4768!1 = !{float 1.0}4769!2 = !{float 2.0}4770!3 = !{float 2.5}4771!4 = !{float 3.0}4772;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:4773; GCN-IEEE: {{.*}}4774