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1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -enable-ipra=0 < %s | FileCheck -check-prefix=GCN %s2 3; Functions that don't make calls should have constants as its resource usage as no resource information has to be propagated.4 5; GCN-LABEL: {{^}}use_vcc:6; GCN: .set use_vcc.num_vgpr, 07; GCN: .set use_vcc.num_agpr, 08; GCN: .set use_vcc.numbered_sgpr, 329; GCN: .set use_vcc.private_seg_size, 010; GCN: .set use_vcc.uses_vcc, 111; GCN: .set use_vcc.uses_flat_scratch, 012; GCN: .set use_vcc.has_dyn_sized_stack, 013; GCN: .set use_vcc.has_recursion, 014; GCN: .set use_vcc.has_indirect_call, 015; GCN: TotalNumSgprs: 3616; GCN: NumVgprs: 017; GCN: ScratchSize: 018define void @use_vcc() #1 {19 call void asm sideeffect "", "~{vcc}" () #020 ret void21}22 23; GCN-LABEL: {{^}}indirect_use_vcc:24; GCN: .set indirect_use_vcc.num_vgpr, max(41, use_vcc.num_vgpr)25; GCN: .set indirect_use_vcc.num_agpr, max(0, use_vcc.num_agpr)26; GCN: .set indirect_use_vcc.numbered_sgpr, max(34, use_vcc.numbered_sgpr)27; GCN: .set indirect_use_vcc.private_seg_size, 16+max(use_vcc.private_seg_size)28; GCN: .set indirect_use_vcc.uses_vcc, or(1, use_vcc.uses_vcc)29; GCN: .set indirect_use_vcc.uses_flat_scratch, or(0, use_vcc.uses_flat_scratch)30; GCN: .set indirect_use_vcc.has_dyn_sized_stack, or(0, use_vcc.has_dyn_sized_stack)31; GCN: .set indirect_use_vcc.has_recursion, or(0, use_vcc.has_recursion)32; GCN: .set indirect_use_vcc.has_indirect_call, or(0, use_vcc.has_indirect_call)33; GCN: TotalNumSgprs: 3834; GCN: NumVgprs: 4135; GCN: ScratchSize: 1636define void @indirect_use_vcc() #1 {37 call void @use_vcc()38 ret void39}40 41; GCN-LABEL: {{^}}indirect_2level_use_vcc_kernel:42; GCN: .set indirect_2level_use_vcc_kernel.num_vgpr, max(32, indirect_use_vcc.num_vgpr)43; GCN: .set indirect_2level_use_vcc_kernel.num_agpr, max(0, indirect_use_vcc.num_agpr)44; GCN: .set indirect_2level_use_vcc_kernel.numbered_sgpr, max(33, indirect_use_vcc.numbered_sgpr)45; GCN: .set indirect_2level_use_vcc_kernel.private_seg_size, 0+max(indirect_use_vcc.private_seg_size)46; GCN: .set indirect_2level_use_vcc_kernel.uses_vcc, or(1, indirect_use_vcc.uses_vcc)47; GCN: .set indirect_2level_use_vcc_kernel.uses_flat_scratch, or(1, indirect_use_vcc.uses_flat_scratch)48; GCN: .set indirect_2level_use_vcc_kernel.has_dyn_sized_stack, or(0, indirect_use_vcc.has_dyn_sized_stack)49; GCN: .set indirect_2level_use_vcc_kernel.has_recursion, or(0, indirect_use_vcc.has_recursion)50; GCN: .set indirect_2level_use_vcc_kernel.has_indirect_call, or(0, indirect_use_vcc.has_indirect_call)51; GCN: TotalNumSgprs: 4052; GCN: NumVgprs: 4153; GCN: ScratchSize: 1654define amdgpu_kernel void @indirect_2level_use_vcc_kernel(ptr addrspace(1) %out) #0 {55 call void @indirect_use_vcc()56 ret void57}58 59; GCN-LABEL: {{^}}use_flat_scratch:60; GCN: .set use_flat_scratch.num_vgpr, 061; GCN: .set use_flat_scratch.num_agpr, 062; GCN: .set use_flat_scratch.numbered_sgpr, 3263; GCN: .set use_flat_scratch.private_seg_size, 064; GCN: .set use_flat_scratch.uses_vcc, 065; GCN: .set use_flat_scratch.uses_flat_scratch, 166; GCN: .set use_flat_scratch.has_dyn_sized_stack, 067; GCN: .set use_flat_scratch.has_recursion, 068; GCN: .set use_flat_scratch.has_indirect_call, 069; GCN: TotalNumSgprs: 3870; GCN: NumVgprs: 071; GCN: ScratchSize: 072define void @use_flat_scratch() #1 {73 call void asm sideeffect "", "~{flat_scratch}" () #074 ret void75}76 77; GCN-LABEL: {{^}}indirect_use_flat_scratch:78; GCN: .set indirect_use_flat_scratch.num_vgpr, max(41, use_flat_scratch.num_vgpr)79; GCN: .set indirect_use_flat_scratch.num_agpr, max(0, use_flat_scratch.num_agpr)80; GCN: .set indirect_use_flat_scratch.numbered_sgpr, max(34, use_flat_scratch.numbered_sgpr)81; GCN: .set indirect_use_flat_scratch.private_seg_size, 16+max(use_flat_scratch.private_seg_size)82; GCN: .set indirect_use_flat_scratch.uses_vcc, or(1, use_flat_scratch.uses_vcc)83; GCN: .set indirect_use_flat_scratch.uses_flat_scratch, or(0, use_flat_scratch.uses_flat_scratch)84; GCN: .set indirect_use_flat_scratch.has_dyn_sized_stack, or(0, use_flat_scratch.has_dyn_sized_stack)85; GCN: .set indirect_use_flat_scratch.has_recursion, or(0, use_flat_scratch.has_recursion)86; GCN: .set indirect_use_flat_scratch.has_indirect_call, or(0, use_flat_scratch.has_indirect_call)87; GCN: TotalNumSgprs: 4088; GCN: NumVgprs: 4189; GCN: ScratchSize: 1690define void @indirect_use_flat_scratch() #1 {91 call void @use_flat_scratch()92 ret void93}94 95; GCN-LABEL: {{^}}indirect_2level_use_flat_scratch_kernel:96; GCN: .set indirect_2level_use_flat_scratch_kernel.num_vgpr, max(32, indirect_use_flat_scratch.num_vgpr)97; GCN: .set indirect_2level_use_flat_scratch_kernel.num_agpr, max(0, indirect_use_flat_scratch.num_agpr)98; GCN: .set indirect_2level_use_flat_scratch_kernel.numbered_sgpr, max(33, indirect_use_flat_scratch.numbered_sgpr)99; GCN: .set indirect_2level_use_flat_scratch_kernel.private_seg_size, 0+max(indirect_use_flat_scratch.private_seg_size)100; GCN: .set indirect_2level_use_flat_scratch_kernel.uses_vcc, or(1, indirect_use_flat_scratch.uses_vcc)101; GCN: .set indirect_2level_use_flat_scratch_kernel.uses_flat_scratch, or(1, indirect_use_flat_scratch.uses_flat_scratch)102; GCN: .set indirect_2level_use_flat_scratch_kernel.has_dyn_sized_stack, or(0, indirect_use_flat_scratch.has_dyn_sized_stack)103; GCN: .set indirect_2level_use_flat_scratch_kernel.has_recursion, or(0, indirect_use_flat_scratch.has_recursion)104; GCN: .set indirect_2level_use_flat_scratch_kernel.has_indirect_call, or(0, indirect_use_flat_scratch.has_indirect_call)105; GCN: TotalNumSgprs: 40106; GCN: NumVgprs: 41107; GCN: ScratchSize: 16108define amdgpu_kernel void @indirect_2level_use_flat_scratch_kernel(ptr addrspace(1) %out) #0 {109 call void @indirect_use_flat_scratch()110 ret void111}112 113; GCN-LABEL: {{^}}use_10_vgpr:114; GCN: .set use_10_vgpr.num_vgpr, 10115; GCN: .set use_10_vgpr.num_agpr, 0116; GCN: .set use_10_vgpr.numbered_sgpr, 32117; GCN: .set use_10_vgpr.private_seg_size, 0118; GCN: .set use_10_vgpr.uses_vcc, 0119; GCN: .set use_10_vgpr.uses_flat_scratch, 0120; GCN: .set use_10_vgpr.has_dyn_sized_stack, 0121; GCN: .set use_10_vgpr.has_recursion, 0122; GCN: .set use_10_vgpr.has_indirect_call, 0123; GCN: TotalNumSgprs: 36124; GCN: NumVgprs: 10125; GCN: ScratchSize: 0126define void @use_10_vgpr() #1 {127 call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4}"() #0128 call void asm sideeffect "", "~{v5},~{v6},~{v7},~{v8},~{v9}"() #0129 ret void130}131 132; GCN-LABEL: {{^}}indirect_use_10_vgpr:133; GCN: .set indirect_use_10_vgpr.num_vgpr, max(41, use_10_vgpr.num_vgpr)134; GCN: .set indirect_use_10_vgpr.num_agpr, max(0, use_10_vgpr.num_agpr)135; GCN: .set indirect_use_10_vgpr.numbered_sgpr, max(34, use_10_vgpr.numbered_sgpr)136; GCN: .set indirect_use_10_vgpr.private_seg_size, 16+max(use_10_vgpr.private_seg_size)137; GCN: .set indirect_use_10_vgpr.uses_vcc, or(1, use_10_vgpr.uses_vcc)138; GCN: .set indirect_use_10_vgpr.uses_flat_scratch, or(0, use_10_vgpr.uses_flat_scratch)139; GCN: .set indirect_use_10_vgpr.has_dyn_sized_stack, or(0, use_10_vgpr.has_dyn_sized_stack)140; GCN: .set indirect_use_10_vgpr.has_recursion, or(0, use_10_vgpr.has_recursion)141; GCN: .set indirect_use_10_vgpr.has_indirect_call, or(0, use_10_vgpr.has_indirect_call)142; GCN: TotalNumSgprs: 38143; GCN: NumVgprs: 41144; GCN: ScratchSize: 16145define void @indirect_use_10_vgpr() #0 {146 call void @use_10_vgpr()147 ret void148}149 150; GCN-LABEL: {{^}}indirect_2_level_use_10_vgpr:151; GCN: .set indirect_2_level_use_10_vgpr.num_vgpr, max(32, indirect_use_10_vgpr.num_vgpr)152; GCN: .set indirect_2_level_use_10_vgpr.num_agpr, max(0, indirect_use_10_vgpr.num_agpr)153; GCN: .set indirect_2_level_use_10_vgpr.numbered_sgpr, max(33, indirect_use_10_vgpr.numbered_sgpr)154; GCN: .set indirect_2_level_use_10_vgpr.private_seg_size, 0+max(indirect_use_10_vgpr.private_seg_size)155; GCN: .set indirect_2_level_use_10_vgpr.uses_vcc, or(1, indirect_use_10_vgpr.uses_vcc)156; GCN: .set indirect_2_level_use_10_vgpr.uses_flat_scratch, or(1, indirect_use_10_vgpr.uses_flat_scratch)157; GCN: .set indirect_2_level_use_10_vgpr.has_dyn_sized_stack, or(0, indirect_use_10_vgpr.has_dyn_sized_stack)158; GCN: .set indirect_2_level_use_10_vgpr.has_recursion, or(0, indirect_use_10_vgpr.has_recursion)159; GCN: .set indirect_2_level_use_10_vgpr.has_indirect_call, or(0, indirect_use_10_vgpr.has_indirect_call)160; GCN: TotalNumSgprs: 40161; GCN: NumVgprs: 41162; GCN: ScratchSize: 16163define amdgpu_kernel void @indirect_2_level_use_10_vgpr() #0 {164 call void @indirect_use_10_vgpr()165 ret void166}167 168; GCN-LABEL: {{^}}use_50_vgpr:169; GCN: .set use_50_vgpr.num_vgpr, 50170; GCN: .set use_50_vgpr.num_agpr, 0171; GCN: .set use_50_vgpr.numbered_sgpr, 32172; GCN: .set use_50_vgpr.private_seg_size, 0173; GCN: .set use_50_vgpr.uses_vcc, 0174; GCN: .set use_50_vgpr.uses_flat_scratch, 0175; GCN: .set use_50_vgpr.has_dyn_sized_stack, 0176; GCN: .set use_50_vgpr.has_recursion, 0177; GCN: .set use_50_vgpr.has_indirect_call, 0178; GCN: TotalNumSgprs: 36179; GCN: NumVgprs: 50180; GCN: ScratchSize: 0181define void @use_50_vgpr() #1 {182 call void asm sideeffect "", "~{v49}"() #0183 ret void184}185 186; GCN-LABEL: {{^}}indirect_use_50_vgpr:187; GCN: .set indirect_use_50_vgpr.num_vgpr, max(41, use_50_vgpr.num_vgpr)188; GCN: .set indirect_use_50_vgpr.num_agpr, max(0, use_50_vgpr.num_agpr)189; GCN: .set indirect_use_50_vgpr.numbered_sgpr, max(34, use_50_vgpr.numbered_sgpr)190; GCN: .set indirect_use_50_vgpr.private_seg_size, 16+max(use_50_vgpr.private_seg_size)191; GCN: .set indirect_use_50_vgpr.uses_vcc, or(1, use_50_vgpr.uses_vcc)192; GCN: .set indirect_use_50_vgpr.uses_flat_scratch, or(0, use_50_vgpr.uses_flat_scratch)193; GCN: .set indirect_use_50_vgpr.has_dyn_sized_stack, or(0, use_50_vgpr.has_dyn_sized_stack)194; GCN: .set indirect_use_50_vgpr.has_recursion, or(0, use_50_vgpr.has_recursion)195; GCN: .set indirect_use_50_vgpr.has_indirect_call, or(0, use_50_vgpr.has_indirect_call)196; GCN: TotalNumSgprs: 38197; GCN: NumVgprs: 50198; GCN: ScratchSize: 16199define void @indirect_use_50_vgpr() #0 {200 call void @use_50_vgpr()201 ret void202}203 204; GCN-LABEL: {{^}}use_80_sgpr:205; GCN: .set use_80_sgpr.num_vgpr, 0206; GCN: .set use_80_sgpr.num_agpr, 0207; GCN: .set use_80_sgpr.numbered_sgpr, 80208; GCN: .set use_80_sgpr.private_seg_size, 0209; GCN: .set use_80_sgpr.uses_vcc, 0210; GCN: .set use_80_sgpr.uses_flat_scratch, 0211; GCN: .set use_80_sgpr.has_dyn_sized_stack, 0212; GCN: .set use_80_sgpr.has_recursion, 0213; GCN: .set use_80_sgpr.has_indirect_call, 0214; GCN: TotalNumSgprs: 84215; GCN: NumVgprs: 0216; GCN: ScratchSize: 0217define void @use_80_sgpr() #1 {218 call void asm sideeffect "", "~{s79}"() #0219 ret void220}221 222; GCN-LABEL: {{^}}indirect_use_80_sgpr:223; GCN: .set indirect_use_80_sgpr.num_vgpr, max(41, use_80_sgpr.num_vgpr)224; GCN: .set indirect_use_80_sgpr.num_agpr, max(0, use_80_sgpr.num_agpr)225; GCN: .set indirect_use_80_sgpr.numbered_sgpr, max(34, use_80_sgpr.numbered_sgpr)226; GCN: .set indirect_use_80_sgpr.private_seg_size, 16+max(use_80_sgpr.private_seg_size)227; GCN: .set indirect_use_80_sgpr.uses_vcc, or(1, use_80_sgpr.uses_vcc)228; GCN: .set indirect_use_80_sgpr.uses_flat_scratch, or(0, use_80_sgpr.uses_flat_scratch)229; GCN: .set indirect_use_80_sgpr.has_dyn_sized_stack, or(0, use_80_sgpr.has_dyn_sized_stack)230; GCN: .set indirect_use_80_sgpr.has_recursion, or(0, use_80_sgpr.has_recursion)231; GCN: .set indirect_use_80_sgpr.has_indirect_call, or(0, use_80_sgpr.has_indirect_call)232; GCN: TotalNumSgprs: 84233; GCN: NumVgprs: 41234; GCN: ScratchSize: 16235define void @indirect_use_80_sgpr() #1 {236 call void @use_80_sgpr()237 ret void238}239 240; GCN-LABEL: {{^}}indirect_2_level_use_80_sgpr:241; GCN: .set indirect_2_level_use_80_sgpr.num_vgpr, max(32, indirect_use_80_sgpr.num_vgpr)242; GCN: .set indirect_2_level_use_80_sgpr.num_agpr, max(0, indirect_use_80_sgpr.num_agpr)243; GCN: .set indirect_2_level_use_80_sgpr.numbered_sgpr, max(33, indirect_use_80_sgpr.numbered_sgpr)244; GCN: .set indirect_2_level_use_80_sgpr.private_seg_size, 0+max(indirect_use_80_sgpr.private_seg_size)245; GCN: .set indirect_2_level_use_80_sgpr.uses_vcc, or(1, indirect_use_80_sgpr.uses_vcc)246; GCN: .set indirect_2_level_use_80_sgpr.uses_flat_scratch, or(1, indirect_use_80_sgpr.uses_flat_scratch)247; GCN: .set indirect_2_level_use_80_sgpr.has_dyn_sized_stack, or(0, indirect_use_80_sgpr.has_dyn_sized_stack)248; GCN: .set indirect_2_level_use_80_sgpr.has_recursion, or(0, indirect_use_80_sgpr.has_recursion)249; GCN: .set indirect_2_level_use_80_sgpr.has_indirect_call, or(0, indirect_use_80_sgpr.has_indirect_call)250; GCN: TotalNumSgprs: 86251; GCN: NumVgprs: 41252; GCN: ScratchSize: 16253define amdgpu_kernel void @indirect_2_level_use_80_sgpr() #0 {254 call void @indirect_use_80_sgpr()255 ret void256}257 258; GCN-LABEL: {{^}}use_stack0:259; GCN: .set use_stack0.num_vgpr, 1260; GCN: .set use_stack0.num_agpr, 0261; GCN: .set use_stack0.numbered_sgpr, 33262; GCN: .set use_stack0.private_seg_size, 2052263; GCN: .set use_stack0.uses_vcc, 0264; GCN: .set use_stack0.uses_flat_scratch, 0265; GCN: .set use_stack0.has_dyn_sized_stack, 0266; GCN: .set use_stack0.has_recursion, 0267; GCN: .set use_stack0.has_indirect_call, 0268; GCN: TotalNumSgprs: 37269; GCN: NumVgprs: 1270; GCN: ScratchSize: 2052271define void @use_stack0() #1 {272 %alloca = alloca [512 x i32], align 4, addrspace(5)273 call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0274 ret void275}276 277; GCN-LABEL: {{^}}use_stack1:278; GCN: .set use_stack1.num_vgpr, 1279; GCN: .set use_stack1.num_agpr, 0280; GCN: .set use_stack1.numbered_sgpr, 33281; GCN: .set use_stack1.private_seg_size, 404282; GCN: .set use_stack1.uses_vcc, 0283; GCN: .set use_stack1.uses_flat_scratch, 0284; GCN: .set use_stack1.has_dyn_sized_stack, 0285; GCN: .set use_stack1.has_recursion, 0286; GCN: .set use_stack1.has_indirect_call, 0287; GCN: TotalNumSgprs: 37288; GCN: NumVgprs: 1289; GCN: ScratchSize: 404290define void @use_stack1() #1 {291 %alloca = alloca [100 x i32], align 4, addrspace(5)292 call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0293 ret void294}295 296; GCN-LABEL: {{^}}indirect_use_stack:297; GCN: .set indirect_use_stack.num_vgpr, max(41, use_stack0.num_vgpr)298; GCN: .set indirect_use_stack.num_agpr, max(0, use_stack0.num_agpr)299; GCN: .set indirect_use_stack.numbered_sgpr, max(34, use_stack0.numbered_sgpr)300; GCN: .set indirect_use_stack.private_seg_size, 80+max(use_stack0.private_seg_size)301; GCN: .set indirect_use_stack.uses_vcc, or(1, use_stack0.uses_vcc)302; GCN: .set indirect_use_stack.uses_flat_scratch, or(0, use_stack0.uses_flat_scratch)303; GCN: .set indirect_use_stack.has_dyn_sized_stack, or(0, use_stack0.has_dyn_sized_stack)304; GCN: .set indirect_use_stack.has_recursion, or(0, use_stack0.has_recursion)305; GCN: .set indirect_use_stack.has_indirect_call, or(0, use_stack0.has_indirect_call)306; GCN: TotalNumSgprs: 38307; GCN: NumVgprs: 41308; GCN: ScratchSize: 2132309define void @indirect_use_stack() #1 {310 %alloca = alloca [16 x i32], align 4, addrspace(5)311 call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0312 call void @use_stack0()313 ret void314}315 316; GCN-LABEL: {{^}}indirect_2_level_use_stack:317; GCN: .set indirect_2_level_use_stack.num_vgpr, max(32, indirect_use_stack.num_vgpr)318; GCN: .set indirect_2_level_use_stack.num_agpr, max(0, indirect_use_stack.num_agpr)319; GCN: .set indirect_2_level_use_stack.numbered_sgpr, max(33, indirect_use_stack.numbered_sgpr)320; GCN: .set indirect_2_level_use_stack.private_seg_size, 0+max(indirect_use_stack.private_seg_size)321; GCN: .set indirect_2_level_use_stack.uses_vcc, or(1, indirect_use_stack.uses_vcc)322; GCN: .set indirect_2_level_use_stack.uses_flat_scratch, or(1, indirect_use_stack.uses_flat_scratch)323; GCN: .set indirect_2_level_use_stack.has_dyn_sized_stack, or(0, indirect_use_stack.has_dyn_sized_stack)324; GCN: .set indirect_2_level_use_stack.has_recursion, or(0, indirect_use_stack.has_recursion)325; GCN: .set indirect_2_level_use_stack.has_indirect_call, or(0, indirect_use_stack.has_indirect_call)326; GCN: TotalNumSgprs: 40327; GCN: NumVgprs: 41328; GCN: ScratchSize: 2132329define amdgpu_kernel void @indirect_2_level_use_stack() #0 {330 call void @indirect_use_stack()331 ret void332}333 334 335; Should be maximum of callee usage336; GCN-LABEL: {{^}}multi_call_use_use_stack:337; GCN: .set multi_call_use_use_stack.num_vgpr, max(41, use_stack0.num_vgpr, use_stack1.num_vgpr)338; GCN: .set multi_call_use_use_stack.num_agpr, max(0, use_stack0.num_agpr, use_stack1.num_agpr)339; GCN: .set multi_call_use_use_stack.numbered_sgpr, max(52, use_stack0.numbered_sgpr, use_stack1.numbered_sgpr)340; GCN: .set multi_call_use_use_stack.private_seg_size, 0+max(use_stack0.private_seg_size, use_stack1.private_seg_size)341; GCN: .set multi_call_use_use_stack.uses_vcc, or(1, use_stack0.uses_vcc, use_stack1.uses_vcc)342; GCN: .set multi_call_use_use_stack.uses_flat_scratch, or(1, use_stack0.uses_flat_scratch, use_stack1.uses_flat_scratch)343; GCN: .set multi_call_use_use_stack.has_dyn_sized_stack, or(0, use_stack0.has_dyn_sized_stack, use_stack1.has_dyn_sized_stack)344; GCN: .set multi_call_use_use_stack.has_recursion, or(0, use_stack0.has_recursion, use_stack1.has_recursion)345; GCN: .set multi_call_use_use_stack.has_indirect_call, or(0, use_stack0.has_indirect_call, use_stack1.has_indirect_call)346; GCN: TotalNumSgprs: 58347; GCN: NumVgprs: 41348; GCN: ScratchSize: 2052349define amdgpu_kernel void @multi_call_use_use_stack() #0 {350 call void @use_stack0()351 call void @use_stack1()352 ret void353}354 355declare void @external() #0356 357; GCN-LABEL: {{^}}multi_call_with_external:358; GCN: .set multi_call_with_external.num_vgpr, max(41, amdgpu.max_num_vgpr)359; GCN: .set multi_call_with_external.num_agpr, max(0, amdgpu.max_num_agpr)360; GCN: .set multi_call_with_external.numbered_sgpr, max(52, amdgpu.max_num_sgpr)361; GCN: .set multi_call_with_external.private_seg_size, 0+max(use_stack0.private_seg_size, use_stack1.private_seg_size)362; GCN: .set multi_call_with_external.uses_vcc, 1363; GCN: .set multi_call_with_external.uses_flat_scratch, 1364; GCN: .set multi_call_with_external.has_dyn_sized_stack, 1365; GCN: .set multi_call_with_external.has_recursion, 0366; GCN: .set multi_call_with_external.has_indirect_call, 1367; GCN: TotalNumSgprs: multi_call_with_external.numbered_sgpr+6368; GCN: NumVgprs: multi_call_with_external.num_vgpr369; GCN: ScratchSize: 2052370define amdgpu_kernel void @multi_call_with_external() #0 {371 call void @use_stack0()372 call void @use_stack1()373 call void @external()374 ret void375}376 377; GCN-LABEL: {{^}}multi_call_with_external_and_duplicates:378; GCN: .set multi_call_with_external_and_duplicates.num_vgpr, max(41, amdgpu.max_num_vgpr)379; GCN: .set multi_call_with_external_and_duplicates.num_agpr, max(0, amdgpu.max_num_agpr)380; GCN: .set multi_call_with_external_and_duplicates.numbered_sgpr, max(54, amdgpu.max_num_sgpr)381; GCN: .set multi_call_with_external_and_duplicates.private_seg_size, 0+max(use_stack0.private_seg_size, use_stack1.private_seg_size)382; GCN: .set multi_call_with_external_and_duplicates.uses_vcc, 1383; GCN: .set multi_call_with_external_and_duplicates.uses_flat_scratch, 1384; GCN: .set multi_call_with_external_and_duplicates.has_dyn_sized_stack, 1385; GCN: .set multi_call_with_external_and_duplicates.has_recursion, 0386; GCN: .set multi_call_with_external_and_duplicates.has_indirect_call, 1387; GCN: TotalNumSgprs: multi_call_with_external_and_duplicates.numbered_sgpr+6388; GCN: NumVgprs: multi_call_with_external_and_duplicates.num_vgpr389; GCN: ScratchSize: 2052390define amdgpu_kernel void @multi_call_with_external_and_duplicates() #0 {391 call void @use_stack0()392 call void @use_stack0()393 call void @use_stack1()394 call void @use_stack1()395 call void @external()396 call void @external()397 ret void398}399 400; GCN-LABEL: {{^}}usage_external:401; GCN: .set usage_external.num_vgpr, max(32, amdgpu.max_num_vgpr)402; GCN: .set usage_external.num_agpr, max(0, amdgpu.max_num_agpr)403; GCN: .set usage_external.numbered_sgpr, max(33, amdgpu.max_num_sgpr)404; GCN: .set usage_external.private_seg_size, 0405; GCN: .set usage_external.uses_vcc, 1406; GCN: .set usage_external.uses_flat_scratch, 1407; GCN: .set usage_external.has_dyn_sized_stack, 1408; GCN: .set usage_external.has_recursion, 0409; GCN: .set usage_external.has_indirect_call, 1410; GCN: TotalNumSgprs: usage_external.numbered_sgpr+6411; GCN: NumVgprs: usage_external.num_vgpr412; GCN: ScratchSize: 0413define amdgpu_kernel void @usage_external() #0 {414 call void @external()415 ret void416}417 418declare void @external_recurse() #2419 420; GCN-LABEL: {{^}}usage_external_recurse:421; GCN: .set usage_external_recurse.num_vgpr, max(32, amdgpu.max_num_vgpr)422; GCN: .set usage_external_recurse.num_agpr, max(0, amdgpu.max_num_agpr)423; GCN: .set usage_external_recurse.numbered_sgpr, max(33, amdgpu.max_num_sgpr)424; GCN: .set usage_external_recurse.private_seg_size, 0425; GCN: .set usage_external_recurse.uses_vcc, 1426; GCN: .set usage_external_recurse.uses_flat_scratch, 1427; GCN: .set usage_external_recurse.has_dyn_sized_stack, 1428; GCN: .set usage_external_recurse.has_recursion, 1429; GCN: .set usage_external_recurse.has_indirect_call, 1430; GCN: TotalNumSgprs: usage_external_recurse.numbered_sgpr+6431; GCN: NumVgprs: usage_external_recurse.num_vgpr432; GCN: ScratchSize: 0433define amdgpu_kernel void @usage_external_recurse() #0 {434 call void @external_recurse()435 ret void436}437 438; GCN-LABEL: {{^}}direct_recursion_use_stack:439; GCN: .set direct_recursion_use_stack.num_vgpr, 41440; GCN: .set direct_recursion_use_stack.num_agpr, 0441; GCN: .set direct_recursion_use_stack.numbered_sgpr, 36442; GCN: .set direct_recursion_use_stack.private_seg_size, 2064443; GCN: .set direct_recursion_use_stack.uses_vcc, 1444; GCN: .set direct_recursion_use_stack.uses_flat_scratch, 0445; GCN: .set direct_recursion_use_stack.has_dyn_sized_stack, 0446; GCN: .set direct_recursion_use_stack.has_recursion, 1447; GCN: .set direct_recursion_use_stack.has_indirect_call, 0448; GCN: TotalNumSgprs: 40449; GCN: NumVgprs: 41450; GCN: ScratchSize: 2064451define void @direct_recursion_use_stack(i32 %val) #2 {452 %alloca = alloca [512 x i32], align 4, addrspace(5)453 call void asm sideeffect "; use $0", "v"(ptr addrspace(5) %alloca) #0454 %cmp = icmp eq i32 %val, 0455 br i1 %cmp, label %ret, label %call456 457call:458 %val.sub1 = sub i32 %val, 1459 call void @direct_recursion_use_stack(i32 %val.sub1)460 br label %ret461 462ret:463 ret void464}465 466; GCN-LABEL: {{^}}usage_direct_recursion:467; GCN: .set usage_direct_recursion.num_vgpr, max(32, direct_recursion_use_stack.num_vgpr)468; GCN: .set usage_direct_recursion.num_agpr, max(0, direct_recursion_use_stack.num_agpr)469; GCN: .set usage_direct_recursion.numbered_sgpr, max(33, direct_recursion_use_stack.numbered_sgpr)470; GCN: .set usage_direct_recursion.private_seg_size, 0+max(direct_recursion_use_stack.private_seg_size)471; GCN: .set usage_direct_recursion.uses_vcc, or(1, direct_recursion_use_stack.uses_vcc)472; GCN: .set usage_direct_recursion.uses_flat_scratch, or(1, direct_recursion_use_stack.uses_flat_scratch)473; GCN: .set usage_direct_recursion.has_dyn_sized_stack, or(0, direct_recursion_use_stack.has_dyn_sized_stack)474; GCN: .set usage_direct_recursion.has_recursion, or(1, direct_recursion_use_stack.has_recursion)475; GCN: .set usage_direct_recursion.has_indirect_call, or(0, direct_recursion_use_stack.has_indirect_call)476; GCN: TotalNumSgprs: 42477; GCN: NumVgprs: 41478; GCN: ScratchSize: 2064479define amdgpu_kernel void @usage_direct_recursion(i32 %n) #0 {480 call void @direct_recursion_use_stack(i32 %n)481 ret void482}483 484; GCN-LABEL: {{^}}multi_stage_recurse2:485; GCN: .set multi_stage_recurse2.num_vgpr, max(43, multi_stage_recurse1.num_vgpr)486; GCN: .set multi_stage_recurse2.num_agpr, max(0, multi_stage_recurse1.num_agpr)487; GCN: .set multi_stage_recurse2.numbered_sgpr, max(34, multi_stage_recurse1.numbered_sgpr)488; GCN: .set multi_stage_recurse2.private_seg_size, 16+max(multi_stage_recurse1.private_seg_size)489; GCN: .set multi_stage_recurse2.uses_vcc, or(1, multi_stage_recurse1.uses_vcc)490; GCN: .set multi_stage_recurse2.uses_flat_scratch, or(0, multi_stage_recurse1.uses_flat_scratch)491; GCN: .set multi_stage_recurse2.has_dyn_sized_stack, or(0, multi_stage_recurse1.has_dyn_sized_stack)492; GCN: .set multi_stage_recurse2.has_recursion, or(1, multi_stage_recurse1.has_recursion)493; GCN: .set multi_stage_recurse2.has_indirect_call, or(0, multi_stage_recurse1.has_indirect_call)494; GCN: TotalNumSgprs: multi_stage_recurse2.numbered_sgpr+extrasgprs(multi_stage_recurse2.uses_vcc, multi_stage_recurse2.uses_flat_scratch, 1)495; GCN: NumVgprs: max(43, multi_stage_recurse1.num_vgpr)496; GCN: ScratchSize: 16+max(multi_stage_recurse1.private_seg_size)497; GCN-LABEL: {{^}}multi_stage_recurse1:498; GCN: .set multi_stage_recurse1.num_vgpr, max(48, 43)499; GCN: .set multi_stage_recurse1.num_agpr, max(0, 0)500; GCN: .set multi_stage_recurse1.numbered_sgpr, max(34, 34)501; GCN: .set multi_stage_recurse1.private_seg_size, 16502; GCN: .set multi_stage_recurse1.uses_vcc, 1503; GCN: .set multi_stage_recurse1.uses_flat_scratch, 0504; GCN: .set multi_stage_recurse1.has_dyn_sized_stack, 0505; GCN: .set multi_stage_recurse1.has_recursion, 1506; GCN: .set multi_stage_recurse1.has_indirect_call, 0507; GCN: TotalNumSgprs: 38508; GCN: NumVgprs: 48509; GCN: ScratchSize: 16510define void @multi_stage_recurse1(i32 %val) #2 {511 call void @multi_stage_recurse2(i32 %val)512 call void asm sideeffect "", "~{v47}"() #0513 ret void514}515define void @multi_stage_recurse2(i32 %val) #2 {516 call void @multi_stage_recurse1(i32 %val)517 call void asm sideeffect "", "~{v42}"() #0518 ret void519}520 521; GCN-LABEL: {{^}}usage_multi_stage_recurse:522; GCN: .set usage_multi_stage_recurse.num_vgpr, max(32, multi_stage_recurse1.num_vgpr)523; GCN: .set usage_multi_stage_recurse.num_agpr, max(0, multi_stage_recurse1.num_agpr)524; GCN: .set usage_multi_stage_recurse.numbered_sgpr, max(33, multi_stage_recurse1.numbered_sgpr)525; GCN: .set usage_multi_stage_recurse.private_seg_size, 0+max(multi_stage_recurse1.private_seg_size)526; GCN: .set usage_multi_stage_recurse.uses_vcc, or(1, multi_stage_recurse1.uses_vcc)527; GCN: .set usage_multi_stage_recurse.uses_flat_scratch, or(1, multi_stage_recurse1.uses_flat_scratch)528; GCN: .set usage_multi_stage_recurse.has_dyn_sized_stack, or(0, multi_stage_recurse1.has_dyn_sized_stack)529; GCN: .set usage_multi_stage_recurse.has_recursion, or(1, multi_stage_recurse1.has_recursion)530; GCN: .set usage_multi_stage_recurse.has_indirect_call, or(0, multi_stage_recurse1.has_indirect_call)531; GCN: TotalNumSgprs: 40532; GCN: NumVgprs: 48533; GCN: ScratchSize: 16534define amdgpu_kernel void @usage_multi_stage_recurse(i32 %n) #0 {535 call void @multi_stage_recurse1(i32 %n)536 ret void537}538 539; GCN-LABEL: {{^}}multi_stage_recurse_noattr2:540; GCN: .set multi_stage_recurse_noattr2.num_vgpr, max(41, multi_stage_recurse_noattr1.num_vgpr)541; GCN: .set multi_stage_recurse_noattr2.num_agpr, max(0, multi_stage_recurse_noattr1.num_agpr)542; GCN: .set multi_stage_recurse_noattr2.numbered_sgpr, max(54, multi_stage_recurse_noattr1.numbered_sgpr)543; GCN: .set multi_stage_recurse_noattr2.private_seg_size, 16+max(multi_stage_recurse_noattr1.private_seg_size)544; GCN: .set multi_stage_recurse_noattr2.uses_vcc, or(1, multi_stage_recurse_noattr1.uses_vcc)545; GCN: .set multi_stage_recurse_noattr2.uses_flat_scratch, or(0, multi_stage_recurse_noattr1.uses_flat_scratch)546; GCN: .set multi_stage_recurse_noattr2.has_dyn_sized_stack, or(0, multi_stage_recurse_noattr1.has_dyn_sized_stack)547; GCN: .set multi_stage_recurse_noattr2.has_recursion, or(0, multi_stage_recurse_noattr1.has_recursion)548; GCN: .set multi_stage_recurse_noattr2.has_indirect_call, or(0, multi_stage_recurse_noattr1.has_indirect_call)549; GCN: TotalNumSgprs: multi_stage_recurse_noattr2.numbered_sgpr+extrasgprs(multi_stage_recurse_noattr2.uses_vcc, multi_stage_recurse_noattr2.uses_flat_scratch, 1)550; GCN: NumVgprs: max(41, multi_stage_recurse_noattr1.num_vgpr)551; GCN: ScratchSize: 16+max(multi_stage_recurse_noattr1.private_seg_size)552; GCN-LABEL: {{^}}multi_stage_recurse_noattr1:553; GCN: .set multi_stage_recurse_noattr1.num_vgpr, max(41, 41)554; GCN: .set multi_stage_recurse_noattr1.num_agpr, max(0, 0)555; GCN: .set multi_stage_recurse_noattr1.numbered_sgpr, max(57, 54)556; GCN: .set multi_stage_recurse_noattr1.private_seg_size, 16557; GCN: .set multi_stage_recurse_noattr1.uses_vcc, 1558; GCN: .set multi_stage_recurse_noattr1.uses_flat_scratch, 0559; GCN: .set multi_stage_recurse_noattr1.has_dyn_sized_stack, 0560; GCN: .set multi_stage_recurse_noattr1.has_recursion, 0561; GCN: .set multi_stage_recurse_noattr1.has_indirect_call, 0562; GCN: TotalNumSgprs: 61563; GCN: NumVgprs: 41564; GCN: ScratchSize: 16565define void @multi_stage_recurse_noattr1(i32 %val) #0 {566 call void @multi_stage_recurse_noattr2(i32 %val)567 call void asm sideeffect "", "~{s56}"() #0568 ret void569}570define void @multi_stage_recurse_noattr2(i32 %val) #0 {571 call void @multi_stage_recurse_noattr1(i32 %val)572 call void asm sideeffect "", "~{s53}"() #0573 ret void574}575 576; GCN-LABEL: {{^}}usage_multi_stage_recurse_noattrs:577; GCN: .set usage_multi_stage_recurse_noattrs.num_vgpr, max(32, multi_stage_recurse_noattr1.num_vgpr)578; GCN: .set usage_multi_stage_recurse_noattrs.num_agpr, max(0, multi_stage_recurse_noattr1.num_agpr)579; GCN: .set usage_multi_stage_recurse_noattrs.numbered_sgpr, max(33, multi_stage_recurse_noattr1.numbered_sgpr)580; GCN: .set usage_multi_stage_recurse_noattrs.private_seg_size, 0+max(multi_stage_recurse_noattr1.private_seg_size)581; GCN: .set usage_multi_stage_recurse_noattrs.uses_vcc, or(1, multi_stage_recurse_noattr1.uses_vcc)582; GCN: .set usage_multi_stage_recurse_noattrs.uses_flat_scratch, or(1, multi_stage_recurse_noattr1.uses_flat_scratch)583; GCN: .set usage_multi_stage_recurse_noattrs.has_dyn_sized_stack, or(0, multi_stage_recurse_noattr1.has_dyn_sized_stack)584; GCN: .set usage_multi_stage_recurse_noattrs.has_recursion, or(0, multi_stage_recurse_noattr1.has_recursion)585; GCN: .set usage_multi_stage_recurse_noattrs.has_indirect_call, or(0, multi_stage_recurse_noattr1.has_indirect_call)586; GCN: TotalNumSgprs: 63587; GCN: NumVgprs: 41588; GCN: ScratchSize: 16589define amdgpu_kernel void @usage_multi_stage_recurse_noattrs(i32 %n) #0 {590 call void @multi_stage_recurse_noattr1(i32 %n)591 ret void592}593 594; GCN-LABEL: {{^}}multi_call_with_multi_stage_recurse:595; GCN: .set multi_call_with_multi_stage_recurse.num_vgpr, max(41, use_stack0.num_vgpr, use_stack1.num_vgpr, multi_stage_recurse1.num_vgpr)596; GCN: .set multi_call_with_multi_stage_recurse.num_agpr, max(0, use_stack0.num_agpr, use_stack1.num_agpr, multi_stage_recurse1.num_agpr)597; GCN: .set multi_call_with_multi_stage_recurse.numbered_sgpr, max(53, use_stack0.numbered_sgpr, use_stack1.numbered_sgpr, multi_stage_recurse1.numbered_sgpr)598; GCN: .set multi_call_with_multi_stage_recurse.private_seg_size, 0+max(use_stack0.private_seg_size, use_stack1.private_seg_size, multi_stage_recurse1.private_seg_size)599; GCN: .set multi_call_with_multi_stage_recurse.uses_vcc, or(1, use_stack0.uses_vcc, use_stack1.uses_vcc, multi_stage_recurse1.uses_vcc)600; GCN: .set multi_call_with_multi_stage_recurse.uses_flat_scratch, or(1, use_stack0.uses_flat_scratch, use_stack1.uses_flat_scratch, multi_stage_recurse1.uses_flat_scratch)601; GCN: .set multi_call_with_multi_stage_recurse.has_dyn_sized_stack, or(0, use_stack0.has_dyn_sized_stack, use_stack1.has_dyn_sized_stack, multi_stage_recurse1.has_dyn_sized_stack)602; GCN: .set multi_call_with_multi_stage_recurse.has_recursion, or(1, use_stack0.has_recursion, use_stack1.has_recursion, multi_stage_recurse1.has_recursion)603; GCN: .set multi_call_with_multi_stage_recurse.has_indirect_call, or(0, use_stack0.has_indirect_call, use_stack1.has_indirect_call, multi_stage_recurse1.has_indirect_call)604; GCN: TotalNumSgprs: 59605; GCN: NumVgprs: 48606; GCN: ScratchSize: 2052607define amdgpu_kernel void @multi_call_with_multi_stage_recurse(i32 %n) #0 {608 call void @use_stack0()609 call void @use_stack1()610 call void @multi_stage_recurse1(i32 %n)611 ret void612}613 614; Make sure there's no assert when a sgpr96 is used.615; GCN-LABEL: {{^}}count_use_sgpr96_external_call616; GCN: .set count_use_sgpr96_external_call.num_vgpr, max(32, amdgpu.max_num_vgpr)617; GCN: .set count_use_sgpr96_external_call.num_agpr, max(0, amdgpu.max_num_agpr)618; GCN: .set count_use_sgpr96_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)619; GCN: .set count_use_sgpr96_external_call.private_seg_size, 0620; GCN: .set count_use_sgpr96_external_call.uses_vcc, 1621; GCN: .set count_use_sgpr96_external_call.uses_flat_scratch, 1622; GCN: .set count_use_sgpr96_external_call.has_dyn_sized_stack, 1623; GCN: .set count_use_sgpr96_external_call.has_recursion, 0624; GCN: .set count_use_sgpr96_external_call.has_indirect_call, 1625; GCN: TotalNumSgprs: count_use_sgpr96_external_call.numbered_sgpr+6626; GCN: NumVgprs: count_use_sgpr96_external_call.num_vgpr627; GCN: ScratchSize: 0628define amdgpu_kernel void @count_use_sgpr96_external_call() {629entry:630 tail call void asm sideeffect "; sgpr96 $0", "s"(<3 x i32> <i32 10, i32 11, i32 12>) #1631 call void @external()632 ret void633}634 635; Make sure there's no assert when a sgpr160 is used.636; GCN-LABEL: {{^}}count_use_sgpr160_external_call637; GCN: .set count_use_sgpr160_external_call.num_vgpr, max(32, amdgpu.max_num_vgpr)638; GCN: .set count_use_sgpr160_external_call.num_agpr, max(0, amdgpu.max_num_agpr)639; GCN: .set count_use_sgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)640; GCN: .set count_use_sgpr160_external_call.private_seg_size, 0641; GCN: .set count_use_sgpr160_external_call.uses_vcc, 1642; GCN: .set count_use_sgpr160_external_call.uses_flat_scratch, 1643; GCN: .set count_use_sgpr160_external_call.has_dyn_sized_stack, 1644; GCN: .set count_use_sgpr160_external_call.has_recursion, 0645; GCN: .set count_use_sgpr160_external_call.has_indirect_call, 1646; GCN: TotalNumSgprs: count_use_sgpr160_external_call.numbered_sgpr+6647; GCN: NumVgprs: count_use_sgpr160_external_call.num_vgpr648; GCN: ScratchSize: 0649define amdgpu_kernel void @count_use_sgpr160_external_call() {650entry:651 tail call void asm sideeffect "; sgpr160 $0", "s"(<5 x i32> <i32 10, i32 11, i32 12, i32 13, i32 14>) #1652 call void @external()653 ret void654}655 656; Make sure there's no assert when a vgpr160 is used.657; GCN-LABEL: {{^}}count_use_vgpr160_external_call658; GCN: .set count_use_vgpr160_external_call.num_vgpr, max(32, amdgpu.max_num_vgpr)659; GCN: .set count_use_vgpr160_external_call.num_agpr, max(0, amdgpu.max_num_agpr)660; GCN: .set count_use_vgpr160_external_call.numbered_sgpr, max(33, amdgpu.max_num_sgpr)661; GCN: .set count_use_vgpr160_external_call.private_seg_size, 0662; GCN: .set count_use_vgpr160_external_call.uses_vcc, 1663; GCN: .set count_use_vgpr160_external_call.uses_flat_scratch, 1664; GCN: .set count_use_vgpr160_external_call.has_dyn_sized_stack, 1665; GCN: .set count_use_vgpr160_external_call.has_recursion, 0666; GCN: .set count_use_vgpr160_external_call.has_indirect_call, 1667; GCN: TotalNumSgprs: count_use_vgpr160_external_call.numbered_sgpr+6668; GCN: NumVgprs: count_use_vgpr160_external_call.num_vgpr669; GCN: ScratchSize: 0670define amdgpu_kernel void @count_use_vgpr160_external_call() {671entry:672 tail call void asm sideeffect "; vgpr160 $0", "v"(<5 x i32> <i32 10, i32 11, i32 12, i32 13, i32 14>) #1673 call void @external()674 ret void675}676 677; Added at the of the .s are the module level maximums678; GCN: .set amdgpu.max_num_vgpr, 50679; GCN: .set amdgpu.max_num_agpr, 0680; GCN: .set amdgpu.max_num_sgpr, 80681 682attributes #0 = { nounwind noinline norecurse }683attributes #1 = { nounwind noinline norecurse }684attributes #2 = { nounwind noinline }685