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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -check-prefix=GCN %s3; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx9-generic --amdhsa-code-object-version=6 -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck -check-prefix=GCN %s4 5@gds0 = internal addrspace(2) global [4 x i32] poison, align 46@lds0 = internal addrspace(3) global [4 x i32] poison, align 1287@lds1 = internal addrspace(3) global [4 x i32] poison, align 2568 9; These two objects should be allocated at the same constant offsets10; from the base.11define amdgpu_kernel void @alloc_lds_gds(ptr addrspace(1) %out) #1 {12; GCN-LABEL: alloc_lds_gds:13; GCN: ; %bb.0:14; GCN-NEXT: v_mov_b32_e32 v0, 515; GCN-NEXT: v_mov_b32_e32 v1, 016; GCN-NEXT: s_mov_b32 m0, 1617; GCN-NEXT: s_nop 018; GCN-NEXT: ds_add_u32 v1, v0 offset:12 gds19; GCN-NEXT: s_waitcnt lgkmcnt(0)20; GCN-NEXT: buffer_wbinvl121; GCN-NEXT: ds_add_u32 v1, v0 offset:1222; GCN-NEXT: s_waitcnt lgkmcnt(0)23; GCN-NEXT: s_endpgm24 %gep.gds = getelementptr [4 x i32], ptr addrspace(2) @gds0, i32 0, i32 325 %val0 = atomicrmw add ptr addrspace(2) %gep.gds, i32 5 acq_rel26 %gep.lds = getelementptr [4 x i32], ptr addrspace(3) @lds0, i32 0, i32 327 %val1 = atomicrmw add ptr addrspace(3) %gep.lds, i32 5 acq_rel28 ret void29}30 31; The LDS alignment shouldn't change offset of GDS.32define amdgpu_kernel void @alloc_lds_gds_align(ptr addrspace(1) %out) #1 {33; GCN-LABEL: alloc_lds_gds_align:34; GCN: ; %bb.0:35; GCN-NEXT: v_mov_b32_e32 v0, 536; GCN-NEXT: v_mov_b32_e32 v1, 037; GCN-NEXT: s_mov_b32 m0, 1638; GCN-NEXT: s_nop 039; GCN-NEXT: ds_add_u32 v1, v0 offset:12 gds40; GCN-NEXT: s_waitcnt lgkmcnt(0)41; GCN-NEXT: buffer_wbinvl142; GCN-NEXT: ds_add_u32 v1, v0 offset:14043; GCN-NEXT: s_waitcnt lgkmcnt(0)44; GCN-NEXT: ds_add_u32 v1, v0 offset:1245; GCN-NEXT: s_waitcnt lgkmcnt(0)46; GCN-NEXT: s_endpgm47 %gep.gds = getelementptr [4 x i32], ptr addrspace(2) @gds0, i32 0, i32 348 %val0 = atomicrmw add ptr addrspace(2) %gep.gds, i32 5 acq_rel49 50 %gep.lds0 = getelementptr [4 x i32], ptr addrspace(3) @lds0, i32 0, i32 351 %val1 = atomicrmw add ptr addrspace(3) %gep.lds0, i32 5 acq_rel52 53 %gep.lds1 = getelementptr [4 x i32], ptr addrspace(3) @lds1, i32 0, i32 354 %val2 = atomicrmw add ptr addrspace(3) %gep.lds1, i32 5 acq_rel55 ret void56}57 58@gds_align8 = internal addrspace(2) global [4 x i32] poison, align 859@gds_align32 = internal addrspace(2) global [4 x i32] poison, align 3260 61define amdgpu_kernel void @gds_global_align(ptr addrspace(1) %out) {62; GCN-LABEL: gds_global_align:63; GCN: ; %bb.0:64; GCN-NEXT: v_mov_b32_e32 v0, 565; GCN-NEXT: v_mov_b32_e32 v1, 066; GCN-NEXT: s_mov_b32 m0, 3267; GCN-NEXT: s_nop 068; GCN-NEXT: ds_add_u32 v1, v0 offset:28 gds69; GCN-NEXT: s_waitcnt lgkmcnt(0)70; GCN-NEXT: buffer_wbinvl171; GCN-NEXT: ds_add_u32 v1, v0 offset:12 gds72; GCN-NEXT: s_waitcnt lgkmcnt(0)73; GCN-NEXT: buffer_wbinvl174; GCN-NEXT: s_endpgm75 %gep.gds0 = getelementptr [4 x i32], ptr addrspace(2) @gds_align8, i32 0, i32 376 %val0 = atomicrmw add ptr addrspace(2) %gep.gds0, i32 5 acq_rel77 %gep.gds1 = getelementptr [4 x i32], ptr addrspace(2) @gds_align32, i32 0, i32 378 %val1 = atomicrmw add ptr addrspace(2) %gep.gds1, i32 5 acq_rel79 ret void80}81 82define amdgpu_kernel void @gds_global_align_plus_attr(ptr addrspace(1) %out) #0 {83; GCN-LABEL: gds_global_align_plus_attr:84; GCN: ; %bb.0:85; GCN-NEXT: v_mov_b32_e32 v0, 586; GCN-NEXT: v_mov_b32_e32 v1, 087; GCN-NEXT: s_movk_i32 m0, 0x42088; GCN-NEXT: s_nop 089; GCN-NEXT: ds_add_u32 v1, v0 offset:1052 gds90; GCN-NEXT: s_waitcnt lgkmcnt(0)91; GCN-NEXT: buffer_wbinvl192; GCN-NEXT: ds_add_u32 v1, v0 offset:1036 gds93; GCN-NEXT: s_waitcnt lgkmcnt(0)94; GCN-NEXT: buffer_wbinvl195; GCN-NEXT: s_endpgm96 %gep.gds0 = getelementptr [4 x i32], ptr addrspace(2) @gds_align8, i32 0, i32 397 %val0 = atomicrmw add ptr addrspace(2) %gep.gds0, i32 5 acq_rel98 %gep.gds1 = getelementptr [4 x i32], ptr addrspace(2) @gds_align32, i32 0, i32 399 %val1 = atomicrmw add ptr addrspace(2) %gep.gds1, i32 5 acq_rel100 ret void101}102 103@small.gds = internal addrspace(2) global i8 poison, align 1104@gds.external = external unnamed_addr addrspace(3) global [0 x i32], align 4105 106define amdgpu_kernel void @gds_extern_align(ptr addrspace(1) %out, ptr addrspace(2) %gds.arg) #0 {107; GCN-LABEL: gds_extern_align:108; GCN: ; %bb.0:109; GCN-NEXT: s_load_dword s0, s[4:5], 0x8110; GCN-NEXT: v_mov_b32_e32 v0, 5111; GCN-NEXT: s_movk_i32 m0, 0x401112; GCN-NEXT: s_movk_i32 s1, 0x400113; GCN-NEXT: ;;#ASMSTART114; GCN-NEXT: ; use s1115; GCN-NEXT: ;;#ASMEND116; GCN-NEXT: s_waitcnt lgkmcnt(0)117; GCN-NEXT: v_mov_b32_e32 v1, s0118; GCN-NEXT: ds_add_u32 v1, v0 offset:12 gds119; GCN-NEXT: s_waitcnt lgkmcnt(0)120; GCN-NEXT: buffer_wbinvl1121; GCN-NEXT: s_endpgm122 call void asm sideeffect "; use $0","s"(ptr addrspace(2) @small.gds)123 %gep.gds0 = getelementptr [4 x i32], ptr addrspace(2) %gds.arg, i32 0, i32 3124 %val0 = atomicrmw add ptr addrspace(2) %gep.gds0, i32 5 acq_rel125 ret void126}127 128attributes #0 = { "amdgpu-gds-size"="1024" }129