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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck -check-prefixes=CHECK,SDAG %s3; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck -check-prefixes=CHECK,GISEL %s4 5define void @gws_init_offset0() #0 {6; CHECK-LABEL: gws_init_offset0:7; CHECK: ; %bb.0:8; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9; CHECK-NEXT: ;;#ASMSTART10; CHECK-NEXT: ; def a011; CHECK-NEXT: ;;#ASMEND12; CHECK-NEXT: s_mov_b32 m0, 013; CHECK-NEXT: s_nop 014; CHECK-NEXT: ds_gws_init a0 gds15; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)16; CHECK-NEXT: s_setpc_b64 s[30:31]17 %val = call i32 asm "; def $0", "=a"()18 call void @llvm.amdgcn.ds.gws.init(i32 %val, i32 0)19 ret void20}21 22define void @gws_init_offset63() #0 {23; CHECK-LABEL: gws_init_offset63:24; CHECK: ; %bb.0:25; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)26; CHECK-NEXT: ;;#ASMSTART27; CHECK-NEXT: ; def a028; CHECK-NEXT: ;;#ASMEND29; CHECK-NEXT: s_mov_b32 m0, 030; CHECK-NEXT: s_nop 031; CHECK-NEXT: ds_gws_init a0 offset:63 gds32; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)33; CHECK-NEXT: s_setpc_b64 s[30:31]34 %val = call i32 asm "; def $0", "=a"()35 call void @llvm.amdgcn.ds.gws.init(i32 %val, i32 63)36 ret void37}38 39define void @gws_init_sgpr_offset(i32 inreg %offset) #0 {40; CHECK-LABEL: gws_init_sgpr_offset:41; CHECK: ; %bb.0:42; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)43; CHECK-NEXT: ;;#ASMSTART44; CHECK-NEXT: ; def a045; CHECK-NEXT: ;;#ASMEND46; CHECK-NEXT: s_lshl_b32 m0, s16, 1647; CHECK-NEXT: s_nop 048; CHECK-NEXT: ds_gws_init a0 gds49; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)50; CHECK-NEXT: s_setpc_b64 s[30:31]51 %val = call i32 asm "; def $0", "=a"()52 call void @llvm.amdgcn.ds.gws.init(i32 %val, i32 %offset)53 ret void54}55 56define amdgpu_kernel void @gws_init_agpr_offset() #0 {57; CHECK-LABEL: gws_init_agpr_offset:58; CHECK: ; %bb.0:59; CHECK-NEXT: ;;#ASMSTART60; CHECK-NEXT: ; def a161; CHECK-NEXT: ;;#ASMEND62; CHECK-NEXT: v_accvgpr_read_b32 v0, a163; CHECK-NEXT: v_readfirstlane_b32 s0, v064; CHECK-NEXT: ;;#ASMSTART65; CHECK-NEXT: ; def a066; CHECK-NEXT: ;;#ASMEND67; CHECK-NEXT: s_lshl_b32 m0, s0, 1668; CHECK-NEXT: s_nop 069; CHECK-NEXT: ds_gws_init a0 gds70; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)71; CHECK-NEXT: s_endpgm72 %val = call i32 asm "; def $0", "=a"()73 %offset = call i32 asm "; def $0", "=a"()74 call void @llvm.amdgcn.ds.gws.init(i32 %val, i32 %offset)75 ret void76}77 78define void @gws_init_agpr_offset_add1() #0 {79; CHECK-LABEL: gws_init_agpr_offset_add1:80; CHECK: ; %bb.0:81; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)82; CHECK-NEXT: ;;#ASMSTART83; CHECK-NEXT: ; def a184; CHECK-NEXT: ;;#ASMEND85; CHECK-NEXT: v_accvgpr_read_b32 v0, a186; CHECK-NEXT: v_readfirstlane_b32 s4, v087; CHECK-NEXT: ;;#ASMSTART88; CHECK-NEXT: ; def a089; CHECK-NEXT: ;;#ASMEND90; CHECK-NEXT: s_lshl_b32 m0, s4, 1691; CHECK-NEXT: s_nop 092; CHECK-NEXT: ds_gws_init a0 offset:1 gds93; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)94; CHECK-NEXT: s_setpc_b64 s[30:31]95 %val = call i32 asm "; def $0", "=a"()96 %offset.base = call i32 asm "; def $0", "=a"()97 %offset = add i32 %offset.base, 198 call void @llvm.amdgcn.ds.gws.init(i32 %val, i32 %offset)99 ret void100}101 102define amdgpu_kernel void @gws_init_vgpr_offset_add(i32 %val) #0 {103; CHECK-LABEL: gws_init_vgpr_offset_add:104; CHECK: ; %bb.0:105; CHECK-NEXT: s_load_dword s0, s[8:9], 0x0106; CHECK-NEXT: ;;#ASMSTART107; CHECK-NEXT: ; def a0108; CHECK-NEXT: ;;#ASMEND109; CHECK-NEXT: v_accvgpr_read_b32 v0, a0110; CHECK-NEXT: v_readfirstlane_b32 s1, v0111; CHECK-NEXT: s_lshl_b32 m0, s1, 16112; CHECK-NEXT: s_waitcnt lgkmcnt(0)113; CHECK-NEXT: v_mov_b32_e32 v0, s0114; CHECK-NEXT: ds_gws_init v0 offset:3 gds115; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)116; CHECK-NEXT: s_endpgm117 %agpr.offset.base = call i32 asm "; def $0", "=a"()118 %agpr.offset = add i32 %agpr.offset.base, 3119 call void @llvm.amdgcn.ds.gws.init(i32 %val, i32 %agpr.offset)120 ret void121}122 123define void @gws_barrier_offset0() #0 {124; CHECK-LABEL: gws_barrier_offset0:125; CHECK: ; %bb.0:126; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; CHECK-NEXT: ;;#ASMSTART128; CHECK-NEXT: ; def a0129; CHECK-NEXT: ;;#ASMEND130; CHECK-NEXT: s_mov_b32 m0, 0131; CHECK-NEXT: s_nop 0132; CHECK-NEXT: ds_gws_barrier a0 gds133; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)134; CHECK-NEXT: s_setpc_b64 s[30:31]135 %val = call i32 asm "; def $0", "=a"()136 call void @llvm.amdgcn.ds.gws.barrier(i32 %val, i32 0)137 ret void138}139 140define void @gws_barrier_offset63() #0 {141; CHECK-LABEL: gws_barrier_offset63:142; CHECK: ; %bb.0:143; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)144; CHECK-NEXT: ;;#ASMSTART145; CHECK-NEXT: ; def a0146; CHECK-NEXT: ;;#ASMEND147; CHECK-NEXT: s_mov_b32 m0, 0148; CHECK-NEXT: s_nop 0149; CHECK-NEXT: ds_gws_barrier a0 offset:63 gds150; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)151; CHECK-NEXT: s_setpc_b64 s[30:31]152 %val = call i32 asm "; def $0", "=a"()153 call void @llvm.amdgcn.ds.gws.barrier(i32 %val, i32 63)154 ret void155}156 157define void @gws_barrier_sgpr_offset(i32 inreg %offset) #0 {158; CHECK-LABEL: gws_barrier_sgpr_offset:159; CHECK: ; %bb.0:160; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)161; CHECK-NEXT: ;;#ASMSTART162; CHECK-NEXT: ; def a0163; CHECK-NEXT: ;;#ASMEND164; CHECK-NEXT: s_lshl_b32 m0, s16, 16165; CHECK-NEXT: s_nop 0166; CHECK-NEXT: ds_gws_barrier a0 gds167; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)168; CHECK-NEXT: s_setpc_b64 s[30:31]169 %val = call i32 asm "; def $0", "=a"()170 call void @llvm.amdgcn.ds.gws.barrier(i32 %val, i32 %offset)171 ret void172}173 174define void @gws_sema_v_offset0() #0 {175; SDAG-LABEL: gws_sema_v_offset0:176; SDAG: ; %bb.0:177; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)178; SDAG-NEXT: s_mov_b32 m0, 0179; SDAG-NEXT: s_nop 0180; SDAG-NEXT: ds_gws_sema_v gds181; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)182; SDAG-NEXT: s_setpc_b64 s[30:31]183;184; GISEL-LABEL: gws_sema_v_offset0:185; GISEL: ; %bb.0:186; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)187; GISEL-NEXT: s_mov_b32 m0, 0188; GISEL-NEXT: s_nop 0189; GISEL-NEXT: ds_gws_sema_v gds190; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)191; GISEL-NEXT: ;;#ASMSTART192; GISEL-NEXT: ; def a0193; GISEL-NEXT: ;;#ASMEND194; GISEL-NEXT: s_setpc_b64 s[30:31]195 %val = call i32 asm "; def $0", "=a"()196 call void @llvm.amdgcn.ds.gws.sema.v(i32 0)197 ret void198}199 200define void @gws_sema_br_offset0() #0 {201; CHECK-LABEL: gws_sema_br_offset0:202; CHECK: ; %bb.0:203; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)204; CHECK-NEXT: ;;#ASMSTART205; CHECK-NEXT: ; def a0206; CHECK-NEXT: ;;#ASMEND207; CHECK-NEXT: s_mov_b32 m0, 0208; CHECK-NEXT: s_nop 0209; CHECK-NEXT: ds_gws_sema_br a0 gds210; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)211; CHECK-NEXT: s_setpc_b64 s[30:31]212 %val = call i32 asm "; def $0", "=a"()213 call void @llvm.amdgcn.ds.gws.sema.br(i32 %val, i32 0)214 ret void215}216 217define void @gws_sema_p_offset0() #0 {218; SDAG-LABEL: gws_sema_p_offset0:219; SDAG: ; %bb.0:220; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)221; SDAG-NEXT: s_mov_b32 m0, 0222; SDAG-NEXT: s_nop 0223; SDAG-NEXT: ds_gws_sema_p gds224; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)225; SDAG-NEXT: s_setpc_b64 s[30:31]226;227; GISEL-LABEL: gws_sema_p_offset0:228; GISEL: ; %bb.0:229; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)230; GISEL-NEXT: s_mov_b32 m0, 0231; GISEL-NEXT: s_nop 0232; GISEL-NEXT: ds_gws_sema_p gds233; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)234; GISEL-NEXT: ;;#ASMSTART235; GISEL-NEXT: ; def a0236; GISEL-NEXT: ;;#ASMEND237; GISEL-NEXT: s_setpc_b64 s[30:31]238 %val = call i32 asm "; def $0", "=a"()239 call void @llvm.amdgcn.ds.gws.sema.p(i32 0)240 ret void241}242 243define void @gws_sema_release_all_offset0() #0 {244; SDAG-LABEL: gws_sema_release_all_offset0:245; SDAG: ; %bb.0:246; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)247; SDAG-NEXT: s_mov_b32 m0, 0248; SDAG-NEXT: s_nop 0249; SDAG-NEXT: ds_gws_sema_release_all gds250; SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)251; SDAG-NEXT: s_setpc_b64 s[30:31]252;253; GISEL-LABEL: gws_sema_release_all_offset0:254; GISEL: ; %bb.0:255; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)256; GISEL-NEXT: s_mov_b32 m0, 0257; GISEL-NEXT: s_nop 0258; GISEL-NEXT: ds_gws_sema_release_all gds259; GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)260; GISEL-NEXT: ;;#ASMSTART261; GISEL-NEXT: ; def a0262; GISEL-NEXT: ;;#ASMEND263; GISEL-NEXT: s_setpc_b64 s[30:31]264 %val = call i32 asm "; def $0", "=a"()265 call void @llvm.amdgcn.ds.gws.sema.release.all(i32 0)266 ret void267}268 269attributes #0 = { nounwind }270