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1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX700,WAVE64 %s2; RUN: llc -mattr=-xnack -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX803,WAVE64 %s3; RUN: llc -mattr=-xnack -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX900,WAVE64 %s4; RUN: llc -mattr=-xnack -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -enable-misched=0 -filetype=obj -o - < %s | llvm-readelf --notes - | FileCheck --check-prefixes=CHECK,GFX1010,WAVE32 %s5 6@var = addrspace(1) global float 0.07 8; CHECK: ---9; CHECK: amdhsa.kernels:10 11; CHECK: - .args:12; CHECK: .group_segment_fixed_size: 013; CHECK: .kernarg_segment_align: 814; CHECK: .kernarg_segment_size: 2415; CHECK: .max_flat_workgroup_size: 102416; CHECK: .name: test17; CHECK: .private_segment_fixed_size: 018; CHECK: .sgpr_count: 1019; CHECK: .symbol: test.kd20; CHECK: .vgpr_count: {{3|6}}21; WAVE64: .wavefront_size: 6422; WAVE32: .wavefront_size: 3223define amdgpu_kernel void @test(24 ptr addrspace(1) %r,25 ptr addrspace(1) %a,26 ptr addrspace(1) %b) "amdgpu-no-implicitarg-ptr" "amdgpu-no-flat-scratch-init" {27entry:28 %a.val = load half, ptr addrspace(1) %a29 %b.val = load half, ptr addrspace(1) %b30 %r.val = fadd half %a.val, %b.val31 store half %r.val, ptr addrspace(1) %r32 ret void33}34 35; CHECK: - .args:36; CHECK: .max_flat_workgroup_size: 25637define amdgpu_kernel void @test_max_flat_workgroup_size(38 ptr addrspace(1) %r,39 ptr addrspace(1) %a,40 ptr addrspace(1) %b) #2 {41entry:42 %a.val = load half, ptr addrspace(1) %a43 %b.val = load half, ptr addrspace(1) %b44 %r.val = fadd half %a.val, %b.val45 store half %r.val, ptr addrspace(1) %r46 ret void47}48 49; CHECK: .name: num_spilled_sgprs50; GFX700: .sgpr_spill_count: 1051; GFX803: .sgpr_spill_count: 1052; GFX900: .sgpr_spill_count: 6253; GFX1010: .sgpr_spill_count: 6054; CHECK: .symbol: num_spilled_sgprs.kd55define amdgpu_kernel void @num_spilled_sgprs(56 ptr addrspace(1) %out0, ptr addrspace(1) %out1, [8 x i32],57 ptr addrspace(1) %out2, ptr addrspace(1) %out3, [8 x i32],58 ptr addrspace(1) %out4, ptr addrspace(1) %out5, [8 x i32],59 ptr addrspace(1) %out6, ptr addrspace(1) %out7, [8 x i32],60 ptr addrspace(1) %out8, ptr addrspace(1) %out9, [8 x i32],61 ptr addrspace(1) %outa, ptr addrspace(1) %outb, [8 x i32],62 ptr addrspace(1) %outc, ptr addrspace(1) %outd, [8 x i32],63 ptr addrspace(1) %oute, ptr addrspace(1) %outf, [8 x i32],64 ptr addrspace(1) %outg, ptr addrspace(1) %outh, [8 x i32],65 ptr addrspace(1) %outi, ptr addrspace(1) %outj, [8 x i32],66 ptr addrspace(1) %outk, ptr addrspace(1) %outl, [8 x i32],67 ptr addrspace(1) %outm, ptr addrspace(1) %outn, [8 x i32],68 i32 %in0, i32 %in1, i32 %in2, i32 %in3, [8 x i32],69 i32 %in4, i32 %in5, i32 %in6, i32 %in7, [8 x i32],70 i32 %in8, i32 %in9, i32 %ina, i32 %inb, [8 x i32],71 i32 %inc, i32 %ind, i32 %ine, i32 %inf, i32 %ing, i32 %inh,72 i32 %ini, i32 %inj, i32 %ink) #0 {73entry:74 store volatile i32 %in0, ptr addrspace(1) %out075 store volatile i32 %in1, ptr addrspace(1) %out176 store volatile i32 %in2, ptr addrspace(1) %out277 store volatile i32 %in3, ptr addrspace(1) %out378 store volatile i32 %in4, ptr addrspace(1) %out479 store volatile i32 %in5, ptr addrspace(1) %out580 store volatile i32 %in6, ptr addrspace(1) %out681 store volatile i32 %in7, ptr addrspace(1) %out782 store volatile i32 %in8, ptr addrspace(1) %out883 store volatile i32 %in9, ptr addrspace(1) %out984 store volatile i32 %ina, ptr addrspace(1) %outa85 store volatile i32 %inb, ptr addrspace(1) %outb86 store volatile i32 %inc, ptr addrspace(1) %outc87 store volatile i32 %ind, ptr addrspace(1) %outd88 store volatile i32 %ine, ptr addrspace(1) %oute89 store volatile i32 %inf, ptr addrspace(1) %outf90 store volatile i32 %ing, ptr addrspace(1) %outg91 store volatile i32 %inh, ptr addrspace(1) %outh92 store volatile i32 %ini, ptr addrspace(1) %outi93 store volatile i32 %inj, ptr addrspace(1) %outj94 store volatile i32 %ink, ptr addrspace(1) %outk95 ret void96}97 98; CHECK: .name: num_spilled_vgprs99; CHECK: .symbol: num_spilled_vgprs.kd100; CHECK: .vgpr_spill_count: {{13|14}}101define amdgpu_kernel void @num_spilled_vgprs() #1 {102 %val0 = load volatile float, ptr addrspace(1) @var103 %val1 = load volatile float, ptr addrspace(1) @var104 %val2 = load volatile float, ptr addrspace(1) @var105 %val3 = load volatile float, ptr addrspace(1) @var106 %val4 = load volatile float, ptr addrspace(1) @var107 %val5 = load volatile float, ptr addrspace(1) @var108 %val6 = load volatile float, ptr addrspace(1) @var109 %val7 = load volatile float, ptr addrspace(1) @var110 %val8 = load volatile float, ptr addrspace(1) @var111 %val9 = load volatile float, ptr addrspace(1) @var112 %val10 = load volatile float, ptr addrspace(1) @var113 %val11 = load volatile float, ptr addrspace(1) @var114 %val12 = load volatile float, ptr addrspace(1) @var115 %val13 = load volatile float, ptr addrspace(1) @var116 %val14 = load volatile float, ptr addrspace(1) @var117 %val15 = load volatile float, ptr addrspace(1) @var118 %val16 = load volatile float, ptr addrspace(1) @var119 %val17 = load volatile float, ptr addrspace(1) @var120 %val18 = load volatile float, ptr addrspace(1) @var121 %val19 = load volatile float, ptr addrspace(1) @var122 %val20 = load volatile float, ptr addrspace(1) @var123 %val21 = load volatile float, ptr addrspace(1) @var124 %val22 = load volatile float, ptr addrspace(1) @var125 %val23 = load volatile float, ptr addrspace(1) @var126 %val24 = load volatile float, ptr addrspace(1) @var127 %val25 = load volatile float, ptr addrspace(1) @var128 %val26 = load volatile float, ptr addrspace(1) @var129 %val27 = load volatile float, ptr addrspace(1) @var130 %val28 = load volatile float, ptr addrspace(1) @var131 %val29 = load volatile float, ptr addrspace(1) @var132 %val30 = load volatile float, ptr addrspace(1) @var133 134 store volatile float %val0, ptr addrspace(1) @var135 store volatile float %val1, ptr addrspace(1) @var136 store volatile float %val2, ptr addrspace(1) @var137 store volatile float %val3, ptr addrspace(1) @var138 store volatile float %val4, ptr addrspace(1) @var139 store volatile float %val5, ptr addrspace(1) @var140 store volatile float %val6, ptr addrspace(1) @var141 store volatile float %val7, ptr addrspace(1) @var142 store volatile float %val8, ptr addrspace(1) @var143 store volatile float %val9, ptr addrspace(1) @var144 store volatile float %val10, ptr addrspace(1) @var145 store volatile float %val11, ptr addrspace(1) @var146 store volatile float %val12, ptr addrspace(1) @var147 store volatile float %val13, ptr addrspace(1) @var148 store volatile float %val14, ptr addrspace(1) @var149 store volatile float %val15, ptr addrspace(1) @var150 store volatile float %val16, ptr addrspace(1) @var151 store volatile float %val17, ptr addrspace(1) @var152 store volatile float %val18, ptr addrspace(1) @var153 store volatile float %val19, ptr addrspace(1) @var154 store volatile float %val20, ptr addrspace(1) @var155 store volatile float %val21, ptr addrspace(1) @var156 store volatile float %val22, ptr addrspace(1) @var157 store volatile float %val23, ptr addrspace(1) @var158 store volatile float %val24, ptr addrspace(1) @var159 store volatile float %val25, ptr addrspace(1) @var160 store volatile float %val26, ptr addrspace(1) @var161 store volatile float %val27, ptr addrspace(1) @var162 store volatile float %val28, ptr addrspace(1) @var163 store volatile float %val29, ptr addrspace(1) @var164 store volatile float %val30, ptr addrspace(1) @var165 166 ret void167}168 169; CHECK: amdhsa.version:170; CHECK-NEXT: - 1171; CHECK-NEXT: - 1172 173attributes #0 = { "amdgpu-num-sgpr"="20" "amdgpu-no-flat-scratch-init" }174attributes #1 = { "amdgpu-num-vgpr"="20" }175attributes #2 = { "amdgpu-flat-work-group-size"="1,256" }176 177!llvm.module.flags = !{!0}178!0 = !{i32 1, !"amdhsa_code_object_version", i32 400}179